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/illumos-gate/usr/src/uts/common/io/igc/
H A Digc_osdep.h54 typedef int32_t s32; typedef
/illumos-gate/usr/src/uts/common/io/igc/core/
H A Digc_phy.h11 s32 igc_null_read_reg(struct igc_hw *hw, u32 offset, u16 *data);
13 s32 igc_null_lplu_state(struct igc_hw *hw, bool active);
14 s32 igc_null_write_reg(struct igc_hw *hw, u32 offset, u16 data);
15 s32 igc_null_set_page(struct igc_hw *hw, u16 data);
16 s32 igc_check_downshift_generic(struct igc_hw *hw);
17 s32 igc_check_reset_block_generic(struct igc_hw *hw);
18 s32 igc_get_phy_id(struct igc_hw *hw);
20 s32 igc_phy_hw_reset_generic(struct igc_hw *hw);
21 s32 igc_phy_reset_dsp_generic(struct igc_hw *hw);
23 s32 igc_setup_copper_link_generic(struct igc_hw *hw);
[all …]
H A Digc_phy.c133 s32 ret_val = IGC_SUCCESS; in igc_get_phy_id()
288 s32 ret_val; in igc_phy_setup_autoneg()
472 s32 ret_val; in igc_copper_link_autoneg()
535 s32 ret_val; in igc_setup_copper_link_generic()
656 s32 ret_val; in igc_set_d3_lplu_state_generic()
740 s32 ret_val; in igc_check_downshift_generic()
764 s32 ret_val = IGC_SUCCESS; in igc_wait_autoneg()
855 s32 ret_val; in igc_phy_hw_reset_generic()
945 s32 ret_val; in igc_write_phy_reg_gpy()
979 s32 ret_val; in igc_read_phy_reg_gpy()
[all …]
H A Digc_i225.c135 s32 ret_val = IGC_SUCCESS; in igc_init_phy_params_i225()
184 s32 ret_val; in igc_reset_hw_i225()
240 s32 ret_val; in igc_acquire_nvm_i225()
346 s32 ret_val; in igc_setup_copper_link_i225()
374 s32 i = 0; in igc_get_hw_semaphore_i225()
446 s32 status = IGC_SUCCESS; in igc_read_nvm_srrd_i225()
618 s32 ret_val; in igc_update_nvm_checksum_i225()
771 s32 ret_val = 0; in igc_update_flash_i225()
889 s32 size; in igc_set_ltr_i225()
990 s32 ret_val; in igc_check_for_link_i225()
[all …]
H A Digc_i225.h11 s32 igc_update_flash_i225(struct igc_hw *hw);
12 s32 igc_update_nvm_checksum_i225(struct igc_hw *hw);
13 s32 igc_validate_nvm_checksum_i225(struct igc_hw *hw);
14 s32 igc_write_nvm_srwr_i225(struct igc_hw *hw, u16 offset,
16 s32 igc_read_nvm_srrd_i225(struct igc_hw *hw, u16 offset,
18 s32 igc_set_flsw_flash_burst_counter_i225(struct igc_hw *hw,
22 s32 igc_check_for_link_i225(struct igc_hw *hw);
23 s32 igc_acquire_swfw_sync_i225(struct igc_hw *hw, u16 mask);
25 s32 igc_init_hw_i225(struct igc_hw *hw);
26 s32 igc_setup_copper_link_i225(struct igc_hw *hw);
[all …]
H A Digc_mac.c54 s32 igc_null_link_info(struct igc_hw IGC_UNUSEDARG *hw, in igc_null_link_info()
201 s32 ret_val; in igc_check_alt_mac_addr_generic()
461 s32 ret_val; in igc_check_for_copper_link_generic()
526 s32 igc_setup_link_generic(struct igc_hw *hw) in igc_setup_link_generic()
528 s32 ret_val; in igc_setup_link_generic()
642 s32 igc_force_mac_fc_generic(struct igc_hw *hw) in igc_force_mac_fc_generic()
707 s32 ret_val = IGC_SUCCESS; in igc_config_fc_after_link_up_generic()
923 s32 timeout = hw->nvm.word_size + 1; in igc_get_hw_semaphore_generic()
924 s32 i = 0; in igc_get_hw_semaphore_generic()
992 s32 i = 0; in igc_get_auto_rd_done_generic()
[all …]
H A Digc_mac.h12 s32 igc_null_ops_generic(struct igc_hw *hw);
13 s32 igc_null_link_info(struct igc_hw *hw, u16 *s, u16 *d);
18 s32 igc_check_for_copper_link_generic(struct igc_hw *hw);
20 s32 igc_disable_pcie_master_generic(struct igc_hw *hw);
21 s32 igc_force_mac_fc_generic(struct igc_hw *hw);
22 s32 igc_get_auto_rd_done_generic(struct igc_hw *hw);
23 s32 igc_get_bus_info_pcie_generic(struct igc_hw *hw);
25 s32 igc_get_hw_semaphore_generic(struct igc_hw *hw);
31 s32 igc_set_fc_watermarks_generic(struct igc_hw *hw);
32 s32 igc_setup_link_generic(struct igc_hw *hw);
[all …]
H A Digc_nvm.c40 s32 igc_null_read_nvm(struct igc_hw IGC_UNUSEDARG *hw, in igc_null_read_nvm()
65 s32 igc_null_write_nvm(struct igc_hw IGC_UNUSEDARG *hw, in igc_null_write_nvm()
224 s32 igc_acquire_nvm_generic(struct igc_hw *hw) in igc_acquire_nvm_generic()
227 s32 timeout = IGC_NVM_GRANT_ATTEMPTS; in igc_acquire_nvm_generic()
323 static s32 igc_ready_nvm_eeprom(struct igc_hw *hw) in igc_ready_nvm_eeprom()
379 s32 ret_val = IGC_SUCCESS; in igc_read_nvm_eerd()
426 s32 ret_val = -IGC_ERR_NVM; in igc_write_nvm_spi()
503 s32 ret_val; in igc_read_pba_string_generic()
613 s32 igc_read_mac_addr_generic(struct igc_hw *hw) in igc_read_mac_addr_generic()
643 s32 ret_val; in igc_validate_nvm_checksum_generic()
[all …]
H A Digc_nvm.h11 s32 igc_null_read_nvm(struct igc_hw *hw, u16 a, u16 b, u16 *c);
13 s32 igc_null_led_default(struct igc_hw *hw, u16 *data);
14 s32 igc_null_write_nvm(struct igc_hw *hw, u16 a, u16 b, u16 *c);
15 s32 igc_acquire_nvm_generic(struct igc_hw *hw);
17 s32 igc_poll_eerd_eewr_done(struct igc_hw *hw, int ee_reg);
18 s32 igc_read_mac_addr_generic(struct igc_hw *hw);
19 s32 igc_read_pba_string_generic(struct igc_hw *hw, u8 *pba_num,
21 s32 igc_read_nvm_eerd(struct igc_hw *hw, u16 offset, u16 words,
24 s32 igc_validate_nvm_checksum_generic(struct igc_hw *hw);
25 s32 igc_write_nvm_spi(struct igc_hw *hw, u16 offset, u16 words,
[all …]
H A Digc_api.c16 s32 igc_init_mac_params(struct igc_hw *hw) in igc_init_mac_params()
18 s32 ret_val = IGC_SUCCESS; in igc_init_mac_params()
42 s32 igc_init_nvm_params(struct igc_hw *hw) in igc_init_nvm_params()
44 s32 ret_val = IGC_SUCCESS; in igc_init_nvm_params()
70 s32 ret_val = IGC_SUCCESS; in igc_init_phy_params()
96 s32 igc_set_mac_type(struct igc_hw *hw) in igc_set_mac_type()
99 s32 ret_val = IGC_SUCCESS; in igc_set_mac_type()
143 s32 ret_val; in igc_setup_init_funcs()
300 s32 igc_reset_hw(struct igc_hw *hw) in igc_reset_hw()
315 s32 igc_init_hw(struct igc_hw *hw) in igc_init_hw()
[all …]
H A Digc_api.h14 s32 igc_set_mac_type(struct igc_hw *hw);
16 s32 igc_init_mac_params(struct igc_hw *hw);
17 s32 igc_init_nvm_params(struct igc_hw *hw);
18 s32 igc_init_phy_params(struct igc_hw *hw);
19 s32 igc_get_bus_info(struct igc_hw *hw);
22 s32 igc_force_mac_fc(struct igc_hw *hw);
23 s32 igc_check_for_link(struct igc_hw *hw);
24 s32 igc_reset_hw(struct igc_hw *hw);
25 s32 igc_init_hw(struct igc_hw *hw);
26 s32 igc_setup_link(struct igc_hw *hw);
[all …]
H A Digc_base.c18 s32 igc_acquire_phy_base(struct igc_hw *hw) in igc_acquire_phy_base()
54 s32 igc_init_hw_base(struct igc_hw *hw) in igc_init_hw_base()
57 s32 ret_val; in igc_init_hw_base()
H A Digc_base.h11 s32 igc_init_hw_base(struct igc_hw *hw);
14 s32 igc_acquire_phy_base(struct igc_hw *hw);
H A Digc_hw.h345 s32 (*init_params)(struct igc_hw *);
353 s32 (*reset_hw)(struct igc_hw *);
354 s32 (*init_hw)(struct igc_hw *);
355 s32 (*setup_link)(struct igc_hw *);
381 s32 (*init_params)(struct igc_hw *);
382 s32 (*acquire)(struct igc_hw *);
385 s32 (*get_info)(struct igc_hw *);
391 s32 (*reset)(struct igc_hw *);
404 s32 (*acquire)(struct igc_hw *);
408 s32 (*update)(struct igc_hw *);
[all …]
/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_ich8lan.c319 s32 ret_val; in e1000_init_phy_workarounds_pchlan()
461 s32 ret_val; in e1000_init_phy_params_pchlan()
560 s32 ret_val; in e1000_init_phy_params_ich8lan()
870 s32 ret_val; in __e1000_access_emi_reg_locked()
935 s32 ret_val; in e1000_set_eee_pchlan()
1253 s32 timer; in e1000_set_obff_timer_pch_lpt()
2192 s32 ret_val; in e1000_update_mc_addr_list_pch2lan()
2262 s32 ret_val; in e1000_write_smbus_addr()
2516 s32 ret_val; in e1000_configure_k1_ich8lan()
2636 s32 ret_val; in e1000_set_mdio_slow_mode_hv()
[all …]
H A De1000_api.c46 s32 ret_val = E1000_SUCCESS; in e1000_init_mac_params()
72 s32 ret_val = E1000_SUCCESS; in e1000_init_nvm_params()
98 s32 ret_val = E1000_SUCCESS; in e1000_init_phy_params()
124 s32 ret_val = E1000_SUCCESS; in e1000_init_mbx_params()
153 s32 ret_val = E1000_SUCCESS; in e1000_set_mac_type()
461 s32 ret_val; in e1000_setup_init_funcs()
713 s32 e1000_reset_hw(struct e1000_hw *hw) in e1000_reset_hw()
728 s32 e1000_init_hw(struct e1000_hw *hw) in e1000_init_hw()
778 s32 e1000_setup_led(struct e1000_hw *hw) in e1000_setup_led()
839 s32 e1000_led_on(struct e1000_hw *hw) in e1000_led_on()
[all …]
H A De1000_hw.h778 s32 (*led_on)(struct e1000_hw *);
779 s32 (*led_off)(struct e1000_hw *);
781 s32 (*reset_hw)(struct e1000_hw *);
782 s32 (*init_hw)(struct e1000_hw *);
814 s32 (*acquire)(struct e1000_hw *);
818 s32 (*commit)(struct e1000_hw *);
822 s32 (*get_info)(struct e1000_hw *);
828 s32 (*reset)(struct e1000_hw *);
843 s32 (*acquire)(struct e1000_hw *);
847 s32 (*update)(struct e1000_hw *);
[all …]
/illumos-gate/usr/src/common/crypto/sha2/
H A Dsha2.c160 uint32_t a = ctx->state.s32[0]; in SHA256Transform()
161 uint32_t b = ctx->state.s32[1]; in SHA256Transform()
353 ctx->state.s32[0] += a; in SHA256Transform()
354 ctx->state.s32[1] += b; in SHA256Transform()
355 ctx->state.s32[2] += c; in SHA256Transform()
356 ctx->state.s32[3] += d; in SHA256Transform()
357 ctx->state.s32[4] += e; in SHA256Transform()
358 ctx->state.s32[5] += f; in SHA256Transform()
359 ctx->state.s32[6] += g; in SHA256Transform()
360 ctx->state.s32[7] += h; in SHA256Transform()
[all …]
/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_82598.c124 s32 ret_val; in ixgbe_init_ops_82598()
196 s32 ret_val = IXGBE_SUCCESS; in ixgbe_init_phy_ops_82598()
259 s32 ret_val = IXGBE_SUCCESS; in ixgbe_start_hw_82598()
301 s32 status = IXGBE_SUCCESS; in ixgbe_get_link_capabilities_82598()
411 s32 ret_val = IXGBE_SUCCESS; in ixgbe_fc_enable_82598()
564 s32 status = IXGBE_SUCCESS; in ixgbe_start_mac_link_82598()
737 s32 status = IXGBE_SUCCESS; in ixgbe_setup_mac_link_82598()
790 s32 status; in ixgbe_setup_copper_link_82598()
813 s32 status = IXGBE_SUCCESS; in ixgbe_reset_hw_82598()
814 s32 phy_status = IXGBE_SUCCESS; in ixgbe_reset_hw_82598()
[all …]
/illumos-gate/usr/src/uts/common/io/bnx/include/
H A Dbcmtype.h61 typedef s32 s32_t;
96 typedef int32_t s32; typedef
227 typedef S32 s32; typedef
/illumos-gate/usr/src/cmd/sgs/elfedit/common/
H A Delfedit.c2183 cmd_ret = (* cmd_func)(state.elf.obj_state.s32, in dispatch_user_cmds()
3367 (* cmdcpl_func)(state.elf.obj_state.s32, in cmd_match_fcn()
H A Delfedit_machelf.c431 state.elf.obj_state.s32 = obj_state; in elfedit64_init_obj_state()
H A Delfconst.c382 *osabi = state.elf.obj_state.s32->os_ehdr->e_ident[EI_OSABI]; in init_libconv_strings()
383 *mach = state.elf.obj_state.s32->os_ehdr->e_machine; in init_libconv_strings()
446 cur_osabi = state.elf.obj_state.s32->os_ehdr->e_ident[EI_OSABI]; in invalidate_libconv_strings()
447 cur_mach = state.elf.obj_state.s32->os_ehdr->e_machine; in invalidate_libconv_strings()
/illumos-gate/usr/src/uts/common/io/ixgbe/
H A Dixgbe_osdep.h141 typedef int32_t s32; typedef
/illumos-gate/usr/src/uts/common/io/e1000g/
H A De1000g_sw.h1089 s32 e1000_fifo_workaround_82547(struct e1000_hw *hw, u16 length);
1093 s32 e1000_igp_ttl_workaround_82547(struct e1000_hw *hw);

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