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Searched refs:FZC_DMC (Results 1 – 5 of 5) sorted by relevance

/illumos-gate/usr/src/uts/common/sys/nxge/
H A Dnxge_defs.h50 #define FZC_DMC 0x680000 macro
117 #define RX_ADDR_MD (FZC_DMC + 0x00070)
129 #define TX_LOG_VAL1 (FZC_DMC + 0x40010)
131 #define TX_LOG_VAL2 (FZC_DMC + 0x40020)
143 #define RED_DIS_CNT (FZC_DMC + 0x30010)
147 #define TX_DMA_MAP0 (FZC_DMC + 0x50000)
148 #define TX_DMA_MAP1 (FZC_DMC + 0x50008)
149 #define TX_DMA_MAP2 (FZC_DMC + 0x50010)
150 #define TX_DMA_MAP3 (FZC_DMC + 0x50018)
154 #define DRR_WT (FZC_DMC + 0x51000)
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H A Dnxge_rxdma_hw.h40 #define RX_DMA_CK_DIV_REG (FZC_DMC + 0x00000)
70 #define DEF_PT0_RDC_REG (FZC_DMC + 0x00008)
71 #define DEF_PT1_RDC_REG (FZC_DMC + 0x00010)
72 #define DEF_PT2_RDC_REG (FZC_DMC + 0x00018)
73 #define DEF_PT3_RDC_REG (FZC_DMC + 0x00020)
128 #define RX_ADDR_MD_REG (FZC_DMC + 0x00070)
163 #define PT_DRR_WT0_REG (FZC_DMC + 0x00028)
197 #define PT_USE0_REG (FZC_DMC + 0x00048)
198 #define PT_USE1_REG (FZC_DMC + 0x00050)
199 #define PT_USE2_REG (FZC_DMC + 0x00058)
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H A Dnxge_txdma_hw.h55 #define TX_LOG_PAGE_VLD_REG (FZC_DMC + 0x40000)
56 #define TX_LOG_PAGE_MASK1_REG (FZC_DMC + 0x40008)
57 #define TX_LOG_PAGE_VAL1_REG (FZC_DMC + 0x40010)
58 #define TX_LOG_PAGE_MASK2_REG (FZC_DMC + 0x40018)
59 #define TX_LOG_PAGE_VAL2_REG (FZC_DMC + 0x40020)
62 #define TX_LOG_PAGE_HDL_REG (FZC_DMC + 0x40038)
65 #define TX_ADDR_MD_REG (FZC_DMC + 0x45000)
735 #define TX_DMA_MAP_REG (FZC_DMC + 0x50000)
736 #define TX_DMA_MAP0_REG (FZC_DMC + 0x50000)
767 #define DRR_WT_REG (FZC_DMC + 0x51000)
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H A Dnxge_zcp_hw.h108 #define ZCP_PAGE_HDL_REG (FZC_DMC + 0x20038)
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_ndd.c2241 {"FZC_DMC", FZC_DMC},