Searched refs:x86_md_clear (Results 1 - 11 of 11) sorted by relevance

/illumos-gate/usr/src/uts/i86pc/ml/
H A Dmd_clear.s47 * By default, x86_md_clear is disabled until the system determines that
54 ENTRY_NP(x86_md_clear) function
63 SET_SIZE(x86_md_clear)
H A Dlocore.s315 call x86_md_clear
497 call x86_md_clear
507 call x86_md_clear
H A Dsyscall_asm_amd64.s627 call x86_md_clear
915 call x86_md_clear
1215 call x86_md_clear
1262 call x86_md_clear
/illumos-gate/usr/src/uts/intel/brand/common/
H A Dbrand_solaris.s56 call x86_md_clear /* Flush micro-arch state */
76 call x86_md_clear /* Flush micro-arch state */
/illumos-gate/usr/src/uts/i86pc/sys/
H A Dmachprivregs.h132 #define FAST_INTR_RETURN call x86_md_clear; jmp tr_iret_user
/illumos-gate/usr/src/uts/intel/ia32/ml/
H A Dexception.s286 call x86_md_clear
678 call x86_md_clear
H A Di86_subr.s314 call x86_md_clear
/illumos-gate/usr/src/uts/i86pc/os/
H A Dmp_pc.c460 x86_md_clear();
H A Dcpuid.c1169 * x86_md_clear() at all of these transition points.
1172 * then we change the spec_uarch_flush() function to point to x86_md_clear(). If
1173 * MDS_NO has been set, then this is fully mitigated and x86_md_clear() becomes
1250 * - MDS: x86_md_clear, requires microcode, disabling SMT
1251 * - TAA: x86_md_clear and disabling SMT OR microcode and disabling TSX
2541 * x86_md_clear().
2564 * - x86_md_clear which will flush the MDS related state. This is done when we
2588 uint8_t *md = (uint8_t *)x86_md_clear;
2623 * have MDS_NO, then we need to do a verw (x86_md_clear) and not a full
2644 spec_uarch_flush = x86_md_clear;
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/illumos-gate/usr/src/uts/i86pc/os/cpupm/
H A Dcpu_idle.c536 x86_md_clear();
/illumos-gate/usr/src/uts/intel/sys/
H A Dx86_archext.h1147 extern void x86_md_clear(void);

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