17c478bdstevel@tonic-gate/*
27c478bdstevel@tonic-gate * CDDL HEADER START
37c478bdstevel@tonic-gate *
47c478bdstevel@tonic-gate * The contents of this file are subject to the terms of the
5ee88d2bkchow * Common Development and Distribution License (the "License").
6ee88d2bkchow * You may not use this file except in compliance with the License.
77c478bdstevel@tonic-gate *
87c478bdstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97c478bdstevel@tonic-gate * or http://www.opensolaris.org/os/licensing.
107c478bdstevel@tonic-gate * See the License for the specific language governing permissions
117c478bdstevel@tonic-gate * and limitations under the License.
127c478bdstevel@tonic-gate *
137c478bdstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each
147c478bdstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157c478bdstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the
167c478bdstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying
177c478bdstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner]
187c478bdstevel@tonic-gate *
197c478bdstevel@tonic-gate * CDDL HEADER END
207c478bdstevel@tonic-gate */
217c478bdstevel@tonic-gate/*
227417cfdKuriakose Kuruvilla * Copyright (c) 1995, 2010, Oracle and/or its affiliates. All rights reserved.
23cfe84b8Matt Amdur * Copyright (c) 2011 by Delphix. All rights reserved.
247c478bdstevel@tonic-gate */
25cef70d2Bill Holler/*
2641afdfaKrishnendu Sadhukhan - Sun Microsystems * Copyright (c) 2010, Intel Corporation.
27cef70d2Bill Holler * All rights reserved.
28cef70d2Bill Holler */
29faa2016Bryan Cantrill/*
30a9cc46cRobert Mustacchi * Copyright 2019 Joyent, Inc.
317932179Jens Elkner * Copyright 2012 Jens Elkner <jel+illumos@cs.uni-magdeburg.de>
327932179Jens Elkner * Copyright 2012 Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org>
336eedf6aJosef 'Jeff' Sipek * Copyright 2014 Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
34b13f152Yuri Pankov * Copyright 2018 Nexenta Systems, Inc.
35faa2016Bryan Cantrill */
367c478bdstevel@tonic-gate
377c478bdstevel@tonic-gate#ifndef _SYS_X86_ARCHEXT_H
387c478bdstevel@tonic-gate#define	_SYS_X86_ARCHEXT_H
397c478bdstevel@tonic-gate
407c478bdstevel@tonic-gate#if !defined(_ASM)
417c478bdstevel@tonic-gate#include <sys/regset.h>
427c478bdstevel@tonic-gate#include <sys/processor.h>
437c478bdstevel@tonic-gate#include <vm/seg_enum.h>
447c478bdstevel@tonic-gate#include <vm/page.h>
457c478bdstevel@tonic-gate#endif	/* _ASM */
467c478bdstevel@tonic-gate
477c478bdstevel@tonic-gate#ifdef	__cplusplus
487c478bdstevel@tonic-gateextern "C" {
497c478bdstevel@tonic-gate#endif
507c478bdstevel@tonic-gate
517c478bdstevel@tonic-gate/*
527c478bdstevel@tonic-gate * cpuid instruction feature flags in %edx (standard function 1)
537c478bdstevel@tonic-gate */
547c478bdstevel@tonic-gate
557c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_FPU	0x00000001	/* x87 fpu present */
567c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_VME	0x00000002	/* virtual-8086 extension */
577c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_DE	0x00000004	/* debugging extensions */
587c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_PSE	0x00000008	/* page size extension */
597c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_TSC	0x00000010	/* time stamp counter */
607c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_MSR	0x00000020	/* rdmsr and wrmsr */
617c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_PAE	0x00000040	/* physical addr extension */
627c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_MCE	0x00000080	/* machine check exception */
637c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_CX8	0x00000100	/* cmpxchg8b instruction */
647c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_APIC	0x00000200	/* local APIC */
657c478bdstevel@tonic-gate						/* 0x400 - reserved */
667c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_SEP	0x00000800	/* sysenter and sysexit */
677c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_MTRR	0x00001000	/* memory type range reg */
687c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_PGE	0x00002000	/* page global enable */
697c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_MCA	0x00004000	/* machine check arch */
707c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_CMOV	0x00008000	/* conditional move insns */
717c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_PAT	0x00010000	/* page attribute table */
727c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_PSE36	0x00020000	/* 36-bit pagesize extension */
737c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_PSN	0x00040000	/* processor serial number */
747c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_CLFSH	0x00080000	/* clflush instruction */
757c478bdstevel@tonic-gate						/* 0x100000 - reserved */
767c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_DS	0x00200000	/* debug store exists */
777c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_ACPI	0x00400000	/* monitoring + clock ctrl */
787c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_MMX	0x00800000	/* MMX instructions */
797c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_FXSR	0x01000000	/* fxsave and fxrstor */
807c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_SSE	0x02000000	/* streaming SIMD extensions */
817c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_SSE2	0x04000000	/* SSE extensions */
827c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_SS	0x08000000	/* self-snoop */
837c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_HTT	0x10000000	/* Hyper Thread Technology */
847c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_TM	0x20000000	/* thermal monitoring */
85ae115bcmrj#define	CPUID_INTC_EDX_IA64	0x40000000	/* Itanium emulating IA32 */
867c478bdstevel@tonic-gate#define	CPUID_INTC_EDX_PBE	0x80000000	/* Pending Break Enable */
877c478bdstevel@tonic-gate
887c478bdstevel@tonic-gate/*
897c478bdstevel@tonic-gate * cpuid instruction feature flags in %ecx (standard function 1)
907c478bdstevel@tonic-gate */
917c478bdstevel@tonic-gate
927c478bdstevel@tonic-gate#define	CPUID_INTC_ECX_SSE3	0x00000001	/* Yet more SSE extensions */
9358b4950Hans Rosenfeld#define	CPUID_INTC_ECX_PCLMULQDQ 0x00000002	/* PCLMULQDQ insn */
941d9a8abJohn Levon#define	CPUID_INTC_ECX_DTES64	0x00000004	/* 64-bit DS area */
957c478bdstevel@tonic-gate#define	CPUID_INTC_ECX_MON	0x00000008	/* MONITOR/MWAIT */
967c478bdstevel@tonic-gate#define	CPUID_INTC_ECX_DSCPL	0x00000010	/* CPL-qualified debug store */
97ae115bcmrj#define	CPUID_INTC_ECX_VMX	0x00000020	/* Hardware VM extensions */
98ae115bcmrj#define	CPUID_INTC_ECX_SMX	0x00000040	/* Secure mode extensions */
997c478bdstevel@tonic-gate#define	CPUID_INTC_ECX_EST	0x00000080	/* enhanced SpeedStep */
1007c478bdstevel@tonic-gate#define	CPUID_INTC_ECX_TM2	0x00000100	/* thermal monitoring */
101ae115bcmrj#define	CPUID_INTC_ECX_SSSE3	0x00000200	/* Supplemental SSE3 insns */
1027c478bdstevel@tonic-gate#define	CPUID_INTC_ECX_CID	0x00000400	/* L1 context ID */
1037c478bdstevel@tonic-gate						/* 0x00000800 - reserved */
104245ac94Robert Mustacchi#define	CPUID_INTC_ECX_FMA	0x00001000	/* Fused Multiply Add */
105ae115bcmrj#define	CPUID_INTC_ECX_CX16	0x00002000	/* cmpxchg16 */
106ae115bcmrj#define	CPUID_INTC_ECX_ETPRD	0x00004000	/* extended task pri messages */
1071d9a8abJohn Levon#define	CPUID_INTC_ECX_PDCM	0x00008000	/* Perf/Debug Capability MSR */
108ae115bcmrj						/* 0x00010000 - reserved */
1091d9a8abJohn Levon#define	CPUID_INTC_ECX_PCID	0x00020000	/* process-context ids */
110ae115bcmrj#define	CPUID_INTC_ECX_DCA	0x00040000	/* direct cache access */
111d0f8ff6kk#define	CPUID_INTC_ECX_SSE4_1	0x00080000	/* SSE4.1 insns */
112d0f8ff6kk#define	CPUID_INTC_ECX_SSE4_2	0x00100000	/* SSE4.2 insns */
1136eedf6aJosef 'Jeff' Sipek#define	CPUID_INTC_ECX_X2APIC	0x00200000	/* x2APIC */
1145087e48Krishnendu Sadhukhan - Sun Microsystems#define	CPUID_INTC_ECX_MOVBE	0x00400000	/* MOVBE insn */
115f880125kk#define	CPUID_INTC_ECX_POPCNT	0x00800000	/* POPCNT insn */
1161d9a8abJohn Levon#define	CPUID_INTC_ECX_TSCDL	0x01000000	/* Deadline TSC */
117a50a8b9Kuriakose Kuruvilla#define	CPUID_INTC_ECX_AES	0x02000000	/* AES insns */
1187af88acKuriakose Kuruvilla#define	CPUID_INTC_ECX_XSAVE	0x04000000	/* XSAVE/XRESTOR insns */
1197af88acKuriakose Kuruvilla#define	CPUID_INTC_ECX_OSXSAVE	0x08000000	/* OS supports XSAVE insns */
1207af88acKuriakose Kuruvilla#define	CPUID_INTC_ECX_AVX	0x10000000	/* AVX supported */
121ebb8ac0Robert Mustacchi#define	CPUID_INTC_ECX_F16C	0x20000000	/* F16C supported */
122ebb8ac0Robert Mustacchi#define	CPUID_INTC_ECX_RDRAND	0x40000000	/* RDRAND supported */
12379ec9daYuri Pankov#define	CPUID_INTC_ECX_HV	0x80000000	/* Hypervisor */
124ae115bcmrj
1257c478bdstevel@tonic-gate/*
1267c478bdstevel@tonic-gate * cpuid instruction feature flags in %edx (extended function 0x80000001)
1277c478bdstevel@tonic-gate */
1287c478bdstevel@tonic-gate
1297c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_FPU	0x00000001	/* x87 fpu present */
1307c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_VME	0x00000002	/* virtual-8086 extension */
1317c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_DE	0x00000004	/* debugging extensions */
1327c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_PSE	0x00000008	/* page size extensions */
1337c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_TSC	0x00000010	/* time stamp counter */
1347c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_MSR	0x00000020	/* rdmsr and wrmsr */
1357c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_PAE	0x00000040	/* physical addr extension */
1367c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_MCE	0x00000080	/* machine check exception */
1377c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_CX8	0x00000100	/* cmpxchg8b instruction */
1387c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_APIC	0x00000200	/* local APIC */
1397c478bdstevel@tonic-gate						/* 0x00000400 - sysc on K6m6 */
1407c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_SYSC	0x00000800	/* AMD: syscall and sysret */
1417c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_MTRR	0x00001000	/* memory type and range reg */
1427c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_PGE	0x00002000	/* page global enable */
1437c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_MCA	0x00004000	/* machine check arch */
1447c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_CMOV	0x00008000	/* conditional move insns */
145ae115bcmrj#define	CPUID_AMD_EDX_PAT	0x00010000	/* K7: page attribute table */
146ae115bcmrj#define	CPUID_AMD_EDX_FCMOV	0x00010000	/* FCMOVcc etc. */
1477c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_PSE36	0x00020000	/* 36-bit pagesize extension */
1487c478bdstevel@tonic-gate				/* 0x00040000 - reserved */
1497c478bdstevel@tonic-gate				/* 0x00080000 - reserved */
1507c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_NX	0x00100000	/* AMD: no-execute page prot */
1517c478bdstevel@tonic-gate				/* 0x00200000 - reserved */
1527c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_MMXamd	0x00400000	/* AMD: MMX extensions */
1537c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_MMX	0x00800000	/* MMX instructions */
1547c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_FXSR	0x01000000	/* fxsave and fxrstor */
155ae115bcmrj#define	CPUID_AMD_EDX_FFXSR	0x02000000	/* fast fxsave/fxrstor */
15602bc52bkchow#define	CPUID_AMD_EDX_1GPG	0x04000000	/* 1GB page */
157ae115bcmrj#define	CPUID_AMD_EDX_TSCP	0x08000000	/* rdtscp instruction */
1587c478bdstevel@tonic-gate				/* 0x10000000 - reserved */
1597c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_LM	0x20000000	/* AMD: long mode */
1607c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_3DNowx	0x40000000	/* AMD: extensions to 3DNow! */
1617c478bdstevel@tonic-gate#define	CPUID_AMD_EDX_3DNow	0x80000000	/* AMD: 3DNow! instructions */
1627c478bdstevel@tonic-gate
163d0e58efRobert Mustacchi/*
164d0e58efRobert Mustacchi * AMD extended function 0x80000001 %ecx
165d0e58efRobert Mustacchi */
166d0e58efRobert Mustacchi
167ae115bcmrj#define	CPUID_AMD_ECX_AHF64	0x00000001	/* LAHF and SAHF in long mode */
168ae115bcmrj#define	CPUID_AMD_ECX_CMP_LGCY	0x00000002	/* AMD: multicore chip */
169