/gfx-drm/usr/src/uts/intel/io/i915/ |
H A D | i915_drv.c | 127 .gen = 2, .num_pipes = 1, 138 .gen = 2, .num_pipes = 1, 177 .gen = 3, .is_g33 = 1, .num_pipes = 2, 189 .gen = 4, .is_g4x = 1, .num_pipes = 2, 203 .gen = 5, .num_pipes = 2, 216 .gen = 6, .num_pipes = 2, 235 .gen = 7, .num_pipes = 3, \ 474 if (INTEL_INFO(dev)->gen < 6) in i915_semaphore_is_enabled() 764 switch (INTEL_INFO(dev)->gen) { in intel_gpu_reset() 1459 if (INTEL_INFO(dev)->gen < 6) in i915_gem_chipset_flush() [all …]
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H A D | intel_panel.c | 213 if (INTEL_INFO(dev)->gen >= 4) { in intel_gmch_panel_fitting() 283 if (INTEL_INFO(dev)->gen >= 4) in intel_gmch_panel_fitting() 299 if (INTEL_INFO(dev)->gen >= 4) in intel_gmch_panel_fitting() 322 if (INTEL_INFO(dev)->gen >= 4) in is_backlight_combination_mode() 350 if (INTEL_INFO(dev)->gen >= 4) in i915_read_blc_pwm_ctl() 356 if (INTEL_INFO(dev)->gen >= 4) in i915_read_blc_pwm_ctl() 374 if (INTEL_INFO(dev)->gen < 4) in intel_panel_get_max_backlight() 417 if (INTEL_INFO(dev)->gen < 4) in intel_panel_get_backlight() 470 if (INTEL_INFO(dev)->gen < 4) in intel_panel_actually_set_backlight() 528 if (INTEL_INFO(dev)->gen >= 4) { in intel_panel_disable_backlight() [all …]
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H A D | i915_gem_gtt.c | 243 if (INTEL_INFO(dev)->gen == 6) { in gen6_ppgtt_enable() 275 if (INTEL_INFO(dev)->gen >= 7) in gen6_ppgtt_enable() 398 if (INTEL_INFO(dev)->gen < 8) in i915_gem_init_aliasing_ppgtt() 676 if (INTEL_INFO(dev)->gen == 6) in intel_enable_ppgtt() 725 int gen; in i915_setup_scratch_page() local 736 gen = 33; in i915_setup_scratch_page() 738 gen = INTEL_INFO(dev)->gen * 10; in i915_setup_scratch_page() 869 if ( INTEL_INFO(dev)->gen == 1) in intel_gtt_stolen_size() 961 if (INTEL_INFO(dev)->gen == 1) { in intel_gtt_mappable_entries() 1021 if (INTEL_INFO(dev)->gen == 5) { in i965_gtt_total_entries() [all …]
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H A D | i915_gem_tiling.c | 101 } else if (INTEL_INFO(dev)->gen >= 6) { in i915_gem_detect_bit_6_swizzle() 226 if (INTEL_INFO(dev)->gen >= 7) { in i915_tiling_ok() 229 } else if (INTEL_INFO(dev)->gen >= 4) { in i915_tiling_ok() 249 if (INTEL_INFO(dev)->gen >= 4) { in i915_tiling_ok() 271 if (INTEL_INFO(obj->base.dev)->gen >= 4) in i915_gem_object_fence_ok() 274 if (INTEL_INFO(obj->base.dev)->gen == 3) { in i915_gem_object_fence_ok()
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H A D | i915_ums.c | 127 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) in i915_save_display_reg() 165 if (INTEL_INFO(dev)->gen >= 4) { in i915_save_display_reg() 184 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) in i915_save_display_reg() 222 if (INTEL_INFO(dev)->gen >= 4) { in i915_save_display_reg() 230 switch (INTEL_INFO(dev)->gen) { in i915_save_display_reg() 297 switch (INTEL_INFO(dev)->gen) { in i915_restore_display_reg() 354 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) { in i915_restore_display_reg() 398 if (INTEL_INFO(dev)->gen >= 4) { in i915_restore_display_reg() 423 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) { in i915_restore_display_reg() 467 if (INTEL_INFO(dev)->gen >= 4) { in i915_restore_display_reg()
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H A D | intel_ringbuffer.c | 553 if (INTEL_INFO(dev)->gen > 3) in init_render_ring() 562 if (INTEL_INFO(dev)->gen >= 6) in init_render_ring() 566 if (INTEL_INFO(dev)->gen == 6) in init_render_ring() 575 if (INTEL_INFO(dev)->gen >= 5) { in init_render_ring() 598 if (INTEL_INFO(dev)->gen >= 6) in init_render_ring() 617 if (INTEL_INFO(dev)->gen >= 5) in render_ring_cleanup() 974 if (INTEL_INFO(dev)->gen >= 6) { in intel_ring_setup_status_page() 1783 if (INTEL_INFO(dev)->gen == 6) in intel_init_render_ring_buffer() 1810 if (INTEL_INFO(dev)->gen < 4) in intel_init_render_ring_buffer() 1882 if (INTEL_INFO(dev)->gen < 4) in intel_render_ring_init_dri() [all …]
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H A D | i915_suspend.c | 203 if (INTEL_INFO(dev)->gen <= 4) in i915_save_display() 227 if (INTEL_INFO(dev)->gen >= 4) in i915_save_display() 273 if (INTEL_INFO(dev)->gen <= 4) in i915_restore_display() 282 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) in i915_restore_display() 290 else if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev)) in i915_restore_display()
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H A D | i915_drv.h | 439 u8 gen; member 1474 #define IS_GEN2(dev) (INTEL_INFO(dev)->gen == 2) 1475 #define IS_GEN3(dev) (INTEL_INFO(dev)->gen == 3) 1476 #define IS_GEN4(dev) (INTEL_INFO(dev)->gen == 4) 1477 #define IS_GEN5(dev) (INTEL_INFO(dev)->gen == 5) 1478 #define IS_GEN6(dev) (INTEL_INFO(dev)->gen == 6) 1479 #define IS_GEN7(dev) (INTEL_INFO(dev)->gen == 7) 1487 #define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 6) 1488 #define HAS_ALIASING_PPGTT(dev) (INTEL_INFO(dev)->gen >=6 && !IS_VALLEYVIEW(dev)) 1510 #define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2) [all …]
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H A D | i915_gem_execbuffer.c | 289 bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4; in i915_gem_execbuffer_reserve_object() 376 bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4; in i915_gem_execbuffer_reserve() 828 if (INTEL_INFO(dev)->gen < 4) in i915_gem_do_execbuffer() 831 if (INTEL_INFO(dev)->gen > 5 && in i915_gem_do_execbuffer() 836 if (INTEL_INFO(dev)->gen >= 6) in i915_gem_do_execbuffer() 856 if (INTEL_INFO(dev)->gen >= 5) { in i915_gem_do_execbuffer() 1108 if (INTEL_INFO(dev)->gen < 4) in i915_gem_execbuffer()
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H A D | i915_irq.c | 440 if (INTEL_INFO(dev)->gen >= 4) { in i915_get_crtc_scanoutpos() 1435 switch(INTEL_INFO(dev)->gen) { in i915_get_extra_instdone() 1637 switch (INTEL_INFO(dev)->gen) { in i915_gem_record_fences() 1710 if (INTEL_INFO(dev)->gen >= 6) { in i915_record_ring_state() 1721 if (INTEL_INFO(dev)->gen >= 4) { in i915_record_ring_state() 1862 if (INTEL_INFO(dev)->gen >= 6) in i915_capture_error_state() 1876 if (INTEL_INFO(dev)->gen >= 6) { in i915_capture_error_state() 1881 if (INTEL_INFO(dev)->gen == 7) in i915_capture_error_state() 2161 if (INTEL_INFO(dev)->gen >= 4) in i915_enable_vblank() 2169 if (dev_priv->info->gen == 3) in i915_enable_vblank() [all …]
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H A D | intel_display.c | 761 if (INTEL_INFO(dev)->gen >= 5) { in intel_wait_for_vblank() 812 if (INTEL_INFO(dev)->gen >= 4) { in intel_wait_for_pipe_off() 995 if (dev_priv->info->gen == 5) in assert_fdi_tx_pll_enabled() 1103 if (INTEL_INFO(dev)->gen >= 4) { in assert_planes_disabled() 1703 if (dev_priv->info->gen >= 4) in intel_flush_display_plane() 4581 if (INTEL_INFO(dev)->gen >= 4) in i9xx_update_pll() 4705 if (INTEL_INFO(dev)->gen > 3) in intel_set_pipe_timings() 4982 if (INTEL_INFO(dev)->gen < 5) in i9xx_get_pfit_config() 7748 if (INTEL_INFO(dev)->gen > 3) in compute_baseline_pipe_bpp() 7757 if (INTEL_INFO(dev)->gen < 4) in compute_baseline_pipe_bpp() [all …]
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H A D | i915_gem_stolen.c | 71 } else if (INTEL_INFO(dev)->gen >= 6) { in i915_stolen_to_physical() 78 } else if (INTEL_INFO(dev)->gen > 3 || IS_G33(dev)) { in i915_stolen_to_physical()
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H A D | i915_gem.c | 146 if (INTEL_INFO(dev)->gen >= 5) in i915_gem_init_ioctl() 1176 if (INTEL_INFO(dev)->gen >= 4 || in i915_gem_get_gtt_size() 1181 if (INTEL_INFO(dev)->gen == 3) in i915_gem_get_gtt_size() 2167 if (INTEL_INFO(dev)->gen >= 6) { in i965_write_fence_reg() 2308 switch (INTEL_INFO(dev)->gen) { in i915_gem_write_fence() 2815 if (INTEL_INFO(dev)->gen < 6) { in i915_gem_object_set_cache_level() 3300 int gen; in i915_gem_alloc_object() local 3307 gen = 33; in i915_gem_alloc_object() 3309 gen = INTEL_INFO(dev)->gen * 10; in i915_gem_alloc_object() 3473 if (INTEL_INFO(dev)->gen < 5 || in i915_gem_init_swizzling() [all …]
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H A D | intel_lvds.c | 114 if (INTEL_INFO(dev)->gen < 4) { in intel_lvds_get_config() 169 if (INTEL_INFO(dev)->gen == 4) { in intel_pre_pll_enable_lvds() 269 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { in intel_lvds_compute_config() 870 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev)) in intel_lvds_supported()
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H A D | i915_dma.c | 103 if (INTEL_INFO(dev)->gen >= 4) in i915_write_hws_pga() 397 if (INTEL_INFO(dev)->gen >= 4) { in i915_emit_box() 510 if (INTEL_INFO(dev)->gen >= 4) { in i915_dispatch_batchbuffer() 973 value = INTEL_INFO(dev)->gen >= 4; in i915_getparam() 1120 if (INTEL_INFO(dev)->gen >= 6) in i915_get_bridge_dev() 1370 if (info->gen >= 6 && !drm_core_check_feature(dev, DRIVER_MODESET)) in i915_driver_load() 1628 if (INTEL_INFO(dev)->gen >= 6) { in i915_driver_firstopen()
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H A D | i915_gem_context.c | 116 switch (INTEL_INFO(dev)->gen) { in get_context_size() 164 if (INTEL_INFO(dev)->gen >= 7) { in create_hw_context()
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H A D | i915_gem_debug.c | 495 } else if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) { in print_clock_info() 743 if (INTEL_INFO(dev)->gen >= 4) { in i915_gpu_top()
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H A D | intel_sdvo.c | 1228 if (INTEL_INFO(dev)->gen >= 4) { in intel_sdvo_mode_set() 1234 if (INTEL_INFO(dev)->gen < 5) in intel_sdvo_mode_set() 1258 if (INTEL_INFO(dev)->gen >= 4) { in intel_sdvo_mode_set() 1269 INTEL_INFO(dev)->gen < 5) in intel_sdvo_mode_set() 2368 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) { in intel_sdvo_add_hdmi_properties()
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H A D | intel_pm.c | 512 if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) in intel_update_fbc() 528 if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) { in intel_update_fbc() 1714 } else if (INTEL_INFO(dev)->gen >= 6) { in ironlake_check_srwm() 3197 if (INTEL_INFO(dev)->gen == 5) in intel_enable_rc6() 3206 if (INTEL_INFO(dev)->gen == 6) { in intel_enable_rc6() 3856 } else if (INTEL_INFO(dev)->gen >= 6 && !IS_VALLEYVIEW(dev)) { in intel_disable_gt_powersave() 5011 } else if (INTEL_INFO(dev)->gen >= 6) { in intel_gt_sanitize() 5018 if (INTEL_INFO(dev)->gen >= 6) in intel_gt_sanitize()
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H A D | intel_sprite.c | 1010 if (INTEL_INFO(dev)->gen < 5) in intel_plane_init() 1017 switch (INTEL_INFO(dev)->gen) { in intel_plane_init()
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H A D | intel_i2c.c | 234 #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
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H A D | intel_bios.c | 334 switch (INTEL_INFO(dev)->gen) { in intel_bios_ssc_frequency()
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H A D | intel_crt.c | 164 if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON) in intel_crt_dpms()
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/gfx-drm/usr/src/uts/common/io/drm/ |
H A D | drm_gem.c | 73 #define HAS_MEM_POOL(gen) ((gen > 30) && (drm_use_mem_pool)) argument 98 drm_gem_object_free_internal(struct drm_gem_object *obj, int gen) in drm_gem_object_free_internal() argument 102 if (HAS_MEM_POOL(gen)) { in drm_gem_object_free_internal() 235 size_t size, int gen) in drm_gem_object_internal() argument 241 if (HAS_MEM_POOL(gen)) { in drm_gem_object_internal() 243 if (gen >= 60) in drm_gem_object_internal() 259 drm_gem_object_free_internal(obj, gen); in drm_gem_object_internal() 276 size_t size, int gen) in drm_gem_object_init() argument 289 ret = drm_gem_object_internal(dev, obj, size, gen); in drm_gem_object_init() 341 drm_gem_object_free_internal(obj, gen); in drm_gem_object_init()
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/gfx-drm/usr/src/cmd/mdb/i915/ |
H A D | i915.c | 1092 mdb_printf("gen: %d\n", info.gen); in i915_capabilities() 1962 if ((info.gen == 3) || (info.gen == 4)) { in i915_swizzle_info() 1975 } else if ((info.gen == 6) || (info.gen == 7)) { in i915_swizzle_info() 2053 if (info.gen == 6) { in i915_ppgtt_info() 2061 if (info.gen == 7) { in i915_ppgtt_info()
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