1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at
9 * http://www.opensource.org/licenses/cddl1.txt.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22/*
23 * Copyright (c) 2004-2011 Emulex. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27#ifndef _EMLXS_IOCB_H
28#define	_EMLXS_IOCB_H
29
30#ifdef	__cplusplus
31extern "C" {
32#endif
33
34/* ==== IOCB Commands ==== */
35
36#define	CMD_RCV_SEQUENCE_CX	0x01
37#define	CMD_XMIT_SEQUENCE_CR	0x02
38#define	CMD_XMIT_SEQUENCE_CX	0x03
39#define	CMD_XMIT_BCAST_CN	0x04
40#define	CMD_XMIT_BCAST_CX	0x05
41#define	CMD_QUE_RING_BUF_CN	0x06
42#define	CMD_QUE_XRI_BUF_CX	0x07
43#define	CMD_IOCB_CONTINUE_CN	0x08
44#define	CMD_RET_XRI_BUF_CX	0x09
45#define	CMD_ELS_REQUEST_CR	0x0A
46#define	CMD_ELS_REQUEST_CX	0x0B
47#define	CMD_RCV_ELS_REQ_CX	0x0D
48#define	CMD_ABORT_XRI_CN	0x0E
49#define	CMD_ABORT_XRI_CX	0x0F
50#define	CMD_CLOSE_XRI_CN	0x10
51#define	CMD_CLOSE_XRI_CX	0x11
52#define	CMD_CREATE_XRI_CR	0x12
53#define	CMD_CREATE_XRI_CX	0x13
54#define	CMD_GET_RPI_CN		0x14
55#define	CMD_XMIT_ELS_RSP_CX	0x15
56#define	CMD_GET_RPI_CR		0x16
57#define	CMD_XRI_ABORTED_CX	0x17
58#define	CMD_FCP_IWRITE_CR	0x18
59#define	CMD_FCP_IWRITE_CX	0x19
60#define	CMD_FCP_IREAD_CR	0x1A
61#define	CMD_FCP_IREAD_CX	0x1B
62#define	CMD_FCP_ICMND_CR	0x1C
63#define	CMD_FCP_ICMND_CX	0x1D
64#define	CMD_FCP_TSEND_CX	0x1F	/* FCP_TARGET_MODE */
65#define	CMD_ADAPTER_MSG		0x20
66#define	CMD_FCP_TRECEIVE_CX	0x21	/* FCP_TARGET_MODE */
67#define	CMD_ADAPTER_DUMP	0x22
68#define	CMD_FCP_TRSP_CX		0x23	/* FCP_TARGET_MODE */
69#define	CMD_FCP_AUTO_TRSP_CX	0x29	/* FCP_TARGET_MODE */
70
71/* LP3000 gasket IOCB Command Set */
72
73#define	CMD_BPL_IWRITE_CR	0x48
74#define	CMD_BPL_IWRITE_CX	0x49
75#define	CMD_BPL_IREAD_CR	0x4A
76#define	CMD_BPL_IREAD_CX	0x4B
77#define	CMD_BPL_ICMND_CR	0x4C
78#define	CMD_BPL_ICMND_CX	0x4D
79
80#define	CMD_ASYNC_STATUS	0x7C
81
82/* SLI_2 IOCB Command Set */
83#define	CMD_RCV_SEQUENCE64_CX	0x81
84#define	CMD_XMIT_SEQUENCE64_CR	0x82
85#define	CMD_XMIT_SEQUENCE64_CX	0x83
86#define	CMD_XMIT_BCAST64_CN	0x84
87#define	CMD_XMIT_BCAST64_CX	0x85
88#define	CMD_QUE_RING_BUF64_CN	0x86
89#define	CMD_QUE_XRI_BUF64_CX	0x87
90#define	CMD_IOCB_CONTINUE64_CN	0x88
91#define	CMD_RET_XRI_BUF64_CX	0x89
92#define	CMD_ELS_REQUEST64_CR	0x8A
93#define	CMD_ELS_REQUEST64_CX	0x8B
94#define	CMD_RCV_ELS_REQ64_CX	0x8D
95#define	CMD_XMIT_ELS_RSP64_CX	0x95
96#define	CMD_XMIT_BLS_RSP64_CX	0x97
97#define	CMD_FCP_IWRITE64_CR	0x98
98#define	CMD_FCP_IWRITE64_CX	0x99
99#define	CMD_FCP_IREAD64_CR	0x9A
100#define	CMD_FCP_IREAD64_CX	0x9B
101#define	CMD_FCP_ICMND64_CR	0x9C
102#define	CMD_FCP_ICMND64_CX	0x9D
103#define	CMD_FCP_TSEND64_CX	0x9F	/* FCP_TARGET_MODE */
104#define	CMD_FCP_TRECEIVE64_CX	0xA1	/* FCP_TARGET_MODE */
105#define	CMD_FCP_TRSP64_CX	0xA3	/* FCP_TARGET_MODE */
106#define	CMD_RCV_SEQ64_CX	0xB5	/* SLI3 */
107#define	CMD_RCV_ELS64_CX	0xB7	/* SLI3 */
108#define	CMD_RCV_CONT64_CX	0xBB	/* SLI3 */
109#define	CMD_RCV_SEQ_LIST64_CX	0xC1
110#define	CMD_GEN_REQUEST64_CR	0xC2
111#define	CMD_GEN_REQUEST64_CX	0xC3
112#define	CMD_QUE_RING_LIST64_CN	0xC6
113
114
115/*
116 * Begin Structure Definitions for IOCB Commands
117 */
118
119typedef struct
120{
121#ifdef EMLXS_BIG_ENDIAN
122	uint8_t		statAction;
123	uint8_t		statRsn;
124	uint8_t		statBaExp;
125	uint8_t		statLocalError;
126#endif
127#ifdef EMLXS_LITTLE_ENDIAN
128	uint8_t		statLocalError;
129	uint8_t		statBaExp;
130	uint8_t		statRsn;
131	uint8_t		statAction;
132#endif
133	/* statAction  FBSY reason codes */
134#define	FBSY_RSN_MASK	0xF0	/* Rsn stored in upper nibble */
135#define	FBSY_FABRIC_BSY	0x10	/* F_bsy due to Fabric BSY */
136#define	FBSY_NPORT_BSY	0x30	/* F_bsy due to N_port BSY */
137
138	/* statAction  PBSY action codes */
139#define	PBSY_ACTION1	0x01	/* Sequence terminated - retry */
140#define	PBSY_ACTION2	0x02	/* Sequence active - retry */
141
142	/* statAction  P/FRJT action codes */
143#define	RJT_RETRYABLE	0x01	/* Retryable class of error */
144#define	RJT_NO_RETRY	0x02	/* Non-Retryable class of error */
145
146	/* statRsn  LS_RJT reason codes defined in LS_RJT structure */
147
148	/* statRsn  P_BSY reason codes */
149#define	PBSY_NPORT_BSY	0x01	/* Physical N_port BSY */
150#define	PBSY_RESRCE_BSY	0x03	/* N_port resource BSY */
151#define	PBSY_VU_BSY	0xFF	/* See VU field for rsn */
152
153	/* statRsn  P/F_RJT reason codes */
154#define	RJT_BAD_D_ID		0x01	/* Invalid D_ID field */
155#define	RJT_BAD_S_ID		0x02	/* Invalid S_ID field */
156#define	RJT_UNAVAIL_TEMP	0x03	/* N_Port unavailable temp. */
157#define	RJT_UNAVAIL_PERM	0x04	/* N_Port unavailable perm. */
158#define	RJT_UNSUP_CLASS		0x05	/* Class not supported */
159#define	RJT_DELIM_ERR		0x06	/* Delimiter usage error */
160#define	RJT_UNSUP_TYPE		0x07	/* Type not supported */
161#define	RJT_BAD_CONTROL		0x08	/* Invalid link conrtol */
162#define	RJT_BAD_RCTL		0x09	/* R_CTL invalid */
163#define	RJT_BAD_FCTL		0x0A	/* F_CTL invalid */
164#define	RJT_BAD_OXID		0x0B	/* OX_ID invalid */
165#define	RJT_BAD_RXID		0x0C	/* RX_ID invalid */
166#define	RJT_BAD_SEQID		0x0D	/* SEQ_ID invalid */
167#define	RJT_BAD_DFCTL		0x0E	/* DF_CTL invalid */
168#define	RJT_BAD_SEQCNT		0x0F	/* SEQ_CNT invalid */
169#define	RJT_BAD_PARM		0x10	/* Param. field invalid */
170#define	RJT_XCHG_ERR		0x11	/* Exchange error */
171#define	RJT_PROT_ERR		0x12	/* Protocol error */
172#define	RJT_BAD_LENGTH		0x13	/* Invalid Length */
173#define	RJT_UNEXPECTED_ACK	0x14	/* Unexpected ACK */
174#define	RJT_LOGIN_REQUIRED	0x16	/* Login required */
175#define	RJT_TOO_MANY_SEQ	0x17	/* Excessive sequences */
176#define	RJT_XCHG_NOT_STRT	0x18	/* Exchange not started */
177#define	RJT_UNSUP_SEC_HDR	0x19	/* Security hdr not supported */
178#define	RJT_UNAVAIL_PATH	0x1A	/* Fabric Path not available */
179#define	RJT_VENDOR_UNIQUE	0xFF	/* Vendor unique error */
180
181	/* statRsn  BA_RJT reason codes */
182#define	BARJT_BAD_CMD_CODE	0x01	/* Invalid command code */
183#define	BARJT_LOGICAL_ERR	0x03	/* Logical error */
184#define	BARJT_LOGICAL_BSY	0x05	/* Logical busy */
185#define	BARJT_PROTOCOL_ERR	0x07	/* Protocol error */
186#define	BARJT_VU_ERR		0xFF	/* Vendor unique error */
187
188	/* LS_RJT reason explanation defined in LS_RJT structure */
189
190	/* BA_RJT reason explanation */
191#define	BARJT_EXP_INVALID_ID	0x01	/* Invalid OX_ID/RX_ID */
192#define	BARJT_EXP_ABORT_SEQ	0x05	/* Abort SEQ, no more info */
193
194	/* Local Reject errors */
195#define	IOERR_SUCCESS			0x00
196#define	IOERR_MISSING_CONTINUE		0x01
197#define	IOERR_SEQUENCE_TIMEOUT		0x02
198#define	IOERR_INTERNAL_ERROR		0x03
199#define	IOERR_INVALID_RPI		0x04
200#define	IOERR_NO_XRI			0x05
201#define	IOERR_ILLEGAL_COMMAND		0x06
202#define	IOERR_XCHG_DROPPED		0x07
203#define	IOERR_ILLEGAL_FIELD		0x08
204/* RESERVED 0x09 */
205/* RESERVED 0x0A */
206#define	IOERR_RCV_BUFFER_WAITING	0x0B
207/* RESERVED 0x0C */
208#define	IOERR_TX_DMA_FAILED		0x0D
209#define	IOERR_RX_DMA_FAILED		0x0E
210#define	IOERR_ILLEGAL_FRAME		0x0F
211
212/* RESERVED 0x10 */
213#define	IOERR_NO_RESOURCES		0x11
214/* RESERVED 0x12 */
215#define	IOERR_ILLEGAL_LENGTH		0x13
216#define	IOERR_UNSUPPORTED_FEATURE	0x14
217#define	IOERR_ABORT_IN_PROGRESS		0x15
218#define	IOERR_ABORT_REQUESTED		0x16
219#define	IOERR_RCV_BUFFER_TIMEOUT	0x17
220#define	IOERR_LOOP_OPEN_FAILURE		0x18
221#define	IOERR_RING_RESET		0x19
222#define	IOERR_LINK_DOWN			0x1A
223#define	IOERR_CORRUPTED_DATA		0x1B
224#define	IOERR_CORRUPTED_RPI		0x1C
225#define	IOERR_OUT_OF_ORDER_DATA		0x1D
226#define	IOERR_OUT_OF_ORDER_ACK		0x1E
227#define	IOERR_DUP_FRAME			0x1F
228
229#define	IOERR_LINK_CONTROL_FRAME	0x20	/* ACK_N received */
230#define	IOERR_BAD_HOST_ADDRESS		0x21
231#define	IOERR_RCV_HDRBUF_WAITING	0x22
232#define	IOERR_MISSING_HDR_BUFFER	0x23
233#define	IOERR_MSEQ_CHAIN_CORRUPTED	0x24
234#define	IOERR_ABORTMULT_REQUESTED	0x25
235/* RESERVED 0x26 */
236/* RESERVED 0x27 */
237#define	IOERR_BUFFER_SHORTAGE		0x28
238#define	IOERR_XRIBUF_WAITING		0x29
239/* RESERVED 0x2A */
240#define	IOERR_MISSING_HBQ_ENTRY		0x2B
241#define	IOERR_ABORT_EXT_REQ		0x2C
242#define	IOERR_CLOSE_EXT_REQ		0x2D
243#define	IOERR_INVALID_VPI		0x2E
244/* RESERVED 0x2F */
245
246#define	IOERR_XRIBUF_MISSING		0x30
247#define	IOERR_ASSI_RSP_SUPPRESSED	0x31
248/* RESERVED 0x32 - 0x3F */
249
250#define	IOERR_ROFFSET_INVAL		0x40
251#define	IOERR_ROFFSET_MISSING		0x41
252#define	IOERR_INSUF_BUFFER		0x42
253#define	IOERR_MISSING_SI		0x43
254#define	IOERR_MISSING_ES		0x44
255#define	IOERR_INCOMP_XFER		0x45
256/* RESERVED 0x46 - 0xFF */
257
258	/* Driver defined */
259#define	IOERR_ABORT_TIMEOUT		0xF0
260} PARM_ERR;
261
262typedef union
263{
264	struct
265	{
266#ifdef EMLXS_BIG_ENDIAN
267		uint8_t		Rctl;	/* R_CTL field */
268		uint8_t		Type;	/* TYPE field */
269		uint8_t		Dfctl;	/* DF_CTL field */
270		uint8_t		Fctl;	/* Bits 0-7 of IOCB word 5 */
271#endif
272#ifdef EMLXS_LITTLE_ENDIAN
273		uint8_t		Fctl;	/* Bits 0-7 of IOCB word 5 */
274		uint8_t		Dfctl;	/* DF_CTL field */
275		uint8_t		Type;	/* TYPE field */
276		uint8_t		Rctl;	/* R_CTL field */
277#endif
278#define	FCP_RTYPE	0x08	/* FCP_TARGET_MODE Type - Rctl */
279
280#define	BC		0x02	/* Broadcast Received  - Fctl */
281#define	SI		0x04	/* Sequence Initiative */
282#define	LA		0x08	/* Ignore Link Attention state */
283#define	FSEQ		0x40	/* First Sequence */
284#define	LSEQ		0x80	/* Last Sequence */
285	} hcsw;
286	uint32_t	reserved;
287} WORD5;
288
289
290/* IOCB Command template for a generic response */
291typedef struct
292{
293	uint32_t	reserved[4];
294	PARM_ERR	perr;
295} GENERIC_RSP;
296
297
298/* IOCB Command template for XMIT / XMIT_BCAST / RCV_SEQUENCE / XMIT_ELS */
299typedef struct
300{
301	ULP_BDE		xrsqbde[2];
302	uint32_t	xrsqRo;		/* Starting Relative Offset */
303	WORD5		w5;		/* Header control/status word */
304} XR_SEQ_FIELDS;
305
306/* IOCB Command template for ELS_REQUEST */
307typedef struct
308{
309	ULP_BDE		elsReq;
310	ULP_BDE		elsRsp;
311#ifdef EMLXS_BIG_ENDIAN
312	uint32_t	word4Rsvd:7;
313	uint32_t	fl:1;
314	uint32_t	myID:24;
315
316	uint32_t	word5Rsvd:8;
317	uint32_t	remoteID:24;
318#endif
319#ifdef EMLXS_LITTLE_ENDIAN
320	uint32_t	myID:24;
321	uint32_t	fl:1;
322	uint32_t	word4Rsvd:7;
323
324	uint32_t	remoteID:24;
325	uint32_t	word5Rsvd:8;
326#endif
327} ELS_REQUEST;
328
329/* IOCB Command template for RCV_ELS_REQ */
330typedef struct
331{
332	ULP_BDE		elsReq[2];
333	uint32_t	parmRo;
334#ifdef EMLXS_BIG_ENDIAN
335	uint32_t	word5Rsvd:8;
336	uint32_t	remoteID:24;
337#endif
338#ifdef EMLXS_LITTLE_ENDIAN
339	uint32_t	remoteID:24;
340	uint32_t	word5Rsvd:8;
341#endif
342} RCV_ELS_REQ;
343
344/* IOCB Command template for ABORT / CLOSE_XRI */
345typedef struct
346{
347	uint32_t	rsvd[3];
348	uint32_t	abortType;
349#define	ABORT_TYPE_ABTX		0x00000000
350#define	ABORT_TYPE_ABTS		0x00000001
351	uint32_t	parm;
352#ifdef EMLXS_BIG_ENDIAN
353	uint16_t	abortContextTag;	/* ulpContext from command to */
354						/* abort/close */
355	uint16_t	abortIoTag;		/* ulpIoTag from command to */
356						/* abort/close */
357#endif
358#ifdef EMLXS_LITTLE_ENDIAN
359	uint16_t	abortIoTag;		/* ulpIoTag from command to */
360						/* abort/close */
361	uint16_t	abortContextTag;	/* ulpContext from command to */
362						/* abort/close */
363#endif
364} AC_XRI;
365
366/* IOCB Command template for GET_RPI */
367typedef struct
368{
369	uint32_t	rsvd[4];
370	uint32_t	parmRo;
371#ifdef EMLXS_BIG_ENDIAN
372	uint32_t	word5Rsvd:8;
373	uint32_t	remoteID:24;
374#endif
375#ifdef EMLXS_LITTLE_ENDIAN
376	uint32_t	remoteID:24;
377	uint32_t	word5Rsvd:8;
378#endif
379} GET_RPI;
380
381/* IOCB Command template for all FCP Initiator commands */
382typedef struct
383{
384	ULP_BDE		fcpi_cmnd;	/* FCP_CMND payload descriptor */
385	ULP_BDE		fcpi_rsp;	/* Rcv buffer */
386	uint32_t	fcpi_parm;
387	uint32_t	fcpi_XRdy;	/* transfer ready for IWRITE */
388} FCPI_FIELDS;
389
390/* IOCB Command template for all FCP Target commands */
391typedef struct
392{
393	ULP_BDE		fcpt_Buffer[2];	/* FCP_CMND payload descriptor */
394	uint32_t	fcpt_Offset;
395	uint32_t	fcpt_Length;	/* transfer ready for IWRITE */
396} FCPT_FIELDS;
397
398/* SLI-2 IOCB structure definitions */
399
400/* IOCB Command template for 64 bit XMIT / XMIT_BCAST / XMIT_ELS */
401typedef struct
402{
403	ULP_BDL		bdl;
404	uint32_t	xrsqRo;	/* Starting Relative Offset */
405	WORD5		w5;	/* Header control/status word */
406} XMT_SEQ_FIELDS64;
407
408
409/* IOCB Command template for 64 bit RCV_SEQUENCE64 */
410typedef struct
411{
412	ULP_BDE64	rcvBde;
413	uint32_t	rsvd1;
414	uint32_t	xrsqRo;	/* Starting Relative Offset */
415	WORD5		w5;	/* Header control/status word */
416} RCV_SEQ_FIELDS64;
417
418/* IOCB Command template for ELS_REQUEST64 */
419typedef struct
420{
421	ULP_BDL		bdl;
422#ifdef EMLXS_BIG_ENDIAN
423	uint32_t	word4Rsvd:7;
424	uint32_t	fl:1;
425	uint32_t	myID:24;
426
427	uint32_t	word5Rsvd:8;
428	uint32_t	remoteID:24;
429#endif
430#ifdef EMLXS_LITTLE_ENDIAN
431	uint32_t	myID:24;
432	uint32_t	fl:1;
433	uint32_t	word4Rsvd:7;
434
435	uint32_t	remoteID:24;
436	uint32_t	word5Rsvd:8;
437#endif
438} ELS_REQUEST64;
439
440
441/* IOCB Command template for ASYNC_STATUS */
442typedef struct
443{
444	ULP_BDL		resv;
445	uint32_t	parameter;
446#ifdef EMLXS_BIG_ENDIAN
447	uint16_t	EventCode;
448	uint16_t	SubContext;
449#endif
450#ifdef EMLXS_LITTLE_ENDIAN
451	uint16_t	SubContext;
452	uint16_t	EventCode;
453#endif
454} ASYNC_STATUS;
455
456
457/* IOCB Command template for QUE_RING_LIST64 */
458typedef struct
459{
460	ULP_BDL		bdl;
461	uint32_t	rsvd1;
462	uint32_t	rsvd2;
463} QUE_RING_LIST64;
464
465
466/* IOCB Command template for GEN_REQUEST64 */
467typedef struct
468{
469	ULP_BDL		bdl;
470	uint32_t	param;	/* Starting Relative Offset */
471	WORD5		w5;	/* Header control/status word */
472} GEN_REQUEST64;
473
474/* IOCB Command template for RCV_ELS_REQ64 */
475typedef struct
476{
477	ULP_BDE64	elsReq;
478	uint32_t	rsvd1;
479	uint32_t	parmRo;
480#ifdef EMLXS_BIG_ENDIAN
481	uint32_t	word5Rsvd:8;
482	uint32_t	remoteID:24;
483#endif
484#ifdef EMLXS_LITTLE_ENDIAN
485	uint32_t	remoteID:24;
486	uint32_t	word5Rsvd:8;
487#endif
488} RCV_ELS_REQ64;
489
490/* IOCB Command template for all 64 bit FCP Initiator commands */
491typedef struct
492{
493	ULP_BDL		bdl;
494	uint32_t	fcpi_parm;
495	uint32_t	fcpi_XRdy;	/* transfer ready for IWRITE */
496} FCPI_FIELDS64;
497
498/* IOCB Command template for all 64 bit FCP Target commands */
499typedef struct
500{
501	ULP_BDL		bdl;
502	uint32_t	fcpt_Offset;
503	uint32_t	fcpt_Length;	/* transfer ready for IWRITE */
504} FCPT_FIELDS64;
505
506/* IOCB Command template for all 64 bit FCP Target commands */
507typedef struct
508{
509	uint32_t	rsp_length;
510	uint32_t	rsvd1;
511	uint32_t	rsvd2;
512	uint32_t	iotag32;
513	uint32_t	status;
514#ifdef EMLXS_BIG_ENDIAN
515	uint32_t	rsvd:30;
516	uint32_t	lnk:1;
517#endif /* EMLXS_BIG_ENDIAN */
518
519#ifdef EMLXS_LITTLE_ENDIAN
520	uint32_t	lnk:1;
521	uint32_t	rsvd:30;
522#endif /* EMLXS_LITTLE_ENDIAN */
523} AUTO_TRSP;
524
525
526typedef struct
527{
528	uint32_t	io_tag64_low;	/* Word 8 */
529	uint32_t	io_tag64_high;	/* Word 9 */
530#ifdef EMLXS_BIG_ENDIAN
531	uint32_t	cs_ctl:8;	/* Word 10, bit 31:24 */
532	uint32_t	cs_en:1;	/* Word 10, bit 23 */
533	uint32_t	rsv:15;		/* Word 10, bit 22:8 */
534	uint32_t	ebde_count:8;	/* Word 10, bit 7:0 */
535#endif
536#ifdef EMLXS_LITTLE_ENDIAN
537	uint32_t	ebde_count:8;	/* Word 10, bit 7:0 */
538	uint32_t	rsv:15;		/* Word 10, bit 22:8 */
539	uint32_t	cs_en:1;	/* Word 10, bit 23 */
540	uint32_t	cs_ctl:8;	/* Word 10, bit 31:24 */
541#endif
542	uint32_t	rsplen;		/* Word 11 */
543	ULP_BDE64	ebde1;		/* Word 12:14 */
544	ULP_BDE64	ebde2;		/* Word 15:17 */
545	ULP_BDE64	ebde3;		/* Word 18:20 */
546	ULP_BDE64	ebde4;		/* Word 21:23 */
547	ULP_BDE64	ebde5;		/* Word 24:26 */
548	ULP_BDE64	ebde6;		/* Word 27:29 */
549} GENERIC_EXT_IOCB;
550
551/*
552 * IOCB Command Extension template for
553 * CMD_RCV_ELS64_CX (0xB7) or CMD_RCV_SEQ64_CX (0xB5)
554 */
555
556typedef struct
557{
558#ifdef EMLXS_BIG_ENDIAN
559	uint16_t	oxid;		/* word 8 */
560	uint16_t	seq_cnt;
561
562	uint16_t	vpi;		/* word 9 */
563	uint16_t	buddy_xri;
564
565	uint32_t	ccp:8;		/* word 10 */
566	uint32_t	ccpe:1;
567	uint32_t	rsvd:23;
568#endif
569#ifdef EMLXS_LITTLE_ENDIAN
570	uint16_t	seq_cnt;	/* word 8 */
571	uint16_t	oxid;
572
573	uint16_t	buddy_xri;	/* word 9 */
574	uint16_t	vpi;
575
576	uint32_t	rsvd:23;	/* word 10 */
577	uint32_t	ccpe:1;
578	uint32_t	ccp:8;
579#endif
580	uint32_t	seq_len;	/* received sequence length */
581	ULP_BDL		bde2;		/* total 4 words */
582} RCV_SEQ_ELS_64_SLI3_EXT;
583
584
585typedef volatile struct emlxs_iocb
586{ /* IOCB structure */
587	union
588	{
589		GENERIC_RSP		grsp;		/* Generic response */
590		XR_SEQ_FIELDS		xrseq;		/* XMIT/BCAST/RCV_SEQ */
591		ULP_BDE			cont[3];	/* up to 3 cont BDEs */
592		ELS_REQUEST		elsreq;		/* ELS_REQ template */
593		RCV_ELS_REQ		rcvels;		/* RCV_ELS_REQ */
594							/* template */
595		AC_XRI			acxri;		/* ABORT/CLOSE_XRI */
596							/* template */
597		GET_RPI			getrpi;		/* GET_RPI template */
598		FCPI_FIELDS		fcpi;		/* FCP Initiator */
599							/* template */
600		FCPT_FIELDS		fcpt;		/* FCP target */
601							/* template */
602
603		/* SLI-2 structures */
604
605		ULP_BDE64		cont64[2];	/* up to 2 64 bit */
606							/* cont BDE_64s */
607		ELS_REQUEST64		elsreq64;	/* ELS_REQ64 template */
608		QUE_RING_LIST64		qringlist64;	/* QUE RING LIST64 */
609							/* template */
610		GEN_REQUEST64		genreq64;	/* GEN_REQUEST64 */
611							/* template */
612		RCV_ELS_REQ64		rcvels64;	/* RCV_ELS_REQ */
613							/* template */
614		XMT_SEQ_FIELDS64	xseq64;		/* XMIT / BCAST cmd */
615		FCPI_FIELDS64		fcpi64;		/* FCP 64 bit */
616							/* Initiator template */
617		FCPT_FIELDS64		fcpt64;		/* FCP 64 bit target */
618							/* template */
619		AUTO_TRSP		atrsp;		/* FCP 64 bit target */
620							/* template */
621
622		RCV_SEQ_FIELDS64	rcvseq64;
623		ASYNC_STATUS		astat;
624
625		uint32_t		ulpWord[6];	/* generic 6 'words' */
626	} un;
627	union
628	{
629		struct
630		{
631#ifdef EMLXS_BIG_ENDIAN
632			uint16_t	ulpContext;	/* High order bits */
633							/* word6 */
634			uint16_t	ulpIoTag;	/* Low order bits */
635							/* word6 */
636#endif
637#ifdef EMLXS_LITTLE_ENDIAN
638			uint16_t	ulpIoTag;	/* Low order bits */
639							/* word6 */
640			uint16_t	ulpContext;	/* High order bits */
641							/* word6 */
642#endif
643		} t1;
644		struct
645		{
646#ifdef EMLXS_BIG_ENDIAN
647			uint16_t	ulpContext;	/* High order bits */
648							/* word6 */
649			uint16_t	ulpIoTag1:2;	/* Low order bits */
650							/* word6 */
651			uint16_t	ulpIoTag0:14;	/* Low order bits */
652							/* word6 */
653#endif
654#ifdef EMLXS_LITTLE_ENDIAN
655			uint16_t	ulpIoTag0:14;	/* Low order bits */
656							/* word6 */
657			uint16_t	ulpIoTag1:2;	/* Low order bits */
658							/* word6 */
659			uint16_t	ulpContext;	/* High order bits */
660							/* word6 */
661#endif
662		} t2;
663
664		uint32_t	ulpWord;
665	} un1;
666#define	ULPCONTEXT	un1.t1.ulpContext
667#define	ULPIOTAG	un1.t1.ulpIoTag
668#define	ULPIOTAG0	un1.t2.ulpIoTag0
669#define	ULPDELAYXMIT	un1.t2.ulpIoTag1
670
671#define	IOCB_DELAYXMIT_MSK 0x3000
672
673
674	union
675	{
676		struct
677		{
678#ifdef EMLXS_BIG_ENDIAN
679			uint32_t	ulpRsvdByte:8;
680			uint32_t	ulpXS:1;
681			uint32_t	ulpFCP2Rcvy:1;
682			uint32_t	ulpPU:2;
683			uint32_t	ulpIr:1;
684			uint32_t	ulpClass:3;
685			uint32_t	ulpCommand:8;
686			uint32_t	ulpStatus:4;
687			uint32_t	ulpBdeCount:2;
688			uint32_t	ulpLe:1;
689			uint32_t	ulpOwner:1;	/* Low order bit */
690							/* word 7 */
691#endif
692#ifdef EMLXS_LITTLE_ENDIAN
693			uint32_t	ulpOwner:1;	/* Low order bit */
694							/* word 7 */
695			uint32_t	ulpLe:1;
696			uint32_t	ulpBdeCount:2;
697			uint32_t	ulpStatus:4;
698			uint32_t	ulpCommand:8;
699			uint32_t	ulpClass:3;
700			uint32_t	ulpIr:1;
701			uint32_t	ulpPU:2;
702			uint32_t	ulpFCP2Rcvy:1;
703			uint32_t	ulpXS:1;
704			uint32_t	ulpRsvdByte:8;
705#endif
706		} t1;
707
708		struct
709		{
710#ifdef EMLXS_BIG_ENDIAN
711			uint32_t	ulpRsvdByte:8;
712			uint32_t	ulpCT:2;
713			uint32_t	ulpPU:2;
714			uint32_t	ulpIr:1;
715			uint32_t	ulpClass:3;
716			uint32_t	ulpCommand:8;
717			uint32_t	ulpStatus:4;
718			uint32_t	ulpBdeCount:2;
719			uint32_t	ulpLe:1;
720			uint32_t	ulpOwner:1;	/* Low order bit */
721							/* word 7 */
722#endif
723#ifdef EMLXS_LITTLE_ENDIAN
724			uint32_t	ulpOwner:1;	/* Low order bit */
725							/* word 7 */
726			uint32_t	ulpLe:1;
727			uint32_t	ulpBdeCount:2;
728			uint32_t	ulpStatus:4;
729			uint32_t	ulpCommand:8;
730			uint32_t	ulpClass:3;
731			uint32_t	ulpIr:1;
732			uint32_t	ulpPU:2;
733			uint32_t	ulpCT:2;
734			uint32_t	ulpRsvdByte:8;
735#endif
736		} t2;
737
738		uint32_t	ulpWord;
739	} un2;
740
741#define	ULPCT		un2.t2.ulpCT
742#define	ULPRSVDBYTE	un2.t1.ulpRsvdByte
743#define	ULPXS		un2.t1.ulpXS
744#define	ULPFCP2RCVY	un2.t1.ulpFCP2Rcvy
745#define	ULPPU		un2.t1.ulpPU
746#define	ULPIR		un2.t1.ulpIr
747#define	ULPCLASS	un2.t1.ulpClass
748#define	ULPCOMMAND	un2.t1.ulpCommand
749#define	ULPSTATUS	un2.t1.ulpStatus
750#define	ULPBDECOUNT	un2.t1.ulpBdeCount
751#define	ULPLE		un2.t1.ulpLe
752#define	ULPOWNER	un2.t1.ulpOwner
753	/* 32 bytes at this point */
754
755/* SLI4 */
756#define	RXFCHDR		un.ulpWord
757#define	RXSEQCNT	un1.ulpWord
758#define	RXSEQLEN	un2.ulpWord
759
760	union
761	{
762		GENERIC_EXT_IOCB	ext_iocb;
763		RCV_SEQ_ELS_64_SLI3_EXT	ext_rcv;
764		uint32_t		sli3Words[24];	/* 96 extra bytes */
765							/* for SLI-3 */
766	} unsli3;
767	/* 128 bytes at this point */
768
769#define	IOCB_FCP		1	/* IOCB is used for */
770					/* FCP ELS cmds - ulpRsvByte */
771#define	IOCB_IP			2	/* IOCB is used for IP ELS cmds */
772#define	PARM_UNUSED		0	/* PU field (Word 4) not used */
773#define	PARM_REL_OFF		1	/* PU field (Word 4) = R. O. */
774#define	PARM_XFER_CHECK		2	/* PU field (Word 4) = Data Xfer Len */
775#define	CLASS1			0	/* Class 1 */
776#define	CLASS2			1	/* Class 2 */
777#define	CLASS3			2	/* Class 3 */
778#define	CLASS_FCP_INTERMIX	7	/* FCP Data->Cls 1, all else->Cls 2 */
779
780#define	IOSTAT_SUCCESS			0x0	/* ulpStatus */
781#define	IOSTAT_FCP_RSP_ERROR		0x1
782#define	IOSTAT_REMOTE_STOP		0x2
783#define	IOSTAT_LOCAL_REJECT		0x3
784#define	IOSTAT_NPORT_RJT		0x4
785#define	IOSTAT_FABRIC_RJT		0x5
786#define	IOSTAT_NPORT_BSY		0x6
787#define	IOSTAT_FABRIC_BSY		0x7
788#define	IOSTAT_INTERMED_RSP		0x8
789#define	IOSTAT_LS_RJT			0x9
790#define	IOSTAT_RESERVED_A		0xA
791#define	IOSTAT_CMD_REJECT		0xB
792#define	IOSTAT_FCP_TGT_LENCHK		0xC
793#define	IOSTAT_RESERVED_D		0xD
794#define	IOSTAT_RESERVED_E		0xE
795#define	IOSTAT_NEED_BUFF_ENTRY		0xF
796
797/* Special error codes */
798#define	IOSTAT_DATA_OVERRUN		0x10	/* Added for resid handling */
799#define	IOSTAT_DATA_UNDERRUN		0x11	/* Added for resid handling */
800#define	IOSTAT_RSP_INVALID		0x12	/* Added for resp checking */
801} emlxs_iocb_t;
802typedef emlxs_iocb_t IOCB;
803
804
805typedef struct emlxs_iocbq
806{
807	emlxs_iocb_t		iocb;
808	emlxs_wqe_t		wqe; /* SLI4 */
809
810	struct emlxs_iocbq	*next;
811
812	void			*bp;	/* ptr to data buffer structure */
813	void			*port;	/* Board info pointer */
814	void			*channel; /* IO Channel pointer */
815	void			*node;	/* Node pointer */
816	void			*sbp;	/* Pkt pointer */
817	uint32_t		flag;
818
819#define	IOCB_POOL_ALLOCATED	0x00000001
820#define	IOCB_PRIORITY		0x00000002
821#define	IOCB_SPECIAL		0x00000004
822#define	IOCB_FCP_CMD		0x00000008
823#define	IOCB_FCT_DATA		0x00000020	/* tgt-mode */
824
825} emlxs_iocbq_t;
826typedef emlxs_iocbq_t IOCBQ;
827
828
829#ifdef	__cplusplus
830}
831#endif
832
833#endif	/* _EMLXS_IOCB_H */
834