1 /* 2 * 3 * CDDL HEADER START 4 * 5 * The contents of this file are subject to the terms of the 6 * Common Development and Distribution License (the "License"). 7 * You may not use this file except in compliance with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved. 24 * Copyright 2019 Joyent, Inc. 25 * Copyright 2020 Robert Mustacchi 26 */ 27 28 /* 29 * Copyright (c) 2010, Intel Corporation. 30 * All rights reserved. 31 */ 32 33 /* Copyright (c) 1988 AT&T */ 34 /* All Rights Reserved */ 35 36 #include "dis_tables.h" 37 38 /* BEGIN CSTYLED */ 39 40 /* 41 * Disassembly begins in dis_distable, which is equivalent to the One-byte 42 * Opcode Map in the Intel IA32 ISA Reference (page A-6 in my copy). The 43 * decoding loops then traverse out through the other tables as necessary to 44 * decode a given instruction. 45 * 46 * The behavior of this file can be controlled by one of the following flags: 47 * 48 * DIS_TEXT Include text for disassembly 49 * DIS_MEM Include memory-size calculations 50 * 51 * Either or both of these can be defined. 52 * 53 * This file is not, and will never be, cstyled. If anything, the tables should 54 * be taken out another tab stop or two so nothing overlaps. 55 */ 56 57 /* 58 * These functions must be provided for the consumer to do disassembly. 59 */ 60 #ifdef DIS_TEXT 61 extern char *strncpy(char *, const char *, size_t); 62 extern size_t strlen(const char *); 63 extern int strcmp(const char *, const char *); 64 extern int strncmp(const char *, const char *, size_t); 65 extern size_t strlcat(char *, const char *, size_t); 66 #endif 67 68 69 #define TERM 0 /* used to indicate that the 'indirect' */ 70 /* field terminates - no pointer. */ 71 72 /* Used to decode instructions. */ 73 typedef struct instable { 74 struct instable *it_indirect; /* for decode op codes */ 75 uchar_t it_adrmode; 76 #ifdef DIS_TEXT 77 char it_name[NCPS]; 78 uint_t it_suffix:1; /* mnem + "w", "l", or "d" */ 79 #endif 80 #ifdef DIS_MEM 81 uint_t it_size:16; 82 #endif 83 uint_t it_invalid64:1; /* opcode invalid in amd64 */ 84 uint_t it_always64:1; /* 64 bit when in 64 bit mode */ 85 uint_t it_invalid32:1; /* invalid in IA32 */ 86 uint_t it_stackop:1; /* push/pop stack operation */ 87 uint_t it_vexwoxmm:1; /* VEX instructions that don't use XMM/YMM */ 88 uint_t it_avxsuf:2; /* AVX2/AVX512 suffix rqd. */ 89 uint_t it_vexopmask:1; /* VEX inst. that use opmask */ 90 } instable_t; 91 92 /* 93 * Instruction formats. 94 */ 95 enum { 96 UNKNOWN, 97 MRw, 98 IMlw, 99 IMw, 100 IR, 101 OA, 102 AO, 103 MS, 104 SM, 105 Mv, 106 Mw, 107 M, /* register or memory */ 108 MG9, /* register or memory in group 9 (prefix optional) */ 109 Mb, /* register or memory, always byte sized */ 110 MO, /* memory only (no registers) */ 111 PREF, 112 SWAPGS_RDTSCP, 113 MONITOR_MWAIT, 114 R, 115 RA, 116 SEG, 117 MR, 118 RM, 119 RM_66r, /* RM, but with a required 0x66 prefix */ 120 IA, 121 MA, 122 SD, 123 AD, 124 SA, 125 D, 126 INM, 127 SO, 128 BD, 129 I, 130 P, 131 V, 132 DSHIFT, /* for double shift that has an 8-bit immediate */ 133 U, 134 OVERRIDE, 135 NORM, /* instructions w/o ModR/M byte, no memory access */ 136 IMPLMEM, /* instructions w/o ModR/M byte, implicit mem access */ 137 O, /* for call */ 138 JTAB, /* jump table */ 139 IMUL, /* for 186 iimul instr */ 140 CBW, /* so data16 can be evaluated for cbw and variants */ 141 MvI, /* for 186 logicals */ 142 ENTER, /* for 186 enter instr */ 143 RMw, /* for 286 arpl instr */ 144 Ib, /* for push immediate byte */ 145 F, /* for 287 instructions */ 146 FF, /* for 287 instructions */ 147 FFC, /* for 287 instructions */ 148 DM, /* 16-bit data */ 149 AM, /* 16-bit addr */ 150 LSEG, /* for 3-bit seg reg encoding */ 151 MIb, /* for 386 logicals */ 152 SREG, /* for 386 special registers */ 153 PREFIX, /* a REP instruction prefix */ 154 LOCK, /* a LOCK instruction prefix */ 155 INT3, /* The int 3 instruction, which has a fake operand */ 156 INTx, /* The normal int instruction, with explicit int num */ 157 DSHIFTcl, /* for double shift that implicitly uses %cl */ 158 CWD, /* so data16 can be evaluated for cwd and variants */ 159 RET, /* single immediate 16-bit operand */ 160 MOVZ, /* for movs and movz, with different size operands */ 161 CRC32, /* for crc32, with different size operands */ 162 XADDB, /* for xaddb */ 163 MOVSXZ, /* AMD64 mov sign extend 32 to 64 bit instruction */ 164 MOVBE, /* movbe instruction */ 165 166 /* 167 * MMX/SIMD addressing modes. 168 */ 169 170 MMO, /* Prefixable MMX/SIMD-Int mm/mem -> mm */ 171 MMOIMPL, /* Prefixable MMX/SIMD-Int mm -> mm (mem) */ 172 MMO3P, /* Prefixable MMX/SIMD-Int mm -> r32,imm8 */ 173 MMOM3, /* Prefixable MMX/SIMD-Int mm -> r32 */ 174 MMOS, /* Prefixable MMX/SIMD-Int mm -> mm/mem */ 175 MMOMS, /* Prefixable MMX/SIMD-Int mm -> mem */ 176 MMOPM, /* MMX/SIMD-Int mm/mem -> mm,imm8 */ 177 MMOPM_66o, /* MMX/SIMD-Int 0x66 optional mm/mem -> mm,imm8 */ 178 MMOPRM, /* Prefixable MMX/SIMD-Int r32/mem -> mm,imm8 */ 179 MMOSH, /* Prefixable MMX mm,imm8 */ 180 MM, /* MMX/SIMD-Int mm/mem -> mm */ 181 MMS, /* MMX/SIMD-Int mm -> mm/mem */ 182 MMSH, /* MMX mm,imm8 */ 183 XMMO, /* Prefixable SIMD xmm/mem -> xmm */ 184 XMMOS, /* Prefixable SIMD xmm -> xmm/mem */ 185 XMMOPM, /* Prefixable SIMD xmm/mem w/to xmm,imm8 */ 186 XMMOMX, /* Prefixable SIMD mm/mem -> xmm */ 187 XMMOX3, /* Prefixable SIMD xmm -> r32 */ 188 XMMOXMM, /* Prefixable SIMD xmm/mem -> mm */ 189 XMMOM, /* Prefixable SIMD xmm -> mem */ 190 XMMOMS, /* Prefixable SIMD mem -> xmm */ 191 XMM, /* SIMD xmm/mem -> xmm */ 192 XMM_66r, /* SIMD 0x66 prefix required xmm/mem -> xmm */ 193 XMM_66o, /* SIMD 0x66 prefix optional xmm/mem -> xmm */ 194 XMMXIMPL, /* SIMD xmm -> xmm (mem) */ 195 XMM3P, /* SIMD xmm -> r32,imm8 */ 196 XMM3PM_66r, /* SIMD 0x66 prefix required xmm -> r32/mem,imm8 */ 197 XMMP, /* SIMD xmm/mem w/to xmm,imm8 */ 198 XMMP_66o, /* SIMD 0x66 prefix optional xmm/mem w/to xmm,imm8 */ 199 XMMP_66r, /* SIMD 0x66 prefix required xmm/mem w/to xmm,imm8 */ 200 XMMPRM, /* SIMD r32/mem -> xmm,imm8 */ 201 XMMPRM_66r, /* SIMD 0x66 prefix required r32/mem -> xmm,imm8 */ 202 XMMS, /* SIMD xmm -> xmm/mem */ 203 XMMM, /* SIMD mem -> xmm */ 204 XMMM_66r, /* SIMD 0x66 prefix required mem -> xmm */ 205 XMMMS, /* SIMD xmm -> mem */ 206 XMM3MX, /* SIMD r32/mem -> xmm */ 207 XMM3MXS, /* SIMD xmm -> r32/mem */ 208 XMMSH, /* SIMD xmm,imm8 */ 209 XMMXM3, /* SIMD xmm/mem -> r32 */ 210 XMMX3, /* SIMD xmm -> r32 */ 211 XMMXMM, /* SIMD xmm/mem -> mm */ 212 XMMMX, /* SIMD mm -> xmm */ 213 XMMXM, /* SIMD xmm -> mm */ 214 XMMX2I, /* SIMD xmm -> xmm, imm, imm */ 215 XMM2I, /* SIMD xmm, imm, imm */ 216 XMMFENCE, /* SIMD lfence or mfence */ 217 XMMSFNC, /* SIMD sfence (none or mem) */ 218 FSGS, /* FSGSBASE if reg */ 219 XGETBV_XSETBV, 220 VEX_NONE, /* VEX no operand */ 221 VEX_MO, /* VEX mod_rm -> implicit reg */ 222 VEX_RMrX, /* VEX VEX.vvvv, mod_rm -> mod_reg */ 223 VEX_VRMrX, /* VEX mod_rm, VEX.vvvv -> mod_rm */ 224 VEX_RRX, /* VEX VEX.vvvv, mod_reg -> mod_rm */ 225 VEX_RMRX, /* VEX VEX.vvvv, mod_rm, imm8[7:4] -> mod_reg */ 226 VEX_MX, /* VEX mod_rm -> mod_reg */ 227 VEX_MXI, /* VEX mod_rm, imm8 -> mod_reg */ 228 VEX_XXI, /* VEX mod_rm, imm8 -> VEX.vvvv */ 229 VEX_MR, /* VEX mod_rm -> mod_reg */ 230 VEX_RRI, /* VEX mod_reg, mod_rm -> implicit(eflags/r32) */ 231 VEX_RX, /* VEX mod_reg -> mod_rm */ 232 VEX_KRR, /* VEX mod_rm -> mod_reg */ 233 VEX_KMR, /* VEX mod_reg -> mod_rm */ 234 VEX_KRM, /* VEX mod_rm -> mod_reg */ 235 VEX_RR, /* VEX mod_rm -> mod_reg */ 236 VEX_RRi, /* VEX mod_rm, imm8 -> mod_reg */ 237 VEX_RM, /* VEX mod_reg -> mod_rm */ 238 VEX_RIM, /* VEX mod_reg, imm8 -> mod_rm */ 239 VEX_RRM, /* VEX VEX.vvvv, mod_reg -> mod_rm */ 240 VEX_RMX, /* VEX VEX.vvvv, mod_rm -> mod_reg */ 241 VEX_SbVM, /* VEX SIB, VEX.vvvv -> mod_rm */ 242 VMx, /* vmcall/vmlaunch/vmresume/vmxoff */ 243 VMxo, /* VMx instruction with optional prefix */ 244 SVM, /* AMD SVM instructions */ 245 BLS, /* BLSR, BLSMSK, BLSI */ 246 FMA, /* FMA instructions, all VEX_RMrX */ 247 ADX, /* ADX instructions, support REX.w, mod_rm->mod_reg */ 248 EVEX_RX, /* EVEX mod_reg -> mod_rm */ 249 EVEX_MX, /* EVEX mod_rm -> mod_reg */ 250 EVEX_RMrX, /* EVEX EVEX.vvvv, mod_rm -> mod_reg */ 251 EVEX_RMRX /* EVEX EVEX.vvvv, mod_rm, imm8 -> mod_reg */ 252 }; 253 254 /* 255 * VEX prefixes 256 */ 257 #define VEX_2bytes 0xC5 /* the first byte of two-byte form */ 258 #define VEX_3bytes 0xC4 /* the first byte of three-byte form */ 259 260 #define FILL 0x90 /* Fill byte used for alignment (nop) */ 261 262 /* 263 ** Register numbers for the i386 264 */ 265 #define EAX_REGNO 0 266 #define ECX_REGNO 1 267 #define EDX_REGNO 2 268 #define EBX_REGNO 3 269 #define ESP_REGNO 4 270 #define EBP_REGNO 5 271 #define ESI_REGNO 6 272 #define EDI_REGNO 7 273 274 /* 275 * modes for immediate values 276 */ 277 #define MODE_NONE 0 278 #define MODE_IPREL 1 /* signed IP relative value */ 279 #define MODE_SIGNED 2 /* sign extended immediate */ 280 #define MODE_IMPLIED 3 /* constant value implied from opcode */ 281 #define MODE_OFFSET 4 /* offset part of an address */ 282 #define MODE_RIPREL 5 /* like IPREL, but from %rip (amd64) */ 283 284 /* 285 * The letters used in these macros are: 286 * IND - indirect to another to another table 287 * "T" - means to Terminate indirections (this is the final opcode) 288 * "S" - means "operand length suffix required" 289 * "Sa" - means AVX2 suffix (q/d) required 290 * "Sq" - means AVX512 suffix (q/d) required 291 * "Sd" - means AVX512 suffix (d/s) required 292 * "NS" - means "no suffix" which is the operand length suffix of the opcode 293 * "Z" - means instruction size arg required 294 * "u" - means the opcode is invalid in IA32 but valid in amd64 295 * "x" - means the opcode is invalid in amd64, but not IA32 296 * "y" - means the operand size is always 64 bits in 64 bit mode 297 * "p" - means push/pop stack operation 298 * "vr" - means VEX instruction that operates on normal registers, not fpu 299 * "vo" - means VEX instruction that operates on opmask registers, not fpu 300 */ 301 302 #define AVS2 (uint_t)1 /* it_avxsuf: AVX2 q/d suffix handling */ 303 #define AVS5Q (uint_t)2 /* it_avxsuf: AVX512 q/d suffix handling */ 304 #define AVS5D (uint_t)3 /* it_avxsuf: AVX512 d/s suffix handling */ 305 306 #if defined(DIS_TEXT) && defined(DIS_MEM) 307 #define IND(table) {(instable_t *)table, 0, "", 0, 0, 0, 0, 0, 0} 308 #define INDx(table) {(instable_t *)table, 0, "", 0, 0, 1, 0, 0, 0} 309 #define TNS(name, amode) {TERM, amode, name, 0, 0, 0, 0, 0, 0} 310 #define TNSu(name, amode) {TERM, amode, name, 0, 0, 0, 0, 1, 0} 311 #define TNSx(name, amode) {TERM, amode, name, 0, 0, 1, 0, 0, 0} 312 #define TNSy(name, amode) {TERM, amode, name, 0, 0, 0, 1, 0, 0} 313 #define TNSyp(name, amode) {TERM, amode, name, 0, 0, 0, 1, 0, 1} 314 #define TNSZ(name, amode, sz) {TERM, amode, name, 0, sz, 0, 0, 0, 0} 315 #define TNSZy(name, amode, sz) {TERM, amode, name, 0, sz, 0, 1, 0, 0} 316 #define TNSZvr(name, amode, sz) {TERM, amode, name, 0, sz, 0, 0, 0, 0, 1} 317 #define TSvo(name, amode) {TERM, amode, name, 1, 0, 0, 0, 0, 0, 0, 0, 1} 318 #define TS(name, amode) {TERM, amode, name, 1, 0, 0, 0, 0, 0} 319 #define TSx(name, amode) {TERM, amode, name, 1, 0, 1, 0, 0, 0} 320 #define TSy(name, amode) {TERM, amode, name, 1, 0, 0, 1, 0, 0} 321 #define TSp(name, amode) {TERM, amode, name, 1, 0, 0, 0, 0, 1} 322 #define TSZ(name, amode, sz) {TERM, amode, name, 1, sz, 0, 0, 0, 0} 323 #define TSaZ(name, amode, sz) {TERM, amode, name, 1, sz, 0, 0, 0, 0, 0, AVS2} 324 #define TSq(name, amode) {TERM, amode, name, 0, 0, 0, 0, 0, 0, 0, AVS5Q} 325 #define TSd(name, amode) {TERM, amode, name, 0, 0, 0, 0, 0, 0, 0, AVS5D} 326 #define TSZx(name, amode, sz) {TERM, amode, name, 1, sz, 1, 0, 0, 0} 327 #define TSZy(name, amode, sz) {TERM, amode, name, 1, sz, 0, 1, 0, 0} 328 #define INVALID {TERM, UNKNOWN, "", 0, 0, 0, 0, 0} 329 #elif defined(DIS_TEXT) 330 #define IND(table) {(instable_t *)table, 0, "", 0, 0, 0, 0, 0} 331 #define INDx(table) {(instable_t *)table, 0, "", 0, 1, 0, 0, 0} 332 #define TNS(name, amode) {TERM, amode, name, 0, 0, 0, 0, 0} 333 #define TNSu(name, amode) {TERM, amode, name, 0, 0, 0, 1, 0} 334 #define TNSx(name, amode) {TERM, amode, name, 0, 1, 0, 0, 0} 335 #define TNSy(name, amode) {TERM, amode, name, 0, 0, 1, 0, 0} 336 #define TNSyp(name, amode) {TERM, amode, name, 0, 0, 1, 0, 1} 337 #define TNSZ(name, amode, sz) {TERM, amode, name, 0, 0, 0, 0, 0} 338 #define TNSZy(name, amode, sz) {TERM, amode, name, 0, 0, 1, 0, 0} 339 #define TNSZvr(name, amode, sz) {TERM, amode, name, 0, 0, 0, 0, 0, 1} 340 #define TSvo(name, amode) {TERM, amode, name, 1, 0, 0, 0, 0, 0, 0, 1} 341 #define TS(name, amode) {TERM, amode, name, 1, 0, 0, 0, 0} 342 #define TSx(name, amode) {TERM, amode, name, 1, 1, 0, 0, 0} 343 #define TSy(name, amode) {TERM, amode, name, 1, 0, 1, 0, 0} 344 #define TSp(name, amode) {TERM, amode, name, 1, 0, 0, 0, 1} 345 #define TSZ(name, amode, sz) {TERM, amode, name, 1, 0, 0, 0, 0} 346 #define TSaZ(name, amode, sz) {TERM, amode, name, 1, 0, 0, 0, 0, 0, AVS2} 347 #define TSq(name, amode) {TERM, amode, name, 0, 0, 0, 0, 0, 0, AVS5Q} 348 #define TSZx(name, amode, sz) {TERM, amode, name, 1, 1, 0, 0, 0} 349 #define TSZy(name, amode, sz) {TERM, amode, name, 1, 0, 1, 0, 0} 350 #define INVALID {TERM, UNKNOWN, "", 0, 0, 0, 0, 0} 351 #elif defined(DIS_MEM) 352 #define IND(table) {(instable_t *)table, 0, 0, 0, 0, 0, 0} 353 #define INDx(table) {(instable_t *)table, 0, 0, 1, 0, 0, 0} 354 #define TNS(name, amode) {TERM, amode, 0, 0, 0, 0, 0} 355 #define TNSu(name, amode) {TERM, amode, 0, 0, 0, 1, 0} 356 #define TNSy(name, amode) {TERM, amode, 0, 0, 1, 0, 0} 357 #define TNSyp(name, amode) {TERM, amode, 0, 0, 1, 0, 1} 358 #define TNSx(name, amode) {TERM, amode, 0, 1, 0, 0, 0} 359 #define TNSZ(name, amode, sz) {TERM, amode, sz, 0, 0, 0, 0} 360 #define TNSZy(name, amode, sz) {TERM, amode, sz, 0, 1, 0, 0} 361 #define TNSZvr(name, amode, sz) {TERM, amode, sz, 0, 0, 0, 0, 1} 362 #define TSvo(name, amode) {TERM, amode, 0, 0, 0, 0, 0, 0, 0, 1} 363 #define TS(name, amode) {TERM, amode, 0, 0, 0, 0, 0} 364 #define TSx(name, amode) {TERM, amode, 0, 1, 0, 0, 0} 365 #define TSy(name, amode) {TERM, amode, 0, 0, 1, 0, 0} 366 #define TSp(name, amode) {TERM, amode, 0, 0, 0, 0, 1} 367 #define TSZ(name, amode, sz) {TERM, amode, sz, 0, 0, 0, 0} 368 #define TSaZ(name, amode, sz) {TERM, amode, sz, 0, 0, 0, 0, 0, AVS2} 369 #define TSq(name, amode) {TERM, amode, 0, 0, 0, 0, 0, 0, AVS5Q} 370 #define TSZx(name, amode, sz) {TERM, amode, sz, 1, 0, 0, 0} 371 #define TSZy(name, amode, sz) {TERM, amode, sz, 0, 1, 0, 0} 372 #define INVALID {TERM, UNKNOWN, 0, 0, 0, 0, 0} 373 #else 374 #define IND(table) {(instable_t *)table, 0, 0, 0, 0, 0} 375 #define INDx(table) {(instable_t *)table, 0, 1, 0, 0, 0} 376 #define TNS(name, amode) {TERM, amode, 0, 0, 0, 0} 377 #define TNSu(name, amode) {TERM, amode, 0, 0, 1, 0} 378 #define TNSy(name, amode) {TERM, amode, 0, 1, 0, 0} 379 #define TNSyp(name, amode) {TERM, amode, 0, 1, 0, 1} 380 #define TNSx(name, amode) {TERM, amode, 1, 0, 0, 0} 381 #define TNSZ(name, amode, sz) {TERM, amode, 0, 0, 0, 0} 382 #define TNSZy(name, amode, sz) {TERM, amode, 0, 1, 0, 0} 383 #define TNSZvr(name, amode, sz) {TERM, amode, 0, 0, 0, 0, 1} 384 #define TSvo(name, amode) {TERM, amode, 0, 0, 0, 0, 0, 0, 1} 385 #define TS(name, amode) {TERM, amode, 0, 0, 0, 0} 386 #define TSx(name, amode) {TERM, amode, 1, 0, 0, 0} 387 #define TSy(name, amode) {TERM, amode, 0, 1, 0, 0} 388 #define TSp(name, amode) {TERM, amode, 0, 0, 0, 1} 389 #define TSZ(name, amode, sz) {TERM, amode, 0, 0, 0, 0} 390 #define TSaZ(name, amode, sz) {TERM, amode, 0, 0, 0, 0, 0, AVS2} 391 #define TSq(name, amode) {TERM, amode, 0, 0, 0, 0, 0, AVS5Q} 392 #define TSd(name, amode) {TERM, amode, 0, 0, 0, 0, 0, AVS5D} 393 #define TSZx(name, amode, sz) {TERM, amode, 1, 0, 0, 0} 394 #define TSZy(name, amode, sz) {TERM, amode, 0, 1, 0, 0} 395 #define INVALID {TERM, UNKNOWN, 0, 0, 0, 0} 396 #endif 397 398 #ifdef DIS_TEXT 399 /* 400 * this decodes the r_m field for mode's 0, 1, 2 in 16 bit mode 401 */ 402 const char *const dis_addr16[3][8] = { 403 "(%bx,%si)", "(%bx,%di)", "(%bp,%si)", "(%bp,%di)", "(%si)", "(%di)", "", 404 "(%bx)", 405 "(%bx,%si)", "(%bx,%di)", "(%bp,%si)", "(%bp,%di)", "(%si)", "(%di", "(%bp)", 406 "(%bx)", 407 "(%bx,%si)", "(%bx,%di)", "(%bp,%si)", "(%bp,%di)", "(%si)", "(%di)", "(%bp)", 408 "(%bx)", 409 }; 410 411 412 /* 413 * This decodes 32 bit addressing mode r_m field for modes 0, 1, 2 414 */ 415 const char *const dis_addr32_mode0[16] = { 416 "(%eax)", "(%ecx)", "(%edx)", "(%ebx)", "", "", "(%esi)", "(%edi)", 417 "(%r8d)", "(%r9d)", "(%r10d)", "(%r11d)", "", "", "(%r14d)", "(%r15d)" 418 }; 419 420 const char *const dis_addr32_mode12[16] = { 421 "(%eax)", "(%ecx)", "(%edx)", "(%ebx)", "", "(%ebp)", "(%esi)", "(%edi)", 422 "(%r8d)", "(%r9d)", "(%r10d)", "(%r11d)", "", "(%r13d)", "(%r14d)", "(%r15d)" 423 }; 424 425 /* 426 * This decodes 64 bit addressing mode r_m field for modes 0, 1, 2 427 */ 428 const char *const dis_addr64_mode0[16] = { 429 "(%rax)", "(%rcx)", "(%rdx)", "(%rbx)", "", "(%rip)", "(%rsi)", "(%rdi)", 430 "(%r8)", "(%r9)", "(%r10)", "(%r11)", "(%r12)", "(%rip)", "(%r14)", "(%r15)" 431 }; 432 const char *const dis_addr64_mode12[16] = { 433 "(%rax)", "(%rcx)", "(%rdx)", "(%rbx)", "", "(%rbp)", "(%rsi)", "(%rdi)", 434 "(%r8)", "(%r9)", "(%r10)", "(%r11)", "(%r12)", "(%r13)", "(%r14)", "(%r15)" 435 }; 436 437 /* 438 * decode for scale from SIB byte 439 */ 440 const char *const dis_scale_factor[4] = { ")", ",2)", ",4)", ",8)" }; 441 442 /* 443 * decode for scale from VSIB byte, note that we always include the scale factor 444 * to match gas. 445 */ 446 const char *const dis_vscale_factor[4] = { ",1)", ",2)", ",4)", ",8)" }; 447 448 /* 449 * register decoding for normal references to registers (ie. not addressing) 450 */ 451 const char *const dis_REG8[16] = { 452 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh", 453 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" 454 }; 455 456 const char *const dis_REG8_REX[16] = { 457 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil", 458 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" 459 }; 460 461 const char *const dis_REG16[16] = { 462 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di", 463 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" 464 }; 465 466 const char *const dis_REG32[16] = { 467 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi", 468 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" 469 }; 470 471 const char *const dis_REG64[16] = { 472 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi", 473 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" 474 }; 475 476 const char *const dis_DEBUGREG[16] = { 477 "%db0", "%db1", "%db2", "%db3", "%db4", "%db5", "%db6", "%db7", 478 "%db8", "%db9", "%db10", "%db11", "%db12", "%db13", "%db14", "%db15" 479 }; 480 481 const char *const dis_CONTROLREG[16] = { 482 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5?", "%cr6?", "%cr7?", 483 "%cr8", "%cr9?", "%cr10?", "%cr11?", "%cr12?", "%cr13?", "%cr14?", "%cr15?" 484 }; 485 486 const char *const dis_TESTREG[16] = { 487 "%tr0?", "%tr1?", "%tr2?", "%tr3", "%tr4", "%tr5", "%tr6", "%tr7", 488 "%tr0?", "%tr1?", "%tr2?", "%tr3", "%tr4", "%tr5", "%tr6", "%tr7" 489 }; 490 491 const char *const dis_MMREG[16] = { 492 "%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7", 493 "%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7" 494 }; 495 496 const char *const dis_XMMREG[32] = { 497 "%xmm0", "%xmm1", "%xmm2", "%xmm3", 498 "%xmm4", "%xmm5", "%xmm6", "%xmm7", 499 "%xmm8", "%xmm9", "%xmm10", "%xmm11", 500 "%xmm12", "%xmm13", "%xmm14", "%xmm15", 501 "%xmm16", "%xmm17", "%xmm18", "%xmm19", 502 "%xmm20", "%xmm21", "%xmm22", "%xmm23", 503 "%xmm24", "%xmm25", "%xmm26", "%xmm27", 504 "%xmm28", "%xmm29", "%xmm30", "%xmm31", 505 }; 506 507 const char *const dis_YMMREG[32] = { 508 "%ymm0", "%ymm1", "%ymm2", "%ymm3", 509 "%ymm4", "%ymm5", "%ymm6", "%ymm7", 510 "%ymm8", "%ymm9", "%ymm10", "%ymm11", 511 "%ymm12", "%ymm13", "%ymm14", "%ymm15", 512 "%ymm16", "%ymm17", "%ymm18", "%ymm19", 513 "%ymm20", "%ymm21", "%ymm22", "%ymm23", 514 "%ymm24", "%ymm25", "%ymm26", "%ymm27", 515 "%ymm28", "%ymm29", "%ymm30", "%ymm31", 516 }; 517 518 const char *const dis_ZMMREG[32] = { 519 "%zmm0", "%zmm1", "%zmm2", "%zmm3", 520 "%zmm4", "%zmm5", "%zmm6", "%zmm7", 521 "%zmm8", "%zmm9", "%zmm10", "%zmm11", 522 "%zmm12", "%zmm13", "%zmm14", "%zmm15", 523 "%zmm16", "%zmm17", "%zmm18", "%zmm19", 524 "%zmm20", "%zmm21", "%zmm22", "%zmm23", 525 "%zmm24", "%zmm25", "%zmm26", "%zmm27", 526 "%zmm28", "%zmm29", "%zmm30", "%zmm31", 527 }; 528 529 const char *const dis_KOPMASKREG[8] = { 530 "%k0", "%k1", "%k2", "%k3", "%k4", "%k5", "%k6", "%k7" 531 }; 532 533 const char *const dis_SEGREG[16] = { 534 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "<reserved>", "<reserved>", 535 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "<reserved>", "<reserved>" 536 }; 537 538 /* 539 * SIMD predicate suffixes 540 */ 541 const char *const dis_PREDSUFFIX[8] = { 542 "eq", "lt", "le", "unord", "neq", "nlt", "nle", "ord" 543 }; 544 545 const char *const dis_AVXvgrp7[3][8] = { 546 /*0 1 2 3 4 5 6 7*/ 547 /*71*/ {"", "", "vpsrlw", "", "vpsraw", "", "vpsllw", ""}, 548 /*72*/ {"", "", "vpsrld", "", "vpsrad", "", "vpslld", ""}, 549 /*73*/ {"", "", "vpsrlq", "vpsrldq", "", "", "vpsllq", "vpslldq"} 550 }; 551 552 #endif /* DIS_TEXT */ 553 554 /* 555 * "decode table" for 64 bit mode MOVSXD instruction (opcode 0x63) 556 */ 557 const instable_t dis_opMOVSLD = TNS("movslq",MOVSXZ); 558 559 /* 560 * "decode table" for pause and clflush instructions 561 */ 562 const instable_t dis_opPause = TNS("pause", NORM); 563 564 /* 565 * "decode table" for wbnoinvd instruction 566 */ 567 const instable_t dis_opWbnoinvd = TNS("wbnoinvd", NORM); 568 569 /* 570 * Decode table for 0x0F00 opcodes 571 */ 572 const instable_t dis_op0F00[8] = { 573 574 /* [0] */ TNS("sldt",M), TNS("str",M), TNSy("lldt",M), TNSy("ltr",M), 575 /* [4] */ TNSZ("verr",M,2), TNSZ("verw",M,2), INVALID, INVALID, 576 }; 577 578 579 /* 580 * Decode table for 0x0F01 opcodes 581 */ 582 const instable_t dis_op0F01[8] = { 583 584 /* [0] */ TNSZ("sgdt",VMx,6), TNSZ("sidt",MONITOR_MWAIT,6), TNSZ("lgdt",XGETBV_XSETBV,6), TNSZ("lidt",SVM,6), 585 /* [4] */ TNSZ("smsw",M,2), INVALID, TNSZ("lmsw",M,2), TNS("invlpg",SWAPGS_RDTSCP), 586 }; 587 588 /* 589 * Decode table for 0x0F18 opcodes -- SIMD prefetch 590 */ 591 const instable_t dis_op0F18[8] = { 592 593 /* [0] */ TNS("prefetchnta",PREF),TNS("prefetcht0",PREF), TNS("prefetcht1",PREF), TNS("prefetcht2",PREF), 594 /* [4] */ INVALID, INVALID, INVALID, INVALID, 595 }; 596 597 /* 598 * Decode table for 0x0FAE opcodes -- SIMD state save/restore 599 */ 600 const instable_t dis_op0FAE[8] = { 601 /* [0] */ TNSZ("fxsave",FSGS,512),TNSZ("fxrstor",FSGS,512),TNS("ldmxcsr",FSGS), TNS("stmxcsr",FSGS), 602 /* [4] */ TNSZ("xsave",M,512), TNS("lfence",XMMFENCE), TNS("mfence",XMMFENCE), TNS("sfence",XMMSFNC), 603 }; 604 605 /* 606 * Decode table for 0xF30FAE opcodes -- FSGSBASE 607 */ 608 const instable_t dis_opF30FAE[8] = { 609 /* [0] */ TNSx("rdfsbase",FSGS), TNSx("rdgsbase",FSGS), TNSx("wrfsbase",FSGS), TNSx("wrgsbase",FSGS), 610 /* [4] */ INVALID, INVALID, INVALID, INVALID, 611 }; 612 613 /* 614 * Decode table for 0x0FBA opcodes 615 */ 616 617 const instable_t dis_op0FBA[8] = { 618 619 /* [0] */ INVALID, INVALID, INVALID, INVALID, 620 /* [4] */ TS("bt",MIb), TS("bts",MIb), TS("btr",MIb), TS("btc",MIb), 621 }; 622 623 /* 624 * Decode table for 0x0FC7 opcode (group 9) 625 */ 626 627 const instable_t dis_op0FC7[8] = { 628 629 /* [0] */ INVALID, TNS("cmpxchg8b",M), INVALID, TNS("xrstors",MG9), 630 /* [4] */ TNS("xsavec",MG9), TNS("xsaves",MG9), TNS("vmptrld",MG9), TNS("vmptrst",MG9), 631 }; 632 633 /* 634 * Decode table for 0x0FC7 opcode (group 9) mode 3 635 */ 636 637 const instable_t dis_op0FC7m3[8] = { 638 639 /* [0] */ INVALID, INVALID, INVALID, INVALID, 640 /* [4] */ INVALID, INVALID, TNS("rdrand",MG9), TNS("rdseed", MG9), 641 }; 642 643 /* 644 * Decode table for 0x0FC7 opcode with 0x66 prefix 645 */ 646 647 const instable_t dis_op660FC7[8] = { 648 649 /* [0] */ INVALID, INVALID, INVALID, INVALID, 650 /* [4] */ INVALID, INVALID, TNS("vmclear",M), INVALID, 651 }; 652 653 /* 654 * Decode table for 0x0FC7 opcode with 0xF3 prefix 655 */ 656 657 const instable_t dis_opF30FC7[8] = { 658 659 /* [0] */ INVALID, INVALID, INVALID, INVALID, 660 /* [4] */ INVALID, INVALID, TNS("vmxon",M), INVALID, 661 }; 662 663 /* 664 * Decode table for 0x0FC8 opcode -- 486 bswap instruction 665 * 666 *bit pattern: 0000 1111 1100 1reg 667 */ 668 const instable_t dis_op0FC8[4] = { 669 /* [0] */ TNS("bswap",R), INVALID, INVALID, INVALID, 670 }; 671 672 /* 673 * Decode table for 0x0F71, 0x0F72, and 0x0F73 opcodes -- MMX instructions 674 */ 675 const instable_t dis_op0F7123[4][8] = { 676 { 677 /* [70].0 */ INVALID, INVALID, INVALID, INVALID, 678 /* .4 */ INVALID, INVALID, INVALID, INVALID, 679 }, { 680 /* [71].0 */ INVALID, INVALID, TNS("psrlw",MMOSH), INVALID, 681 /* .4 */ TNS("psraw",MMOSH), INVALID, TNS("psllw",MMOSH), INVALID, 682 }, { 683 /* [72].0 */ INVALID, INVALID, TNS("psrld",MMOSH), INVALID, 684 /* .4 */ TNS("psrad",MMOSH), INVALID, TNS("pslld",MMOSH), INVALID, 685 }, { 686 /* [73].0 */ INVALID, INVALID, TNS("psrlq",MMOSH), TNS("INVALID",MMOSH), 687 /* .4 */ INVALID, INVALID, TNS("psllq",MMOSH), TNS("INVALID",MMOSH), 688 } }; 689 690 /* 691 * Decode table for SIMD extensions to above 0x0F71-0x0F73 opcodes. 692 */ 693 const instable_t dis_opSIMD7123[32] = { 694 /* [70].0 */ INVALID, INVALID, INVALID, INVALID, 695 /* .4 */ INVALID, INVALID, INVALID, INVALID, 696 697 /* [71].0 */ INVALID, INVALID, TNS("psrlw",XMMSH), INVALID, 698 /* .4 */ TNS("psraw",XMMSH), INVALID, TNS("psllw",XMMSH), INVALID, 699 700 /* [72].0 */ INVALID, INVALID, TNS("psrld",XMMSH), INVALID, 701 /* .4 */ TNS("psrad",XMMSH), INVALID, TNS("pslld",XMMSH), INVALID, 702 703 /* [73].0 */ INVALID, INVALID, TNS("psrlq",XMMSH), TNS("psrldq",XMMSH), 704 /* .4 */ INVALID, INVALID, TNS("psllq",XMMSH), TNS("pslldq",XMMSH), 705 }; 706 707 /* 708 * SIMD instructions have been wedged into the existing IA32 instruction 709 * set through the use of prefixes. That is, while 0xf0 0x58 may be 710 * addps, 0xf3 0xf0 0x58 (literally, repz addps) is a completely different 711 * instruction - addss. At present, three prefixes have been coopted in 712 * this manner - address size (0x66), repnz (0xf2) and repz (0xf3). The 713 * following tables are used to provide the prefixed instruction names. 714 * The arrays are sparse, but they're fast. 715 */ 716 717 /* 718 * Decode table for SIMD instructions with the address size (0x66) prefix. 719 */ 720 const instable_t dis_opSIMDdata16[256] = { 721 /* [00] */ INVALID, INVALID, INVALID, INVALID, 722 /* [04] */ INVALID, INVALID, INVALID, INVALID, 723 /* [08] */ INVALID, INVALID, INVALID, INVALID, 724 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 725 726 /* [10] */ TNSZ("movupd",XMM,16), TNSZ("movupd",XMMS,16), TNSZ("movlpd",XMMM,8), TNSZ("movlpd",XMMMS,8), 727 /* [14] */ TNSZ("unpcklpd",XMM,16),TNSZ("unpckhpd",XMM,16),TNSZ("movhpd",XMMM,8), TNSZ("movhpd",XMMMS,8), 728 /* [18] */ INVALID, INVALID, INVALID, INVALID, 729 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 730 731 /* [20] */ INVALID, INVALID, INVALID, INVALID, 732 /* [24] */ INVALID, INVALID, INVALID, INVALID, 733 /* [28] */ TNSZ("movapd",XMM,16), TNSZ("movapd",XMMS,16), TNSZ("cvtpi2pd",XMMOMX,8),TNSZ("movntpd",XMMOMS,16), 734 /* [2C] */ TNSZ("cvttpd2pi",XMMXMM,16),TNSZ("cvtpd2pi",XMMXMM,16),TNSZ("ucomisd",XMM,8),TNSZ("comisd",XMM,8), 735 736 /* [30] */ INVALID, INVALID, INVALID, INVALID, 737 /* [34] */ INVALID, INVALID, INVALID, INVALID, 738 /* [38] */ INVALID, INVALID, INVALID, INVALID, 739 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 740 741 /* [40] */ INVALID, INVALID, INVALID, INVALID, 742 /* [44] */ INVALID, INVALID, INVALID, INVALID, 743 /* [48] */ INVALID, INVALID, INVALID, INVALID, 744 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 745 746 /* [50] */ TNS("movmskpd",XMMOX3), TNSZ("sqrtpd",XMM,16), INVALID, INVALID, 747 /* [54] */ TNSZ("andpd",XMM,16), TNSZ("andnpd",XMM,16), TNSZ("orpd",XMM,16), TNSZ("xorpd",XMM,16), 748 /* [58] */ TNSZ("addpd",XMM,16), TNSZ("mulpd",XMM,16), TNSZ("cvtpd2ps",XMM,16),TNSZ("cvtps2dq",XMM,16), 749 /* [5C] */ TNSZ("subpd",XMM,16), TNSZ("minpd",XMM,16), TNSZ("divpd",XMM,16), TNSZ("maxpd",XMM,16), 750 751 /* [60] */ TNSZ("punpcklbw",XMM,16),TNSZ("punpcklwd",XMM,16),TNSZ("punpckldq",XMM,16),TNSZ("packsswb",XMM,16), 752 /* [64] */ TNSZ("pcmpgtb",XMM,16), TNSZ("pcmpgtw",XMM,16), TNSZ("pcmpgtd",XMM,16), TNSZ("packuswb",XMM,16), 753 /* [68] */ TNSZ("punpckhbw",XMM,16),TNSZ("punpckhwd",XMM,16),TNSZ("punpckhdq",XMM,16),TNSZ("packssdw",XMM,16), 754 /* [6C] */ TNSZ("punpcklqdq",XMM,16),TNSZ("punpckhqdq",XMM,16),TNSZ("movd",XMM3MX,4),TNSZ("movdqa",XMM,16), 755 756 /* [70] */ TNSZ("pshufd",XMMP,16), INVALID, INVALID, INVALID, 757 /* [74] */ TNSZ("pcmpeqb",XMM,16), TNSZ("pcmpeqw",XMM,16), TNSZ("pcmpeqd",XMM,16), INVALID, 758 /* [78] */ TNSZ("extrq",XMM2I,16), TNSZ("extrq",XMM,16), INVALID, INVALID, 759 /* [7C] */ TNSZ("haddpd",XMM,16), TNSZ("hsubpd",XMM,16), TNSZ("movd",XMM3MXS,4), TNSZ("movdqa",XMMS,16), 760 761 /* [80] */ INVALID, INVALID, INVALID, INVALID, 762 /* [84] */ INVALID, INVALID, INVALID, INVALID, 763 /* [88] */ INVALID, INVALID, INVALID, INVALID, 764 /* [8C] */ INVALID, INVALID, INVALID, INVALID, 765 766 /* [90] */ INVALID, INVALID, INVALID, INVALID, 767 /* [94] */ INVALID, INVALID, INVALID, INVALID, 768 /* [98] */ INVALID, INVALID, INVALID, INVALID, 769 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 770 771 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 772 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 773 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 774 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 775 776 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 777 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 778 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 779 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 780 781 /* [C0] */ INVALID, INVALID, TNSZ("cmppd",XMMP,16), INVALID, 782 /* [C4] */ TNSZ("pinsrw",XMMPRM,2),TNS("pextrw",XMM3P), TNSZ("shufpd",XMMP,16), INVALID, 783 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 784 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 785 786 /* [D0] */ TNSZ("addsubpd",XMM,16),TNSZ("psrlw",XMM,16), TNSZ("psrld",XMM,16), TNSZ("psrlq",XMM,16), 787 /* [D4] */ TNSZ("paddq",XMM,16), TNSZ("pmullw",XMM,16), TNSZ("movq",XMMS,8), TNS("pmovmskb",XMMX3), 788 /* [D8] */ TNSZ("psubusb",XMM,16), TNSZ("psubusw",XMM,16), TNSZ("pminub",XMM,16), TNSZ("pand",XMM,16), 789 /* [DC] */ TNSZ("paddusb",XMM,16), TNSZ("paddusw",XMM,16), TNSZ("pmaxub",XMM,16), TNSZ("pandn",XMM,16), 790 791 /* [E0] */ TNSZ("pavgb",XMM,16), TNSZ("psraw",XMM,16), TNSZ("psrad",XMM,16), TNSZ("pavgw",XMM,16), 792 /* [E4] */ TNSZ("pmulhuw",XMM,16), TNSZ("pmulhw",XMM,16), TNSZ("cvttpd2dq",XMM,16),TNSZ("movntdq",XMMS,16), 793 /* [E8] */ TNSZ("psubsb",XMM,16), TNSZ("psubsw",XMM,16), TNSZ("pminsw",XMM,16), TNSZ("por",XMM,16), 794 /* [EC] */ TNSZ("paddsb",XMM,16), TNSZ("paddsw",XMM,16), TNSZ("pmaxsw",XMM,16), TNSZ("pxor",XMM,16), 795 796 /* [F0] */ INVALID, TNSZ("psllw",XMM,16), TNSZ("pslld",XMM,16), TNSZ("psllq",XMM,16), 797 /* [F4] */ TNSZ("pmuludq",XMM,16), TNSZ("pmaddwd",XMM,16), TNSZ("psadbw",XMM,16), TNSZ("maskmovdqu", XMMXIMPL,16), 798 /* [F8] */ TNSZ("psubb",XMM,16), TNSZ("psubw",XMM,16), TNSZ("psubd",XMM,16), TNSZ("psubq",XMM,16), 799 /* [FC] */ TNSZ("paddb",XMM,16), TNSZ("paddw",XMM,16), TNSZ("paddd",XMM,16), INVALID, 800 }; 801 802 const instable_t dis_opAVX660F[256] = { 803 /* [00] */ INVALID, INVALID, INVALID, INVALID, 804 /* [04] */ INVALID, INVALID, INVALID, INVALID, 805 /* [08] */ INVALID, INVALID, INVALID, INVALID, 806 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 807 808 /* [10] */ TNSZ("vmovupd",VEX_MX,16), TNSZ("vmovupd",VEX_RX,16), TNSZ("vmovlpd",VEX_RMrX,8), TNSZ("vmovlpd",VEX_RM,8), 809 /* [14] */ TNSZ("vunpcklpd",VEX_RMrX,16),TNSZ("vunpckhpd",VEX_RMrX,16),TNSZ("vmovhpd",VEX_RMrX,8), TNSZ("vmovhpd",VEX_RM,8), 810 /* [18] */ INVALID, INVALID, INVALID, INVALID, 811 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 812 813 /* [20] */ INVALID, INVALID, INVALID, INVALID, 814 /* [24] */ INVALID, INVALID, INVALID, INVALID, 815 /* [28] */ TNSZ("vmovapd",VEX_MX,16), TNSZ("vmovapd",VEX_RX,16), INVALID, TNSZ("vmovntpd",VEX_RM,16), 816 /* [2C] */ INVALID, INVALID, TNSZ("vucomisd",VEX_MX,8),TNSZ("vcomisd",VEX_MX,8), 817 818 /* [30] */ INVALID, INVALID, INVALID, INVALID, 819 /* [34] */ INVALID, INVALID, INVALID, INVALID, 820 /* [38] */ INVALID, INVALID, INVALID, INVALID, 821 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 822 823 /* [40] */ INVALID, TSvo("kand",VEX_RMX), TSvo("kandn",VEX_RMX), INVALID, 824 /* [44] */ TSvo("knot",VEX_MX), TSvo("kor",VEX_RMX), TSvo("kxnor",VEX_RMX), TSvo("kxor",VEX_RMX), 825 /* [48] */ INVALID, INVALID, TSvo("kadd",VEX_RMX), TSvo("kunpck",VEX_RMX), 826 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 827 828 /* [50] */ TNS("vmovmskpd",VEX_MR), TNSZ("vsqrtpd",VEX_MX,16), INVALID, INVALID, 829 /* [54] */ TNSZ("vandpd",VEX_RMrX,16), TNSZ("vandnpd",VEX_RMrX,16), TNSZ("vorpd",VEX_RMrX,16), TNSZ("vxorpd",VEX_RMrX,16), 830 /* [58] */ TNSZ("vaddpd",VEX_RMrX,16), TNSZ("vmulpd",VEX_RMrX,16), TNSZ("vcvtpd2ps",VEX_MX,16),TNSZ("vcvtps2dq",VEX_MX,16), 831 /* [5C] */ TNSZ("vsubpd",VEX_RMrX,16), TNSZ("vminpd",VEX_RMrX,16), TNSZ("vdivpd",VEX_RMrX,16), TNSZ("vmaxpd",VEX_RMrX,16), 832 833 /* [60] */ TNSZ("vpunpcklbw",VEX_RMrX,16),TNSZ("vpunpcklwd",VEX_RMrX,16),TNSZ("vpunpckldq",VEX_RMrX,16),TNSZ("vpacksswb",VEX_RMrX,16), 834 /* [64] */ TNSZ("vpcmpgtb",VEX_RMrX,16), TNSZ("vpcmpgtw",VEX_RMrX,16), TNSZ("vpcmpgtd",VEX_RMrX,16), TNSZ("vpackuswb",VEX_RMrX,16), 835 /* [68] */ TNSZ("vpunpckhbw",VEX_RMrX,16),TNSZ("vpunpckhwd",VEX_RMrX,16),TNSZ("vpunpckhdq",VEX_RMrX,16),TNSZ("vpackssdw",VEX_RMrX,16), 836 /* [6C] */ TNSZ("vpunpcklqdq",VEX_RMrX,16),TNSZ("vpunpckhqdq",VEX_RMrX,16),TNSZ("vmovd",VEX_MX,4),TNSZ("vmovdqa",VEX_MX,16), 837 838 /* [70] */ TNSZ("vpshufd",VEX_MXI,16), TNSZ("vgrp71",VEX_XXI,16), TNSZ("vgrp72",VEX_XXI,16), TNSZ("vgrp73",VEX_XXI,16), 839 /* [74] */ TNSZ("vpcmpeqb",VEX_RMrX,16), TNSZ("vpcmpeqw",VEX_RMrX,16), TNSZ("vpcmpeqd",VEX_RMrX,16), INVALID, 840 /* [78] */ INVALID, INVALID, INVALID, INVALID, 841 /* [7C] */ TNSZ("vhaddpd",VEX_RMrX,16), TNSZ("vhsubpd",VEX_RMrX,16), TNSZ("vmovd",VEX_RR,4), TNSZ("vmovdqa",VEX_RX,16), 842 843 /* [80] */ INVALID, INVALID, INVALID, INVALID, 844 /* [84] */ INVALID, INVALID, INVALID, INVALID, 845 /* [88] */ INVALID, INVALID, INVALID, INVALID, 846 /* [8C] */ INVALID, INVALID, INVALID, INVALID, 847 848 /* [90] */ TSvo("kmov",VEX_KRM), TSvo("kmov",VEX_KMR), TSvo("kmov",VEX_KRR), TSvo("kmov",VEX_MR), 849 /* [94] */ INVALID, INVALID, INVALID, INVALID, 850 /* [98] */ TSvo("kortest",VEX_MX), TSvo("ktest",VEX_MX), INVALID, INVALID, 851 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 852 853 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 854 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 855 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 856 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 857 858 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 859 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 860 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 861 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 862 863 /* [C0] */ INVALID, INVALID, TNSZ("vcmppd",VEX_RMRX,16), INVALID, 864 /* [C4] */ TNSZ("vpinsrw",VEX_RMRX,2),TNS("vpextrw",VEX_MR), TNSZ("vshufpd",VEX_RMRX,16), INVALID, 865 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 866 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 867 868 /* [D0] */ TNSZ("vaddsubpd",VEX_RMrX,16),TNSZ("vpsrlw",VEX_RMrX,16), TNSZ("vpsrld",VEX_RMrX,16), TNSZ("vpsrlq",VEX_RMrX,16), 869 /* [D4] */ TNSZ("vpaddq",VEX_RMrX,16), TNSZ("vpmullw",VEX_RMrX,16), TNSZ("vmovq",VEX_RX,8), TNS("vpmovmskb",VEX_MR), 870 /* [D8] */ TNSZ("vpsubusb",VEX_RMrX,16), TNSZ("vpsubusw",VEX_RMrX,16), TNSZ("vpminub",VEX_RMrX,16), TNSZ("vpand",VEX_RMrX,16), 871 /* [DC] */ TNSZ("vpaddusb",VEX_RMrX,16), TNSZ("vpaddusw",VEX_RMrX,16), TNSZ("vpmaxub",VEX_RMrX,16), TNSZ("vpandn",VEX_RMrX,16), 872 873 /* [E0] */ TNSZ("vpavgb",VEX_RMrX,16), TNSZ("vpsraw",VEX_RMrX,16), TNSZ("vpsrad",VEX_RMrX,16), TNSZ("vpavgw",VEX_RMrX,16), 874 /* [E4] */ TNSZ("vpmulhuw",VEX_RMrX,16), TNSZ("vpmulhw",VEX_RMrX,16), TNSZ("vcvttpd2dq",VEX_MX,16),TNSZ("vmovntdq",VEX_RM,16), 875 /* [E8] */ TNSZ("vpsubsb",VEX_RMrX,16), TNSZ("vpsubsw",VEX_RMrX,16), TNSZ("vpminsw",VEX_RMrX,16), TNSZ("vpor",VEX_RMrX,16), 876 /* [EC] */ TNSZ("vpaddsb",VEX_RMrX,16), TNSZ("vpaddsw",VEX_RMrX,16), TNSZ("vpmaxsw",VEX_RMrX,16), TNSZ("vpxor",VEX_RMrX,16), 877 878 /* [F0] */ INVALID, TNSZ("vpsllw",VEX_RMrX,16), TNSZ("vpslld",VEX_RMrX,16), TNSZ("vpsllq",VEX_RMrX,16), 879 /* [F4] */ TNSZ("vpmuludq",VEX_RMrX,16), TNSZ("vpmaddwd",VEX_RMrX,16), TNSZ("vpsadbw",VEX_RMrX,16), TNS("vmaskmovdqu",VEX_MX), 880 /* [F8] */ TNSZ("vpsubb",VEX_RMrX,16), TNSZ("vpsubw",VEX_RMrX,16), TNSZ("vpsubd",VEX_RMrX,16), TNSZ("vpsubq",VEX_RMrX,16), 881 /* [FC] */ TNSZ("vpaddb",VEX_RMrX,16), TNSZ("vpaddw",VEX_RMrX,16), TNSZ("vpaddd",VEX_RMrX,16), INVALID, 882 }; 883 884 /* 885 * Decode table for SIMD instructions with the repnz (0xf2) prefix. 886 */ 887 const instable_t dis_opSIMDrepnz[256] = { 888 /* [00] */ INVALID, INVALID, INVALID, INVALID, 889 /* [04] */ INVALID, INVALID, INVALID, INVALID, 890 /* [08] */ INVALID, INVALID, INVALID, INVALID, 891 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 892 893 /* [10] */ TNSZ("movsd",XMM,8), TNSZ("movsd",XMMS,8), TNSZ("movddup",XMM,8), INVALID, 894 /* [14] */ INVALID, INVALID, INVALID, INVALID, 895 /* [18] */ INVALID, INVALID, INVALID, INVALID, 896 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 897 898 /* [20] */ INVALID, INVALID, INVALID, INVALID, 899 /* [24] */ INVALID, INVALID, INVALID, INVALID, 900 /* [28] */ INVALID, INVALID, TNSZ("cvtsi2sd",XMM3MX,4),TNSZ("movntsd",XMMMS,8), 901 /* [2C] */ TNSZ("cvttsd2si",XMMXM3,8),TNSZ("cvtsd2si",XMMXM3,8),INVALID, INVALID, 902 903 /* [30] */ INVALID, INVALID, INVALID, INVALID, 904 /* [34] */ INVALID, INVALID, INVALID, INVALID, 905 /* [38] */ INVALID, INVALID, INVALID, INVALID, 906 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 907 908 /* [40] */ INVALID, INVALID, INVALID, INVALID, 909 /* [44] */ INVALID, INVALID, INVALID, INVALID, 910 /* [48] */ INVALID, INVALID, INVALID, INVALID, 911 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 912 913 /* [50] */ INVALID, TNSZ("sqrtsd",XMM,8), INVALID, INVALID, 914 /* [54] */ INVALID, INVALID, INVALID, INVALID, 915 /* [58] */ TNSZ("addsd",XMM,8), TNSZ("mulsd",XMM,8), TNSZ("cvtsd2ss",XMM,8), INVALID, 916 /* [5C] */ TNSZ("subsd",XMM,8), TNSZ("minsd",XMM,8), TNSZ("divsd",XMM,8), TNSZ("maxsd",XMM,8), 917 918 /* [60] */ INVALID, INVALID, INVALID, INVALID, 919 /* [64] */ INVALID, INVALID, INVALID, INVALID, 920 /* [68] */ INVALID, INVALID, INVALID, INVALID, 921 /* [6C] */ INVALID, INVALID, INVALID, INVALID, 922 923 /* [70] */ TNSZ("pshuflw",XMMP,16),INVALID, INVALID, INVALID, 924 /* [74] */ INVALID, INVALID, INVALID, INVALID, 925 /* [78] */ TNSZ("insertq",XMMX2I,16),TNSZ("insertq",XMM,8),INVALID, INVALID, 926 /* [7C] */ TNSZ("haddps",XMM,16), TNSZ("hsubps",XMM,16), INVALID, INVALID, 927 928 /* [80] */ INVALID, INVALID, INVALID, INVALID, 929 /* [84] */ INVALID, INVALID, INVALID, INVALID, 930 /* [88] */ INVALID, INVALID, INVALID, INVALID, 931 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 932 933 /* [90] */ INVALID, INVALID, INVALID, INVALID, 934 /* [94] */ INVALID, INVALID, INVALID, INVALID, 935 /* [98] */ INVALID, INVALID, INVALID, INVALID, 936 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 937 938 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 939 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 940 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 941 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 942 943 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 944 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 945 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 946 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 947 948 /* [C0] */ INVALID, INVALID, TNSZ("cmpsd",XMMP,8), INVALID, 949 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 950 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 951 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 952 953 /* [D0] */ TNSZ("addsubps",XMM,16),INVALID, INVALID, INVALID, 954 /* [D4] */ INVALID, INVALID, TNS("movdq2q",XMMXM), INVALID, 955 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 956 /* [DC] */ INVALID, INVALID, INVALID, INVALID, 957 958 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 959 /* [E4] */ INVALID, INVALID, TNSZ("cvtpd2dq",XMM,16),INVALID, 960 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 961 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 962 963 /* [F0] */ TNS("lddqu",XMMM), INVALID, INVALID, INVALID, 964 /* [F4] */ INVALID, INVALID, INVALID, INVALID, 965 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 966 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 967 }; 968 969 const instable_t dis_opAVXF20F[256] = { 970 /* [00] */ INVALID, INVALID, INVALID, INVALID, 971 /* [04] */ INVALID, INVALID, INVALID, INVALID, 972 /* [08] */ INVALID, INVALID, INVALID, INVALID, 973 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 974 975 /* [10] */ TNSZ("vmovsd",VEX_RMrX,8), TNSZ("vmovsd",VEX_RRX,8), TNSZ("vmovddup",VEX_MX,8), INVALID, 976 /* [14] */ INVALID, INVALID, INVALID, INVALID, 977 /* [18] */ INVALID, INVALID, INVALID, INVALID, 978 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 979 980 /* [20] */ INVALID, INVALID, INVALID, INVALID, 981 /* [24] */ INVALID, INVALID, INVALID, INVALID, 982 /* [28] */ INVALID, INVALID, TNSZ("vcvtsi2sd",VEX_RMrX,4),INVALID, 983 /* [2C] */ TNSZ("vcvttsd2si",VEX_MR,8),TNSZ("vcvtsd2si",VEX_MR,8),INVALID, INVALID, 984 985 /* [30] */ INVALID, INVALID, INVALID, INVALID, 986 /* [34] */ INVALID, INVALID, INVALID, INVALID, 987 /* [38] */ INVALID, INVALID, INVALID, INVALID, 988 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 989 990 /* [40] */ INVALID, INVALID, INVALID, INVALID, 991 /* [44] */ INVALID, INVALID, INVALID, INVALID, 992 /* [48] */ INVALID, INVALID, INVALID, INVALID, 993 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 994 995 /* [50] */ INVALID, TNSZ("vsqrtsd",VEX_RMrX,8), INVALID, INVALID, 996 /* [54] */ INVALID, INVALID, INVALID, INVALID, 997 /* [58] */ TNSZ("vaddsd",VEX_RMrX,8), TNSZ("vmulsd",VEX_RMrX,8), TNSZ("vcvtsd2ss",VEX_RMrX,8), INVALID, 998 /* [5C] */ TNSZ("vsubsd",VEX_RMrX,8), TNSZ("vminsd",VEX_RMrX,8), TNSZ("vdivsd",VEX_RMrX,8), TNSZ("vmaxsd",VEX_RMrX,8), 999 1000 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1001 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1002 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1003 /* [6C] */ INVALID, INVALID, INVALID, INVALID, 1004 1005 /* [70] */ TNSZ("vpshuflw",VEX_MXI,16),INVALID, INVALID, INVALID, 1006 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1007 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1008 /* [7C] */ TNSZ("vhaddps",VEX_RMrX,8), TNSZ("vhsubps",VEX_RMrX,8), INVALID, INVALID, 1009 1010 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1011 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1012 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1013 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1014 1015 /* [90] */ INVALID, INVALID, TSvo("kmov",VEX_KRR), TSvo("kmov",VEX_MR), 1016 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1017 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1018 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1019 1020 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1021 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1022 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1023 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1024 1025 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1026 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1027 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 1028 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 1029 1030 /* [C0] */ INVALID, INVALID, TNSZ("vcmpsd",VEX_RMRX,8), INVALID, 1031 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1032 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1033 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 1034 1035 /* [D0] */ TNSZ("vaddsubps",VEX_RMrX,8), INVALID, INVALID, INVALID, 1036 /* [D4] */ INVALID, INVALID, INVALID, INVALID, 1037 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 1038 /* [DC] */ INVALID, INVALID, INVALID, INVALID, 1039 1040 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1041 /* [E4] */ INVALID, INVALID, TNSZ("vcvtpd2dq",VEX_MX,16),INVALID, 1042 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 1043 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 1044 1045 /* [F0] */ TNSZ("vlddqu",VEX_MX,16), INVALID, INVALID, INVALID, 1046 /* [F4] */ INVALID, INVALID, INVALID, INVALID, 1047 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1048 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1049 }; 1050 1051 const instable_t dis_opAVXF20F3A[256] = { 1052 /* [00] */ INVALID, INVALID, INVALID, INVALID, 1053 /* [04] */ INVALID, INVALID, INVALID, INVALID, 1054 /* [08] */ INVALID, INVALID, INVALID, INVALID, 1055 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1056 1057 /* [10] */ INVALID, INVALID, INVALID, INVALID, 1058 /* [14] */ INVALID, INVALID, INVALID, INVALID, 1059 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1060 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 1061 1062 /* [20] */ INVALID, INVALID, INVALID, INVALID, 1063 /* [24] */ INVALID, INVALID, INVALID, INVALID, 1064 /* [28] */ INVALID, INVALID, INVALID, INVALID, 1065 /* [2C] */ INVALID, INVALID, INVALID, INVALID, 1066 1067 /* [30] */ INVALID, INVALID, INVALID, INVALID, 1068 /* [34] */ INVALID, INVALID, INVALID, INVALID, 1069 /* [38] */ INVALID, INVALID, INVALID, INVALID, 1070 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 1071 1072 /* [40] */ INVALID, INVALID, INVALID, INVALID, 1073 /* [44] */ INVALID, INVALID, INVALID, INVALID, 1074 /* [48] */ INVALID, INVALID, INVALID, INVALID, 1075 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 1076 1077 /* [50] */ INVALID, INVALID, INVALID, INVALID, 1078 /* [54] */ INVALID, INVALID, INVALID, INVALID, 1079 /* [58] */ INVALID, INVALID, INVALID, INVALID, 1080 /* [5C] */ INVALID, INVALID, INVALID, INVALID, 1081 1082 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1083 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1084 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1085 /* [6C] */ INVALID, INVALID, INVALID, INVALID, 1086 1087 /* [70] */ INVALID, INVALID, INVALID, INVALID, 1088 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1089 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1090 /* [7C] */ INVALID, INVALID, INVALID, INVALID, 1091 1092 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1093 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1094 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1095 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1096 1097 /* [90] */ INVALID, INVALID, INVALID, INVALID, 1098 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1099 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1100 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1101 1102 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1103 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1104 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1105 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1106 1107 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1108 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1109 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 1110 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 1111 1112 /* [C0] */ INVALID, INVALID, INVALID, INVALID, 1113 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1114 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1115 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 1116 1117 /* [D0] */ INVALID, INVALID, INVALID, INVALID, 1118 /* [D4] */ INVALID, INVALID, INVALID, INVALID, 1119 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 1120 /* [DC] */ INVALID, INVALID, INVALID, INVALID, 1121 1122 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1123 /* [E4] */ INVALID, INVALID, INVALID, INVALID, 1124 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 1125 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 1126 1127 /* [F0] */ TNSZvr("rorx",VEX_MXI,6),INVALID, INVALID, INVALID, 1128 /* [F4] */ INVALID, INVALID, INVALID, INVALID, 1129 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1130 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1131 }; 1132 1133 const instable_t dis_opAVXF20F38[256] = { 1134 /* [00] */ INVALID, INVALID, INVALID, INVALID, 1135 /* [04] */ INVALID, INVALID, INVALID, INVALID, 1136 /* [08] */ INVALID, INVALID, INVALID, INVALID, 1137 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1138 1139 /* [10] */ INVALID, INVALID, INVALID, INVALID, 1140 /* [14] */ INVALID, INVALID, INVALID, INVALID, 1141 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1142 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 1143 1144 /* [20] */ INVALID, INVALID, INVALID, INVALID, 1145 /* [24] */ INVALID, INVALID, INVALID, INVALID, 1146 /* [28] */ INVALID, INVALID, INVALID, INVALID, 1147 /* [2C] */ INVALID, INVALID, INVALID, INVALID, 1148 1149 /* [30] */ INVALID, INVALID, INVALID, INVALID, 1150 /* [34] */ INVALID, INVALID, INVALID, INVALID, 1151 /* [38] */ INVALID, INVALID, INVALID, INVALID, 1152 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 1153 1154 /* [40] */ INVALID, INVALID, INVALID, INVALID, 1155 /* [44] */ INVALID, INVALID, INVALID, INVALID, 1156 /* [48] */ INVALID, INVALID, INVALID, INVALID, 1157 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 1158 1159 /* [50] */ INVALID, INVALID, INVALID, INVALID, 1160 /* [54] */ INVALID, INVALID, INVALID, INVALID, 1161 /* [58] */ INVALID, INVALID, INVALID, INVALID, 1162 /* [5C] */ INVALID, INVALID, INVALID, INVALID, 1163 1164 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1165 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1166 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1167 /* [6C] */ INVALID, INVALID, INVALID, INVALID, 1168 1169 /* [70] */ INVALID, INVALID, INVALID, INVALID, 1170 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1171 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1172 /* [7C] */ INVALID, INVALID, INVALID, INVALID, 1173 1174 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1175 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1176 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1177 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1178 1179 /* [90] */ INVALID, INVALID, INVALID, INVALID, 1180 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1181 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1182 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1183 1184 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1185 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1186 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1187 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1188 1189 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1190 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1191 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 1192 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 1193 1194 /* [C0] */ INVALID, INVALID, INVALID, INVALID, 1195 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1196 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1197 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 1198 1199 /* [D0] */ INVALID, INVALID, INVALID, INVALID, 1200 /* [D4] */ INVALID, INVALID, INVALID, INVALID, 1201 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 1202 /* [DC] */ INVALID, INVALID, INVALID, INVALID, 1203 1204 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1205 /* [E4] */ INVALID, INVALID, INVALID, INVALID, 1206 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 1207 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 1208 1209 /* [F0] */ INVALID, INVALID, INVALID, INVALID, 1210 /* [F4] */ INVALID, TNSZvr("pdep",VEX_RMrX,5),TNSZvr("mulx",VEX_RMrX,5),TNSZvr("shrx",VEX_VRMrX,5), 1211 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1212 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1213 }; 1214 1215 const instable_t dis_opAVXF30F38[256] = { 1216 /* [00] */ INVALID, INVALID, INVALID, INVALID, 1217 /* [04] */ INVALID, INVALID, INVALID, INVALID, 1218 /* [08] */ INVALID, INVALID, INVALID, INVALID, 1219 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1220 1221 /* [10] */ INVALID, INVALID, INVALID, INVALID, 1222 /* [14] */ INVALID, INVALID, INVALID, INVALID, 1223 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1224 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 1225 1226 /* [20] */ INVALID, INVALID, INVALID, INVALID, 1227 /* [24] */ INVALID, INVALID, INVALID, INVALID, 1228 /* [28] */ INVALID, INVALID, INVALID, INVALID, 1229 /* [2C] */ INVALID, INVALID, INVALID, INVALID, 1230 1231 /* [30] */ INVALID, INVALID, INVALID, INVALID, 1232 /* [34] */ INVALID, INVALID, INVALID, INVALID, 1233 /* [38] */ INVALID, INVALID, INVALID, INVALID, 1234 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 1235 1236 /* [40] */ INVALID, INVALID, INVALID, INVALID, 1237 /* [44] */ INVALID, INVALID, INVALID, INVALID, 1238 /* [48] */ INVALID, INVALID, INVALID, INVALID, 1239 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 1240 1241 /* [50] */ INVALID, INVALID, INVALID, INVALID, 1242 /* [54] */ INVALID, INVALID, INVALID, INVALID, 1243 /* [58] */ INVALID, INVALID, INVALID, INVALID, 1244 /* [5C] */ INVALID, INVALID, INVALID, INVALID, 1245 1246 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1247 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1248 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1249 /* [6C] */ INVALID, INVALID, INVALID, INVALID, 1250 1251 /* [70] */ INVALID, INVALID, INVALID, INVALID, 1252 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1253 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1254 /* [7C] */ INVALID, INVALID, INVALID, INVALID, 1255 1256 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1257 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1258 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1259 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1260 1261 /* [90] */ INVALID, INVALID, INVALID, INVALID, 1262 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1263 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1264 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1265 1266 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1267 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1268 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1269 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1270 1271 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1272 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1273 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 1274 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 1275 1276 /* [C0] */ INVALID, INVALID, INVALID, INVALID, 1277 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1278 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1279 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 1280 1281 /* [D0] */ INVALID, INVALID, INVALID, INVALID, 1282 /* [D4] */ INVALID, INVALID, INVALID, INVALID, 1283 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 1284 /* [DC] */ INVALID, INVALID, INVALID, INVALID, 1285 1286 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1287 /* [E4] */ INVALID, INVALID, INVALID, INVALID, 1288 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 1289 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 1290 1291 /* [F0] */ INVALID, INVALID, INVALID, INVALID, 1292 /* [F4] */ INVALID, TNSZvr("pext",VEX_RMrX,5),INVALID, TNSZvr("sarx",VEX_VRMrX,5), 1293 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1294 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1295 }; 1296 /* 1297 * Decode table for SIMD instructions with the repz (0xf3) prefix. 1298 */ 1299 const instable_t dis_opSIMDrepz[256] = { 1300 /* [00] */ INVALID, INVALID, INVALID, INVALID, 1301 /* [04] */ INVALID, INVALID, INVALID, INVALID, 1302 /* [08] */ INVALID, INVALID, INVALID, INVALID, 1303 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1304 1305 /* [10] */ TNSZ("movss",XMM,4), TNSZ("movss",XMMS,4), TNSZ("movsldup",XMM,16),INVALID, 1306 /* [14] */ INVALID, INVALID, TNSZ("movshdup",XMM,16),INVALID, 1307 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1308 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 1309 1310 /* [20] */ INVALID, INVALID, INVALID, INVALID, 1311 /* [24] */ INVALID, INVALID, INVALID, INVALID, 1312 /* [28] */ INVALID, INVALID, TNSZ("cvtsi2ss",XMM3MX,4),TNSZ("movntss",XMMMS,4), 1313 /* [2C] */ TNSZ("cvttss2si",XMMXM3,4),TNSZ("cvtss2si",XMMXM3,4),INVALID, INVALID, 1314 1315 /* [30] */ INVALID, INVALID, INVALID, INVALID, 1316 /* [34] */ INVALID, INVALID, INVALID, INVALID, 1317 /* [38] */ INVALID, INVALID, INVALID, INVALID, 1318 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 1319 1320 /* [40] */ INVALID, INVALID, INVALID, INVALID, 1321 /* [44] */ INVALID, INVALID, INVALID, INVALID, 1322 /* [48] */ INVALID, INVALID, INVALID, INVALID, 1323 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 1324 1325 /* [50] */ INVALID, TNSZ("sqrtss",XMM,4), TNSZ("rsqrtss",XMM,4), TNSZ("rcpss",XMM,4), 1326 /* [54] */ INVALID, INVALID, INVALID, INVALID, 1327 /* [58] */ TNSZ("addss",XMM,4), TNSZ("mulss",XMM,4), TNSZ("cvtss2sd",XMM,4), TNSZ("cvttps2dq",XMM,16), 1328 /* [5C] */ TNSZ("subss",XMM,4), TNSZ("minss",XMM,4), TNSZ("divss",XMM,4), TNSZ("maxss",XMM,4), 1329 1330 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1331 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1332 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1333 /* [6C] */ INVALID, INVALID, INVALID, TNSZ("movdqu",XMM,16), 1334 1335 /* [70] */ TNSZ("pshufhw",XMMP,16),INVALID, INVALID, INVALID, 1336 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1337 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1338 /* [7C] */ INVALID, INVALID, TNSZ("movq",XMM,8), TNSZ("movdqu",XMMS,16), 1339 1340 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1341 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1342 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1343 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1344 1345 /* [90] */ INVALID, INVALID, INVALID, INVALID, 1346 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1347 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1348 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1349 1350 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1351 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1352 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1353 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1354 1355 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1356 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1357 /* [B8] */ TS("popcnt",MRw), INVALID, INVALID, INVALID, 1358 /* [BC] */ TNSZ("tzcnt",MRw,5), TS("lzcnt",MRw), INVALID, INVALID, 1359 1360 /* [C0] */ INVALID, INVALID, TNSZ("cmpss",XMMP,4), INVALID, 1361 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1362 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1363 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 1364 1365 /* [D0] */ INVALID, INVALID, INVALID, INVALID, 1366 /* [D4] */ INVALID, INVALID, TNS("movq2dq",XMMMX), INVALID, 1367 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 1368 /* [DC] */ INVALID, INVALID, INVALID, INVALID, 1369 1370 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1371 /* [E4] */ INVALID, INVALID, TNSZ("cvtdq2pd",XMM,8), INVALID, 1372 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 1373 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 1374 1375 /* [F0] */ INVALID, INVALID, INVALID, INVALID, 1376 /* [F4] */ INVALID, INVALID, INVALID, INVALID, 1377 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1378 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1379 }; 1380 1381 const instable_t dis_opAVXF30F[256] = { 1382 /* [00] */ INVALID, INVALID, INVALID, INVALID, 1383 /* [04] */ INVALID, INVALID, INVALID, INVALID, 1384 /* [08] */ INVALID, INVALID, INVALID, INVALID, 1385 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1386 1387 /* [10] */ TNSZ("vmovss",VEX_RMrX,4), TNSZ("vmovss",VEX_RRX,4), TNSZ("vmovsldup",VEX_MX,4), INVALID, 1388 /* [14] */ INVALID, INVALID, TNSZ("vmovshdup",VEX_MX,4), INVALID, 1389 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1390 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 1391 1392 /* [20] */ INVALID, INVALID, INVALID, INVALID, 1393 /* [24] */ INVALID, INVALID, INVALID, INVALID, 1394 /* [28] */ INVALID, INVALID, TNSZ("vcvtsi2ss",VEX_RMrX,4),INVALID, 1395 /* [2C] */ TNSZ("vcvttss2si",VEX_MR,4),TNSZ("vcvtss2si",VEX_MR,4),INVALID, INVALID, 1396 1397 /* [30] */ INVALID, INVALID, INVALID, INVALID, 1398 /* [34] */ INVALID, INVALID, INVALID, INVALID, 1399 /* [38] */ INVALID, INVALID, INVALID, INVALID, 1400 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 1401 1402 /* [40] */ INVALID, INVALID, INVALID, INVALID, 1403 /* [44] */ INVALID, INVALID, INVALID, INVALID, 1404 /* [48] */ INVALID, INVALID, INVALID, INVALID, 1405 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 1406 1407 /* [50] */ INVALID, TNSZ("vsqrtss",VEX_RMrX,4), TNSZ("vrsqrtss",VEX_RMrX,4), TNSZ("vrcpss",VEX_RMrX,4), 1408 /* [54] */ INVALID, INVALID, INVALID, INVALID, 1409 /* [58] */ TNSZ("vaddss",VEX_RMrX,4), TNSZ("vmulss",VEX_RMrX,4), TNSZ("vcvtss2sd",VEX_RMrX,4), TNSZ("vcvttps2dq",VEX_MX,16), 1410 /* [5C] */ TNSZ("vsubss",VEX_RMrX,4), TNSZ("vminss",VEX_RMrX,4), TNSZ("vdivss",VEX_RMrX,4), TNSZ("vmaxss",VEX_RMrX,4), 1411 1412 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1413 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1414 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1415 /* [6C] */ INVALID, INVALID, INVALID, TNSZ("vmovdqu",VEX_MX,16), 1416 1417 /* [70] */ TNSZ("vpshufhw",VEX_MXI,16),INVALID, INVALID, INVALID, 1418 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1419 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1420 /* [7C] */ INVALID, INVALID, TNSZ("vmovq",VEX_MX,8), TNSZ("vmovdqu",VEX_RX,16), 1421 1422 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1423 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1424 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1425 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1426 1427 /* [90] */ INVALID, INVALID, INVALID, INVALID, 1428 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1429 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1430 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1431 1432 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1433 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1434 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1435 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1436 1437 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1438 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1439 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 1440 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 1441 1442 /* [C0] */ INVALID, INVALID, TNSZ("vcmpss",VEX_RMRX,4), INVALID, 1443 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1444 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1445 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 1446 1447 /* [D0] */ INVALID, INVALID, INVALID, INVALID, 1448 /* [D4] */ INVALID, INVALID, INVALID, INVALID, 1449 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 1450 /* [DC] */ INVALID, INVALID, INVALID, INVALID, 1451 1452 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1453 /* [E4] */ INVALID, INVALID, TNSZ("vcvtdq2pd",VEX_MX,8), INVALID, 1454 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 1455 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 1456 1457 /* [F0] */ INVALID, INVALID, INVALID, INVALID, 1458 /* [F4] */ INVALID, INVALID, INVALID, INVALID, 1459 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1460 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1461 }; 1462 1463 /* 1464 * Table for instructions with an EVEX prefix followed by 0F. 1465 */ 1466 const instable_t dis_opEVEX0F[256] = { 1467 /* [00] */ INVALID, INVALID, INVALID, INVALID, 1468 /* [04] */ INVALID, INVALID, INVALID, INVALID, 1469 /* [08] */ INVALID, INVALID, INVALID, INVALID, 1470 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1471 1472 /* [10] */ TNS("vmovups",EVEX_MX), TNS("vmovups",EVEX_RX), INVALID, INVALID, 1473 /* [14] */ INVALID, INVALID, INVALID, INVALID, 1474 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1475 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 1476 1477 /* [20] */ INVALID, INVALID, INVALID, INVALID, 1478 /* [24] */ INVALID, INVALID, INVALID, INVALID, 1479 /* [28] */ TNS("vmovaps",EVEX_MX), TNS("vmovaps",EVEX_RX), INVALID, INVALID, 1480 /* [2C] */ INVALID, INVALID, INVALID, INVALID, 1481 1482 /* [30] */ INVALID, INVALID, INVALID, INVALID, 1483 /* [34] */ INVALID, INVALID, INVALID, INVALID, 1484 /* [38] */ INVALID, INVALID, INVALID, INVALID, 1485 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 1486 1487 /* [40] */ INVALID, INVALID, INVALID, INVALID, 1488 /* [44] */ INVALID, INVALID, INVALID, INVALID, 1489 /* [48] */ INVALID, INVALID, INVALID, INVALID, 1490 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 1491 1492 /* [50] */ INVALID, INVALID, INVALID, INVALID, 1493 /* [54] */ TNS("vandps",EVEX_RMrX),TNS("vandnps",EVEX_RMrX),TNS("vorps",EVEX_RMrX),TNS("vxorps",EVEX_RMrX), 1494 /* [58] */ INVALID, INVALID, INVALID, INVALID, 1495 /* [5C] */ INVALID, INVALID, INVALID, INVALID, 1496 1497 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1498 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1499 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1500 /* [6C] */ INVALID, INVALID, INVALID, INVALID, 1501 1502 /* [70] */ INVALID, INVALID, INVALID, INVALID, 1503 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1504 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1505 /* [7C] */ INVALID, INVALID, INVALID, INVALID, 1506 1507 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1508 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1509 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1510 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1511 1512 /* [90] */ INVALID, INVALID, INVALID, INVALID, 1513 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1514 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1515 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1516 1517 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1518 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1519 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1520 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1521 1522 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1523 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1524 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 1525 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 1526 1527 /* [C0] */ INVALID, INVALID, INVALID, INVALID, 1528 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1529 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1530 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 1531 1532 /* [D0] */ INVALID, INVALID, INVALID, INVALID, 1533 /* [D4] */ INVALID, INVALID, INVALID, INVALID, 1534 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 1535 /* [DC] */ INVALID, INVALID, INVALID, INVALID, 1536 1537 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1538 /* [E4] */ INVALID, INVALID, INVALID, INVALID, 1539 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 1540 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 1541 1542 /* [F0] */ INVALID, INVALID, INVALID, INVALID, 1543 /* [F4] */ INVALID, INVALID, INVALID, INVALID, 1544 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1545 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1546 }; 1547 1548 /* 1549 * Decode tables for EVEX 66 0F 1550 */ 1551 const instable_t dis_opEVEX660F[256] = { 1552 /* [00] */ INVALID, INVALID, INVALID, INVALID, 1553 /* [04] */ INVALID, INVALID, INVALID, INVALID, 1554 /* [08] */ INVALID, INVALID, INVALID, INVALID, 1555 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1556 1557 /* [10] */ TNS("vmovupd",EVEX_MX), TNS("vmovupd",EVEX_RX), INVALID, INVALID, 1558 /* [14] */ INVALID, INVALID, INVALID, INVALID, 1559 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1560 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 1561 1562 /* [20] */ INVALID, INVALID, INVALID, INVALID, 1563 /* [24] */ INVALID, INVALID, INVALID, INVALID, 1564 /* [28] */ TNS("vmovapd",EVEX_MX), TNS("vmovapd",EVEX_RX), INVALID, INVALID, 1565 /* [2C] */ INVALID, INVALID, INVALID, INVALID, 1566 1567 /* [30] */ INVALID, INVALID, INVALID, INVALID, 1568 /* [34] */ INVALID, INVALID, INVALID, INVALID, 1569 /* [38] */ INVALID, INVALID, INVALID, INVALID, 1570 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 1571 1572 /* [40] */ INVALID, INVALID, INVALID, INVALID, 1573 /* [44] */ INVALID, INVALID, INVALID, INVALID, 1574 /* [48] */ INVALID, INVALID, INVALID, INVALID, 1575 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 1576 1577 /* [50] */ INVALID, INVALID, INVALID, INVALID, 1578 /* [54] */ TNS("vandpd",EVEX_RMrX),TNS("vandnpd",EVEX_RMrX),TNS("vorpd",EVEX_RMrX),TNS("vxorpd",EVEX_RMrX), 1579 /* [58] */ INVALID, INVALID, INVALID, INVALID, 1580 /* [5C] */ INVALID, INVALID, INVALID, INVALID, 1581 1582 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1583 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1584 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1585 /* [6C] */ INVALID, INVALID, INVALID, TNS("vmovdqa",EVEX_MX), 1586 1587 /* [70] */ INVALID, INVALID, INVALID, INVALID, 1588 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1589 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1590 /* [7C] */ INVALID, INVALID, INVALID, TNS("vmovdqa",EVEX_RX), 1591 1592 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1593 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1594 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1595 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1596 1597 /* [90] */ INVALID, INVALID, INVALID, INVALID, 1598 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1599 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1600 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1601 1602 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1603 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1604 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1605 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1606 1607 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1608 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1609 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 1610 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 1611 1612 /* [C0] */ INVALID, INVALID, INVALID, INVALID, 1613 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1614 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1615 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 1616 1617 /* [D0] */ INVALID, INVALID, INVALID, INVALID, 1618 /* [D4] */ INVALID, INVALID, INVALID, INVALID, 1619 /* [D8] */ INVALID, INVALID, INVALID, TSq("vpand",EVEX_RMrX), 1620 /* [DC] */ INVALID, INVALID, INVALID, TSq("vpandn",EVEX_RMrX), 1621 1622 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1623 /* [E4] */ INVALID, INVALID, INVALID, INVALID, 1624 /* [E8] */ INVALID, INVALID, INVALID, TSq("vpor",EVEX_RMrX), 1625 /* [EC] */ INVALID, INVALID, INVALID, TSq("vpxor",EVEX_RMrX), 1626 1627 /* [F0] */ INVALID, INVALID, INVALID, INVALID, 1628 /* [F4] */ INVALID, INVALID, INVALID, INVALID, 1629 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1630 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1631 }; 1632 1633 const instable_t dis_opEVEX660F38[256] = { 1634 /* [00] */ INVALID, INVALID, INVALID, INVALID, 1635 /* [04] */ INVALID, INVALID, INVALID, INVALID, 1636 /* [08] */ INVALID, INVALID, INVALID, INVALID, 1637 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1638 1639 /* [10] */ INVALID, INVALID, INVALID, INVALID, 1640 /* [14] */ INVALID, INVALID, INVALID, INVALID, 1641 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1642 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 1643 1644 /* [20] */ INVALID, INVALID, INVALID, INVALID, 1645 /* [24] */ INVALID, INVALID, INVALID, INVALID, 1646 /* [28] */ INVALID, INVALID, INVALID, INVALID, 1647 /* [2C] */ INVALID, INVALID, INVALID, INVALID, 1648 1649 /* [30] */ INVALID, INVALID, INVALID, INVALID, 1650 /* [34] */ INVALID, INVALID, INVALID, INVALID, 1651 /* [38] */ INVALID, INVALID, INVALID, INVALID, 1652 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 1653 1654 /* [40] */ INVALID, INVALID, INVALID, INVALID, 1655 /* [44] */ INVALID, INVALID, INVALID, INVALID, 1656 /* [48] */ INVALID, INVALID, INVALID, INVALID, 1657 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 1658 1659 /* [50] */ TNSZ("vpdpbusd",EVEX_RMrX,16),TNSZ("vpdpbusds",EVEX_RMrX,16),TNSZ("vpdpwssd",EVEX_RMrX,16),TNSZ("vpdpwssds",EVEX_RMrX,16), 1660 /* [54] */ INVALID, INVALID, INVALID, INVALID, 1661 /* [58] */ INVALID, INVALID, INVALID, INVALID, 1662 /* [5C] */ INVALID, INVALID, INVALID, INVALID, 1663 1664 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1665 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1666 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1667 /* [6C] */ INVALID, INVALID, INVALID, INVALID, 1668 1669 /* [70] */ INVALID, INVALID, INVALID, INVALID, 1670 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1671 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1672 /* [7C] */ INVALID, INVALID, INVALID, INVALID, 1673 1674 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1675 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1676 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1677 /* [8C] */ INVALID, INVALID, INVALID, INVALID, 1678 1679 /* [90] */ INVALID, INVALID, INVALID, INVALID, 1680 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1681 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1682 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1683 1684 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1685 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1686 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1687 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1688 1689 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1690 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1691 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 1692 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 1693 1694 /* [C0] */ INVALID, INVALID, INVALID, INVALID, 1695 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1696 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1697 /* [CC] */ INVALID, INVALID, INVALID, TNS("vgf2p8mulb",EVEX_RMrX), 1698 1699 /* [D0] */ INVALID, INVALID, INVALID, INVALID, 1700 /* [D4] */ INVALID, INVALID, INVALID, INVALID, 1701 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 1702 /* [DC] */ TNSZ("vaesenc",EVEX_RMrX,16),TNSZ("vaesenclast",EVEX_RMrX,16),TNSZ("vaesdec",EVEX_RMrX,16),TNSZ("vaesdeclast",EVEX_RMrX,16), 1703 1704 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1705 /* [E4] */ INVALID, INVALID, INVALID, INVALID, 1706 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 1707 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 1708 1709 /* [F0] */ INVALID, INVALID, INVALID, INVALID, 1710 /* [F4] */ INVALID, INVALID, INVALID, INVALID, 1711 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1712 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1713 }; 1714 1715 const instable_t dis_opEVEX660F3A[256] = { 1716 /* [00] */ INVALID, INVALID, INVALID, INVALID, 1717 /* [04] */ INVALID, INVALID, INVALID, INVALID, 1718 /* [08] */ INVALID, INVALID, INVALID, INVALID, 1719 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1720 1721 /* [10] */ INVALID, INVALID, INVALID, INVALID, 1722 /* [14] */ INVALID, INVALID, INVALID, INVALID, 1723 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1724 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 1725 1726 /* [20] */ INVALID, INVALID, INVALID, INVALID, 1727 /* [24] */ INVALID, INVALID, INVALID, INVALID, 1728 /* [28] */ INVALID, INVALID, INVALID, INVALID, 1729 /* [2C] */ INVALID, INVALID, INVALID, INVALID, 1730 1731 /* [30] */ INVALID, INVALID, INVALID, INVALID, 1732 /* [34] */ INVALID, INVALID, INVALID, INVALID, 1733 /* [38] */ INVALID, INVALID, INVALID, INVALID, 1734 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 1735 1736 /* [40] */ INVALID, INVALID, INVALID, INVALID, 1737 /* [44] */ TNSZ("vpclmulqdq",EVEX_RMRX,16),INVALID, INVALID, INVALID, 1738 /* [48] */ INVALID, INVALID, INVALID, INVALID, 1739 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 1740 1741 /* [50] */ INVALID, INVALID, INVALID, INVALID, 1742 /* [54] */ INVALID, INVALID, INVALID, INVALID, 1743 /* [58] */ INVALID, INVALID, INVALID, INVALID, 1744 /* [5C] */ INVALID, INVALID, INVALID, INVALID, 1745 1746 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1747 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1748 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1749 /* [6C] */ INVALID, INVALID, INVALID, INVALID, 1750 1751 /* [70] */ INVALID, INVALID, INVALID, INVALID, 1752 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1753 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1754 /* [7C] */ INVALID, INVALID, INVALID, INVALID, 1755 1756 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1757 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1758 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1759 /* [8C] */ INVALID, INVALID, INVALID, INVALID, 1760 1761 /* [90] */ INVALID, INVALID, INVALID, INVALID, 1762 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1763 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1764 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1765 1766 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1767 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1768 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1769 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1770 1771 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1772 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1773 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 1774 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 1775 1776 /* [C0] */ INVALID, INVALID, INVALID, INVALID, 1777 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1778 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1779 /* [CC] */ INVALID, INVALID, TNS("vgf2p8affineqb",EVEX_RMRX),TNS("vgf2p8affineinvqb",EVEX_RMRX), 1780 1781 /* [D0] */ INVALID, INVALID, INVALID, INVALID, 1782 /* [D4] */ INVALID, INVALID, INVALID, INVALID, 1783 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 1784 /* [DC] */ INVALID, INVALID, INVALID, INVALID, 1785 1786 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1787 /* [E4] */ INVALID, INVALID, INVALID, INVALID, 1788 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 1789 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 1790 1791 /* [F0] */ INVALID, INVALID, INVALID, INVALID, 1792 /* [F4] */ INVALID, INVALID, INVALID, INVALID, 1793 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1794 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1795 }; 1796 1797 1798 const instable_t dis_opEVEXF20F[256] = { 1799 /* [00] */ INVALID, INVALID, INVALID, INVALID, 1800 /* [04] */ INVALID, INVALID, INVALID, INVALID, 1801 /* [08] */ INVALID, INVALID, INVALID, INVALID, 1802 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1803 1804 /* [10] */ INVALID, INVALID, INVALID, INVALID, 1805 /* [14] */ INVALID, INVALID, INVALID, INVALID, 1806 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1807 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 1808 1809 /* [20] */ INVALID, INVALID, INVALID, INVALID, 1810 /* [24] */ INVALID, INVALID, INVALID, INVALID, 1811 /* [28] */ INVALID, INVALID, INVALID, INVALID, 1812 /* [2C] */ INVALID, INVALID, INVALID, INVALID, 1813 1814 /* [30] */ INVALID, INVALID, INVALID, INVALID, 1815 /* [34] */ INVALID, INVALID, INVALID, INVALID, 1816 /* [38] */ INVALID, INVALID, INVALID, INVALID, 1817 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 1818 1819 /* [40] */ INVALID, INVALID, INVALID, INVALID, 1820 /* [44] */ INVALID, INVALID, INVALID, INVALID, 1821 /* [48] */ INVALID, INVALID, INVALID, INVALID, 1822 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 1823 1824 /* [50] */ INVALID, INVALID, INVALID, INVALID, 1825 /* [54] */ INVALID, INVALID, INVALID, INVALID, 1826 /* [58] */ INVALID, INVALID, INVALID, INVALID, 1827 /* [5C] */ INVALID, INVALID, INVALID, INVALID, 1828 1829 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1830 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1831 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1832 /* [6C] */ INVALID, INVALID, INVALID, TNS("vmovdqu",EVEX_MX), 1833 1834 /* [70] */ INVALID, INVALID, INVALID, INVALID, 1835 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1836 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1837 /* [7C] */ INVALID, INVALID, INVALID, TNS("vmovdqu",EVEX_RX), 1838 1839 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1840 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1841 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1842 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1843 1844 /* [90] */ INVALID, INVALID, INVALID, INVALID, 1845 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1846 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1847 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1848 1849 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1850 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1851 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1852 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1853 1854 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1855 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1856 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 1857 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 1858 1859 /* [C0] */ INVALID, INVALID, INVALID, INVALID, 1860 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1861 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1862 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 1863 1864 /* [D0] */ INVALID, INVALID, INVALID, INVALID, 1865 /* [D4] */ INVALID, INVALID, INVALID, INVALID, 1866 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 1867 /* [DC] */ INVALID, INVALID, INVALID, INVALID, 1868 1869 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1870 /* [E4] */ INVALID, INVALID, INVALID, INVALID, 1871 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 1872 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 1873 1874 /* [F0] */ INVALID, INVALID, INVALID, INVALID, 1875 /* [F4] */ INVALID, INVALID, INVALID, INVALID, 1876 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1877 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1878 }; 1879 1880 const instable_t dis_opEVEXF30F[256] = { 1881 /* [00] */ INVALID, INVALID, INVALID, INVALID, 1882 /* [04] */ INVALID, INVALID, INVALID, INVALID, 1883 /* [08] */ INVALID, INVALID, INVALID, INVALID, 1884 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1885 1886 /* [10] */ INVALID, INVALID, INVALID, INVALID, 1887 /* [14] */ INVALID, INVALID, INVALID, INVALID, 1888 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1889 /* [1C] */ INVALID, INVALID, INVALID, INVALID, 1890 1891 /* [20] */ INVALID, INVALID, INVALID, INVALID, 1892 /* [24] */ INVALID, INVALID, INVALID, INVALID, 1893 /* [28] */ INVALID, INVALID, INVALID, INVALID, 1894 /* [2C] */ INVALID, INVALID, INVALID, INVALID, 1895 1896 /* [30] */ INVALID, INVALID, INVALID, INVALID, 1897 /* [34] */ INVALID, INVALID, INVALID, INVALID, 1898 /* [38] */ INVALID, INVALID, INVALID, INVALID, 1899 /* [3C] */ INVALID, INVALID, INVALID, INVALID, 1900 1901 /* [40] */ INVALID, INVALID, INVALID, INVALID, 1902 /* [44] */ INVALID, INVALID, INVALID, INVALID, 1903 /* [48] */ INVALID, INVALID, INVALID, INVALID, 1904 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 1905 1906 /* [50] */ INVALID, INVALID, INVALID, INVALID, 1907 /* [54] */ INVALID, INVALID, INVALID, INVALID, 1908 /* [58] */ INVALID, INVALID, INVALID, INVALID, 1909 /* [5C] */ INVALID, INVALID, INVALID, INVALID, 1910 1911 /* [60] */ INVALID, INVALID, INVALID, INVALID, 1912 /* [64] */ INVALID, INVALID, INVALID, INVALID, 1913 /* [68] */ INVALID, INVALID, INVALID, INVALID, 1914 /* [6C] */ INVALID, INVALID, INVALID, TNS("vmovdqu",EVEX_MX), 1915 1916 /* [70] */ INVALID, INVALID, INVALID, INVALID, 1917 /* [74] */ INVALID, INVALID, INVALID, INVALID, 1918 /* [78] */ INVALID, INVALID, INVALID, INVALID, 1919 /* [7C] */ INVALID, INVALID, INVALID, TNS("vmovdqu",EVEX_RX), 1920 1921 /* [80] */ INVALID, INVALID, INVALID, INVALID, 1922 /* [84] */ INVALID, INVALID, INVALID, INVALID, 1923 /* [88] */ INVALID, INVALID, INVALID, INVALID, 1924 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1925 1926 /* [90] */ INVALID, INVALID, INVALID, INVALID, 1927 /* [94] */ INVALID, INVALID, INVALID, INVALID, 1928 /* [98] */ INVALID, INVALID, INVALID, INVALID, 1929 /* [9C] */ INVALID, INVALID, INVALID, INVALID, 1930 1931 /* [A0] */ INVALID, INVALID, INVALID, INVALID, 1932 /* [A4] */ INVALID, INVALID, INVALID, INVALID, 1933 /* [A8] */ INVALID, INVALID, INVALID, INVALID, 1934 /* [AC] */ INVALID, INVALID, INVALID, INVALID, 1935 1936 /* [B0] */ INVALID, INVALID, INVALID, INVALID, 1937 /* [B4] */ INVALID, INVALID, INVALID, INVALID, 1938 /* [B8] */ INVALID, INVALID, INVALID, INVALID, 1939 /* [BC] */ INVALID, INVALID, INVALID, INVALID, 1940 1941 /* [C0] */ INVALID, INVALID, INVALID, INVALID, 1942 /* [C4] */ INVALID, INVALID, INVALID, INVALID, 1943 /* [C8] */ INVALID, INVALID, INVALID, INVALID, 1944 /* [CC] */ INVALID, INVALID, INVALID, INVALID, 1945 1946 /* [D0] */ INVALID, INVALID, INVALID, INVALID, 1947 /* [D4] */ INVALID, INVALID, INVALID, INVALID, 1948 /* [D8] */ INVALID, INVALID, INVALID, INVALID, 1949 /* [DC] */ INVALID, INVALID, INVALID, INVALID, 1950 1951 /* [E0] */ INVALID, INVALID, INVALID, INVALID, 1952 /* [E4] */ INVALID, INVALID, INVALID, INVALID, 1953 /* [E8] */ INVALID, INVALID, INVALID, INVALID, 1954 /* [EC] */ INVALID, INVALID, INVALID, INVALID, 1955 1956 /* [F0] */ INVALID, INVALID, INVALID, INVALID, 1957 /* [F4] */ INVALID, INVALID, INVALID, INVALID, 1958 /* [F8] */ INVALID, INVALID, INVALID, INVALID, 1959 /* [FC] */ INVALID, INVALID, INVALID, INVALID, 1960 }; 1961 /* 1962 * The following two tables are used to encode crc32 and movbe 1963 * since they share the same opcodes. 1964 */ 1965 const instable_t dis_op0F38F0[2] = { 1966 /* [00] */ TNS("crc32b",CRC32), 1967 TS("movbe",MOVBE), 1968 }; 1969 1970 const instable_t dis_op0F38F1[2] = { 1971 /* [00] */ TS("crc32",CRC32), 1972 TS("movbe",MOVBE), 1973 }; 1974 1975 /* 1976 * The following table is used to distinguish between adox and adcx which share 1977 * the same opcodes. 1978 */ 1979 const instable_t dis_op0F38F6[2] = { 1980 /* [00] */ TNS("adcx",ADX), 1981 TNS("adox",ADX), 1982 }; 1983 1984 const instable_t dis_op0F38[256] = { 1985 /* [00] */ TNSZ("pshufb",XMM_66o,16),TNSZ("phaddw",XMM_66o,16),TNSZ("phaddd",XMM_66o,16),TNSZ("phaddsw",XMM_66o,16), 1986 /* [04] */ TNSZ("pmaddubsw",XMM_66o,16),TNSZ("phsubw",XMM_66o,16), TNSZ("phsubd",XMM_66o,16),TNSZ("phsubsw",XMM_66o,16), 1987 /* [08] */ TNSZ("psignb",XMM_66o,16),TNSZ("psignw",XMM_66o,16),TNSZ("psignd",XMM_66o,16),TNSZ("pmulhrsw",XMM_66o,16), 1988 /* [0C] */ INVALID, INVALID, INVALID, INVALID, 1989 1990 /* [10] */ TNSZ("pblendvb",XMM_66r,16),INVALID, INVALID, INVALID, 1991 /* [14] */ TNSZ("blendvps",XMM_66r,16),TNSZ("blendvpd",XMM_66r,16),INVALID, TNSZ("ptest",XMM_66r,16), 1992 /* [18] */ INVALID, INVALID, INVALID, INVALID, 1993 /* [1C] */ TNSZ("pabsb",XMM_66o,16),TNSZ("pabsw",XMM_66o,16),TNSZ("pabsd",XMM_66o,16),INVALID, 1994 1995 /* [20] */ TNSZ("pmovsxbw",XMM_66r,16),TNSZ("pmovsxbd",XMM_66r,16),TNSZ("pmovsxbq",XMM_66r,16),TNSZ("pmovsxwd",XMM_66r,16), 1996 /* [24] */ TNSZ("pmovsxwq",XMM_66r,16),TNSZ("pmovsxdq",XMM_66r,16),INVALID, INVALID, 1997 /* [28] */ TNSZ("pmuldq",XMM_66r,16),TNSZ("pcmpeqq",XMM_66r,16),TNSZ("movntdqa",XMMM_66r,16),TNSZ("packusdw",XMM_66r,16), 1998 /* [2C] */ INVALID, INVALID, INVALID, INVALID, 1999 2000 /* [30] */ TNSZ("pmovzxbw",XMM_66r,16),TNSZ("pmovzxbd",XMM_66r,16),TNSZ("pmovzxbq",XMM_66r,16),TNSZ("pmovzxwd",XMM_66r,16), 2001 /* [34] */ TNSZ("pmovzxwq",XMM_66r,16),TNSZ("pmovzxdq",XMM_66r,16),INVALID, TNSZ("pcmpgtq",XMM_66r,16), 2002 /* [38] */ TNSZ("pminsb",XMM_66r,16),TNSZ("pminsd",XMM_66r,16),TNSZ("pminuw",XMM_66r,16),TNSZ("pminud",XMM_66r,16), 2003 /* [3C] */ TNSZ("pmaxsb",XMM_66r,16),TNSZ("pmaxsd",XMM_66r,16),TNSZ("pmaxuw",XMM_66r,16),TNSZ("pmaxud",XMM_66r,16), 2004 2005 /* [40] */ TNSZ("pmulld",XMM_66r,16),TNSZ("phminposuw",XMM_66r,16),INVALID, INVALID, 2006 /* [44] */ INVALID, INVALID, INVALID, INVALID, 2007 /* [48] */ INVALID, INVALID, INVALID, INVALID, 2008 /* [4C] */ INVALID, INVALID, INVALID, INVALID, 2009 2010 /* [50] */ INVALID, INVALID, INVALID, INVALID, 2011 /* [54] */ INVALID, INVALID, INVALID, INVALID, 2012 /* [58] */ INVALID, INVALID, INVALID, INVALID, 2013 /* [5C] */ INVALID, INVALID, INVALID, INVALID, 2014 2015 /* [60] */ INVALID, INVALID, INVALID, INVALID, 2016 /* [64] */ INVALID, INVALID, INVALID, INVALID, 2017 /* [68] */ INVALID, INVALID, INVALID, INVALID, 2018 /* [6C] */ INVALID, INVALID, INVALID, INVALID, 2019 2020 /* [70] */ INVALID, INVALID, INVALID, INVALID, 2021 /* [74] */ INVALID, INVALID, INVALID, INVALID, 2022 /* [78] */ INVALID, INVALID, INVALID, INVALID, 2023 /* [7C] */ INVALID, INVALID, INVALID, INVALID, 2024 2025 /* [80] */ TNSy("invept", RM_66r), TNSy("invvpid", RM_66r),TNSy("invpcid", RM_66r),INVALID, 2026 /* [84] */ INVALID,