Home
last modified time | relevance | path

Searched refs:reg (Results 26 – 50 of 676) sorted by relevance

12345678910>>...28

/illumos-gate/usr/src/lib/libdtrace/common/
H A Ddt_regset.c78 int reg; in dt_regset_assert_free() local
80 for (reg = 0; reg < drp->dr_size; reg++) { in dt_regset_assert_free()
81 if (BT_TEST(drp->dr_bitmap, reg) != 0) { in dt_regset_assert_free()
110 int reg; in dt_regset_alloc() local
114 reg = (int)((wx << BT_ULSHIFT) | bx); in dt_regset_alloc()
115 BT_SET(drp->dr_bitmap, reg); in dt_regset_alloc()
116 return (reg); in dt_regset_alloc()
127 dt_regset_free(dt_regset_t *drp, int reg) in dt_regset_free() argument
129 assert(reg >= 0 && reg < drp->dr_size); in dt_regset_free()
130 assert(BT_TEST(drp->dr_bitmap, reg) != 0); in dt_regset_free()
[all …]
/illumos-gate/usr/src/uts/common/io/pciex/hotplug/
H A Dpcishpc.c351 reg); in pcishpc_intr()
1118 uint32_t reg; in pcishpc_enable_irqs() local
1164 uint32_t reg; in pcishpc_disable_irqs() local
1258 uint32_t reg; in pcishpc_slot_poweron() local
1359 uint32_t reg; in pcishpc_slot_poweroff() local
1794 uint32_t reg; in pcishpc_get_slot_state() local
2428 uint32_t reg; in pcishpc_dump_regs() local
2443 (reg & 31)); in pcishpc_dump_regs()
2457 (reg & 31)); in pcishpc_dump_regs()
2483 switch (reg & 7) { in pcishpc_dump_regs()
[all …]
/illumos-gate/usr/src/uts/intel/brand/common/
H A Dbrand_asm.h153 #define GET_V(sp, pcnt, var, reg) \ argument
154 mov V_OFFSET(pcnt, var)(sp), reg
156 #define SET_V(sp, pcnt, var, reg) \ argument
157 mov reg, V_OFFSET(pcnt, var)(sp)
159 #define GET_PROCP(sp, pcnt, reg) \ argument
161 mov LWP_PROCP(reg), reg /* get proc pointer */
164 GET_PROCP(sp, pcnt, reg); \
165 mov P_BRAND_DATA(reg), reg /* get p_brand_data */
194 #define CHECK_FOR_NATIVE(reg) \ argument
195 cmp $1024, reg; \
[all …]
/illumos-gate/usr/src/uts/sun/sys/
H A Dzsdev.h95 #define SCC_WRITEA(reg, val) { \ argument
102 zs->zs_wreg[reg] = val; \
104 #define SCC_WRITEB(reg, val) { \ argument
111 zs->zs_wreg[reg] = val; \
118 zs->zs_wreg[reg] = val; \
121 #define SCC_READA(reg, var) { \ argument
129 #define SCC_READB(reg, var) { \ argument
137 #define SCC_READ(reg, var) { \ argument
140 tmp->zscc_control = reg; \
146 #define SCC_BIS(reg, val) { \ argument
[all …]
/illumos-gate/usr/src/uts/common/io/atge/
H A Datge_mii.c64 atge_mii_read(void *arg, uint8_t phy, uint8_t reg) in atge_mii_read() argument
86 phy, reg); in atge_mii_read()
97 if (reg == MII_STATUS) in atge_mii_read()
99 else if (reg == MII_EXTSTATUS) in atge_mii_read()
130 " val :%d", phy, reg, val); in atge_mii_write()
187 uint16_t reg, pn; in atge_l1_mii_reset() local
209 if ((reg & PHY_CDTC_ENB) == 0) in atge_l1_mii_reset()
272 uint16_t reg; in atge_l1c_mii_reset() local
358 return (atge_mii_read(arg, phy, reg)); in atge_l1c_mii_read()
370 if (reg == MII_CONTROL) { in atge_l1c_mii_write()
[all …]
H A Datge_main.c496 reg = 0; in atge_mac_config()
970 reg); in atge_device_reset_l1_l1e()
2328 reg = in atge_device_start()
2342 reg = in atge_device_start()
2390 reg = in atge_device_start()
2624 reg = reg & ~TXQ_CFG_ENB; in atge_device_stop()
2628 reg = reg & ~RXQ_CFG_ENB; in atge_device_stop()
2652 reg = reg & ~TXQ_CFG_ENB; in atge_device_stop()
2656 reg = reg & ~RXQ_CFG_ENB; in atge_device_stop()
2672 reg = reg & ~TXQ_CFG_ENB; in atge_device_stop()
[all …]
/illumos-gate/usr/src/uts/common/io/1394/adapters/
H A Dhci1394_ohci.c858 uint_t reg; in hci1394_ohci_bus_reset() local
869 reg = reg | OHCI_PHY_RHB; in hci1394_ohci_bus_reset()
872 reg = reg | ohci_hdl->ohci_gap_count; in hci1394_ohci_bus_reset()
874 reg = reg | OHCI_PHY_MAX_GAP; in hci1394_ohci_bus_reset()
903 uint_t reg; in hci1394_ohci_bus_reset_nroot() local
912 reg = reg | OHCI_PHY_IBR; in hci1394_ohci_bus_reset_nroot()
913 reg = reg & ~OHCI_PHY_RHB; in hci1394_ohci_bus_reset_nroot()
1002 uint_t reg; in hci1394_ohci_phy_set() local
1017 reg = reg | bits; in hci1394_ohci_phy_set()
1054 reg = reg & ~bits; in hci1394_ohci_phy_clr()
[all …]
/illumos-gate/usr/src/uts/common/io/rtw/
H A Drtwphyio.c108 uint32_t mask, reg; in rtw_rf_hostbangbits() local
114 reg = RTW_PHYCFG_HST; in rtw_rf_hostbangbits()
115 RTW_WRITE(regs, RTW_PHYCFG, reg); in rtw_rf_hostbangbits()
129 reg |= RTW_PHYCFG_HST_DATA; in rtw_rf_hostbangbits()
131 reg &= ~RTW_PHYCFG_HST_DATA; in rtw_rf_hostbangbits()
133 reg |= RTW_PHYCFG_HST_CLK; in rtw_rf_hostbangbits()
134 RTW_WRITE(regs, RTW_PHYCFG, reg); in rtw_rf_hostbangbits()
139 reg &= ~RTW_PHYCFG_HST_CLK; in rtw_rf_hostbangbits()
149 reg |= RTW_PHYCFG_HST_EN; in rtw_rf_hostbangbits()
150 RTW_WRITE(regs, RTW_PHYCFG, reg); in rtw_rf_hostbangbits()
[all …]
/illumos-gate/usr/src/uts/common/io/audio/drv/audio810/
H A Daudio810.h219 #define I810_BM_GET8(reg) \ argument
221 (void *)((char *)statep->bm_regs_base + (reg)))
223 #define I810_BM_GET16(reg) \ argument
225 (void *)((char *)statep->bm_regs_base + (reg)))
227 #define I810_BM_GET32(reg) \ argument
229 (void *)((char *)statep->bm_regs_base + (reg)))
231 #define I810_BM_PUT8(reg, val) \ argument
235 #define I810_BM_PUT16(reg, val) \ argument
239 #define I810_BM_PUT32(reg, val) \ argument
243 #define I810_AM_GET16(reg) \ argument
[all …]
/illumos-gate/usr/src/uts/intel/io/pciex/
H A Dpcieb_x86.c501 reg->offset); in pcieb_intel_serr_workaround()
503 ((data & reg->mask) | reg->value2) : in pcieb_intel_serr_workaround()
504 ((data & reg->mask) | reg->value1)); in pcieb_intel_serr_workaround()
507 reg->offset); in pcieb_intel_serr_workaround()
511 reg->offset); in pcieb_intel_serr_workaround()
513 ((data & reg->mask) | reg->value2) : in pcieb_intel_serr_workaround()
514 ((data & reg->mask) | reg->value1)); in pcieb_intel_serr_workaround()
524 ((data & reg->mask) | reg->value2) : in pcieb_intel_serr_workaround()
525 ((data & reg->mask) | reg->value1)); in pcieb_intel_serr_workaround()
535 "0x%x\n", bdf, mcheck, reg->size, reg->offset, in pcieb_intel_serr_workaround()
[all …]
/illumos-gate/usr/src/lib/libc/sparc/gen/
H A Dgetctxt.c41 greg_t *reg; in getcontext() local
54 reg = ucp->uc_mcontext.gregs; in getcontext()
55 reg[REG_SP] = getfp(); in getcontext()
56 reg[REG_O7] = caller(); in getcontext()
57 reg[REG_PC] = reg[REG_O7] + 8; in getcontext()
58 reg[REG_nPC] = reg[REG_PC] + 4; in getcontext()
59 reg[REG_O0] = 0; in getcontext()
H A Dswapctxt.c40 greg_t *reg; in swapcontext() local
52 reg = oucp->uc_mcontext.gregs; in swapcontext()
53 reg[REG_SP] = getfp(); in swapcontext()
54 reg[REG_O7] = caller(); in swapcontext()
55 reg[REG_PC] = reg[REG_O7] + 8; in swapcontext()
56 reg[REG_nPC] = reg[REG_PC] + 4; in swapcontext()
57 reg[REG_O0] = 0; in swapcontext()
/illumos-gate/usr/src/lib/libc/sparcv9/gen/
H A Dgetctxt.c41 greg_t *reg; in getcontext() local
54 reg = ucp->uc_mcontext.gregs; in getcontext()
55 reg[REG_SP] = getfp(); in getcontext()
56 reg[REG_O7] = caller(); in getcontext()
57 reg[REG_PC] = reg[REG_O7] + 8; in getcontext()
58 reg[REG_nPC] = reg[REG_PC] + 4; in getcontext()
59 reg[REG_O0] = 0; in getcontext()
H A Dswapctxt.c40 greg_t *reg; in swapcontext() local
52 reg = oucp->uc_mcontext.gregs; in swapcontext()
53 reg[REG_SP] = getfp(); in swapcontext()
54 reg[REG_O7] = caller(); in swapcontext()
55 reg[REG_PC] = reg[REG_O7] + 8; in swapcontext()
56 reg[REG_nPC] = reg[REG_PC] + 4; in swapcontext()
57 reg[REG_O0] = 0; in swapcontext()
H A Dsiglongjmp.c46 greg_t *reg = uc.uc_mcontext.gregs; in siglongjmp() local
61 _fetch_globals(&reg[REG_G1]); in siglongjmp()
64 reg[REG_PC] = bp->sjs_pc; in siglongjmp()
65 reg[REG_nPC] = reg[REG_PC] + 0x4; in siglongjmp()
66 reg[REG_SP] = bp->sjs_sp; in siglongjmp()
67 reg[REG_ASI] = bp->sjs_asi; in siglongjmp()
68 reg[REG_FPRS] = bp->sjs_fprs; in siglongjmp()
76 reg[REG_O0] = (greg_t)val; in siglongjmp()
78 reg[REG_O0] = (greg_t)1; in siglongjmp()
/illumos-gate/usr/src/uts/intel/io/amdzen/
H A Dzen_umc.c1947 smn_reg_t reg; in zen_umc_fill_dimm_common() local
2028 smn_reg_t reg; in zen_umc_fill_chan_dimm_ddr4() local
2234 smn_reg_t reg; in zen_umc_fill_chan_rank_ddr5() local
2621 smn_reg_t reg; in zen_umc_fill_chan_hash() local
2782 smn_reg_t reg; in zen_umc_fill_chan() local
2803 reg = UMC_UMCCFG(id); in zen_umc_fill_chan()
2820 reg = UMC_DRAMCFG(id, 0); in zen_umc_fill_chan()
2850 reg = UMC_DATACTL(id); in zen_umc_fill_chan()
2871 reg = UMC_ECCCTL(id); in zen_umc_fill_chan()
2883 reg = UMC_UMCCAP(id); in zen_umc_fill_chan()
[all …]
/illumos-gate/usr/src/uts/intel/ml/
H A Dretpoline.S35 #define RETPOLINE_MKTHUNK(reg) \ argument
36 ENTRY(__x86_indirect_thunk_##reg) \
43 movq %##reg, (%rsp); \
45 SET_SIZE(__x86_indirect_thunk_##reg)
52 #define RETPOLINE_MKGENERIC(reg) \ argument
60 movq %##reg, (%rsp); \
69 #define RETPOLINE_MKJUMP(reg) \ argument
71 jmp *%##reg; \
228 #define RETPOLINE_MKTHUNK(reg) \ argument
229 ENTRY(__x86_indirect_thunk_##reg) \
[all …]
/illumos-gate/usr/src/uts/common/io/e1000g/
H A De1000g_osdep.c46 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) in e1000_write_pci_cfg() argument
48 pci_config_put16(OS_DEP(hw)->cfg_handle, reg, *value); in e1000_write_pci_cfg()
52 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) in e1000_read_pci_cfg() argument
55 pci_config_get16(OS_DEP(hw)->cfg_handle, reg); in e1000_read_pci_cfg()
69 uint16_t reg; /* register contents */ in phy_spd_state() local
91 (void) e1000_read_phy_reg(hw, offset, &reg); in phy_spd_state()
94 reg |= spd_bit; /* enable: set the spd bit */ in phy_spd_state()
96 reg &= ~spd_bit; /* disable: clear the spd bit */ in phy_spd_state()
98 (void) e1000_write_phy_reg(hw, offset, reg); in phy_spd_state()
112 PCI_EX_CONF_CAP + reg); in e1000_read_pcie_cap_reg()
[all …]
/illumos-gate/usr/src/uts/sun4v/sys/
H A Dmachthread.h73 #define CPU_ADDR(reg, scr) \ argument
75 CPU_INDEX(scr, reg); \
77 set cpu, reg; \
78 ldn [reg + scr], reg
87 #define CPU_PADDR(reg, scr) \ argument
89 CPU_INDEX(scr, reg); \
91 set cpu_pa, reg; \
92 ldx [reg + scr], reg
/illumos-gate/usr/src/uts/intel/sys/amdzen/
H A Dsmn.h381 SMN_REG_SIZE_IS_VALID(const smn_reg_t reg) in SMN_REG_SIZE_IS_VALID() argument
383 return (reg.sr_size == 1 || reg.sr_size == 2 || reg.sr_size == 4); in SMN_REG_SIZE_IS_VALID()
391 SMN_REG_IS_NATURALLY_ALIGNED(const smn_reg_t reg) in SMN_REG_IS_NATURALLY_ALIGNED() argument
393 return (SMN_REG_IS_ALIGNED(reg, reg.sr_size)); in SMN_REG_IS_NATURALLY_ALIGNED()
406 SMN_REG_ADDR_BASE(const smn_reg_t reg) in SMN_REG_ADDR_BASE() argument
408 return (reg.sr_addr & ~3); in SMN_REG_ADDR_BASE()
417 SMN_REG_ADDR_OFF(const smn_reg_t reg) in SMN_REG_ADDR_OFF() argument
419 return (reg.sr_addr & 3); in SMN_REG_ADDR_OFF()
522 const uint32_t reg = def.srd_reg + reginst32 * stride; \
523 ASSERT0(reg & (_mask)); \
[all …]
/illumos-gate/usr/src/uts/i86pc/os/
H A Dpci_neptune.c138 pci_neptune_getb(int bus, int device, int function, int reg) in pci_neptune_getb() argument
144 val = pci_mech1_getb(bus, device, function, reg); in pci_neptune_getb()
151 pci_neptune_getw(int bus, int device, int function, int reg) in pci_neptune_getw() argument
157 val = pci_mech1_getw(bus, device, function, reg); in pci_neptune_getw()
164 pci_neptune_getl(int bus, int device, int function, int reg) in pci_neptune_getl() argument
170 val = pci_mech1_getl(bus, device, function, reg); in pci_neptune_getl()
177 pci_neptune_putb(int bus, int device, int function, int reg, uint8_t val) in pci_neptune_putb() argument
181 pci_mech1_putb(bus, device, function, reg, val); in pci_neptune_putb()
187 pci_neptune_putw(int bus, int device, int function, int reg, uint16_t val) in pci_neptune_putw() argument
191 pci_mech1_putw(bus, device, function, reg, val); in pci_neptune_putw()
[all …]
/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_82542.c456 switch (reg) { in e1000_translate_register_82542()
458 reg = 0x00040; in e1000_translate_register_82542()
461 reg = 0x00108; in e1000_translate_register_82542()
464 reg = 0x00110; in e1000_translate_register_82542()
467 reg = 0x00114; in e1000_translate_register_82542()
470 reg = 0x00118; in e1000_translate_register_82542()
473 reg = 0x00120; in e1000_translate_register_82542()
476 reg = 0x00128; in e1000_translate_register_82542()
479 reg = 0x00138; in e1000_translate_register_82542()
482 reg = 0x0013C; in e1000_translate_register_82542()
[all …]
/illumos-gate/usr/src/test/bhyve-tests/tests/kdev/
H A Dpayload_vlapic_mmio_access.c26 write_vlapic(uint_t reg, uint32_t value) in write_vlapic() argument
28 volatile uint32_t *ptr = (uint32_t *)(MMIO_LAPIC_BASE + reg); in write_vlapic()
33 read_vlapic(uint_t reg) in read_vlapic() argument
35 volatile uint32_t *ptr = (uint32_t *)(MMIO_LAPIC_BASE + reg); in read_vlapic()
55 for (uint_t reg = 0; reg < 0x1000; reg += 16) { in start() local
65 val = read_vlapic(reg); in start()
66 write_vlapic(reg, val); in start()
/illumos-gate/usr/src/cmd/rpcbind/
H A Dpmap_svc.c168 PMAP reg; in pmapproc_change() local
193 rpcbreg.r_prog = reg.pm_prog; in pmapproc_change()
194 rpcbreg.r_vers = reg.pm_vers; in pmapproc_change()
200 reg.pm_port & 0xff); in pmapproc_change()
202 if (reg.pm_prot == IPPROTO_UDP) { in pmapproc_change()
224 PMAP_LOG(ans, xprt, op, reg.pm_prog); in pmapproc_change()
244 PMAP reg; in pmapproc_getport() local
257 fnd = find_service_pmap(reg.pm_prog, reg.pm_vers, reg.pm_prot); in pmapproc_getport()
263 if (reg.pm_prot == IPPROTO_UDP) { in pmapproc_getport()
292 delete_prog(reg.pm_prog); in pmapproc_getport()
[all …]
/illumos-gate/usr/src/uts/common/io/audio/drv/audiop16x/
H A Daudiop16x.h88 #define INL(dev, reg) \ argument
89 ddi_get32(dev->regsh, (void *)((char *)dev->base+(reg)))
90 #define INW(dev, reg) \ argument
91 ddi_get16(dev->regsh, (void *)((char *)dev->base+(reg)))
92 #define INB(dev, reg) \ argument
93 ddi_get8(dev->regsh, (void *)((char *)dev->base+(reg)))
95 #define OUTL(dev, val, reg) \ argument
96 ddi_put32(dev->regsh, (void *)((char *)dev->base+(reg)), (val))
97 #define OUTW(dev, val, reg) \ argument
99 #define OUTB(dev, val, reg) \ argument
[all …]

12345678910>>...28