17c478bdstevel@tonic-gate/*
27c478bdstevel@tonic-gate * CDDL HEADER START
37c478bdstevel@tonic-gate *
47c478bdstevel@tonic-gate * The contents of this file are subject to the terms of the
57c478bdstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only
67c478bdstevel@tonic-gate * (the "License").  You may not use this file except in compliance
77c478bdstevel@tonic-gate * with the License.
87c478bdstevel@tonic-gate *
97c478bdstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
107c478bdstevel@tonic-gate * or http://www.opensolaris.org/os/licensing.
117c478bdstevel@tonic-gate * See the License for the specific language governing permissions
127c478bdstevel@tonic-gate * and limitations under the License.
137c478bdstevel@tonic-gate *
147c478bdstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each
157c478bdstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
167c478bdstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the
177c478bdstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying
187c478bdstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner]
197c478bdstevel@tonic-gate *
207c478bdstevel@tonic-gate * CDDL HEADER END
217c478bdstevel@tonic-gate */
227c478bdstevel@tonic-gate/*
237c478bdstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
247c478bdstevel@tonic-gate * Use is subject to license terms.
257c478bdstevel@tonic-gate */
267c478bdstevel@tonic-gate
277c478bdstevel@tonic-gate#ifndef	_SYS_MACHTHREAD_H
287c478bdstevel@tonic-gate#define	_SYS_MACHTHREAD_H
297c478bdstevel@tonic-gate
307c478bdstevel@tonic-gate#pragma ident	"%Z%%M%	%I%	%E% SMI"
317c478bdstevel@tonic-gate
327c478bdstevel@tonic-gate#include <sys/asi.h>
337c478bdstevel@tonic-gate#include <sys/sun4asi.h>
347c478bdstevel@tonic-gate#include <sys/machasi.h>
357c478bdstevel@tonic-gate#include <sys/bitmap.h>
367c478bdstevel@tonic-gate
377c478bdstevel@tonic-gate#ifdef	__cplusplus
387c478bdstevel@tonic-gateextern "C" {
397c478bdstevel@tonic-gate#endif
407c478bdstevel@tonic-gate
417c478bdstevel@tonic-gate#ifdef	_ASM
427c478bdstevel@tonic-gate
437c478bdstevel@tonic-gate#define	THREAD_REG	%g7		/* pointer to current thread data */
447c478bdstevel@tonic-gate
457c478bdstevel@tonic-gate/*
467c478bdstevel@tonic-gate * CPU_INDEX(r, scr)
477c478bdstevel@tonic-gate * Returns cpu id in r.
487c478bdstevel@tonic-gate */
497c478bdstevel@tonic-gate#define	CPU_INDEX(r, scr)		\
507c478bdstevel@tonic-gate	mov	SCRATCHPAD_CPUID, scr;	\
517c478bdstevel@tonic-gate	ldxa	[scr]ASI_SCRATCHPAD, r
527c478bdstevel@tonic-gate
537c478bdstevel@tonic-gate/*
547c478bdstevel@tonic-gate * Given a cpu id extract the appropriate word
557c478bdstevel@tonic-gate * in the cpuset mask for this cpu id.
567c478bdstevel@tonic-gate */
577c478bdstevel@tonic-gate#if CPUSET_SIZE > CLONGSIZE
587c478bdstevel@tonic-gate#define	CPU_INDEXTOSET(base, index, scr)	\
597c478bdstevel@tonic-gate	srl	index, BT_ULSHIFT, scr;		\
607c478bdstevel@tonic-gate	and	index, BT_ULMASK, index;	\
617c478bdstevel@tonic-gate	sll	scr, CLONGSHIFT, scr;		\
627c478bdstevel@tonic-gate	add	base, scr, base
637c478bdstevel@tonic-gate#else
647c478bdstevel@tonic-gate#define	CPU_INDEXTOSET(base, index, scr)
657c478bdstevel@tonic-gate#endif	/* CPUSET_SIZE */
667c478bdstevel@tonic-gate
677c478bdstevel@tonic-gate
687c478bdstevel@tonic-gate/*
697c478bdstevel@tonic-gate * Assembly macro to find address of the current CPU.
707c478bdstevel@tonic-gate * Used when coming in from a user trap - cannot use THREAD_REG.
717c478bdstevel@tonic-gate * Args are destination register and one scratch register.
727c478bdstevel@tonic-gate */
737c478bdstevel@tonic-gate#define	CPU_ADDR(reg, scr) 		\
747c478bdstevel@tonic-gate	.global	cpu;			\
757c478bdstevel@tonic-gate	CPU_INDEX(scr, reg);		\
767c478bdstevel@tonic-gate	sll	scr, CPTRSHIFT, scr;	\
777c478bdstevel@tonic-gate	set	cpu, reg;		\
787c478bdstevel@tonic-gate	ldn	[reg + scr], reg
797c478bdstevel@tonic-gate
807c478bdstevel@tonic-gate#define	CINT64SHIFT	3
817c478bdstevel@tonic-gate
827c478bdstevel@tonic-gate/*
837c478bdstevel@tonic-gate * Assembly macro to find the physical address of the current CPU.
847c478bdstevel@tonic-gate * All memory references using VA must be limited to nucleus
857c478bdstevel@tonic-gate * memory to avoid any MMU side effect.
867c478bdstevel@tonic-gate */
877c478bdstevel@tonic-gate#define	CPU_PADDR(reg, scr)				\
887c478bdstevel@tonic-gate	.global cpu_pa;					\
897c478bdstevel@tonic-gate	CPU_INDEX(scr, reg);				\
907c478bdstevel@tonic-gate	sll	scr, CINT64SHIFT, scr;			\
917c478bdstevel@tonic-gate	set	cpu_pa, reg;				\
927c478bdstevel@tonic-gate	ldx	[reg + scr], reg
937c478bdstevel@tonic-gate
947c478bdstevel@tonic-gate#endif	/* _ASM */
957c478bdstevel@tonic-gate
967c478bdstevel@tonic-gate#ifdef	__cplusplus
977c478bdstevel@tonic-gate}
987c478bdstevel@tonic-gate#endif
997c478bdstevel@tonic-gate
1007c478bdstevel@tonic-gate#endif	/* _SYS_MACHTHREAD_H */
101