Searched refs:reg0 (Results 1 – 3 of 3) sorted by relevance
424 I915_WRITE(GMBUS0 + reg_offset, bus->reg0); in gmbus_xfer()505 bus->adapter.name, bus->reg0 & 0xff); in gmbus_xfer()563 bus->reg0 = port | GMBUS_RATE_100KHZ; in intel_setup_gmbus()590 bus->reg0 = (bus->reg0 & ~(0x3 << 8)) | speed; in intel_gmbus_set_speed()
571 u32 reg0; member
1033 #define CP_PACKET1(reg0, reg1) \ argument1034 (RADEON_CP_PACKET1 | (((reg1) >> 2) << 15) | ((reg0) >> 2))