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Searched refs:level (Results 1 – 9 of 9) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_panel.c440 I915_WRITE(BLC_PWM_CPU_CTL, val | level); in intel_pch_panel_set_backlight()
449 level = intel_panel_compute_brightness(dev, level); in intel_panel_actually_set_backlight()
452 intel_pch_panel_set_backlight(dev, level); in intel_panel_actually_set_backlight()
464 lbpc = level * 0xfe / max + 1; in intel_panel_actually_set_backlight()
465 level /= lbpc; in intel_panel_actually_set_backlight()
471 level <<= 1; in intel_panel_actually_set_backlight()
473 I915_WRITE(BLC_PWM_CTL, tmp | level); in intel_panel_actually_set_backlight()
493 level = level * freq / max; in intel_panel_set_backlight()
495 level = freq / max * level; in intel_panel_set_backlight()
497 dev_priv->backlight.level = level; in intel_panel_set_backlight()
[all …]
H A Di915_gem_gtt.c57 enum i915_cache_level level) in gen6_pte_encode() argument
62 switch (level) { in gen6_pte_encode()
84 enum i915_cache_level level) in byt_pte_encode() argument
94 if (level != I915_CACHE_NONE) in byt_pte_encode()
102 enum i915_cache_level level) in hsw_pte_encode() argument
107 if (level != I915_CACHE_NONE) in hsw_pte_encode()
486 enum i915_cache_level level) in gen6_ggtt_insert_entries() argument
503 dev_priv->gtt.pte_encode(dev, page_addr, level)); in gen6_ggtt_insert_entries()
519 dev_priv->gtt.pte_encode(dev, page_addr, level)); in gen6_ggtt_insert_entries()
H A Dintel_pm.c1708 fbc_wm, SNB_FBC_MAX_SRWM, level); in ironlake_check_srwm()
1733 DRM_DEBUG_KMS("latency %d is 0, disabling wm%d+\n", level, level); in ironlake_check_srwm()
1789 return ironlake_check_srwm(dev, level, in ironlake_compute_srwm()
2441 int level, max_level, wm_lp; in hsw_compute_wm_results() local
2443 for (level = 1; level <= 4; level++) in hsw_compute_wm_results()
2445 &lp_results[level - 1])) in hsw_compute_wm_results()
2447 max_level = level - 1; in hsw_compute_wm_results()
2452 for (level = 1; level <= max_level; level++) { in hsw_compute_wm_results()
2453 if (!lp_results[level - 1].fbc_enable) { in hsw_compute_wm_results()
2464 if (level > max_level) in hsw_compute_wm_results()
[all …]
H A Di915_drv.h486 enum i915_cache_level level);
511 enum i915_cache_level level);
1092 int level; member
H A Dintel_drv.h608 u32 level, u32 max);
H A Di915_gem.c2877 enum i915_cache_level level; in i915_gem_set_caching_ioctl() local
2882 level = I915_CACHE_NONE; in i915_gem_set_caching_ioctl()
2885 level = I915_CACHE_LLC; in i915_gem_set_caching_ioctl()
2901 ret = i915_gem_object_set_cache_level(obj, level); in i915_gem_set_caching_ioctl()
/gfx-drm/
H A DREADME38 The user-level libraries are:
57 the user-level library code can. It's also a little
62 The user-level libraries here are built with minimal
87 Just cd to where the top-level make had problems
/gfx-drm/usr/src/tools/cw/
H A Dcw.c473 optim_disable(struct aelist *h, int level) in optim_disable() argument
475 if (level >= 2) { in optim_disable()
1121 int level; in do_gcc() local
1126 level = atoi(arg + 3); in do_gcc()
1127 if (level > 5) in do_gcc()
1129 if (level >= 2) { in do_gcc()
1135 optim_disable(ctx->i_ae, level); in do_gcc()
1139 level = 2; in do_gcc()
1141 if (asprintf(&s, "-O%d", level) == -1) in do_gcc()
/gfx-drm/usr/src/
H A DMakefile.master.6446 # Moved these up to the top level here, so they can be overridden