Searched refs:PM_LEVEL_D3 (Results 1 – 13 of 13) sorted by relevance
122 ASSERT(level == PM_LEVEL_D0 || level == PM_LEVEL_D3 || in pcie_power()211 case PM_LEVEL_D3: in pcie_pwr_change()220 if (new == PM_LEVEL_D3) { in pcie_pwr_change()245 if (pwr_p->pwr_func_lvl == PM_LEVEL_D3) { in pcie_pwr_change()514 return (PM_LEVEL_D3); in pwr_level_allowed()
1960 pwr_p->pwr_func_lvl = PM_LEVEL_D3; in pcieb_pwr_init_and_raise()
88 #define PM_LEVEL_D3 0 /* D3 state - off */ macro
34 #define PCIE_D3_INDEX PM_LEVEL_D3
238 case PM_LEVEL_D3: in pci_pwr_update_comp()266 case PM_LEVEL_D3: in pci_pwr_update_comp()
3637 if (ata_ctlp->ac_pm_level == PM_LEVEL_D3) in ata_suspend()3646 ata_ctlp->ac_pm_level = PM_LEVEL_D3; in ata_suspend()3683 case PM_LEVEL_D3: in ata_power()3686 ata_ctlp->ac_pm_level = PM_LEVEL_D3; in ata_power()
907 case PM_LEVEL_D3: in mptsas_dcmd()
353 (void) pm_lower_power(dip, 0, PM_LEVEL_D3); in scsa1394_detach()396 (void) pm_lower_power(dip, 0, PM_LEVEL_D3); in scsa1394_cpr_suspend()
1071 mpt->m_power_level = PM_LEVEL_D3; \
1501 ha->power_level = PM_LEVEL_D3; in ql_attach()1912 ha->power_level = PM_LEVEL_D3; in ql_attach()1928 if (ha->power_level == PM_LEVEL_D3) { in ql_attach()2084 PM_LEVEL_D3) != DDI_SUCCESS) { in ql_detach()2094 if (ha->power_level != PM_LEVEL_D3) { in ql_detach()2095 ql_halt(ha, PM_LEVEL_D3); in ql_detach()2338 level != PM_LEVEL_D3)) { in ql_power()2424 if (ha->power_level == PM_LEVEL_D3) { in ql_power()2449 ql_halt(ha, PM_LEVEL_D3); in ql_power()2455 ha->power_level = PM_LEVEL_D3; in ql_power()[all …]
3736 if (ha->power_level == PM_LEVEL_D3) { in ql_reset_chip()
970 case PM_LEVEL_D3: /* fully off */ in si_power()978 si_ctlp->sictl_power_level = PM_LEVEL_D3; in si_power()
2073 if (pm_lower_power(dip, 0, PM_LEVEL_D3) != DDI_SUCCESS) in mptsas_do_detach()2502 case PM_LEVEL_D3: in mptsas_power()