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Searched refs:PIPE_CSC_PREOFF_LO (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_reg.h5087 #define PIPE_CSC_PREOFF_LO(pipe) _PIPE(pipe, _PIPE_A_CSC_PREOFF_LO, _PIPE_B_CSC_PREOFF_LO) macro
H A Dintel_display.c5456 I915_WRITE(PIPE_CSC_PREOFF_LO(pipe), 0); in intel_set_pipe_csc()