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Searched refs:DRM_DEBUG_DRIVER (Results 1 – 16 of 16) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_gem_context.c160 DRM_DEBUG_DRIVER("Context object allocated failed\n"); in create_hw_context()
185 DRM_DEBUG_DRIVER("idr allocation failed\n"); in create_hw_context()
237 DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret); in create_default_context()
243 DRM_DEBUG_DRIVER("Switch failed %d\n", ret); in create_default_context()
247 DRM_DEBUG_DRIVER("Default HW context loaded\n"); in create_default_context()
263 DRM_DEBUG_DRIVER("Disabling HW Contexts; old hardware\n"); in i915_gem_context_init()
276 DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size\n"); in i915_gem_context_init()
282 DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed\n"); in i915_gem_context_init()
286 DRM_DEBUG_DRIVER("HW context support initialized\n"); in i915_gem_context_init()
307 DRM_DEBUG_DRIVER("i915_gem_context_fini, dctx=0\n"); in i915_gem_context_fini()
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H A Di915_irq.c950 DRM_DEBUG_DRIVER("pipe %c underrun\n", in valleyview_irq_handler()
1059 DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n"); in ivb_err_int_handler()
1063 DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n"); in ivb_err_int_handler()
1067 DRM_DEBUG_DRIVER("Pipe C FIFO underrun\n"); in ivb_err_int_handler()
1309 DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n"); in ironlake_irq_handler()
1313 DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n"); in ironlake_irq_handler()
1380 DRM_DEBUG_DRIVER("generating error event\n"); in i915_error_work_func()
1394 DRM_DEBUG_DRIVER("resetting chip\n"); in i915_error_work_func()
3019 DRM_DEBUG_DRIVER("pipe %c underrun\n", in i8xx_irq_handler()
3190 DRM_DEBUG_DRIVER("pipe %c underrun\n", in i915_irq_handler()
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H A Di915_dma.c232 DRM_DEBUG_DRIVER("%s\n", __func__); in i915_dma_resume()
245 DRM_DEBUG_DRIVER("hw status page @ %p\n", in i915_dma_resume()
251 DRM_DEBUG_DRIVER("Enabled hardware status page\n"); in i915_dma_resume()
553 DRM_DEBUG_DRIVER("%s: page=%d pfCurrentPage=%d\n", in i915_dispatch_flip()
752 DRM_DEBUG_DRIVER("\n"); in i915_emit_irq()
778 DRM_DEBUG_DRIVER("irq_nr=%d breadcrumb=%d\n", irq_nr, in i915_wait_irq()
905 DRM_DEBUG_DRIVER("%s\n", __func__); in i915_flip_bufs()
1010 DRM_DEBUG_DRIVER("Unknown parameter %d\n", in i915_getparam()
1050 DRM_DEBUG_DRIVER("unknown parameter %d\n", in i915_setparam()
1106 DRM_DEBUG_DRIVER("load hws at %p\n", in i915_set_status_page()
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H A Dintel_sideband.c43 DRM_DEBUG_DRIVER("IOSF sideband idle wait (%s) timed out\n", in vlv_sideband_rw()
54 DRM_DEBUG_DRIVER("IOSF sideband finish wait (%s) timed out\n", in vlv_sideband_rw()
H A Dintel_panel.c383 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); in intel_panel_get_max_backlight()
432 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); in intel_panel_get_backlight()
448 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); in intel_panel_actually_set_backlight()
519 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); in intel_panel_disable_backlight()
685 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n"); in intel_panel_setup_backlight()
H A Dintel_pm.c680 DRM_DEBUG_DRIVER("unknown memory frequency 0x%02x\n", in i915_ironlake_get_mem_freq()
711 DRM_DEBUG_DRIVER("unknown fsb frequency 0x%04x\n", in i915_ironlake_get_mem_freq()
2971 DRM_DEBUG_DRIVER("fmax: %d, fmin: %d, fstart: %d\n", in ironlake_enable_drps()
3102 DRM_DEBUG_DRIVER("timed out waiting for Punit\n"); in vlv_update_rps_cur_delay()
3201 DRM_DEBUG_DRIVER("Haswell: only RC6 available\n"); in intel_enable_rc6()
3211 DRM_DEBUG_DRIVER("RC6 and deep RC6 enabled\n"); in intel_enable_rc6()
3581 DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val); in valleyview_enable_rps()
3584 DRM_DEBUG_DRIVER("current GPU freq: %d MHz (%u)\n", in valleyview_enable_rps()
3591 DRM_DEBUG_DRIVER("max GPU freq: %d MHz (%u)\n", in valleyview_enable_rps()
3597 DRM_DEBUG_DRIVER("RPe GPU freq: %d MHz (%u)\n", in valleyview_enable_rps()
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H A Dintel_ddi.c100 DRM_DEBUG_DRIVER("Initializing DDI buffers for port %c in %s mode\n", in intel_prepare_ddi_buffers()
312 DRM_DEBUG_DRIVER("DP audio on pipe %c on DDI\n", in intel_ddi_mode_set()
316 DRM_DEBUG_DRIVER("DP audio: write eld information\n"); in intel_ddi_mode_set()
330 DRM_DEBUG_DRIVER("HDMI audio on pipe %c on DDI\n", in intel_ddi_mode_set()
334 DRM_DEBUG_DRIVER("HDMI audio: write eld information\n"); in intel_ddi_mode_set()
H A Dintel_hdmi.c95 DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type); in g4x_infoframe_index()
108 DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type); in g4x_infoframe_enable()
121 DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type); in hsw_infoframe_enable()
135 DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type); in hsw_infoframe_data_reg()
635 DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n", in intel_hdmi_mode_set()
H A Dintel_display.c3110 DRM_DEBUG_DRIVER("setting up %s\n", pll->name); in intel_get_shared_dpll()
6165 DRM_DEBUG_DRIVER("ELD size %d\n", len); in g4x_write_eld()
6196 DRM_DEBUG_DRIVER("HDMI audio: enable codec\n"); in haswell_write_eld()
6225 DRM_DEBUG_DRIVER("ELD: DisplayPort detected\n"); in haswell_write_eld()
6248 DRM_DEBUG_DRIVER("port num:%d\n", i); in haswell_write_eld()
6251 DRM_DEBUG_DRIVER("ELD size %d\n", len); in haswell_write_eld()
6303 DRM_DEBUG_DRIVER("ELD: DisplayPort detected\n"); in ironlake_write_eld()
6327 DRM_DEBUG_DRIVER("ELD size %d\n", len); in ironlake_write_eld()
7082 DRM_DEBUG_DRIVER("upclocking LVDS\n"); in intel_increase_pllclock()
7092 DRM_DEBUG_DRIVER("failed to upclock LVDS!\n"); in intel_increase_pllclock()
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H A Di915_gem_stolen.c221 DRM_DEBUG_DRIVER("offset=0x%x, size=%d\n", offset, size);
H A Di915_gem_gtt.c1134 DRM_DEBUG_DRIVER("GMADR size = %ldM\n", in i915_gem_gtt_init()
1136 DRM_DEBUG_DRIVER("GTT stolen size = %dM\n", in i915_gem_gtt_init()
H A Dintel_dp.c863 DRM_DEBUG_DRIVER("Enabling DP audio on pipe %c\n", in intel_dp_mode_set()
1275 DRM_DEBUG_DRIVER("failed to write sink power state\n"); in intel_dp_sink_dpms()
2397 DRM_DEBUG_DRIVER("CP or sink specific irq unhandled\n"); in intel_dp_check_link_status()
H A Dintel_ringbuffer.c518 DRM_DEBUG_DRIVER("%s pipe control offset: 0x%08x\n", in init_pipe_control()
1255 DRM_DEBUG_DRIVER("%s hws offset: 0x%08x\n", in init_status_page()
H A Di915_gem.c3459 DRM_DEBUG_DRIVER("Clearing remapped register\n"); in i915_gem_l3_remap()
3599 DRM_DEBUG_DRIVER("allow wake ack timed out\n"); in i915_gem_init()
H A Dintel_sdvo.c1328 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n"); in intel_sdvo_get_config()
/gfx-drm/usr/src/uts/common/drm/
H A DdrmP.h1483 #define DRM_DEBUG_DRIVER(...) \ macro
1498 #define DRM_DEBUG_DRIVER(...) do { } while (__lintzero) macro