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Searched refs:DREF_SSC1_ENABLE (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_display.c5084 final &= ~DREF_SSC1_ENABLE; in ironlake_init_pch_refclk()
5090 final |= DREF_SSC1_ENABLE; in ironlake_init_pch_refclk()
5122 val |= DREF_SSC1_ENABLE; in ironlake_init_pch_refclk()
5124 val &= ~DREF_SSC1_ENABLE; in ironlake_init_pch_refclk()
5164 val &= ~DREF_SSC1_ENABLE; in ironlake_init_pch_refclk()
H A Di915_reg.h4057 #define DREF_SSC1_ENABLE (1<<1) macro