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Searched refs:DPLL_VCO_ENABLE (Results 1 – 3 of 3) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_ums.c48 return (I915_READ(dpll_reg) & DPLL_VCO_ENABLE); in i915_pipe_enabled()
342 if (dev_priv->regfile.saveDPLL_A & DPLL_VCO_ENABLE) { in i915_restore_display_reg()
344 ~DPLL_VCO_ENABLE); in i915_restore_display_reg()
411 if (dev_priv->regfile.saveDPLL_B & DPLL_VCO_ENABLE) { in i915_restore_display_reg()
413 ~DPLL_VCO_ENABLE); in i915_restore_display_reg()
H A Dintel_display.c900 cur_state = !!(val & DPLL_VCO_ENABLE); in assert_pll()
1333 val |= DPLL_VCO_ENABLE; in intel_enable_pll()
1370 val &= ~DPLL_VCO_ENABLE; in intel_disable_pll()
4505 dpll |= DPLL_VCO_ENABLE; in vlv_update_pll()
4592 dpll |= DPLL_VCO_ENABLE; in i9xx_update_pll()
4593 I915_WRITE(DPLL(pipe), dpll & ~DPLL_VCO_ENABLE); in i9xx_update_pll()
4656 dpll |= DPLL_VCO_ENABLE; in i8xx_update_pll()
5695 return dpll | DPLL_VCO_ENABLE; in ironlake_compute_dpll()
8870 return val & DPLL_VCO_ENABLE; in ibx_pch_dpll_get_hw_state()
8883 val |= DPLL_VCO_ENABLE; in ibx_pch_dpll_enable()
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H A Di915_reg.h1215 #define DPLL_VCO_ENABLE (1UL << 31) /* OSOL_i915 */ macro