Searched refs:CHIP_REV_FPGA (Results 1 – 5 of 5) sorted by relevance
181 if (CHIP_REV(pdev) == CHIP_REV_FPGA) cnt *= 10; in acquire_nvram_lock()231 if (CHIP_REV(pdev) == CHIP_REV_FPGA) cnt *= 10; in release_nvram_lock()278 if (CHIP_REV(pdev) == CHIP_REV_FPGA) cnt *= 10; in enable_nvram_write()330 if (CHIP_REV(pdev) == CHIP_REV_FPGA) cnt *= 10; in disable_nvram_write()436 if (CHIP_REV(pdev) == CHIP_REV_FPGA) cnt *= 10; in nvram_erase_page()512 if (CHIP_REV(pdev) == CHIP_REV_FPGA) cnt *= 10; in nvram_read_dword()605 if (CHIP_REV(pdev) == CHIP_REV_FPGA) cnt *= 10; in nvram_write_dword()892 if(CHIP_REV(pdev) == CHIP_REV_FPGA) in lm_nvram_init()953 if(CHIP_REV(pdev) == CHIP_REV_FPGA) cnt *= 10; in lm_nvram_query()
326 if(CHIP_REV(pdev) == CHIP_REV_FPGA) in init_utp()656 if(CHIP_REV(pdev) != CHIP_REV_FPGA) in init_utp()2011 if(CHIP_REV(pdev) == CHIP_REV_FPGA) in init_loopback_mac_link()2330 else if(CHIP_REV(pdev) == CHIP_REV_FPGA) in lm_init_phy()2767 if(CHIP_REV(pdev) != CHIP_REV_FPGA) in get_copper_phy_link()2988 if(CHIP_REV(pdev) == CHIP_REV_FPGA) in init_mac_link()3998 if(CHIP_REV(pdev) == CHIP_REV_FPGA) in lm_get_medium()
332 CHIP_REV(pdev) == CHIP_REV_FPGA) in get_max_conns()346 CHIP_REV(pdev) == CHIP_REV_FPGA) in get_max_conns()1082 if(CHIP_REV(pdev) == CHIP_REV_FPGA || CHIP_REV(pdev) == CHIP_REV_IKOS) in lm_get_dev_info()1094 if(CHIP_REV(pdev) == CHIP_REV_FPGA || CHIP_REV(pdev) == CHIP_REV_IKOS) in lm_get_dev_info()1108 (CHIP_REV(pdev)==CHIP_REV_FPGA || CHIP_REV(pdev)==CHIP_REV_IKOS)) in lm_get_dev_info()1236 if(CHIP_REV(pdev) == CHIP_REV_FPGA || in lm_get_dev_info()4026 if(CHIP_REV(pdev) == CHIP_REV_FPGA || CHIP_REV(pdev) == CHIP_REV_IKOS) in set_d3_power_state()4121 if(CHIP_REV(pdev) != CHIP_REV_FPGA && in set_d3_power_state()
1432 CHIP_REV(pdev) != CHIP_REV_FPGA); in reduce_ftq_depth()2036 if(CHIP_REV(pdev) == CHIP_REV_FPGA) in lm_reset_setup()2050 if(CHIP_REV(pdev) == CHIP_REV_FPGA) in lm_reset_setup()2339 if(CHIP_REV(pdev) == CHIP_REV_IKOS || CHIP_REV(pdev) == CHIP_REV_FPGA) in lm_reset_setup()
629 #define CHIP_REV_FPGA 0x0000f000 macro