Lines Matching refs:offset
187 #define NXGE_PIO_READ8(handle, devaddr, offset) \ argument
188 (ddi_get8(handle, (uint8_t *)((caddr_t)devaddr + offset)))
190 #define NXGE_PIO_READ16(handle, devaddr, offset) \ argument
191 (ddi_get16(handle, (uint16_t *)((caddr_t)devaddr + offset)))
193 #define NXGE_PIO_READ32(handle, devaddr, offset) \ argument
194 (ddi_get32(handle, (uint32_t *)((caddr_t)devaddr + offset)))
196 #define NXGE_PIO_READ64(handle, devaddr, offset) \ argument
197 (ddi_get64(handle, (uint64_t *)((caddr_t)devaddr + offset)))
199 #define NXGE_PIO_WRITE8(handle, devaddr, offset, data) \ argument
200 (ddi_put8(handle, (uint8_t *)((caddr_t)devaddr + offset), data))
202 #define NXGE_PIO_WRITE16(handle, devaddr, offset, data) \ argument
203 (ddi_get16(handle, (uint16_t *)((caddr_t)devaddr + offset), data))
205 #define NXGE_PIO_WRITE32(handle, devaddr, offset, data) \ argument
206 (ddi_put32(handle, (uint32_t *)((caddr_t)devaddr + offset), data))
208 #define NXGE_PIO_WRITE64(handle, devaddr, offset, data) \ argument
209 (ddi_put64(handle, (uint64_t *)((caddr_t)devaddr + offset), data))
211 #define NXGE_NPI_PIO_READ8(npi_handle, offset) \ argument
213 (uint8_t *)(NPI_REGP(npi_handle) + offset)))
215 #define NXGE_NPI_PIO_READ16(npi_handle, offset) \ argument
217 (uint16_t *)(NPI_REGP(npi_handle) + offset)))
219 #define NXGE_NPI_PIO_READ32(npi_handle, offset) \ argument
221 (uint32_t *)(NPI_REGP(npi_handle) + offset)))
224 #define NXGE_NPI_PIO_READ64(npi_handle, offset) \ argument
226 (uint64_t *)(NPI_REGP(npi_handle) + (uint32_t)offset)))
228 #define NXGE_NPI_PIO_READ64(npi_handle, offset) \ argument
230 (uint64_t *)(NPI_REGP(npi_handle) + offset)))
233 #define NXGE_NPI_PIO_WRITE8(npi_handle, offset, data) \ argument
235 (uint8_t *)(NPI_REGP(npi_handle) + offset), data))
237 #define NXGE_NPI_PIO_WRITE16(npi_handle, offset, data) \ argument
239 (uint16_t *)(NPI_REGP(npi_handle) + offset), data))
241 #define NXGE_NPI_PIO_WRITE32(npi_handle, offset, data) \ argument
243 (uint32_t *)(NPI_REGP(npi_handle) + offset), data))
246 #define NXGE_NPI_PIO_WRITE64(npi_handle, offset, data) \ argument
248 (uint64_t *)(NPI_REGP(npi_handle) + (uint32_t)offset), data))
250 #define NXGE_NPI_PIO_WRITE64(npi_handle, offset, data) \ argument
252 (uint64_t *)(NPI_REGP(npi_handle) + offset), data))
314 #define NXGE_REG_RD64(handle, offset, val_p) {\ argument
315 *(val_p) = NXGE_NPI_PIO_READ64(handle, offset);\
316 npi_rtrace_update(handle, B_FALSE, &npi_rtracebuf, (uint32_t)offset, \
324 #define NXGE_REG_RD64(handle, offset, val_p) {\ argument
325 *(val_p) = NXGE_NPI_PIO_READ64(handle, offset);\
326 rt_show_reg(0xbadbad, B_FALSE, (uint32_t)offset, (uint64_t)(*(val_p)));\
329 #define NXGE_REG_RD64(handle, offset, val_p) {\ argument
330 *(val_p) = NXGE_NPI_PIO_READ64(handle, offset);\
335 #define NXGE_REG_WR64(handle, offset, val) {\ argument
336 NXGE_NPI_PIO_WRITE64(handle, (offset), (val));\
337 npi_rtrace_update(handle, B_TRUE, &npi_rtracebuf, (uint32_t)offset,\
345 #define NXGE_REG_WR64(handle, offset, val) {\ argument
346 NXGE_NPI_PIO_WRITE64(handle, offset, (val));\
347 rt_show_reg(0xbadbad, B_TRUE, (uint32_t)offset, (uint64_t)(val));\
350 #define NXGE_REG_WR64(handle, offset, val) {\ argument
351 NXGE_NPI_PIO_WRITE64(handle, (offset), (val));\