1*03831d35Sstevel /* 2*03831d35Sstevel * CDDL HEADER START 3*03831d35Sstevel * 4*03831d35Sstevel * The contents of this file are subject to the terms of the 5*03831d35Sstevel * Common Development and Distribution License (the "License"). 6*03831d35Sstevel * You may not use this file except in compliance with the License. 7*03831d35Sstevel * 8*03831d35Sstevel * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*03831d35Sstevel * or http://www.opensolaris.org/os/licensing. 10*03831d35Sstevel * See the License for the specific language governing permissions 11*03831d35Sstevel * and limitations under the License. 12*03831d35Sstevel * 13*03831d35Sstevel * When distributing Covered Code, include this CDDL HEADER in each 14*03831d35Sstevel * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*03831d35Sstevel * If applicable, add the following below this CDDL HEADER, with the 16*03831d35Sstevel * fields enclosed by brackets "[]" replaced with your own identifying 17*03831d35Sstevel * information: Portions Copyright [yyyy] [name of copyright owner] 18*03831d35Sstevel * 19*03831d35Sstevel * CDDL HEADER END 20*03831d35Sstevel */ 21*03831d35Sstevel 22*03831d35Sstevel /* 23*03831d35Sstevel * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*03831d35Sstevel * Use is subject to license terms. 25*03831d35Sstevel */ 26*03831d35Sstevel 27*03831d35Sstevel #ifndef _SBDP_MEM_H 28*03831d35Sstevel #define _SBDP_MEM_H 29*03831d35Sstevel 30*03831d35Sstevel #pragma ident "%Z%%M% %I% %E% SMI" 31*03831d35Sstevel 32*03831d35Sstevel #ifdef __cplusplus 33*03831d35Sstevel extern "C" { 34*03831d35Sstevel #endif 35*03831d35Sstevel 36*03831d35Sstevel #include <sys/sbd.h> 37*03831d35Sstevel #include <sys/sbdp_priv.h> 38*03831d35Sstevel 39*03831d35Sstevel #define SBDP_MAX_MCS_PER_NODE 4 40*03831d35Sstevel #define SBDP_MAX_MEM_NODES_PER_BOARD 4 41*03831d35Sstevel 42*03831d35Sstevel typedef uint64_t mc_dc_regs_t[SBDP_MAX_MCS_PER_NODE]; 43*03831d35Sstevel 44*03831d35Sstevel typedef struct { 45*03831d35Sstevel int board; 46*03831d35Sstevel pnode_t *nodes; 47*03831d35Sstevel int nmem; 48*03831d35Sstevel } mem_op_t; 49*03831d35Sstevel 50*03831d35Sstevel typedef struct { 51*03831d35Sstevel uint_t regspec_addr_hi; 52*03831d35Sstevel uint_t regspec_addr_lo; 53*03831d35Sstevel uint_t regspec_size_hi; 54*03831d35Sstevel uint_t regspec_size_lo; 55*03831d35Sstevel } mc_regspace; 56*03831d35Sstevel 57*03831d35Sstevel typedef struct { 58*03831d35Sstevel uint64_t mc_decode[SBDP_MAX_MCS_PER_NODE]; 59*03831d35Sstevel uint64_t mc_memctl; 60*03831d35Sstevel } mc_regs_t; 61*03831d35Sstevel 62*03831d35Sstevel /* 63*03831d35Sstevel * Memory controller register offsets 64*03831d35Sstevel */ 65*03831d35Sstevel #define SG_MEM_TIMING1_CTL 0x400000 66*03831d35Sstevel #define SG_MEM_TIMING2_CTL 0x400008 67*03831d35Sstevel #define SG_MEM_TIMING3_CTL 0x400038 68*03831d35Sstevel #define SG_MEM_TIMING4_CTL 0x400040 69*03831d35Sstevel #define SG_MEM_DECODE0_ADR 0x400028 70*03831d35Sstevel #define SG_MEM_DECODE1_ADR 0x400010 71*03831d35Sstevel #define SG_MEM_DECODE2_ADR 0x400018 72*03831d35Sstevel #define SG_MEM_DECODE3_ADR 0x400020 73*03831d35Sstevel #define SG_MEM_CONTROL_ADR 0x400030 74*03831d35Sstevel #define SG_EMU_ACTIVITY_STATUS 0x400050 75*03831d35Sstevel 76*03831d35Sstevel /* 77*03831d35Sstevel * Bit fields for the decode registers 78*03831d35Sstevel */ 79*03831d35Sstevel #define SG_DECODE_VALID 0x8000000000000000ull 80*03831d35Sstevel #define SG_DECODE_UK 0x001ffe0000000000ull 81*03831d35Sstevel #define SG_DECODE_UM 0x000001fffff00000ull 82*03831d35Sstevel #define SG_DECODE_LK 0x00000000000fc000ull 83*03831d35Sstevel #define SG_DECODE_LM 0x0000000000003f00ull 84*03831d35Sstevel #define SG_INVAL_UM 0x0000000ffff00000ull 85*03831d35Sstevel #define SG_SLICE_INFO 0x000001fc00000000ull 86*03831d35Sstevel #define SG_ALIGNMENT 0x800000000ULL 87*03831d35Sstevel 88*03831d35Sstevel 89*03831d35Sstevel /* 90*03831d35Sstevel * Memory Macros 91*03831d35Sstevel */ 92*03831d35Sstevel #define MC_MEMDEC0(mc_addr) \ 93*03831d35Sstevel (mc_addr) | SG_MEM_DECODE0_ADR 94*03831d35Sstevel #define MC_MEMDEC1(mc_addr) \ 95*03831d35Sstevel (mc_addr) | SG_MEM_DECODE1_ADR 96*03831d35Sstevel #define MC_MEMDEC2(mc_addr) \ 97*03831d35Sstevel (mc_addr) | SG_MEM_DECODE2_ADR 98*03831d35Sstevel #define MC_MEMDEC3(mc_addr) \ 99*03831d35Sstevel (mc_addr) | SG_MEM_DECODE3_ADR 100*03831d35Sstevel #define MC_ACTIVITY_STATUS(mc_addr) \ 101*03831d35Sstevel (mc_addr) | SG_EMU_ACTIVITY_STATUS 102*03831d35Sstevel 103*03831d35Sstevel 104*03831d35Sstevel /* 105*03831d35Sstevel * Mappings to the array for the decode registers only 106*03831d35Sstevel */ 107*03831d35Sstevel #define SG_MC_DECODE_I 0 108*03831d35Sstevel #define SG_MC_DECODE_II 1 109*03831d35Sstevel #define SG_MC_DECODE_III 2 110*03831d35Sstevel #define SG_MC_DECODE_IV 3 111*03831d35Sstevel /* 112*03831d35Sstevel * Memory Macros 113*03831d35Sstevel */ 114*03831d35Sstevel #define SG_REG_2_OFFSET(num) \ 115*03831d35Sstevel ((num) == SG_MC_DECODE_I ? (uint64_t)SG_MEM_DECODE0_ADR : \ 116*03831d35Sstevel (num) == SG_MC_DECODE_II ? (uint64_t)SG_MEM_DECODE1_ADR : \ 117*03831d35Sstevel (num) == SG_MC_DECODE_III ? (uint64_t)SG_MEM_DECODE2_ADR : \ 118*03831d35Sstevel (num) == SG_MC_DECODE_IV ? (uint64_t)SG_MEM_DECODE3_ADR : \ 119*03831d35Sstevel (uint64_t)-1) 120*03831d35Sstevel 121*03831d35Sstevel #define MC_VALID_SHIFT 63 122*03831d35Sstevel #define MC_UK_SHIFT 41 123*03831d35Sstevel #define MC_UM_SHIFT 20 124*03831d35Sstevel #define MC_LK_SHIFT 14 125*03831d35Sstevel #define MC_LM_SHIFT 8 126*03831d35Sstevel #define PHYS2UM_SHIFT 26 127*03831d35Sstevel #define MC_UK(memdec) (((memdec) >> MC_UK_SHIFT) & 0xfffu) 128*03831d35Sstevel #define MC_LK(memdec) (((memdec) >> MC_LK_SHIFT)& 0x3fu) 129*03831d35Sstevel #define MC_INTLV(memdec) ((~(MC_LK(memdec)) & 0xfu) + 1) 130*03831d35Sstevel #define MC_UK2SPAN(memdec) ((MC_UK(memdec) + 1) << PHYS2UM_SHIFT) 131*03831d35Sstevel #define MC_SPANMB(memdec) (MC_UK2SPAN(memdec) >> 20) 132*03831d35Sstevel #define MC_UM(memdec) (((memdec) >> MC_UM_SHIFT) & 0x1fffffu) 133*03831d35Sstevel #define MC_LM(memdec) (((memdec) >> MC_LM_SHIFT) & 0x3f) 134*03831d35Sstevel #define MC_BASE(memdec) (MC_UM(memdec) & ~(MC_UK(memdec))) 135*03831d35Sstevel #define MC_BASE2UM(base) (((base) & 0x1fffffu) << MC_UM_SHIFT) 136*03831d35Sstevel #define SAF_MASK 0x000007ffff800000ull 137*03831d35Sstevel #define MC_OFFSET_MASK 0xffu 138*03831d35Sstevel 139*03831d35Sstevel /* 140*03831d35Sstevel * Memory Slice information 141*03831d35Sstevel */ 142*03831d35Sstevel #define SG_SLICE_16G_SIZE 0x400000000ULL 143*03831d35Sstevel #define SG_SLICE_32G_SIZE 0x800000000ULL 144*03831d35Sstevel #define SG_SLICE_64G_SIZE 0x1000000000ULL 145*03831d35Sstevel 146*03831d35Sstevel /* 147*03831d35Sstevel * Copy-rename info 148*03831d35Sstevel */ 149*03831d35Sstevel 150*03831d35Sstevel #define SBDP_RENAME_MAXOP (PAGESIZE / sizeof (sbdp_rename_script_t)) 151*03831d35Sstevel 152*03831d35Sstevel /* 153*03831d35Sstevel * Must be same size as sbdp_rename_script_t. 154*03831d35Sstevel */ 155*03831d35Sstevel typedef struct { 156*03831d35Sstevel uint64_t addr; 157*03831d35Sstevel uint_t bd_id; 158*03831d35Sstevel pnode_t node; 159*03831d35Sstevel uint_t asi; 160*03831d35Sstevel uint_t _filler; 161*03831d35Sstevel } sbdp_mc_idle_script_t; 162*03831d35Sstevel 163*03831d35Sstevel typedef struct { 164*03831d35Sstevel uint64_t masr_addr; 165*03831d35Sstevel uint64_t masr; 166*03831d35Sstevel uint_t asi; 167*03831d35Sstevel uint_t _filler; 168*03831d35Sstevel } sbdp_rename_script_t; 169*03831d35Sstevel 170*03831d35Sstevel typedef struct { 171*03831d35Sstevel sbdp_bd_t *s_bdp; /* pointer to src bd info */ 172*03831d35Sstevel sbdp_bd_t *t_bdp; /* pointer to tgt bd info */ 173*03831d35Sstevel sbdp_rename_script_t *script; /* points to the actual script */ 174*03831d35Sstevel uint64_t ret; 175*03831d35Sstevel sbdp_mc_idle_script_t *busy_mc; 176*03831d35Sstevel } sbdp_cr_handle_t; 177*03831d35Sstevel 178*03831d35Sstevel 179*03831d35Sstevel extern uint64_t lddsafaddr(uint64_t physaddr); 180*03831d35Sstevel extern uint64_t lddmcdecode(uint64_t physaddr); 181*03831d35Sstevel extern void stdmcdecode(uint64_t, uint64_t); 182*03831d35Sstevel 183*03831d35Sstevel int sbdp_is_mem(pnode_t node, void *arg); 184*03831d35Sstevel #ifdef DEBUG 185*03831d35Sstevel int sbdp_passthru_readmem(sbdp_handle_t *hp, void *); 186*03831d35Sstevel int sbdp_passthru_prep_script(sbdp_handle_t *hp, void *); 187*03831d35Sstevel #endif 188*03831d35Sstevel 189*03831d35Sstevel #ifdef __cplusplus 190*03831d35Sstevel } 191*03831d35Sstevel #endif 192*03831d35Sstevel 193*03831d35Sstevel #endif /* _SBDP_MEM_H */ 194