1*7c478bd9Sstevel@tonic-gate /*
2*7c478bd9Sstevel@tonic-gate * CDDL HEADER START
3*7c478bd9Sstevel@tonic-gate *
4*7c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the
5*7c478bd9Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only
6*7c478bd9Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance
7*7c478bd9Sstevel@tonic-gate * with the License.
8*7c478bd9Sstevel@tonic-gate *
9*7c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*7c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing.
11*7c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions
12*7c478bd9Sstevel@tonic-gate * and limitations under the License.
13*7c478bd9Sstevel@tonic-gate *
14*7c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each
15*7c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*7c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the
17*7c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying
18*7c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner]
19*7c478bd9Sstevel@tonic-gate *
20*7c478bd9Sstevel@tonic-gate * CDDL HEADER END
21*7c478bd9Sstevel@tonic-gate */
22*7c478bd9Sstevel@tonic-gate /*
23*7c478bd9Sstevel@tonic-gate * Copyright 2001-2002 Sun Microsystems, Inc. All rights reserved.
24*7c478bd9Sstevel@tonic-gate * Use is subject to license terms.
25*7c478bd9Sstevel@tonic-gate */
26*7c478bd9Sstevel@tonic-gate
27*7c478bd9Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI"
28*7c478bd9Sstevel@tonic-gate
29*7c478bd9Sstevel@tonic-gate #include <sys/param.h>
30*7c478bd9Sstevel@tonic-gate #include <sys/systm.h>
31*7c478bd9Sstevel@tonic-gate #include <sys/sunddi.h>
32*7c478bd9Sstevel@tonic-gate #include <sys/esunddi.h>
33*7c478bd9Sstevel@tonic-gate #include <sys/ddi.h>
34*7c478bd9Sstevel@tonic-gate
35*7c478bd9Sstevel@tonic-gate #include <sys/platform_module.h>
36*7c478bd9Sstevel@tonic-gate #include <sys/errno.h>
37*7c478bd9Sstevel@tonic-gate
38*7c478bd9Sstevel@tonic-gate void
startup_platform(void)39*7c478bd9Sstevel@tonic-gate startup_platform(void)
40*7c478bd9Sstevel@tonic-gate {
41*7c478bd9Sstevel@tonic-gate }
42*7c478bd9Sstevel@tonic-gate
43*7c478bd9Sstevel@tonic-gate int
set_platform_tsb_spares()44*7c478bd9Sstevel@tonic-gate set_platform_tsb_spares()
45*7c478bd9Sstevel@tonic-gate {
46*7c478bd9Sstevel@tonic-gate return (0);
47*7c478bd9Sstevel@tonic-gate }
48*7c478bd9Sstevel@tonic-gate
49*7c478bd9Sstevel@tonic-gate void
set_platform_defaults(void)50*7c478bd9Sstevel@tonic-gate set_platform_defaults(void)
51*7c478bd9Sstevel@tonic-gate {
52*7c478bd9Sstevel@tonic-gate }
53*7c478bd9Sstevel@tonic-gate
54*7c478bd9Sstevel@tonic-gate
55*7c478bd9Sstevel@tonic-gate /*
56*7c478bd9Sstevel@tonic-gate * Definitions for accessing the pci config space of the isa node
57*7c478bd9Sstevel@tonic-gate * of Southbridge.
58*7c478bd9Sstevel@tonic-gate */
59*7c478bd9Sstevel@tonic-gate #define PLATFORM_ISA_PATHNAME "/pci@1f,0/isa@7"
60*7c478bd9Sstevel@tonic-gate #define PLATFORM_ISA_PATHNAME_WITH_SIMBA "/pci@1f,0/pci@1,1/isa@7"
61*7c478bd9Sstevel@tonic-gate static ddi_acc_handle_t platform_isa_handle; /* handle for isa pci space */
62*7c478bd9Sstevel@tonic-gate
63*7c478bd9Sstevel@tonic-gate void
load_platform_drivers(void)64*7c478bd9Sstevel@tonic-gate load_platform_drivers(void)
65*7c478bd9Sstevel@tonic-gate {
66*7c478bd9Sstevel@tonic-gate dev_info_t *dip; /* dip of the isa driver */
67*7c478bd9Sstevel@tonic-gate int simba_present = 0;
68*7c478bd9Sstevel@tonic-gate dev_info_t *root_child_node;
69*7c478bd9Sstevel@tonic-gate
70*7c478bd9Sstevel@tonic-gate
71*7c478bd9Sstevel@tonic-gate /*
72*7c478bd9Sstevel@tonic-gate * Install Isa driver. This is required for the southbridge IDE
73*7c478bd9Sstevel@tonic-gate * workaround - to reset the IDE channel during IDE bus reset.
74*7c478bd9Sstevel@tonic-gate * Panic the system in case ISA driver could not be loaded or
75*7c478bd9Sstevel@tonic-gate * any problem in accessing its pci config space. Since the register
76*7c478bd9Sstevel@tonic-gate * to reset the channel for IDE is in ISA config space!.
77*7c478bd9Sstevel@tonic-gate */
78*7c478bd9Sstevel@tonic-gate root_child_node = ddi_get_child(ddi_root_node());
79*7c478bd9Sstevel@tonic-gate
80*7c478bd9Sstevel@tonic-gate while (root_child_node != NULL) {
81*7c478bd9Sstevel@tonic-gate if (strcmp(ddi_node_name(root_child_node), "pci") == 0) {
82*7c478bd9Sstevel@tonic-gate root_child_node = ddi_get_child(root_child_node);
83*7c478bd9Sstevel@tonic-gate if (strcmp(ddi_node_name(root_child_node), "pci") == 0)
84*7c478bd9Sstevel@tonic-gate simba_present = 1;
85*7c478bd9Sstevel@tonic-gate break;
86*7c478bd9Sstevel@tonic-gate }
87*7c478bd9Sstevel@tonic-gate root_child_node = ddi_get_next_sibling(root_child_node);
88*7c478bd9Sstevel@tonic-gate }
89*7c478bd9Sstevel@tonic-gate
90*7c478bd9Sstevel@tonic-gate
91*7c478bd9Sstevel@tonic-gate if (simba_present)
92*7c478bd9Sstevel@tonic-gate dip = e_ddi_hold_devi_by_path(PLATFORM_ISA_PATHNAME_WITH_SIMBA, 0);
93*7c478bd9Sstevel@tonic-gate else
94*7c478bd9Sstevel@tonic-gate dip = e_ddi_hold_devi_by_path(PLATFORM_ISA_PATHNAME, 0);
95*7c478bd9Sstevel@tonic-gate
96*7c478bd9Sstevel@tonic-gate if (dip == NULL) {
97*7c478bd9Sstevel@tonic-gate cmn_err(CE_PANIC, "Could not install the isa driver\n");
98*7c478bd9Sstevel@tonic-gate return;
99*7c478bd9Sstevel@tonic-gate }
100*7c478bd9Sstevel@tonic-gate
101*7c478bd9Sstevel@tonic-gate if (pci_config_setup(dip, &platform_isa_handle) != DDI_SUCCESS) {
102*7c478bd9Sstevel@tonic-gate cmn_err(CE_PANIC, "Could not get the config space of isa\n");
103*7c478bd9Sstevel@tonic-gate return;
104*7c478bd9Sstevel@tonic-gate }
105*7c478bd9Sstevel@tonic-gate }
106*7c478bd9Sstevel@tonic-gate
107*7c478bd9Sstevel@tonic-gate /*
108*7c478bd9Sstevel@tonic-gate * This routine provides a workaround for a bug in the SB chip which
109*7c478bd9Sstevel@tonic-gate * can cause data corruption. Will be invoked from the IDE HBA driver for
110*7c478bd9Sstevel@tonic-gate * Acer SouthBridge at the time of IDE bus reset.
111*7c478bd9Sstevel@tonic-gate */
112*7c478bd9Sstevel@tonic-gate /*ARGSUSED*/
113*7c478bd9Sstevel@tonic-gate int
plat_ide_chipreset(dev_info_t * dip,int chno)114*7c478bd9Sstevel@tonic-gate plat_ide_chipreset(dev_info_t *dip, int chno)
115*7c478bd9Sstevel@tonic-gate {
116*7c478bd9Sstevel@tonic-gate uint8_t val;
117*7c478bd9Sstevel@tonic-gate int ret = DDI_SUCCESS;
118*7c478bd9Sstevel@tonic-gate
119*7c478bd9Sstevel@tonic-gate val = pci_config_get8(platform_isa_handle, 0x58);
120*7c478bd9Sstevel@tonic-gate /*
121*7c478bd9Sstevel@tonic-gate * The dip passed as the argument is not used for platform.
122*7c478bd9Sstevel@tonic-gate * This will be needed for platforms which have multiple on-board SB,
123*7c478bd9Sstevel@tonic-gate * The dip passed will be used to match the corresponding ISA node.
124*7c478bd9Sstevel@tonic-gate */
125*7c478bd9Sstevel@tonic-gate switch (chno) {
126*7c478bd9Sstevel@tonic-gate case 0:
127*7c478bd9Sstevel@tonic-gate /*
128*7c478bd9Sstevel@tonic-gate * First disable the primary channel then re-enable it.
129*7c478bd9Sstevel@tonic-gate * As per ALI no wait should be required in between have
130*7c478bd9Sstevel@tonic-gate * given 1ms delay in between to be on safer side.
131*7c478bd9Sstevel@tonic-gate * bit 2 of register 0x58 when 0 disable the channel 0.
132*7c478bd9Sstevel@tonic-gate * bit 2 of register 0x58 when 1 enables the channel 0.
133*7c478bd9Sstevel@tonic-gate */
134*7c478bd9Sstevel@tonic-gate pci_config_put8(platform_isa_handle, 0x58, val & 0xFB);
135*7c478bd9Sstevel@tonic-gate drv_usecwait(1000);
136*7c478bd9Sstevel@tonic-gate pci_config_put8(platform_isa_handle, 0x58, val);
137*7c478bd9Sstevel@tonic-gate break;
138*7c478bd9Sstevel@tonic-gate case 1:
139*7c478bd9Sstevel@tonic-gate /*
140*7c478bd9Sstevel@tonic-gate * bit 3 of register 0x58 when 0 disable the channel 1.
141*7c478bd9Sstevel@tonic-gate * bit 3 of register 0x58 when 1 enables the channel 1.
142*7c478bd9Sstevel@tonic-gate */
143*7c478bd9Sstevel@tonic-gate pci_config_put8(platform_isa_handle, 0x58, val & 0xF7);
144*7c478bd9Sstevel@tonic-gate drv_usecwait(1000);
145*7c478bd9Sstevel@tonic-gate pci_config_put8(platform_isa_handle, 0x58, val);
146*7c478bd9Sstevel@tonic-gate break;
147*7c478bd9Sstevel@tonic-gate default:
148*7c478bd9Sstevel@tonic-gate /*
149*7c478bd9Sstevel@tonic-gate * Unknown channel number passed. Return failure.
150*7c478bd9Sstevel@tonic-gate */
151*7c478bd9Sstevel@tonic-gate ret = DDI_FAILURE;
152*7c478bd9Sstevel@tonic-gate }
153*7c478bd9Sstevel@tonic-gate
154*7c478bd9Sstevel@tonic-gate return (ret);
155*7c478bd9Sstevel@tonic-gate }
156*7c478bd9Sstevel@tonic-gate
157*7c478bd9Sstevel@tonic-gate
158*7c478bd9Sstevel@tonic-gate
159*7c478bd9Sstevel@tonic-gate /*ARGSUSED*/
160*7c478bd9Sstevel@tonic-gate int
plat_cpu_poweron(struct cpu * cp)161*7c478bd9Sstevel@tonic-gate plat_cpu_poweron(struct cpu *cp)
162*7c478bd9Sstevel@tonic-gate {
163*7c478bd9Sstevel@tonic-gate return (ENOTSUP); /* not supported on this platform */
164*7c478bd9Sstevel@tonic-gate }
165*7c478bd9Sstevel@tonic-gate
166*7c478bd9Sstevel@tonic-gate /*ARGSUSED*/
167*7c478bd9Sstevel@tonic-gate int
plat_cpu_poweroff(struct cpu * cp)168*7c478bd9Sstevel@tonic-gate plat_cpu_poweroff(struct cpu *cp)
169*7c478bd9Sstevel@tonic-gate {
170*7c478bd9Sstevel@tonic-gate return (ENOTSUP); /* not supported on this platform */
171*7c478bd9Sstevel@tonic-gate }
172*7c478bd9Sstevel@tonic-gate
173*7c478bd9Sstevel@tonic-gate /*ARGSUSED*/
174*7c478bd9Sstevel@tonic-gate void
plat_freelist_process(int mnode)175*7c478bd9Sstevel@tonic-gate plat_freelist_process(int mnode)
176*7c478bd9Sstevel@tonic-gate {
177*7c478bd9Sstevel@tonic-gate }
178*7c478bd9Sstevel@tonic-gate
179*7c478bd9Sstevel@tonic-gate char *platform_module_list[] = {
180*7c478bd9Sstevel@tonic-gate (char *)0
181*7c478bd9Sstevel@tonic-gate };
182*7c478bd9Sstevel@tonic-gate
183*7c478bd9Sstevel@tonic-gate /*ARGSUSED*/
184*7c478bd9Sstevel@tonic-gate void
plat_tod_fault(enum tod_fault_type tod_bad)185*7c478bd9Sstevel@tonic-gate plat_tod_fault(enum tod_fault_type tod_bad)
186*7c478bd9Sstevel@tonic-gate {
187*7c478bd9Sstevel@tonic-gate }
188