xref: /illumos-gate/usr/src/uts/sun4/sys/ebus.h (revision c4485e78)
17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate  * CDDL HEADER START
37c478bd9Sstevel@tonic-gate  *
47c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
57c478bd9Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
67c478bd9Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
77c478bd9Sstevel@tonic-gate  * with the License.
87c478bd9Sstevel@tonic-gate  *
97c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
107c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
117c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
127c478bd9Sstevel@tonic-gate  * and limitations under the License.
137c478bd9Sstevel@tonic-gate  *
147c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
157c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
167c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
177c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
187c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
197c478bd9Sstevel@tonic-gate  *
207c478bd9Sstevel@tonic-gate  * CDDL HEADER END
217c478bd9Sstevel@tonic-gate  */
227c478bd9Sstevel@tonic-gate /*
237c478bd9Sstevel@tonic-gate  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
247c478bd9Sstevel@tonic-gate  * Use is subject to license terms.
257c478bd9Sstevel@tonic-gate  */
267c478bd9Sstevel@tonic-gate 
277c478bd9Sstevel@tonic-gate #ifndef _SYS_EBUS_H
287c478bd9Sstevel@tonic-gate #define	_SYS_EBUS_H
297c478bd9Sstevel@tonic-gate 
307c478bd9Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
317c478bd9Sstevel@tonic-gate 
327c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
337c478bd9Sstevel@tonic-gate extern "C" {
347c478bd9Sstevel@tonic-gate #endif
357c478bd9Sstevel@tonic-gate 
367c478bd9Sstevel@tonic-gate /*
377c478bd9Sstevel@tonic-gate  * driver state type:
387c478bd9Sstevel@tonic-gate  */
397c478bd9Sstevel@tonic-gate typedef enum { NEW = 0, ATTACHED, RESUMED, DETACHED,
407c478bd9Sstevel@tonic-gate 		SUSPENDED, PM_SUSPENDED } driver_state_t;
417c478bd9Sstevel@tonic-gate 
427c478bd9Sstevel@tonic-gate /*
437c478bd9Sstevel@tonic-gate  * The i86pc specific code fragments are to support the debug of "honeynut"
447c478bd9Sstevel@tonic-gate  * and "multigrain" prototypes on i86pc platform.  Most of the fragments
457c478bd9Sstevel@tonic-gate  * deal with differences in the interrupt dispatching between the prototypes
467c478bd9Sstevel@tonic-gate  * and the cheerio ebus.  On the prototype boards, all interrupt lines are
477c478bd9Sstevel@tonic-gate  * tied together.  For this case, the nexus driver uses a common interrupt
487c478bd9Sstevel@tonic-gate  * handler to poll all of its children.
497c478bd9Sstevel@tonic-gate  */
507c478bd9Sstevel@tonic-gate #if defined(i86pc)
517c478bd9Sstevel@tonic-gate #define	MAX_EBUS_DEVS	6
527c478bd9Sstevel@tonic-gate 
537c478bd9Sstevel@tonic-gate /*
547c478bd9Sstevel@tonic-gate  * ebus device interrupt info;
557c478bd9Sstevel@tonic-gate  */
567c478bd9Sstevel@tonic-gate typedef struct {
577c478bd9Sstevel@tonic-gate 	char *name;
587c478bd9Sstevel@tonic-gate 	uint_t inuse;
597c478bd9Sstevel@tonic-gate 	uint_t (*handler)();
607c478bd9Sstevel@tonic-gate 	caddr_t arg;
617c478bd9Sstevel@tonic-gate } ebus_intr_slot_t;
627c478bd9Sstevel@tonic-gate #endif
637c478bd9Sstevel@tonic-gate 
647c478bd9Sstevel@tonic-gate struct ebus_intr_map {
657c478bd9Sstevel@tonic-gate 	uint32_t ebus_phys_hi;
667c478bd9Sstevel@tonic-gate 	uint32_t ebus_phys_low;
677c478bd9Sstevel@tonic-gate 	uint32_t ebus_intr;
687c478bd9Sstevel@tonic-gate 	uint32_t intr_ctlr_nodeid;
697c478bd9Sstevel@tonic-gate 	uint32_t ino;
707c478bd9Sstevel@tonic-gate };
717c478bd9Sstevel@tonic-gate 
727c478bd9Sstevel@tonic-gate struct ebus_intr_map_mask {
737c478bd9Sstevel@tonic-gate 	uint32_t ebus_phys_hi;
747c478bd9Sstevel@tonic-gate 	uint32_t ebus_phys_low;
757c478bd9Sstevel@tonic-gate 	uint32_t ebus_intr;
767c478bd9Sstevel@tonic-gate };
777c478bd9Sstevel@tonic-gate 
78*c4485e78Sjasonwu /*
79*c4485e78Sjasonwu  * definition of ebus reg spec entry:
80*c4485e78Sjasonwu  */
81*c4485e78Sjasonwu typedef struct {
82*c4485e78Sjasonwu 	uint32_t addr_hi;
83*c4485e78Sjasonwu 	uint32_t addr_low;
84*c4485e78Sjasonwu 	uint32_t size;
85*c4485e78Sjasonwu } ebus_regspec_t;
86*c4485e78Sjasonwu 
87*c4485e78Sjasonwu /* Range entry for 3-cell parent address */
88*c4485e78Sjasonwu struct ebus_pci_rangespec {
89*c4485e78Sjasonwu 	uint32_t phys_hi;			/* Child hi range address */
90*c4485e78Sjasonwu 	uint32_t phys_low;			/* Child low range address */
91*c4485e78Sjasonwu 	uint32_t par_phys_hi;			/* Parent hi rng addr */
92*c4485e78Sjasonwu 	uint32_t par_phys_mid;			/* Parent mid rng addr */
93*c4485e78Sjasonwu 	uint32_t par_phys_low;			/* Parent low rng addr */
94*c4485e78Sjasonwu 	uint32_t rng_size;			/* Range size */
95*c4485e78Sjasonwu };
96*c4485e78Sjasonwu 
97*c4485e78Sjasonwu /* Range entry for 2-cell parent address */
98*c4485e78Sjasonwu struct ebus_jbus_rangespec {
99*c4485e78Sjasonwu 	uint32_t phys_hi;			/* Child hi range address */
100*c4485e78Sjasonwu 	uint32_t phys_low;			/* Child low range address */
101*c4485e78Sjasonwu 	uint32_t par_phys_hi;			/* Parent hi rng addr */
102*c4485e78Sjasonwu 	uint32_t par_phys_low;			/* Parent low rng addr */
103*c4485e78Sjasonwu 	uint32_t rng_size;			/* Range size */
104*c4485e78Sjasonwu };
105*c4485e78Sjasonwu 
106*c4485e78Sjasonwu typedef union vrangespec {
107*c4485e78Sjasonwu 	struct ebus_pci_rangespec	pci_rangespec;
108*c4485e78Sjasonwu 	struct ebus_jbus_rangespec	jbus_rangespec;
109*c4485e78Sjasonwu } vrangespec_t;
110*c4485e78Sjasonwu 
111*c4485e78Sjasonwu typedef union vregspec {
112*c4485e78Sjasonwu 	struct pci_phys_spec	pci_regspec;
113*c4485e78Sjasonwu 	struct regspec		jbus_regspec;
114*c4485e78Sjasonwu } vregspec_t;
115*c4485e78Sjasonwu 
1167c478bd9Sstevel@tonic-gate /*
1177c478bd9Sstevel@tonic-gate  * driver soft state structure:
1187c478bd9Sstevel@tonic-gate  */
1197c478bd9Sstevel@tonic-gate typedef struct {
1207c478bd9Sstevel@tonic-gate 	dev_info_t *dip;
1217c478bd9Sstevel@tonic-gate 	driver_state_t state;
1227c478bd9Sstevel@tonic-gate 	pci_regspec_t *reg;
1237c478bd9Sstevel@tonic-gate 	int nreg;
1247c478bd9Sstevel@tonic-gate 
125*c4485e78Sjasonwu 	vrangespec_t *vrangep;
126*c4485e78Sjasonwu 	int vrange_len;
127*c4485e78Sjasonwu 	int vrange_cnt;
1287c478bd9Sstevel@tonic-gate 
1297c478bd9Sstevel@tonic-gate 	kmutex_t ebus_mutex;
1307c478bd9Sstevel@tonic-gate 	uint_t ebus_soft_state;
1317c478bd9Sstevel@tonic-gate #define	EBUS_SOFT_STATE_CLOSED		0x00
1327c478bd9Sstevel@tonic-gate #define	EBUS_SOFT_STATE_OPEN		0x01
1337c478bd9Sstevel@tonic-gate #define	EBUS_SOFT_STATE_OPEN_EXCL	0x02
1347c478bd9Sstevel@tonic-gate 
1357c478bd9Sstevel@tonic-gate #if defined(i86pc)
1367c478bd9Sstevel@tonic-gate 	ddi_iblock_cookie_t iblock;
1377c478bd9Sstevel@tonic-gate 	ddi_idevice_cookie_t idevice;
1387c478bd9Sstevel@tonic-gate 	ebus_intr_slot_t intr_slot[MAX_EBUS_DEVS];
1397c478bd9Sstevel@tonic-gate #endif
1407c478bd9Sstevel@tonic-gate #if defined(__sparc)
1417c478bd9Sstevel@tonic-gate 	/* Interrupt support */
1427c478bd9Sstevel@tonic-gate 	int intr_map_size;
1437c478bd9Sstevel@tonic-gate 	struct ebus_intr_map *intr_map;
1447c478bd9Sstevel@tonic-gate 	struct ebus_intr_map_mask *intr_map_mask;
1457c478bd9Sstevel@tonic-gate #endif
146*c4485e78Sjasonwu 	int ebus_addr_cells;
147*c4485e78Sjasonwu 	int ebus_paddr_cells;
148*c4485e78Sjasonwu 	int ebus_psz_cells;
149*c4485e78Sjasonwu 	int ebus_sz_cells;
1507c478bd9Sstevel@tonic-gate } ebus_devstate_t;
1517c478bd9Sstevel@tonic-gate 
1527c478bd9Sstevel@tonic-gate 
1537c478bd9Sstevel@tonic-gate /*
1547c478bd9Sstevel@tonic-gate  * use macros for soft state and driver properties:
1557c478bd9Sstevel@tonic-gate  */
1567c478bd9Sstevel@tonic-gate #define	get_ebus_soft_state(i)	\
1577c478bd9Sstevel@tonic-gate 	((ebus_devstate_t *)ddi_get_soft_state(per_ebus_state, (i)))
1587c478bd9Sstevel@tonic-gate 
1597c478bd9Sstevel@tonic-gate #define	alloc_ebus_soft_state(i)	\
1607c478bd9Sstevel@tonic-gate 	ddi_soft_state_zalloc(per_ebus_state, (i))
1617c478bd9Sstevel@tonic-gate 
1627c478bd9Sstevel@tonic-gate #define	free_ebus_soft_state(i)	\
1637c478bd9Sstevel@tonic-gate 	ddi_soft_state_free(per_ebus_state, (i))
1647c478bd9Sstevel@tonic-gate 
1657c478bd9Sstevel@tonic-gate 
1667c478bd9Sstevel@tonic-gate #define	getprop(dip, name, addr, intp)		\
167a3282898Scth 		ddi_getlongprop(DDI_DEV_T_ANY, (dip), DDI_PROP_DONTPASS, \
1687c478bd9Sstevel@tonic-gate 				(name), (caddr_t)(addr), (intp))
1697c478bd9Sstevel@tonic-gate 
1707c478bd9Sstevel@tonic-gate #define	IS_RIO(dip) \
1717c478bd9Sstevel@tonic-gate 		((ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, \
1727c478bd9Sstevel@tonic-gate 		"device-id", -1) == 0x1100) && \
1737c478bd9Sstevel@tonic-gate 		(ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, \
1747c478bd9Sstevel@tonic-gate 		"vendor-id", -1) == 0x108e))
1757c478bd9Sstevel@tonic-gate 
1767c478bd9Sstevel@tonic-gate #define	EBUS_4MHZ	4000
1777c478bd9Sstevel@tonic-gate 
1787c478bd9Sstevel@tonic-gate /*
1797c478bd9Sstevel@tonic-gate  * register offsets and lengths:
1807c478bd9Sstevel@tonic-gate  */
1817c478bd9Sstevel@tonic-gate #define	TCR_OFFSET	0x710000
1827c478bd9Sstevel@tonic-gate #define	TCR_LENGTH	12
1837c478bd9Sstevel@tonic-gate 
1847c478bd9Sstevel@tonic-gate /*
1857c478bd9Sstevel@tonic-gate  * timing control register settings:
1867c478bd9Sstevel@tonic-gate  */
1877c478bd9Sstevel@tonic-gate #define	TCR1		0x08101008
1887c478bd9Sstevel@tonic-gate #define	TCR2		0x08100020
1897c478bd9Sstevel@tonic-gate #define	TCR3		0x00000020
1907c478bd9Sstevel@tonic-gate 
1917c478bd9Sstevel@tonic-gate #if defined(DEBUG)
1927c478bd9Sstevel@tonic-gate #define	D_IDENTIFY	0x00000001
1937c478bd9Sstevel@tonic-gate #define	D_ATTACH	0x00000002
1947c478bd9Sstevel@tonic-gate #define	D_DETACH	0x00000004
1957c478bd9Sstevel@tonic-gate #define	D_MAP		0x00000008
1967c478bd9Sstevel@tonic-gate #define	D_CTLOPS	0x00000010
1977c478bd9Sstevel@tonic-gate #define	D_INTR		0x00000100
1987c478bd9Sstevel@tonic-gate 
1997c478bd9Sstevel@tonic-gate #define	DBG(flag, psp, fmt)	\
2007c478bd9Sstevel@tonic-gate 	ebus_debug(flag, psp, fmt, 0, 0, 0, 0, 0);
2017c478bd9Sstevel@tonic-gate #define	DBG1(flag, psp, fmt, a1)	\
2027c478bd9Sstevel@tonic-gate 	ebus_debug(flag, psp, fmt, (uintptr_t)(a1), 0, 0, 0, 0);
2037c478bd9Sstevel@tonic-gate #define	DBG2(flag, psp, fmt, a1, a2)	\
2047c478bd9Sstevel@tonic-gate 	ebus_debug(flag, psp, fmt, (uintptr_t)(a1), (uintptr_t)(a2), 0, 0, 0);
2057c478bd9Sstevel@tonic-gate #define	DBG3(flag, psp, fmt, a1, a2, a3)	\
2067c478bd9Sstevel@tonic-gate 	ebus_debug(flag, psp, fmt, (uintptr_t)(a1), (uintptr_t)(a2), \
2077c478bd9Sstevel@tonic-gate 	    (uintptr_t)(a3), 0, 0);
2087c478bd9Sstevel@tonic-gate #define	DBG4(flag, psp, fmt, a1, a2, a3, a4)	\
2097c478bd9Sstevel@tonic-gate 	ebus_debug(flag, psp, fmt, (uintptr_t)(a1), (uintptr_t)(a2), \
2107c478bd9Sstevel@tonic-gate 	    (uintptr_t)(a3), \
2117c478bd9Sstevel@tonic-gate 		(uintptr_t)(a4), 0);
2127c478bd9Sstevel@tonic-gate #define	DBG5(flag, psp, fmt, a1, a2, a3, a4, a5)	\
2137c478bd9Sstevel@tonic-gate 	ebus_debug(flag, psp, fmt, (uintptr_t)(a1), (uintptr_t)(a2), \
2147c478bd9Sstevel@tonic-gate 	    (uintptr_t)(a3), \
2157c478bd9Sstevel@tonic-gate 		(uintptr_t)(a4), (uintptr_t)(a5));
2167c478bd9Sstevel@tonic-gate static void
2177c478bd9Sstevel@tonic-gate ebus_debug(uint_t, ebus_devstate_t *, char *, uintptr_t, uintptr_t, uintptr_t,
2187c478bd9Sstevel@tonic-gate     uintptr_t, uintptr_t);
2197c478bd9Sstevel@tonic-gate #else
2207c478bd9Sstevel@tonic-gate #define	DBG(flag, psp, fmt)
2217c478bd9Sstevel@tonic-gate #define	DBG1(flag, psp, fmt, a1)
2227c478bd9Sstevel@tonic-gate #define	DBG2(flag, psp, fmt, a1, a2)
2237c478bd9Sstevel@tonic-gate #define	DBG3(flag, psp, fmt, a1, a2, a3)
2247c478bd9Sstevel@tonic-gate #define	DBG4(flag, psp, fmt, a1, a2, a3, a4)
2257c478bd9Sstevel@tonic-gate #define	DBG5(flag, psp, fmt, a1, a2, a3, a4, a5)
2267c478bd9Sstevel@tonic-gate #endif
2277c478bd9Sstevel@tonic-gate 
2287c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
2297c478bd9Sstevel@tonic-gate }
2307c478bd9Sstevel@tonic-gate #endif
2317c478bd9Sstevel@tonic-gate 
2327c478bd9Sstevel@tonic-gate #endif	/* _SYS_EBUS_H */
233