1e3d60c9bSAdrian Frost /* 2e3d60c9bSAdrian Frost * CDDL HEADER START 3e3d60c9bSAdrian Frost * 4e3d60c9bSAdrian Frost * The contents of this file are subject to the terms of the 5e3d60c9bSAdrian Frost * Common Development and Distribution License (the "License"). 6e3d60c9bSAdrian Frost * You may not use this file except in compliance with the License. 7e3d60c9bSAdrian Frost * 8e3d60c9bSAdrian Frost * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9e3d60c9bSAdrian Frost * or http://www.opensolaris.org/os/licensing. 10e3d60c9bSAdrian Frost * See the License for the specific language governing permissions 11e3d60c9bSAdrian Frost * and limitations under the License. 12e3d60c9bSAdrian Frost * 13e3d60c9bSAdrian Frost * When distributing Covered Code, include this CDDL HEADER in each 14e3d60c9bSAdrian Frost * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15e3d60c9bSAdrian Frost * If applicable, add the following below this CDDL HEADER, with the 16e3d60c9bSAdrian Frost * fields enclosed by brackets "[]" replaced with your own identifying 17e3d60c9bSAdrian Frost * information: Portions Copyright [yyyy] [name of copyright owner] 18e3d60c9bSAdrian Frost * 19e3d60c9bSAdrian Frost * CDDL HEADER END 20e3d60c9bSAdrian Frost */ 21e3d60c9bSAdrian Frost 22e3d60c9bSAdrian Frost /* 23*f657cd55SCheng Sean Ye * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24e3d60c9bSAdrian Frost * Use is subject to license terms. 25e3d60c9bSAdrian Frost */ 26e3d60c9bSAdrian Frost 27e3d60c9bSAdrian Frost #include <sys/types.h> 28e3d60c9bSAdrian Frost #include <sys/cmn_err.h> 29e3d60c9bSAdrian Frost #include <sys/errno.h> 30e3d60c9bSAdrian Frost #include <sys/systm.h> 31e3d60c9bSAdrian Frost #include <sys/sunddi.h> 32e3d60c9bSAdrian Frost #include <sys/pci_cfgspace.h> 33e3d60c9bSAdrian Frost #include <sys/pci.h> 34e3d60c9bSAdrian Frost #include <sys/pcie.h> 35e3d60c9bSAdrian Frost #include <vm/seg_kmem.h> 36e3d60c9bSAdrian Frost #include <sys/mman.h> 37e3d60c9bSAdrian Frost #include <sys/cpu_module.h> 38e3d60c9bSAdrian Frost #include "intel_nhm.h" 39e3d60c9bSAdrian Frost 40e3d60c9bSAdrian Frost static ddi_acc_handle_t dev_pci_hdl[MAX_CPU_NODES][CPU_PCI_DEVS][CPU_PCI_FUNCS]; 41e3d60c9bSAdrian Frost 42e3d60c9bSAdrian Frost void 43e3d60c9bSAdrian Frost nhm_pci_cfg_setup(dev_info_t *dip) 44e3d60c9bSAdrian Frost { 45e3d60c9bSAdrian Frost pci_regspec_t reg; 46e3d60c9bSAdrian Frost int i, j, k; 47e3d60c9bSAdrian Frost 48e3d60c9bSAdrian Frost reg.pci_phys_mid = 0; 49e3d60c9bSAdrian Frost reg.pci_phys_low = 0; 50e3d60c9bSAdrian Frost reg.pci_size_hi = 0; 51e3d60c9bSAdrian Frost reg.pci_size_low = PCIE_CONF_HDR_SIZE; /* overriden in pciex */ 52e3d60c9bSAdrian Frost for (i = 0; i < MAX_CPU_NODES; i++) { 53e3d60c9bSAdrian Frost for (j = 0; j < CPU_PCI_DEVS; j++) { 54e3d60c9bSAdrian Frost for (k = 0; k < CPU_PCI_FUNCS; k++) { 55e3d60c9bSAdrian Frost reg.pci_phys_hi = ((SOCKET_BUS(i)) 56e3d60c9bSAdrian Frost << PCI_REG_BUS_SHIFT) + 57e3d60c9bSAdrian Frost (j << PCI_REG_DEV_SHIFT) + 58e3d60c9bSAdrian Frost (k << PCI_REG_FUNC_SHIFT); 59e3d60c9bSAdrian Frost if (ddi_prop_update_int_array( 60e3d60c9bSAdrian Frost DDI_MAJOR_T_UNKNOWN, dip, "reg", 61e3d60c9bSAdrian Frost (int *)®, sizeof (reg)/sizeof (int)) != 62e3d60c9bSAdrian Frost DDI_PROP_SUCCESS) 63e3d60c9bSAdrian Frost cmn_err(CE_WARN, "nhm_pci_cfg_setup: " 64e3d60c9bSAdrian Frost "cannot create reg property"); 65e3d60c9bSAdrian Frost 66e3d60c9bSAdrian Frost if (pci_config_setup(dip, 67e3d60c9bSAdrian Frost &dev_pci_hdl[i][j][k]) != DDI_SUCCESS) 68e3d60c9bSAdrian Frost cmn_err(CE_WARN, "intel_nhm: " 69e3d60c9bSAdrian Frost "pci_config_setup failed"); 70e3d60c9bSAdrian Frost } 71e3d60c9bSAdrian Frost } 72e3d60c9bSAdrian Frost } 73e3d60c9bSAdrian Frost } 74e3d60c9bSAdrian Frost 75e3d60c9bSAdrian Frost void 76e3d60c9bSAdrian Frost nhm_pci_cfg_free() 77e3d60c9bSAdrian Frost { 78e3d60c9bSAdrian Frost int i, j, k; 79e3d60c9bSAdrian Frost 80e3d60c9bSAdrian Frost for (i = 0; i < MAX_CPU_NODES; i++) { 81e3d60c9bSAdrian Frost for (j = 0; j < CPU_PCI_DEVS; j++) { 82e3d60c9bSAdrian Frost for (k = 0; k < CPU_PCI_FUNCS; k++) { 83e3d60c9bSAdrian Frost pci_config_teardown(&dev_pci_hdl[i][j][k]); 84e3d60c9bSAdrian Frost } 85e3d60c9bSAdrian Frost } 86e3d60c9bSAdrian Frost } 87e3d60c9bSAdrian Frost } 88e3d60c9bSAdrian Frost 89e3d60c9bSAdrian Frost static ddi_acc_handle_t 90e3d60c9bSAdrian Frost nhm_get_hdl(int bus, int dev, int func) 91e3d60c9bSAdrian Frost { 92e3d60c9bSAdrian Frost ddi_acc_handle_t hdl; 93e3d60c9bSAdrian Frost int slot; 94e3d60c9bSAdrian Frost 95e3d60c9bSAdrian Frost if (bus >= SOCKET_BUS(MAX_CPU_NODES) && bus <= SOCKET_BUS(0) && 96e3d60c9bSAdrian Frost dev < CPU_PCI_DEVS && func < CPU_PCI_FUNCS) { 97e3d60c9bSAdrian Frost slot = SOCKET_BUS(0) - bus; 98e3d60c9bSAdrian Frost ASSERT(slot >= 0 && slot < MAX_CPU_NODES); 99e3d60c9bSAdrian Frost hdl = dev_pci_hdl[slot][dev][func]; 100e3d60c9bSAdrian Frost } else { 101e3d60c9bSAdrian Frost hdl = 0; 102e3d60c9bSAdrian Frost } 103e3d60c9bSAdrian Frost return (hdl); 104e3d60c9bSAdrian Frost } 105e3d60c9bSAdrian Frost 106e3d60c9bSAdrian Frost uint8_t 107e3d60c9bSAdrian Frost nhm_pci_getb(int bus, int dev, int func, int reg, int *interpose) 108e3d60c9bSAdrian Frost { 109e3d60c9bSAdrian Frost ddi_acc_handle_t hdl; 110e3d60c9bSAdrian Frost 111e3d60c9bSAdrian Frost hdl = nhm_get_hdl(bus, dev, func); 112e3d60c9bSAdrian Frost return (cmi_pci_getb(bus, dev, func, reg, interpose, hdl)); 113e3d60c9bSAdrian Frost } 114e3d60c9bSAdrian Frost 115e3d60c9bSAdrian Frost uint16_t 116e3d60c9bSAdrian Frost nhm_pci_getw(int bus, int dev, int func, int reg, int *interpose) 117e3d60c9bSAdrian Frost { 118e3d60c9bSAdrian Frost ddi_acc_handle_t hdl; 119e3d60c9bSAdrian Frost 120e3d60c9bSAdrian Frost hdl = nhm_get_hdl(bus, dev, func); 121e3d60c9bSAdrian Frost return (cmi_pci_getw(bus, dev, func, reg, interpose, hdl)); 122e3d60c9bSAdrian Frost } 123e3d60c9bSAdrian Frost 124e3d60c9bSAdrian Frost uint32_t 125e3d60c9bSAdrian Frost nhm_pci_getl(int bus, int dev, int func, int reg, int *interpose) 126e3d60c9bSAdrian Frost { 127e3d60c9bSAdrian Frost ddi_acc_handle_t hdl; 128e3d60c9bSAdrian Frost 129e3d60c9bSAdrian Frost hdl = nhm_get_hdl(bus, dev, func); 130e3d60c9bSAdrian Frost return (cmi_pci_getl(bus, dev, func, reg, interpose, hdl)); 131e3d60c9bSAdrian Frost } 132e3d60c9bSAdrian Frost 133e3d60c9bSAdrian Frost void 134e3d60c9bSAdrian Frost nhm_pci_putb(int bus, int dev, int func, int reg, uint8_t val) 135e3d60c9bSAdrian Frost { 136e3d60c9bSAdrian Frost ddi_acc_handle_t hdl; 137e3d60c9bSAdrian Frost 138e3d60c9bSAdrian Frost hdl = nhm_get_hdl(bus, dev, func); 139e3d60c9bSAdrian Frost cmi_pci_putb(bus, dev, func, reg, hdl, val); 140e3d60c9bSAdrian Frost } 141e3d60c9bSAdrian Frost 142e3d60c9bSAdrian Frost void 143e3d60c9bSAdrian Frost nhm_pci_putw(int bus, int dev, int func, int reg, uint16_t val) 144e3d60c9bSAdrian Frost { 145e3d60c9bSAdrian Frost ddi_acc_handle_t hdl; 146e3d60c9bSAdrian Frost 147e3d60c9bSAdrian Frost hdl = nhm_get_hdl(bus, dev, func); 148e3d60c9bSAdrian Frost cmi_pci_putw(bus, dev, func, reg, hdl, val); 149e3d60c9bSAdrian Frost } 150e3d60c9bSAdrian Frost 151e3d60c9bSAdrian Frost void 152e3d60c9bSAdrian Frost nhm_pci_putl(int bus, int dev, int func, int reg, uint32_t val) 153e3d60c9bSAdrian Frost { 154e3d60c9bSAdrian Frost ddi_acc_handle_t hdl; 155e3d60c9bSAdrian Frost 156e3d60c9bSAdrian Frost hdl = nhm_get_hdl(bus, dev, func); 157e3d60c9bSAdrian Frost cmi_pci_putl(bus, dev, func, reg, hdl, val); 158e3d60c9bSAdrian Frost } 159