xref: /illumos-gate/usr/src/uts/intel/io/dnet/dnet_mii.c (revision bdb9230a)
17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate  * CDDL HEADER START
37c478bd9Sstevel@tonic-gate  *
47c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
50f80586bSgd  * Common Development and Distribution License (the "License").
60f80586bSgd  * You may not use this file except in compliance with the License.
77c478bd9Sstevel@tonic-gate  *
87c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
107c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
117c478bd9Sstevel@tonic-gate  * and limitations under the License.
127c478bd9Sstevel@tonic-gate  *
137c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
147c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
167c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
177c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
187c478bd9Sstevel@tonic-gate  *
197c478bd9Sstevel@tonic-gate  * CDDL HEADER END
207c478bd9Sstevel@tonic-gate  */
217c478bd9Sstevel@tonic-gate /*
22*bdb9230aSGarrett D'Amore  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
237c478bd9Sstevel@tonic-gate  * Use is subject to license terms.
247c478bd9Sstevel@tonic-gate  */
257c478bd9Sstevel@tonic-gate 
267c478bd9Sstevel@tonic-gate /*
277c478bd9Sstevel@tonic-gate  * mii - MII/PHY support for MAC drivers
287c478bd9Sstevel@tonic-gate  *
297c478bd9Sstevel@tonic-gate  * Utility module to provide a consistent interface to a MAC driver accross
307c478bd9Sstevel@tonic-gate  * different implementations of PHY devices
317c478bd9Sstevel@tonic-gate  */
327c478bd9Sstevel@tonic-gate 
337c478bd9Sstevel@tonic-gate #include <sys/types.h>
347c478bd9Sstevel@tonic-gate #include <sys/debug.h>
357c478bd9Sstevel@tonic-gate #include <sys/errno.h>
367c478bd9Sstevel@tonic-gate #include <sys/param.h>
377c478bd9Sstevel@tonic-gate #include <sys/sysmacros.h>
387c478bd9Sstevel@tonic-gate #include <sys/stropts.h>
397c478bd9Sstevel@tonic-gate #include <sys/stream.h>
407c478bd9Sstevel@tonic-gate #include <sys/kmem.h>
417c478bd9Sstevel@tonic-gate #include <sys/conf.h>
427c478bd9Sstevel@tonic-gate #include <sys/ddi.h>
437c478bd9Sstevel@tonic-gate #include <sys/sunddi.h>
447c478bd9Sstevel@tonic-gate #include <sys/devops.h>
457c478bd9Sstevel@tonic-gate #include <sys/modctl.h>
467c478bd9Sstevel@tonic-gate #include <sys/cmn_err.h>
477c478bd9Sstevel@tonic-gate #include <sys/miiregs.h>
48*bdb9230aSGarrett D'Amore #include "dnet_mii.h"
49*bdb9230aSGarrett D'Amore 
50a8320b74Smeem 
517c478bd9Sstevel@tonic-gate #ifdef DEBUG
527c478bd9Sstevel@tonic-gate #define	MIIDEBUG
537c478bd9Sstevel@tonic-gate int miidebug = 0;
547c478bd9Sstevel@tonic-gate #define	MIITRACE 1
557c478bd9Sstevel@tonic-gate #define	MIIDUMP 2
567c478bd9Sstevel@tonic-gate #define	MIIPROBE 4
577c478bd9Sstevel@tonic-gate #define	MIICOMPAT 8
587c478bd9Sstevel@tonic-gate #endif
597c478bd9Sstevel@tonic-gate 
607c478bd9Sstevel@tonic-gate /* Local functions */
617c478bd9Sstevel@tonic-gate static struct phydata *mii_get_valid_phydata(mii_handle_t mac, int phy);
627c478bd9Sstevel@tonic-gate static void mii_portmon(mii_handle_t mac);
637c478bd9Sstevel@tonic-gate 
647c478bd9Sstevel@tonic-gate /* Vendor specific callback function prototypes */
657c478bd9Sstevel@tonic-gate static void dump_NS83840(mii_handle_t, int);
667c478bd9Sstevel@tonic-gate static void dump_ICS1890(struct mii_info *, int);
677c478bd9Sstevel@tonic-gate static int getspeed_NS83840(mii_handle_t, int, int *, int *);
687c478bd9Sstevel@tonic-gate static int getspeed_82553(mii_handle_t, int, int *, int *);
697c478bd9Sstevel@tonic-gate static int getspeed_ICS1890(mii_handle_t, int, int *, int *);
700f80586bSgd static int getspeed_generic(mii_handle_t, int, int *, int *);
717c478bd9Sstevel@tonic-gate static void postreset_ICS1890(mii_handle_t mac, int phy);
727c478bd9Sstevel@tonic-gate static void postreset_NS83840(mii_handle_t mac, int phy);
737c478bd9Sstevel@tonic-gate 
747c478bd9Sstevel@tonic-gate /*
757c478bd9Sstevel@tonic-gate  * MII Interface functions
767c478bd9Sstevel@tonic-gate  */
777c478bd9Sstevel@tonic-gate 
787c478bd9Sstevel@tonic-gate /*
797c478bd9Sstevel@tonic-gate  * Register an instance of an MII interface user
807c478bd9Sstevel@tonic-gate  */
817c478bd9Sstevel@tonic-gate 
827c478bd9Sstevel@tonic-gate int
mii_create(dev_info_t * dip,mii_writefunc_t writefunc,mii_readfunc_t readfunc,mii_handle_t * macp)837c478bd9Sstevel@tonic-gate mii_create(dev_info_t *dip,		/* Passed to read/write functions */
847c478bd9Sstevel@tonic-gate 	    mii_writefunc_t writefunc, 	/* How to write to a MII register */
857c478bd9Sstevel@tonic-gate 	    mii_readfunc_t readfunc,	/* How to read from a MII regster */
867c478bd9Sstevel@tonic-gate 	    mii_handle_t *macp)
877c478bd9Sstevel@tonic-gate {
887c478bd9Sstevel@tonic-gate 	mii_handle_t mac;
897c478bd9Sstevel@tonic-gate 
907c478bd9Sstevel@tonic-gate 	/*  Allocate space for the mii structure */
917c478bd9Sstevel@tonic-gate 	if ((mac = (mii_handle_t)
927c478bd9Sstevel@tonic-gate 	    kmem_zalloc(sizeof (struct mii_info), KM_NOSLEEP)) == NULL)
937c478bd9Sstevel@tonic-gate 		return (MII_NOMEM);
947c478bd9Sstevel@tonic-gate 
957c478bd9Sstevel@tonic-gate 	mac->mii_write = writefunc;
967c478bd9Sstevel@tonic-gate 	mac->mii_read = readfunc;
977c478bd9Sstevel@tonic-gate 	mac->mii_dip = dip;
987c478bd9Sstevel@tonic-gate 	*macp = mac;
997c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
1007c478bd9Sstevel@tonic-gate }
1017c478bd9Sstevel@tonic-gate 
1027c478bd9Sstevel@tonic-gate /*
1037c478bd9Sstevel@tonic-gate  * Returns true if PHY at address phy is accessible. This should be
1047c478bd9Sstevel@tonic-gate  * considered the only function that takes a PHY address that can be called
1057c478bd9Sstevel@tonic-gate  * before mii_init_phy. There should be at least one bit set in the status
1067c478bd9Sstevel@tonic-gate  * register, and at least one clear
1077c478bd9Sstevel@tonic-gate  */
1087c478bd9Sstevel@tonic-gate int
mii_probe_phy(mii_handle_t mac,int phy)1097c478bd9Sstevel@tonic-gate mii_probe_phy(mii_handle_t mac, int phy)
1107c478bd9Sstevel@tonic-gate {
1117c478bd9Sstevel@tonic-gate 	ushort_t status;
1127c478bd9Sstevel@tonic-gate 	dev_info_t *dip;
1137c478bd9Sstevel@tonic-gate 
1147c478bd9Sstevel@tonic-gate 	if (!mac || phy < 0 || phy > 31)
1157c478bd9Sstevel@tonic-gate 		return (MII_PARAM);
1167c478bd9Sstevel@tonic-gate 
1177c478bd9Sstevel@tonic-gate 	dip = mac->mii_dip;
1187c478bd9Sstevel@tonic-gate 
1197c478bd9Sstevel@tonic-gate 	/* Clear any latched bits by reading twice */
1207c478bd9Sstevel@tonic-gate 	mac->mii_read(dip, phy, MII_STATUS);
1217c478bd9Sstevel@tonic-gate 	status = mac->mii_read(dip, phy, MII_STATUS);
1227c478bd9Sstevel@tonic-gate 
1237c478bd9Sstevel@tonic-gate #ifdef MIIDEBUG
1247c478bd9Sstevel@tonic-gate 	mac->mii_read(dip, phy, MII_CONTROL);
1257c478bd9Sstevel@tonic-gate 	if (miidebug & MIIPROBE)
1267c478bd9Sstevel@tonic-gate 		cmn_err(CE_NOTE, "PHY Probe: Control=%x, Status=%x",
127*bdb9230aSGarrett D'Amore 		    mac->mii_read(dip, phy, MII_CONTROL), status);
1287c478bd9Sstevel@tonic-gate #endif
1297c478bd9Sstevel@tonic-gate 	/*
1307c478bd9Sstevel@tonic-gate 	 * At least one bit in status should be clear (one of the error
1317c478bd9Sstevel@tonic-gate 	 * bits), and there must be at least one bit set for the device
1327c478bd9Sstevel@tonic-gate 	 * capabilities. Unconnected devices tend to show 0xffff, but 0x0000
1337c478bd9Sstevel@tonic-gate 	 * has been seen.
1347c478bd9Sstevel@tonic-gate 	 */
1357c478bd9Sstevel@tonic-gate 
1367c478bd9Sstevel@tonic-gate 	if (status == 0xffff || status == 0x0000)
1377c478bd9Sstevel@tonic-gate 		return (MII_PHYNOTPRESENT);
1387c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
1397c478bd9Sstevel@tonic-gate }
1407c478bd9Sstevel@tonic-gate 
1417c478bd9Sstevel@tonic-gate /*
1427c478bd9Sstevel@tonic-gate  * Initialise PHY, and store info about it in the handle for future
1437c478bd9Sstevel@tonic-gate  * reference when the MAC calls us. PHY Vendor-specific code here isolates
1447c478bd9Sstevel@tonic-gate  * the LAN driver from worrying about different PHY implementations
1457c478bd9Sstevel@tonic-gate  */
1467c478bd9Sstevel@tonic-gate 
1477c478bd9Sstevel@tonic-gate int
mii_init_phy(mii_handle_t mac,int phy)1487c478bd9Sstevel@tonic-gate mii_init_phy(mii_handle_t mac, int phy)
1497c478bd9Sstevel@tonic-gate {
1507c478bd9Sstevel@tonic-gate 	ushort_t status;
1517c478bd9Sstevel@tonic-gate 	void *dip;
1527c478bd9Sstevel@tonic-gate 	struct phydata *phydata;
1537c478bd9Sstevel@tonic-gate 
1547c478bd9Sstevel@tonic-gate 	if ((mac == (mii_handle_t)NULL) || phy < 0 || phy > 31)
1557c478bd9Sstevel@tonic-gate 		return (MII_PARAM);
1567c478bd9Sstevel@tonic-gate 
1577c478bd9Sstevel@tonic-gate 	dip = mac->mii_dip;
1587c478bd9Sstevel@tonic-gate 
1597c478bd9Sstevel@tonic-gate 	/* Create a phydata structure for this new phy */
1607c478bd9Sstevel@tonic-gate 	if (mac->phys[phy])
1617c478bd9Sstevel@tonic-gate 		return (MII_PHYPRESENT);
162a8320b74Smeem 
1637c478bd9Sstevel@tonic-gate 	mac->phys[phy] = phydata = (struct phydata *)
164*bdb9230aSGarrett D'Amore 	    kmem_zalloc(sizeof (struct phydata), KM_NOSLEEP);
1657c478bd9Sstevel@tonic-gate 
1667c478bd9Sstevel@tonic-gate 	if (!phydata)
1677c478bd9Sstevel@tonic-gate 		return (MII_NOMEM);
168a8320b74Smeem 
1697c478bd9Sstevel@tonic-gate 	phydata->id = (ulong_t)mac->mii_read(dip, phy, MII_PHYIDH) << 16;
1707c478bd9Sstevel@tonic-gate 	phydata->id |= (ulong_t)mac->mii_read(dip, phy, MII_PHYIDL);
1717c478bd9Sstevel@tonic-gate 	phydata->state = phy_state_unknown;
1727c478bd9Sstevel@tonic-gate 
1737c478bd9Sstevel@tonic-gate 	/* Override speed and duplex mode from conf-file if present */
1747c478bd9Sstevel@tonic-gate 	phydata->fix_duplex =
1757c478bd9Sstevel@tonic-gate 	    ddi_getprop(DDI_DEV_T_NONE,
1767c478bd9Sstevel@tonic-gate 	    mac->mii_dip, DDI_PROP_DONTPASS, "full-duplex", 0);
1777c478bd9Sstevel@tonic-gate 
1787c478bd9Sstevel@tonic-gate 	phydata->fix_speed =
1797c478bd9Sstevel@tonic-gate 	    ddi_getprop(DDI_DEV_T_NONE,
1807c478bd9Sstevel@tonic-gate 	    mac->mii_dip, DDI_PROP_DONTPASS, "speed", 0);
1817c478bd9Sstevel@tonic-gate 
1827c478bd9Sstevel@tonic-gate 	status = mac->mii_read(dip, phy, MII_STATUS);
1837c478bd9Sstevel@tonic-gate 
1847c478bd9Sstevel@tonic-gate 	/*
1857c478bd9Sstevel@tonic-gate 	 * when explicitly setting speed or duplex, we must
1867c478bd9Sstevel@tonic-gate 	 * disable autonegotiation
1877c478bd9Sstevel@tonic-gate 	 */
1887c478bd9Sstevel@tonic-gate 	if (!(status & MII_STATUS_CANAUTONEG) ||
1897c478bd9Sstevel@tonic-gate 	    phydata->fix_speed || phydata->fix_duplex) {
1907c478bd9Sstevel@tonic-gate 		/*
1917c478bd9Sstevel@tonic-gate 		 * If local side cannot autonegotiate, we can't try to enable
1927c478bd9Sstevel@tonic-gate 		 * full duplex without the user's consent, because we cannot
1937c478bd9Sstevel@tonic-gate 		 * tell without AN if the partner can support it
1947c478bd9Sstevel@tonic-gate 		 */
1957c478bd9Sstevel@tonic-gate 		if ((status & (MII_STATUS_100_BASEX | MII_STATUS_100_BASEX_FD |
1967c478bd9Sstevel@tonic-gate 		    MII_STATUS_100_BASE_T4)) && phydata->fix_speed == 0) {
1977c478bd9Sstevel@tonic-gate 			phydata->fix_speed = 100;
1987c478bd9Sstevel@tonic-gate 		} else if ((status & (MII_STATUS_10 | MII_STATUS_10_FD)) &&
1997c478bd9Sstevel@tonic-gate 		    phydata->fix_speed == 0) {
2007c478bd9Sstevel@tonic-gate 			phydata->fix_speed = 10;
2017c478bd9Sstevel@tonic-gate 		} else if (phydata->fix_speed == 0) {
2027c478bd9Sstevel@tonic-gate 			/* A very stupid PHY would not be supported */
2037c478bd9Sstevel@tonic-gate 			kmem_free(mac->phys[phy], sizeof (struct phydata));
2047c478bd9Sstevel@tonic-gate 			mac->phys[phy] = NULL;
2057c478bd9Sstevel@tonic-gate 			return (MII_NOTSUPPORTED);
2067c478bd9Sstevel@tonic-gate 		}
2077c478bd9Sstevel@tonic-gate 		/* mii_sync will sort out the speed selection on the PHY */
2087c478bd9Sstevel@tonic-gate 	} else
2097c478bd9Sstevel@tonic-gate 		phydata->control = MII_CONTROL_ANE;
2107c478bd9Sstevel@tonic-gate 
211*bdb9230aSGarrett D'Amore 	switch (MII_PHY_MFG(phydata->id)) {
2127c478bd9Sstevel@tonic-gate 	case OUI_NATIONAL_SEMICONDUCTOR:
213*bdb9230aSGarrett D'Amore 		switch (MII_PHY_MODEL(phydata->id)) {
2147c478bd9Sstevel@tonic-gate 		case NS_DP83840:
2157c478bd9Sstevel@tonic-gate 			phydata->phy_postreset = postreset_NS83840;
2167c478bd9Sstevel@tonic-gate 			phydata->phy_dump = dump_NS83840;
2177c478bd9Sstevel@tonic-gate 			phydata->description =
218*bdb9230aSGarrett D'Amore 			    "National Semiconductor DP-83840";
2197c478bd9Sstevel@tonic-gate 			phydata->phy_getspeed = getspeed_NS83840;
2207c478bd9Sstevel@tonic-gate 			break;
2217c478bd9Sstevel@tonic-gate 		default:
2227c478bd9Sstevel@tonic-gate 			phydata->description = "Unknown NS";
2237c478bd9Sstevel@tonic-gate 			break;
2247c478bd9Sstevel@tonic-gate 		}
2257c478bd9Sstevel@tonic-gate 		break;
2267c478bd9Sstevel@tonic-gate 
2277c478bd9Sstevel@tonic-gate 	case OUI_INTEL:
228*bdb9230aSGarrett D'Amore 		switch (MII_PHY_MODEL(phydata->id)) {
2297c478bd9Sstevel@tonic-gate 		case INTEL_82553_CSTEP:
2307c478bd9Sstevel@tonic-gate 			phydata->description = "Intel 82553 C-step";
2317c478bd9Sstevel@tonic-gate 			phydata->phy_getspeed = getspeed_82553;
2327c478bd9Sstevel@tonic-gate 			break;
2337c478bd9Sstevel@tonic-gate 		case INTEL_82555:
2347c478bd9Sstevel@tonic-gate 			phydata->description = "Intel 82555";
2357c478bd9Sstevel@tonic-gate 			phydata->phy_getspeed = getspeed_82553;
2367c478bd9Sstevel@tonic-gate 			break;
2377c478bd9Sstevel@tonic-gate 		case INTEL_82562_EH:
2387c478bd9Sstevel@tonic-gate 			phydata->description = "Intel 82562 EH";
2397c478bd9Sstevel@tonic-gate 			phydata->phy_getspeed = getspeed_82553;
2407c478bd9Sstevel@tonic-gate 			break;
2417c478bd9Sstevel@tonic-gate 		case INTEL_82562_ET:
2427c478bd9Sstevel@tonic-gate 			phydata->description = "Intel 82562 ET";
2437c478bd9Sstevel@tonic-gate 			phydata->phy_getspeed = getspeed_82553;
2447c478bd9Sstevel@tonic-gate 			break;
2450f80586bSgd 		case INTEL_82562_EM:
2460f80586bSgd 			phydata->description = "Intel 82562 EM";
2470f80586bSgd 			phydata->phy_getspeed = getspeed_82553;
2480f80586bSgd 			break;
2497c478bd9Sstevel@tonic-gate 		default:
2507c478bd9Sstevel@tonic-gate 			phydata->description = "Unknown INTEL";
2517c478bd9Sstevel@tonic-gate 			break;
2527c478bd9Sstevel@tonic-gate 		}
2537c478bd9Sstevel@tonic-gate 		break;
2547c478bd9Sstevel@tonic-gate 
2557c478bd9Sstevel@tonic-gate 	case OUI_ICS:
256*bdb9230aSGarrett D'Amore 		switch (MII_PHY_MODEL(phydata->id)) {
2577c478bd9Sstevel@tonic-gate 		case ICS_1890:
2587c478bd9Sstevel@tonic-gate 		case ICS_1889:
2597c478bd9Sstevel@tonic-gate 			phydata->phy_postreset = postreset_ICS1890;
2607c478bd9Sstevel@tonic-gate 			phydata->description = "ICS 1890/1889 PHY";
2617c478bd9Sstevel@tonic-gate 			phydata->phy_getspeed = getspeed_ICS1890;
2627c478bd9Sstevel@tonic-gate 			phydata->phy_dump = dump_ICS1890;
2637c478bd9Sstevel@tonic-gate 			break;
2647c478bd9Sstevel@tonic-gate 		default:
2657c478bd9Sstevel@tonic-gate 			phydata->description = "ICS Unknown PHY";
2667c478bd9Sstevel@tonic-gate 			break;
2677c478bd9Sstevel@tonic-gate 		}
2687c478bd9Sstevel@tonic-gate 		break;
2697c478bd9Sstevel@tonic-gate 
2707c478bd9Sstevel@tonic-gate 	default: /* Non-standard PHYs, that encode weird IDs */
2717c478bd9Sstevel@tonic-gate 		phydata->description = "Unknown PHY";
2727c478bd9Sstevel@tonic-gate 		phydata->phy_dump = NULL;
2730f80586bSgd 		phydata->phy_getspeed = getspeed_generic;
2747c478bd9Sstevel@tonic-gate 		break;
2757c478bd9Sstevel@tonic-gate 	}
2767c478bd9Sstevel@tonic-gate 
2777c478bd9Sstevel@tonic-gate 	/* Do all post-reset hacks and user settings */
2787c478bd9Sstevel@tonic-gate 	(void) mii_sync(mac, phy);
2797c478bd9Sstevel@tonic-gate 
2807c478bd9Sstevel@tonic-gate 	if (ddi_getprop(DDI_DEV_T_NONE, mac->mii_dip, DDI_PROP_DONTPASS,
2817c478bd9Sstevel@tonic-gate 	    "dump-phy", 0))
2827c478bd9Sstevel@tonic-gate 		(void) mii_dump_phy(mac, phy);
2837c478bd9Sstevel@tonic-gate 
2847c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
2857c478bd9Sstevel@tonic-gate }
2867c478bd9Sstevel@tonic-gate 
2877c478bd9Sstevel@tonic-gate /*
2887c478bd9Sstevel@tonic-gate  * Cause a reset on a PHY
2897c478bd9Sstevel@tonic-gate  */
2907c478bd9Sstevel@tonic-gate 
2917c478bd9Sstevel@tonic-gate int
mii_reset_phy(mii_handle_t mac,int phy,enum mii_wait_type wait)2927c478bd9Sstevel@tonic-gate mii_reset_phy(mii_handle_t mac, int phy, enum mii_wait_type wait)
2937c478bd9Sstevel@tonic-gate {
2947c478bd9Sstevel@tonic-gate 	int i;
2957c478bd9Sstevel@tonic-gate 	struct phydata *phyd;
2967c478bd9Sstevel@tonic-gate 	ushort_t control;
2977c478bd9Sstevel@tonic-gate 	if (!(phyd = mii_get_valid_phydata(mac, phy)))
2987c478bd9Sstevel@tonic-gate 		return (MII_PARAM);
2997c478bd9Sstevel@tonic-gate 
3007c478bd9Sstevel@tonic-gate 	/* Strobe the reset bit in the control register */
3017c478bd9Sstevel@tonic-gate 	mac->mii_write(mac->mii_dip, phy, MII_CONTROL,
302*bdb9230aSGarrett D'Amore 	    phyd->control | MII_CONTROL_RESET);
3037c478bd9Sstevel@tonic-gate 
3047c478bd9Sstevel@tonic-gate 	phyd->state = phy_state_unknown;
3057c478bd9Sstevel@tonic-gate 
3067c478bd9Sstevel@tonic-gate 	/*
3077c478bd9Sstevel@tonic-gate 	 * This is likely to be very fast (ie, by the time we read the
3087c478bd9Sstevel@tonic-gate 	 * control register once, the devices we have seen can have already
3097c478bd9Sstevel@tonic-gate 	 * reset), but according to 802.3u 22.2.4.1.1, it could be up to .5 sec.
3107c478bd9Sstevel@tonic-gate 	 */
3117c478bd9Sstevel@tonic-gate 	if (wait == mii_wait_interrupt || wait == mii_wait_user) {
3127c478bd9Sstevel@tonic-gate 		for (i = 100; i--; ) {
3137c478bd9Sstevel@tonic-gate 			control = mac->mii_read(mac->mii_dip, phy, MII_CONTROL);
3147c478bd9Sstevel@tonic-gate 			if (!(control & MII_CONTROL_RESET))
3157c478bd9Sstevel@tonic-gate 				break;
3167c478bd9Sstevel@tonic-gate 			drv_usecwait(10);
3177c478bd9Sstevel@tonic-gate 		}
3187c478bd9Sstevel@tonic-gate 		if (i)
3197c478bd9Sstevel@tonic-gate 			goto reset_completed;
3207c478bd9Sstevel@tonic-gate 	}
3217c478bd9Sstevel@tonic-gate 
3227c478bd9Sstevel@tonic-gate 	if (wait == mii_wait_user) {
3237c478bd9Sstevel@tonic-gate 		for (i = 50; i--; ) {
3247c478bd9Sstevel@tonic-gate 			control = mac->mii_read(mac->mii_dip, phy, MII_CONTROL);
3257c478bd9Sstevel@tonic-gate 			if (!(control & MII_CONTROL_RESET))
3267c478bd9Sstevel@tonic-gate 				break;
3277c478bd9Sstevel@tonic-gate 			delay(drv_usectohz(10000));
3287c478bd9Sstevel@tonic-gate 		}
3297c478bd9Sstevel@tonic-gate 		if (i)
3307c478bd9Sstevel@tonic-gate 			goto reset_completed;
3317c478bd9Sstevel@tonic-gate 		return (MII_HARDFAIL);	/* It MUST reset within this time */
3327c478bd9Sstevel@tonic-gate 
3337c478bd9Sstevel@tonic-gate 	}
3347c478bd9Sstevel@tonic-gate 	return (MII_TIMEOUT);
3357c478bd9Sstevel@tonic-gate 
3367c478bd9Sstevel@tonic-gate reset_completed:
3377c478bd9Sstevel@tonic-gate 	(void) mii_sync(mac, phy);
3387c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
3397c478bd9Sstevel@tonic-gate }
3407c478bd9Sstevel@tonic-gate 
3417c478bd9Sstevel@tonic-gate /*
3427c478bd9Sstevel@tonic-gate  * This routine is called to synchronise the software and the PHY. It should
3437c478bd9Sstevel@tonic-gate  * be called after the PHY is reset, and after initialising the PHY. This
3447c478bd9Sstevel@tonic-gate  * routine is external because devices (DNET) can reset the PHY in ways beyond
3457c478bd9Sstevel@tonic-gate  * the control of the mii interface. Should this happen, the driver is
3467c478bd9Sstevel@tonic-gate  * required to call mii_sync().
3477c478bd9Sstevel@tonic-gate  * If the PHY is resetting still when this is called, it will do nothing,
3487c478bd9Sstevel@tonic-gate  * but, it will be retriggered when the portmon timer expires.
3497c478bd9Sstevel@tonic-gate  */
3507c478bd9Sstevel@tonic-gate 
3517c478bd9Sstevel@tonic-gate int
mii_sync(mii_handle_t mac,int phy)3527c478bd9Sstevel@tonic-gate mii_sync(mii_handle_t mac, int phy)
3537c478bd9Sstevel@tonic-gate {
3547c478bd9Sstevel@tonic-gate 	struct phydata *phyd = mac->phys[phy];
3557c478bd9Sstevel@tonic-gate 	int len, i, numprop;
3567c478bd9Sstevel@tonic-gate 	struct regprop {
3577c478bd9Sstevel@tonic-gate 		int reg;
3587c478bd9Sstevel@tonic-gate 		int value;
3597c478bd9Sstevel@tonic-gate 	} *regprop;
3607c478bd9Sstevel@tonic-gate 
3617c478bd9Sstevel@tonic-gate #ifdef MIIDEBUG
3627c478bd9Sstevel@tonic-gate 	if (miidebug & MIITRACE)
3637c478bd9Sstevel@tonic-gate 		cmn_err(CE_NOTE, "mii_sync (phy addr %d)", phy);
3647c478bd9Sstevel@tonic-gate #endif
3657c478bd9Sstevel@tonic-gate 
3667c478bd9Sstevel@tonic-gate 	len = 0;
3677c478bd9Sstevel@tonic-gate 	/*
3687c478bd9Sstevel@tonic-gate 	 * Conf file can specify a sequence of values to write to
3697c478bd9Sstevel@tonic-gate 	 * the PHY registers if required
3707c478bd9Sstevel@tonic-gate 	 */
3717c478bd9Sstevel@tonic-gate 	if (ddi_getlongprop(DDI_DEV_T_ANY, mac->mii_dip,
3727c478bd9Sstevel@tonic-gate 	    DDI_PROP_DONTPASS, "phy-registers", (caddr_t)&regprop,
3737c478bd9Sstevel@tonic-gate 	    &len) == DDI_PROP_SUCCESS) {
3747c478bd9Sstevel@tonic-gate 		numprop = len / sizeof (struct regprop);
3757c478bd9Sstevel@tonic-gate 		for (i = 0; i < numprop; i++) {
3767c478bd9Sstevel@tonic-gate 			mac->mii_write(mac->mii_dip, phy,
3777c478bd9Sstevel@tonic-gate 			    regprop[i].reg, regprop[i].value);
3787c478bd9Sstevel@tonic-gate #ifdef MIIDEBUG
3797c478bd9Sstevel@tonic-gate 			if (miidebug & MIITRACE)
3807c478bd9Sstevel@tonic-gate 				cmn_err(CE_NOTE, "PHY Write reg %d=%x",
3817c478bd9Sstevel@tonic-gate 				    regprop[i].reg, regprop[i].value);
3827c478bd9Sstevel@tonic-gate #endif
3837c478bd9Sstevel@tonic-gate 		}
3847c478bd9Sstevel@tonic-gate 		kmem_free(regprop, len);
3857c478bd9Sstevel@tonic-gate 	} else {
3867c478bd9Sstevel@tonic-gate 		mac->mii_write(mac->mii_dip, phy, MII_CONTROL, phyd->control);
3877c478bd9Sstevel@tonic-gate 		if (phyd->phy_postreset)
3887c478bd9Sstevel@tonic-gate 			phyd->phy_postreset(mac, phy);
3897c478bd9Sstevel@tonic-gate 		if (phyd->fix_speed || phyd->fix_duplex) {
3907c478bd9Sstevel@tonic-gate 			/* XXX function return value ignored */
3917c478bd9Sstevel@tonic-gate 			(void) mii_fixspeed(mac, phy, phyd->fix_speed,
3927c478bd9Sstevel@tonic-gate 			    phyd->fix_duplex);
3937c478bd9Sstevel@tonic-gate 		}
3947c478bd9Sstevel@tonic-gate 	}
3957c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
3967c478bd9Sstevel@tonic-gate }
3977c478bd9Sstevel@tonic-gate 
3987c478bd9Sstevel@tonic-gate /*
3997c478bd9Sstevel@tonic-gate  * Disable full-duplex negotiation on the PHY. This is useful if the
4007c478bd9Sstevel@tonic-gate  * driver or link-partner is advertising full duplex, but does not support
4017c478bd9Sstevel@tonic-gate  * it properly (as some previous solaris drivers didn't)
4027c478bd9Sstevel@tonic-gate  */
4037c478bd9Sstevel@tonic-gate 
4047c478bd9Sstevel@tonic-gate int
mii_disable_fullduplex(mii_handle_t mac,int phy)4057c478bd9Sstevel@tonic-gate mii_disable_fullduplex(mii_handle_t mac, int phy)
4067c478bd9Sstevel@tonic-gate {
4077c478bd9Sstevel@tonic-gate 	void *dip = mac->mii_dip;
4087c478bd9Sstevel@tonic-gate 	ushort_t expansion,  miiadvert;
4097c478bd9Sstevel@tonic-gate 	/* dont advertise full duplex capabilites */
4107c478bd9Sstevel@tonic-gate 	const int fullduplex = MII_ABILITY_10BASE_T_FD
411*bdb9230aSGarrett D'Amore 	    | MII_ABILITY_100BASE_TX_FD;
4127c478bd9Sstevel@tonic-gate 
4137c478bd9Sstevel@tonic-gate 	if (!(mac->mii_read(dip, phy, MII_STATUS) & MII_STATUS_CANAUTONEG)) {
4147c478bd9Sstevel@tonic-gate 		/*
4157c478bd9Sstevel@tonic-gate 		 * Local side cannot autonegotiate, so full duplex should
4167c478bd9Sstevel@tonic-gate 		 * never be negotiated. Consider it as a success
4177c478bd9Sstevel@tonic-gate 		 */
4187c478bd9Sstevel@tonic-gate 		return (MII_SUCCESS);
4197c478bd9Sstevel@tonic-gate 	}
4207c478bd9Sstevel@tonic-gate 
4217c478bd9Sstevel@tonic-gate 	/* Change what we advertise if it includes full duplex */
4227c478bd9Sstevel@tonic-gate 
4237c478bd9Sstevel@tonic-gate 	miiadvert = mac->mii_read(dip, phy, MII_AN_ADVERT);
4247c478bd9Sstevel@tonic-gate 	if (miiadvert & fullduplex)
4257c478bd9Sstevel@tonic-gate 		mac->mii_write(dip, phy, MII_AN_ADVERT,
426*bdb9230aSGarrett D'Amore 		    miiadvert & ~fullduplex);
4277c478bd9Sstevel@tonic-gate 
4287c478bd9Sstevel@tonic-gate 	/* See what other end is able to do.  */
4297c478bd9Sstevel@tonic-gate 
4307c478bd9Sstevel@tonic-gate 	expansion = mac->mii_read(dip, phy, MII_AN_EXPANSION);
4317c478bd9Sstevel@tonic-gate 
4327c478bd9Sstevel@tonic-gate 	/*
4337c478bd9Sstevel@tonic-gate 	 * Renegotiate if the link partner supports autonegotiation
4347c478bd9Sstevel@tonic-gate 	 * If it doesn't, we will never have auto-negotiated full duplex
4357c478bd9Sstevel@tonic-gate 	 * anyway
4367c478bd9Sstevel@tonic-gate 	 */
4377c478bd9Sstevel@tonic-gate 
4387c478bd9Sstevel@tonic-gate 	if (expansion & MII_AN_EXP_LPCANAN)
4397c478bd9Sstevel@tonic-gate 		return (mii_rsan(mac, phy, mii_wait_none));
4407c478bd9Sstevel@tonic-gate 	else
4417c478bd9Sstevel@tonic-gate 		return (MII_SUCCESS);
4427c478bd9Sstevel@tonic-gate }
4437c478bd9Sstevel@tonic-gate 
4447c478bd9Sstevel@tonic-gate /*
4457c478bd9Sstevel@tonic-gate  * (re)enable autonegotiation on a PHY.
4467c478bd9Sstevel@tonic-gate  */
4477c478bd9Sstevel@tonic-gate 
4487c478bd9Sstevel@tonic-gate int
mii_autoneg_enab(mii_handle_t mac,int phy)4497c478bd9Sstevel@tonic-gate mii_autoneg_enab(mii_handle_t mac, int phy)
4507c478bd9Sstevel@tonic-gate {
4517c478bd9Sstevel@tonic-gate 	struct phydata *phyd;
4527c478bd9Sstevel@tonic-gate 	if (!(phyd = mii_get_valid_phydata(mac, phy)))
4537c478bd9Sstevel@tonic-gate 		return (MII_PARAM);
4547c478bd9Sstevel@tonic-gate 	phyd->control |= MII_CONTROL_ANE;
4557c478bd9Sstevel@tonic-gate 	mac->mii_write(mac->mii_dip, phy, MII_CONTROL, phyd->control);
4567c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
4577c478bd9Sstevel@tonic-gate }
4587c478bd9Sstevel@tonic-gate 
4597c478bd9Sstevel@tonic-gate /*
4607c478bd9Sstevel@tonic-gate  * Check the link status of a PHY connection
4617c478bd9Sstevel@tonic-gate  */
4627c478bd9Sstevel@tonic-gate int
mii_linkup(mii_handle_t mac,int phy)4637c478bd9Sstevel@tonic-gate mii_linkup(mii_handle_t mac, int phy)
4647c478bd9Sstevel@tonic-gate {
4657c478bd9Sstevel@tonic-gate 	ushort_t status;
4667c478bd9Sstevel@tonic-gate 
4677c478bd9Sstevel@tonic-gate 	/*
4687c478bd9Sstevel@tonic-gate 	 * Link status latches, so we need to read it twice, to make sure we
4697c478bd9Sstevel@tonic-gate 	 * get its current status
4707c478bd9Sstevel@tonic-gate 	 */
4717c478bd9Sstevel@tonic-gate 	mac->mii_read(mac->mii_dip, phy, MII_STATUS);
4727c478bd9Sstevel@tonic-gate 	status = mac->mii_read(mac->mii_dip, phy, MII_STATUS);
4737c478bd9Sstevel@tonic-gate 
4747c478bd9Sstevel@tonic-gate 	if (status != 0xffff && (status & MII_STATUS_LINKUP))
4757c478bd9Sstevel@tonic-gate 		return (1);
4767c478bd9Sstevel@tonic-gate 	else
4777c478bd9Sstevel@tonic-gate 		return (0);
4787c478bd9Sstevel@tonic-gate }
4797c478bd9Sstevel@tonic-gate 
4807c478bd9Sstevel@tonic-gate /*
4817c478bd9Sstevel@tonic-gate  * Discover what speed the PHY is running at, irrespective of wheather it
4827c478bd9Sstevel@tonic-gate  * autonegotiated this, or was fixed at that rate.
4837c478bd9Sstevel@tonic-gate  */
4847c478bd9Sstevel@tonic-gate 
4857c478bd9Sstevel@tonic-gate int
mii_getspeed(mii_handle_t mac,int phy,int * speed,int * fulld)4867c478bd9Sstevel@tonic-gate mii_getspeed(mii_handle_t mac, int phy, int *speed, int *fulld)
4877c478bd9Sstevel@tonic-gate {
4887c478bd9Sstevel@tonic-gate 	struct phydata *phyd;
4897c478bd9Sstevel@tonic-gate 
4907c478bd9Sstevel@tonic-gate 	if (!(phyd = mii_get_valid_phydata(mac, phy)))
4917c478bd9Sstevel@tonic-gate 		return (MII_PARAM);
4927c478bd9Sstevel@tonic-gate 	if (!(phyd->control & MII_CONTROL_ANE)) {
4937c478bd9Sstevel@tonic-gate 		/*
4947c478bd9Sstevel@tonic-gate 		 * user has requested fixed speed operation, return what we
4957c478bd9Sstevel@tonic-gate 		 * wrote to the control registerfrom control register
4967c478bd9Sstevel@tonic-gate 		 */
4977c478bd9Sstevel@tonic-gate 
4987c478bd9Sstevel@tonic-gate 		*speed = phyd->control & MII_CONTROL_100MB ? 100:10;
4997c478bd9Sstevel@tonic-gate 		*fulld = phyd->control & MII_CONTROL_FDUPLEX ? 1:0;
5007c478bd9Sstevel@tonic-gate 		return (MII_SUCCESS);
5017c478bd9Sstevel@tonic-gate 	}
5027c478bd9Sstevel@tonic-gate 
5037c478bd9Sstevel@tonic-gate 	if (!phyd->phy_getspeed) /* No standard way to do this(!) */
5047c478bd9Sstevel@tonic-gate 		return (MII_NOTSUPPORTED);
5057c478bd9Sstevel@tonic-gate 
5067c478bd9Sstevel@tonic-gate 	return (phyd->phy_getspeed(mac, phy, speed, fulld));
5077c478bd9Sstevel@tonic-gate }
5087c478bd9Sstevel@tonic-gate 
5097c478bd9Sstevel@tonic-gate /*
5107c478bd9Sstevel@tonic-gate  * Fix the speed and duplex mode of a PHY
5117c478bd9Sstevel@tonic-gate  */
5127c478bd9Sstevel@tonic-gate 
5137c478bd9Sstevel@tonic-gate int
mii_fixspeed(mii_handle_t mac,int phy,int speed,int fullduplex)5147c478bd9Sstevel@tonic-gate mii_fixspeed(mii_handle_t mac, int phy, int speed, int fullduplex)
5157c478bd9Sstevel@tonic-gate {
5167c478bd9Sstevel@tonic-gate 	struct phydata *phyd;
5177c478bd9Sstevel@tonic-gate 
5187c478bd9Sstevel@tonic-gate #ifdef MIIDEBUG
5197c478bd9Sstevel@tonic-gate 	cmn_err(CE_CONT, "!%s: setting speed to %d, %s duplex",
520*bdb9230aSGarrett D'Amore 	    ddi_get_name(mac->mii_dip), speed,
521*bdb9230aSGarrett D'Amore 	    fullduplex ? "full" : "half");
5227c478bd9Sstevel@tonic-gate #endif
5237c478bd9Sstevel@tonic-gate 
5247c478bd9Sstevel@tonic-gate 	if (!(phyd = mii_get_valid_phydata(mac, phy)))
5257c478bd9Sstevel@tonic-gate 		return (MII_PARAM);
5267c478bd9Sstevel@tonic-gate 	phyd->control &= ~MII_CONTROL_ANE;
5277c478bd9Sstevel@tonic-gate 
5287c478bd9Sstevel@tonic-gate 	if (speed == 100)
5297c478bd9Sstevel@tonic-gate 		phyd->control |= MII_CONTROL_100MB;
5307c478bd9Sstevel@tonic-gate 	else if (speed == 10)
5317c478bd9Sstevel@tonic-gate 		phyd->control &= ~MII_CONTROL_100MB;
5327c478bd9Sstevel@tonic-gate 	else
5337c478bd9Sstevel@tonic-gate 		cmn_err(CE_NOTE, "%s: mii does not support %d Mb/s speed",
534*bdb9230aSGarrett D'Amore 		    ddi_get_name(mac->mii_dip), speed);
5357c478bd9Sstevel@tonic-gate 
5367c478bd9Sstevel@tonic-gate 	if (fullduplex)
5377c478bd9Sstevel@tonic-gate 		phyd->control |= MII_CONTROL_FDUPLEX;
5387c478bd9Sstevel@tonic-gate 	else
5397c478bd9Sstevel@tonic-gate 		phyd->control &= ~MII_CONTROL_FDUPLEX;
5407c478bd9Sstevel@tonic-gate 
5417c478bd9Sstevel@tonic-gate 	mac->mii_write(mac->mii_dip, phy, MII_CONTROL, phyd->control);
5427c478bd9Sstevel@tonic-gate 	phyd->fix_speed = speed;
5437c478bd9Sstevel@tonic-gate 	phyd->fix_duplex = fullduplex;
5447c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
5457c478bd9Sstevel@tonic-gate }
5467c478bd9Sstevel@tonic-gate /*
5477c478bd9Sstevel@tonic-gate  * Electrically isolate/unisolate the PHY
5487c478bd9Sstevel@tonic-gate  */
5497c478bd9Sstevel@tonic-gate 
5507c478bd9Sstevel@tonic-gate int
mii_isolate(mii_handle_t mac,int phy)5517c478bd9Sstevel@tonic-gate mii_isolate(mii_handle_t mac, int phy)
5527c478bd9Sstevel@tonic-gate {
5537c478bd9Sstevel@tonic-gate 	struct phydata *phyd;
5547c478bd9Sstevel@tonic-gate 
5557c478bd9Sstevel@tonic-gate 	if (!(phyd = mii_get_valid_phydata(mac, phy)))
5567c478bd9Sstevel@tonic-gate 		return (MII_PARAM);
5577c478bd9Sstevel@tonic-gate 
5587c478bd9Sstevel@tonic-gate 	phyd->control |= MII_CONTROL_ISOLATE;
5597c478bd9Sstevel@tonic-gate 	mac->mii_write(mac->mii_dip, phy, MII_CONTROL, phyd->control);
5607c478bd9Sstevel@tonic-gate 
5617c478bd9Sstevel@tonic-gate 	/* Wait for device to settle */
5627c478bd9Sstevel@tonic-gate 	drv_usecwait(50);
5637c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
5647c478bd9Sstevel@tonic-gate }
5657c478bd9Sstevel@tonic-gate 
5667c478bd9Sstevel@tonic-gate int
mii_unisolate(mii_handle_t mac,int phy)5677c478bd9Sstevel@tonic-gate mii_unisolate(mii_handle_t mac, int phy)
5687c478bd9Sstevel@tonic-gate {
5697c478bd9Sstevel@tonic-gate 	struct phydata *phyd;
5707c478bd9Sstevel@tonic-gate 
5717c478bd9Sstevel@tonic-gate 	if (!(phyd = mii_get_valid_phydata(mac, phy)))
5727c478bd9Sstevel@tonic-gate 		return (MII_PARAM);
5737c478bd9Sstevel@tonic-gate 
5747c478bd9Sstevel@tonic-gate 	phyd->control &= ~MII_CONTROL_ISOLATE;
5757c478bd9Sstevel@tonic-gate 	mac->mii_write(mac->mii_dip, phy, MII_CONTROL, phyd->control);
5767c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
5777c478bd9Sstevel@tonic-gate }
5787c478bd9Sstevel@tonic-gate 
5797c478bd9Sstevel@tonic-gate /*
5807c478bd9Sstevel@tonic-gate  * Restart autonegotiation on a PHY
5817c478bd9Sstevel@tonic-gate  */
5827c478bd9Sstevel@tonic-gate 
5837c478bd9Sstevel@tonic-gate int
mii_rsan(mii_handle_t mac,int phy,enum mii_wait_type wait)5847c478bd9Sstevel@tonic-gate mii_rsan(mii_handle_t mac, int phy, enum mii_wait_type wait)
5857c478bd9Sstevel@tonic-gate {
5867c478bd9Sstevel@tonic-gate 	int i;
5877c478bd9Sstevel@tonic-gate 	void *dip;
5887c478bd9Sstevel@tonic-gate 	struct phydata *phyd;
5897c478bd9Sstevel@tonic-gate 
5907c478bd9Sstevel@tonic-gate 	if (wait == mii_wait_interrupt ||
5917c478bd9Sstevel@tonic-gate 	    !(phyd = mii_get_valid_phydata(mac, phy)))
5927c478bd9Sstevel@tonic-gate 		return (MII_PARAM);
5937c478bd9Sstevel@tonic-gate 
5947c478bd9Sstevel@tonic-gate 	if (phyd->fix_speed)
5957c478bd9Sstevel@tonic-gate 		return (MII_STATE);
5967c478bd9Sstevel@tonic-gate 
5977c478bd9Sstevel@tonic-gate 	dip = mac->mii_dip;
5987c478bd9Sstevel@tonic-gate 
5997c478bd9Sstevel@tonic-gate 	phyd->control |= MII_CONTROL_ANE;
6007c478bd9Sstevel@tonic-gate 	mac->mii_write(dip, phy, MII_CONTROL, phyd->control|MII_CONTROL_RSAN);
6017c478bd9Sstevel@tonic-gate 
6027c478bd9Sstevel@tonic-gate 	/*
6037c478bd9Sstevel@tonic-gate 	 * This can take ages (a second or so). It makes more sense to use
6047c478bd9Sstevel@tonic-gate 	 * the port monitor rather than waiting for completion of this on the
6057c478bd9Sstevel@tonic-gate 	 * PHY. It is pointless doing a busy wait here
6067c478bd9Sstevel@tonic-gate 	 */
6077c478bd9Sstevel@tonic-gate 
6087c478bd9Sstevel@tonic-gate 	if (wait == mii_wait_user) {
6097c478bd9Sstevel@tonic-gate 		for (i = 200; i--; ) {
6107c478bd9Sstevel@tonic-gate 			delay(drv_usectohz(10000));
6117c478bd9Sstevel@tonic-gate 			if (mac->mii_read(dip, phy, MII_STATUS) &
6127c478bd9Sstevel@tonic-gate 			    MII_STATUS_ANDONE)
6137c478bd9Sstevel@tonic-gate 				return (MII_SUCCESS);
6147c478bd9Sstevel@tonic-gate 		}
6157c478bd9Sstevel@tonic-gate 		cmn_err(CE_NOTE,
6167c478bd9Sstevel@tonic-gate 		    "!%s:Timed out waiting for autonegotiation",
6177c478bd9Sstevel@tonic-gate 		    ddi_get_name(mac->mii_dip));
6187c478bd9Sstevel@tonic-gate 		return (MII_TIMEOUT);
6197c478bd9Sstevel@tonic-gate 	}
6207c478bd9Sstevel@tonic-gate 	return (MII_TIMEOUT);
6217c478bd9Sstevel@tonic-gate }
6227c478bd9Sstevel@tonic-gate 
6237c478bd9Sstevel@tonic-gate /*
6247c478bd9Sstevel@tonic-gate  * Debuging function to dump contents of PHY registers
6257c478bd9Sstevel@tonic-gate  */
6267c478bd9Sstevel@tonic-gate int
mii_dump_phy(mii_handle_t mac,int phy)6277c478bd9Sstevel@tonic-gate mii_dump_phy(mii_handle_t mac, int phy)
6287c478bd9Sstevel@tonic-gate {
6297c478bd9Sstevel@tonic-gate 	struct phydata *phydat;
6307c478bd9Sstevel@tonic-gate 
6317c478bd9Sstevel@tonic-gate 	char *miiregs[] = {
6327c478bd9Sstevel@tonic-gate 		"Control             ",
6337c478bd9Sstevel@tonic-gate 		"Status              ",
6347c478bd9Sstevel@tonic-gate 		"PHY Id(H)           ",
6357c478bd9Sstevel@tonic-gate 		"PHY Id(L)           ",
6367c478bd9Sstevel@tonic-gate 		"Advertisement       ",
6377c478bd9Sstevel@tonic-gate 		"Link Partner Ability",
6387c478bd9Sstevel@tonic-gate 		"Expansion           ",
6397c478bd9Sstevel@tonic-gate 		"Next Page Transmit  ",
6407c478bd9Sstevel@tonic-gate 		0
6417c478bd9Sstevel@tonic-gate 	};
6427c478bd9Sstevel@tonic-gate 	int i;
6437c478bd9Sstevel@tonic-gate 
6447c478bd9Sstevel@tonic-gate 	if (!(phydat = mii_get_valid_phydata(mac, phy)))
6457c478bd9Sstevel@tonic-gate 		return (MII_PARAM);
6467c478bd9Sstevel@tonic-gate 
6477c478bd9Sstevel@tonic-gate 	cmn_err(CE_NOTE, "%s: PHY %d, type %s", ddi_get_name(mac->mii_dip), phy,
6487c478bd9Sstevel@tonic-gate 	    phydat->description ? phydat->description: "Unknown");
6497c478bd9Sstevel@tonic-gate 
6507c478bd9Sstevel@tonic-gate 	for (i = 0; miiregs[i]; i++)
6517c478bd9Sstevel@tonic-gate 		cmn_err(CE_NOTE, "%s:\t%x",
6527c478bd9Sstevel@tonic-gate 		    miiregs[i], mac->mii_read(mac->mii_dip, phy, i));
6537c478bd9Sstevel@tonic-gate 
6547c478bd9Sstevel@tonic-gate 	if (phydat->phy_dump)
6557c478bd9Sstevel@tonic-gate 		phydat->phy_dump((struct mii_info *)mac, phy);
6567c478bd9Sstevel@tonic-gate 
6577c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
6587c478bd9Sstevel@tonic-gate }
6597c478bd9Sstevel@tonic-gate 
6607c478bd9Sstevel@tonic-gate /*
6617c478bd9Sstevel@tonic-gate  * Start a periodic check to monitor the MII devices attached, and callback
6627c478bd9Sstevel@tonic-gate  * to the MAC driver when the state on a device changes
6637c478bd9Sstevel@tonic-gate  */
6647c478bd9Sstevel@tonic-gate 
6657c478bd9Sstevel@tonic-gate int
mii_start_portmon(mii_handle_t mac,mii_linkfunc_t notify,kmutex_t * lock)6667c478bd9Sstevel@tonic-gate mii_start_portmon(mii_handle_t mac, mii_linkfunc_t notify, kmutex_t *lock)
6677c478bd9Sstevel@tonic-gate {
6687c478bd9Sstevel@tonic-gate 	if (mac->mii_linknotify || mac->portmon_timer)
6697c478bd9Sstevel@tonic-gate 		return (MII_STATE);
6707c478bd9Sstevel@tonic-gate 	mac->mii_linknotify = notify;
6717c478bd9Sstevel@tonic-gate 	/*
6727c478bd9Sstevel@tonic-gate 	 * NOTE: Portmon is normally called through a timeout. In the case
6737c478bd9Sstevel@tonic-gate 	 * of starting off, we assume that the lock is already held
6747c478bd9Sstevel@tonic-gate 	 */
6757c478bd9Sstevel@tonic-gate 	mac->lock = NULL; /* portmon wont try to aquire any lock this time */
6767c478bd9Sstevel@tonic-gate 	mii_portmon(mac);
6777c478bd9Sstevel@tonic-gate 	mac->lock = lock;
6787c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
6797c478bd9Sstevel@tonic-gate }
6807c478bd9Sstevel@tonic-gate 
6817c478bd9Sstevel@tonic-gate int
mii_stop_portmon(mii_handle_t mac)6827c478bd9Sstevel@tonic-gate mii_stop_portmon(mii_handle_t mac)
6837c478bd9Sstevel@tonic-gate {
6847c478bd9Sstevel@tonic-gate 	if (!mac->mii_linknotify || !mac->portmon_timer)
6857c478bd9Sstevel@tonic-gate 		return (MII_STATE);
6867c478bd9Sstevel@tonic-gate 
6877c478bd9Sstevel@tonic-gate 	mac->mii_linknotify = NULL;
6887c478bd9Sstevel@tonic-gate 	mac->lock = NULL;
6897c478bd9Sstevel@tonic-gate 	(void) untimeout(mac->portmon_timer);
6907c478bd9Sstevel@tonic-gate 	mac->portmon_timer = 0;
6917c478bd9Sstevel@tonic-gate 	return (MII_SUCCESS);
6927c478bd9Sstevel@tonic-gate }
6937c478bd9Sstevel@tonic-gate 
6947c478bd9Sstevel@tonic-gate static void
mii_portmon(mii_handle_t mac)6957c478bd9Sstevel@tonic-gate mii_portmon(mii_handle_t mac)
6967c478bd9Sstevel@tonic-gate {
6977c478bd9Sstevel@tonic-gate 	int i;
6987c478bd9Sstevel@tonic-gate 	enum mii_phy_state state;
6997c478bd9Sstevel@tonic-gate 	struct phydata *phydata;
7007c478bd9Sstevel@tonic-gate 
7017c478bd9Sstevel@tonic-gate 	/*
7027c478bd9Sstevel@tonic-gate 	 * There is a potential deadlock between this test and the
7037c478bd9Sstevel@tonic-gate 	 * mutex_enter
7047c478bd9Sstevel@tonic-gate 	 */
7057c478bd9Sstevel@tonic-gate 	if (!mac->mii_linknotify) /* Exiting */
7067c478bd9Sstevel@tonic-gate 		return;
7077c478bd9Sstevel@tonic-gate 
7087c478bd9Sstevel@tonic-gate 	if (mac->lock)
7097c478bd9Sstevel@tonic-gate 		mutex_enter(mac->lock);
7107c478bd9Sstevel@tonic-gate 
7117c478bd9Sstevel@tonic-gate 	/*
7127c478bd9Sstevel@tonic-gate 	 * For each initialised phy, see if the link state has changed, and
7137c478bd9Sstevel@tonic-gate 	 * callback to the mac driver if it has
7147c478bd9Sstevel@tonic-gate 	 */
7157c478bd9Sstevel@tonic-gate 	for (i = 0; i < 32; i++) {
7167c478bd9Sstevel@tonic-gate 		if ((phydata = mac->phys[i]) != 0) {
7177c478bd9Sstevel@tonic-gate 			state = mii_linkup(mac, i) ?
718*bdb9230aSGarrett D'Amore 			    phy_state_linkup : phy_state_linkdown;
7197c478bd9Sstevel@tonic-gate 			if (state != phydata->state) {
7207c478bd9Sstevel@tonic-gate #ifdef MIIDEBUG
7217c478bd9Sstevel@tonic-gate 				if (miidebug)
7227c478bd9Sstevel@tonic-gate 					cmn_err(CE_NOTE, "%s: PHY %d link %s",
7237c478bd9Sstevel@tonic-gate 					    ddi_get_name(mac->mii_dip), i,
7247c478bd9Sstevel@tonic-gate 					    state == phy_state_linkup ?
725*bdb9230aSGarrett D'Amore 					    "up" : "down");
7267c478bd9Sstevel@tonic-gate #endif
7277c478bd9Sstevel@tonic-gate 				phydata->state = state;
7287c478bd9Sstevel@tonic-gate 				mac->mii_linknotify(mac->mii_dip, i, state);
7297c478bd9Sstevel@tonic-gate 			}
7307c478bd9Sstevel@tonic-gate 		}
7317c478bd9Sstevel@tonic-gate 	}
7327c478bd9Sstevel@tonic-gate 	/* Check the ports every 5 seconds */
7337c478bd9Sstevel@tonic-gate 	mac->portmon_timer = timeout((void (*)(void*))mii_portmon, (void *)mac,
734*bdb9230aSGarrett D'Amore 	    (clock_t)(5 * drv_usectohz(1000000)));
7357c478bd9Sstevel@tonic-gate 	if (mac->lock)
7367c478bd9Sstevel@tonic-gate 		mutex_exit(mac->lock);
7377c478bd9Sstevel@tonic-gate }
7387c478bd9Sstevel@tonic-gate 
7397c478bd9Sstevel@tonic-gate /*
7407c478bd9Sstevel@tonic-gate  * Close a handle to the MII interface from a registered user
7417c478bd9Sstevel@tonic-gate  */
7427c478bd9Sstevel@tonic-gate 
7437c478bd9Sstevel@tonic-gate void
mii_destroy(mii_handle_t mac)7447c478bd9Sstevel@tonic-gate mii_destroy(mii_handle_t mac)
7457c478bd9Sstevel@tonic-gate {
7467c478bd9Sstevel@tonic-gate 	/* Free per-PHY information */
7477c478bd9Sstevel@tonic-gate 	int i;
7487c478bd9Sstevel@tonic-gate 
7497c478bd9Sstevel@tonic-gate 	(void) mii_stop_portmon(mac);
7507c478bd9Sstevel@tonic-gate 
7517c478bd9Sstevel@tonic-gate 	for (i = 0; i < 32; i++)
7527c478bd9Sstevel@tonic-gate 		if (mac->phys[i])
7537c478bd9Sstevel@tonic-gate 			kmem_free(mac->phys[i], sizeof (struct phydata));
7547c478bd9Sstevel@tonic-gate 
7557c478bd9Sstevel@tonic-gate 	kmem_free(mac, sizeof (*mac));
7567c478bd9Sstevel@tonic-gate }
7577c478bd9Sstevel@tonic-gate 
7587c478bd9Sstevel@tonic-gate /*
7597c478bd9Sstevel@tonic-gate  * Get a PHY data structure from an MII handle, and validate the common
7607c478bd9Sstevel@tonic-gate  * parameters to the MII functions. Used to verify parameters in most MII
7617c478bd9Sstevel@tonic-gate  * functions
7627c478bd9Sstevel@tonic-gate  */
7637c478bd9Sstevel@tonic-gate static struct phydata *
mii_get_valid_phydata(mii_handle_t mac,int phy)7647c478bd9Sstevel@tonic-gate mii_get_valid_phydata(mii_handle_t mac, int phy)
7657c478bd9Sstevel@tonic-gate {
7667c478bd9Sstevel@tonic-gate 	if (!mac || phy > 31 || phy < 0 || !mac->phys[phy]) {
7677c478bd9Sstevel@tonic-gate 		ASSERT(!"MII: Bad invocation");
7687c478bd9Sstevel@tonic-gate 		return (NULL);
7697c478bd9Sstevel@tonic-gate 	}
7707c478bd9Sstevel@tonic-gate 	return (mac->phys[phy]);
7717c478bd9Sstevel@tonic-gate }
7727c478bd9Sstevel@tonic-gate /*
7737c478bd9Sstevel@tonic-gate  * Device-specific routines - National Semiconductor
7747c478bd9Sstevel@tonic-gate  */
7757c478bd9Sstevel@tonic-gate 
7767c478bd9Sstevel@tonic-gate #define	BIT(bit, value) ((value) & (1<<(bit)))
7777c478bd9Sstevel@tonic-gate static void
dump_NS83840(mii_handle_t mac,int phy)7787c478bd9Sstevel@tonic-gate dump_NS83840(mii_handle_t mac, int phy)
7797c478bd9Sstevel@tonic-gate {
7807c478bd9Sstevel@tonic-gate 	ushort_t reg;
7817c478bd9Sstevel@tonic-gate 	void *dip;
7827c478bd9Sstevel@tonic-gate 
7837c478bd9Sstevel@tonic-gate 	dip = mac->mii_dip;
7847c478bd9Sstevel@tonic-gate 	cmn_err(CE_NOTE, "Disconnect count: %x",
785*bdb9230aSGarrett D'Amore 	    mac->mii_read(dip, phy, 0x12));
7867c478bd9Sstevel@tonic-gate 	cmn_err(CE_NOTE, "False Carrier detect count: %x",
787*bdb9230aSGarrett D'Amore 	    mac->mii_read(dip, phy, 0x13));
7887c478bd9Sstevel@tonic-gate 	cmn_err(CE_NOTE, "Receive error count: %x",
789*bdb9230aSGarrett D'Amore 	    mac->mii_read(dip, phy, 0x15));
7907c478bd9Sstevel@tonic-gate 	cmn_err(CE_NOTE, "Silicon revision: %x",
791*bdb9230aSGarrett D'Amore 	    mac->mii_read(dip, phy, 0x16));
7927c478bd9Sstevel@tonic-gate 	cmn_err(CE_NOTE, "PCS Configuration : %x",
793*bdb9230aSGarrett D'Amore 	    mac->mii_read(dip, phy, 0x17));
7947c478bd9Sstevel@tonic-gate 
7957c478bd9Sstevel@tonic-gate 	cmn_err(CE_NOTE, "Loopback, Bypass and Receiver error mask: %x",
796*bdb9230aSGarrett D'Amore 	    mac->mii_read(dip, phy, 0x18));
7977c478bd9Sstevel@tonic-gate 	cmn_err(CE_NOTE, "Wired phy address: %x",
798*bdb9230aSGarrett D'Amore 	    mac->mii_read(dip, phy, 0x19)&0xf);
7997c478bd9Sstevel@tonic-gate 
8007c478bd9Sstevel@tonic-gate 	reg = mac->mii_read(dip, phy, 0x1b);
8017c478bd9Sstevel@tonic-gate 	cmn_err(CE_NOTE, "10 Base T in %s mode",
802*bdb9230aSGarrett D'Amore 	    BIT(9, reg) ? "serial":"nibble");
8037c478bd9Sstevel@tonic-gate 
8047c478bd9Sstevel@tonic-gate 	cmn_err(CE_NOTE, "%slink pulses, %sheartbeat, %s,%s squelch,jabber %s",
805*bdb9230aSGarrett D'Amore 	    BIT(reg, 5) ? "" : "no ",
806*bdb9230aSGarrett D'Amore 	    BIT(reg, 4) ? "" : "no ",
807*bdb9230aSGarrett D'Amore 	    BIT(reg, 3) ? "UTP" : "STP",
808*bdb9230aSGarrett D'Amore 	    BIT(reg, 2) ? "low" : "normal",
809*bdb9230aSGarrett D'Amore 	    BIT(reg, 0) ? "enabled" : "disabled");
8107c478bd9Sstevel@tonic-gate }
8117c478bd9Sstevel@tonic-gate 
8127c478bd9Sstevel@tonic-gate static int
getspeed_NS83840(mii_handle_t mac,int phy,int * speed,int * fulld)8137c478bd9Sstevel@tonic-gate getspeed_NS83840(mii_handle_t mac, int phy, int *speed, int *fulld)
8147c478bd9Sstevel@tonic-gate {
8157c478bd9Sstevel@tonic-gate 	int exten =  mac->mii_read(mac->mii_dip, phy, MII_AN_EXPANSION);
8167c478bd9Sstevel@tonic-gate 	if (exten & MII_AN_EXP_LPCANAN) {
8177c478bd9Sstevel@tonic-gate 		/*
8187c478bd9Sstevel@tonic-gate 		 * Link partner can auto-neg, take speed from LP Ability
8197c478bd9Sstevel@tonic-gate 		 * register
8207c478bd9Sstevel@tonic-gate 		 */
8217c478bd9Sstevel@tonic-gate 		int lpable, anadv, mask;
8227c478bd9Sstevel@tonic-gate 
8237c478bd9Sstevel@tonic-gate 		lpable = mac->mii_read(mac->mii_dip, phy, MII_AN_LPABLE);
8247c478bd9Sstevel@tonic-gate 		anadv = mac->mii_read(mac->mii_dip, phy, MII_AN_ADVERT);
8257c478bd9Sstevel@tonic-gate 		mask = anadv & lpable;
8267c478bd9Sstevel@tonic-gate 
8277c478bd9Sstevel@tonic-gate 		if (mask & MII_ABILITY_100BASE_TX_FD) {
8287c478bd9Sstevel@tonic-gate 			*speed = 100;
8297c478bd9Sstevel@tonic-gate 			*fulld = 1;
8307c478bd9Sstevel@tonic-gate 		} else if (mask & MII_ABILITY_100BASE_T4) {
8317c478bd9Sstevel@tonic-gate 			*speed = 100;
8327c478bd9Sstevel@tonic-gate 			*fulld = 0;
8337c478bd9Sstevel@tonic-gate 		} else if (mask & MII_ABILITY_100BASE_TX) {
8347c478bd9Sstevel@tonic-gate 			*speed = 100;
8357c478bd9Sstevel@tonic-gate 			*fulld = 0;
8367c478bd9Sstevel@tonic-gate 		} else if (mask & MII_ABILITY_10BASE_T_FD) {
8377c478bd9Sstevel@tonic-gate 			*speed = 10;
8387c478bd9Sstevel@tonic-gate 			*fulld = 1;
8397c478bd9Sstevel@tonic-gate 		} else if (mask & MII_ABILITY_10BASE_T) {
8407c478bd9Sstevel@tonic-gate 			*speed = 10;
8417c478bd9Sstevel@tonic-gate 			*fulld = 0;
8427c478bd9Sstevel@tonic-gate 		}
8437c478bd9Sstevel@tonic-gate 	} else {
8447c478bd9Sstevel@tonic-gate 		int addr = mac->mii_read(mac->mii_dip, phy, MII_83840_ADDR);
8457c478bd9Sstevel@tonic-gate 		*speed = (addr & NS83840_ADDR_SPEED10) ? 10:100;
8467c478bd9Sstevel@tonic-gate 		/* No fullduplex without autonegotiation on link partner */
8477c478bd9Sstevel@tonic-gate 		*fulld = 0;
8487c478bd9Sstevel@tonic-gate 	}
8497c478bd9Sstevel@tonic-gate 	return (0);
8507c478bd9Sstevel@tonic-gate }
8517c478bd9Sstevel@tonic-gate 
8527c478bd9Sstevel@tonic-gate /*
8537c478bd9Sstevel@tonic-gate  * Device-specific routines - INTEL
8547c478bd9Sstevel@tonic-gate  */
8557c478bd9Sstevel@tonic-gate 
8567c478bd9Sstevel@tonic-gate static int
getspeed_82553(mii_handle_t mac,int phy,int * speed,int * fulld)8577c478bd9Sstevel@tonic-gate getspeed_82553(mii_handle_t mac, int phy, int *speed, int *fulld)
8587c478bd9Sstevel@tonic-gate {
8597c478bd9Sstevel@tonic-gate 	int ex0 = mac->mii_read(mac->mii_dip, phy, MII_82553_EX0);
8607c478bd9Sstevel@tonic-gate 	*fulld = (ex0 & I82553_EX0_FDUPLEX) ? 1:0;
8617c478bd9Sstevel@tonic-gate 	*speed = (ex0 & I82553_EX0_100MB) ? 100:10;
8627c478bd9Sstevel@tonic-gate 	return (0);
8637c478bd9Sstevel@tonic-gate }
8647c478bd9Sstevel@tonic-gate 
8657c478bd9Sstevel@tonic-gate /*
8667c478bd9Sstevel@tonic-gate  * Device-specific routines - ICS
8677c478bd9Sstevel@tonic-gate  */
8687c478bd9Sstevel@tonic-gate 
8697c478bd9Sstevel@tonic-gate static int
getspeed_ICS1890(mii_handle_t mac,int phy,int * speed,int * fulld)8707c478bd9Sstevel@tonic-gate getspeed_ICS1890(mii_handle_t mac, int phy, int *speed, int *fulld)
8717c478bd9Sstevel@tonic-gate {
8727c478bd9Sstevel@tonic-gate 	ushort_t quickpoll = mac->mii_read(mac->mii_dip, phy, ICS_QUICKPOLL);
8737c478bd9Sstevel@tonic-gate 	*speed = (quickpoll & ICS_QUICKPOLL_100MB) ? 100 : 10;
8747c478bd9Sstevel@tonic-gate 	*fulld = (quickpoll & ICS_QUICKPOLL_FDUPLEX) ? 1 : 0;
8757c478bd9Sstevel@tonic-gate 	return (0);
8767c478bd9Sstevel@tonic-gate }
8777c478bd9Sstevel@tonic-gate 
8787c478bd9Sstevel@tonic-gate static void
dump_ICS1890(mii_handle_t mac,int phy)8797c478bd9Sstevel@tonic-gate dump_ICS1890(mii_handle_t mac, int phy)
8807c478bd9Sstevel@tonic-gate {
8817c478bd9Sstevel@tonic-gate 	ushort_t quickpoll = mac->mii_read(mac->mii_dip, phy, ICS_QUICKPOLL);
8827c478bd9Sstevel@tonic-gate 	cmn_err(CE_NOTE, "QuickPoll:%x (Speed:%d FullDuplex:%c) ",
883*bdb9230aSGarrett D'Amore 	    quickpoll,
884*bdb9230aSGarrett D'Amore 	    quickpoll & ICS_QUICKPOLL_100MB ? 100:10,
885*bdb9230aSGarrett D'Amore 	    quickpoll & ICS_QUICKPOLL_FDUPLEX ? 'Y' : 'N');
8867c478bd9Sstevel@tonic-gate }
8877c478bd9Sstevel@tonic-gate 
8887c478bd9Sstevel@tonic-gate static void
postreset_NS83840(mii_handle_t mac,int phy)8897c478bd9Sstevel@tonic-gate postreset_NS83840(mii_handle_t mac, int phy)
8907c478bd9Sstevel@tonic-gate {
8917c478bd9Sstevel@tonic-gate 	ushort_t reg;
8927c478bd9Sstevel@tonic-gate 	struct phydata *phyd = mac->phys[phy];
8937c478bd9Sstevel@tonic-gate 	/*
8947c478bd9Sstevel@tonic-gate 	 * As per INTEL "PRO/100B Adapter Software Technical
8957c478bd9Sstevel@tonic-gate 	 * Reference Manual", set bit 10 of MII register 23.
8967c478bd9Sstevel@tonic-gate 	 * National Semiconductor documentation shows this as
8977c478bd9Sstevel@tonic-gate 	 * "reserved, write to as zero". We also set the
8987c478bd9Sstevel@tonic-gate 	 * "f_connect" bit, also as requested by the PRO/100B
8997c478bd9Sstevel@tonic-gate 	 * doc
9007c478bd9Sstevel@tonic-gate 	 */
9017c478bd9Sstevel@tonic-gate 
9027c478bd9Sstevel@tonic-gate 	reg = mac->mii_read(mac->mii_dip, phy, 23) | (1<<10) | (1<<5);
9037c478bd9Sstevel@tonic-gate 	mac->mii_write(mac->mii_dip, phy, 23, reg);
9047c478bd9Sstevel@tonic-gate 
9057c478bd9Sstevel@tonic-gate 	/*
9067c478bd9Sstevel@tonic-gate 	 * Some of thses PHYs seem to reset with the wrong value in the
9077c478bd9Sstevel@tonic-gate 	 * AN advertisment register. It should containt 1e1, indicating that
9087c478bd9Sstevel@tonic-gate 	 * the device can do 802.3 10BASE-T, 10BASE-T Full duplex, 100BASE-TX,
9097c478bd9Sstevel@tonic-gate 	 * and 100 BASE-TX full duplex. Instead it seems to advertise only
9107c478bd9Sstevel@tonic-gate 	 * 100BASE-TX Full duplex. The result of this is that the device will
9117c478bd9Sstevel@tonic-gate 	 * NOT autonegotiate at all against a 10MB only or 100MB/Half duplex
9127c478bd9Sstevel@tonic-gate 	 * autonegotiating hub
9137c478bd9Sstevel@tonic-gate 	 * NEEDSWORK:
9147c478bd9Sstevel@tonic-gate 	 * There is possibly a time-dependancy here.
9157c478bd9Sstevel@tonic-gate 	 * If the autonegotiation has completed BEFORE we get to here
9167c478bd9Sstevel@tonic-gate 	 * (after the reset) then this could possibly have not effect
9177c478bd9Sstevel@tonic-gate 	 */
9187c478bd9Sstevel@tonic-gate 	if (!phyd->fix_speed) {
9197c478bd9Sstevel@tonic-gate #ifdef MIIDEBUG
9207c478bd9Sstevel@tonic-gate 		if (miidebug & MIICOMPAT)
9217c478bd9Sstevel@tonic-gate 			cmn_err(CE_NOTE, "Reset value of AN_ADV reg:%x",
9227c478bd9Sstevel@tonic-gate 			    mac->mii_read(mac->mii_dip, phy, MII_AN_ADVERT));
9237c478bd9Sstevel@tonic-gate #endif
9247c478bd9Sstevel@tonic-gate 		mac->mii_write(mac->mii_dip, phy, MII_AN_ADVERT, 0x1e1);
9257c478bd9Sstevel@tonic-gate 	}
9267c478bd9Sstevel@tonic-gate }
9277c478bd9Sstevel@tonic-gate 
9287c478bd9Sstevel@tonic-gate void
postreset_ICS1890(mii_handle_t mac,int phy)9297c478bd9Sstevel@tonic-gate postreset_ICS1890(mii_handle_t mac, int phy)
9307c478bd9Sstevel@tonic-gate {
9317c478bd9Sstevel@tonic-gate 	/* This device comes up isolated if no link is found */
9327c478bd9Sstevel@tonic-gate 	(void) mii_unisolate(mac, phy);
9337c478bd9Sstevel@tonic-gate }
9340f80586bSgd 
9350f80586bSgd /*
9360f80586bSgd  * generic getspeed routine
9370f80586bSgd  */
9380f80586bSgd static int
getspeed_generic(mii_handle_t mac,int phy,int * speed,int * fulld)9390f80586bSgd getspeed_generic(mii_handle_t mac, int phy, int *speed, int *fulld)
9400f80586bSgd {
9410f80586bSgd 	int exten =  mac->mii_read(mac->mii_dip, phy, MII_AN_EXPANSION);
9420f80586bSgd 	if (exten & MII_AN_EXP_LPCANAN) {
9430f80586bSgd 		/*
9440f80586bSgd 		 * Link partner can auto-neg, take speed from LP Ability
9450f80586bSgd 		 * register
9460f80586bSgd 		 */
9470f80586bSgd 		int lpable, anadv, mask;
9480f80586bSgd 
9490f80586bSgd 		lpable = mac->mii_read(mac->mii_dip, phy, MII_AN_LPABLE);
9500f80586bSgd 		anadv = mac->mii_read(mac->mii_dip, phy, MII_AN_ADVERT);
9510f80586bSgd 		mask = anadv & lpable;
9520f80586bSgd 
9530f80586bSgd 		if (mask & MII_ABILITY_100BASE_TX_FD) {
9540f80586bSgd 			*speed = 100;
9550f80586bSgd 			*fulld = 1;
9560f80586bSgd 		} else if (mask & MII_ABILITY_100BASE_T4) {
9570f80586bSgd 			*speed = 100;
9580f80586bSgd 			*fulld = 0;
9590f80586bSgd 		} else if (mask & MII_ABILITY_100BASE_TX) {
9600f80586bSgd 			*speed = 100;
9610f80586bSgd 			*fulld = 0;
9620f80586bSgd 		} else if (mask & MII_ABILITY_10BASE_T_FD) {
9630f80586bSgd 			*speed = 10;
9640f80586bSgd 			*fulld = 1;
9650f80586bSgd 		} else if (mask & MII_ABILITY_10BASE_T) {
9660f80586bSgd 			*speed = 10;
9670f80586bSgd 			*fulld = 0;
9680f80586bSgd 		}
9690f80586bSgd 	} else {
9700f80586bSgd 		/*
9710f80586bSgd 		 * Link partner cannot auto-neg, it would be nice if we
9720f80586bSgd 		 * could figure out what the device selected.  (NWay?)
9730f80586bSgd 		 */
9740f80586bSgd 		*speed = 0;
9750f80586bSgd 		*fulld = 0;
9760f80586bSgd 	}
9770f80586bSgd 	return (MII_SUCCESS);
9780f80586bSgd }
979