xref: /illumos-gate/usr/src/uts/i86pc/os/pci_mech1.c (revision 1636e047)
17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate  * CDDL HEADER START
37c478bd9Sstevel@tonic-gate  *
47c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
57c478bd9Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
67c478bd9Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
77c478bd9Sstevel@tonic-gate  * with the License.
87c478bd9Sstevel@tonic-gate  *
97c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
107c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
117c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
127c478bd9Sstevel@tonic-gate  * and limitations under the License.
137c478bd9Sstevel@tonic-gate  *
147c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
157c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
167c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
177c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
187c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
197c478bd9Sstevel@tonic-gate  *
207c478bd9Sstevel@tonic-gate  * CDDL HEADER END
217c478bd9Sstevel@tonic-gate  */
227c478bd9Sstevel@tonic-gate /*
23c88420b3Sdmick  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
247c478bd9Sstevel@tonic-gate  * Use is subject to license terms.
257c478bd9Sstevel@tonic-gate  */
267c478bd9Sstevel@tonic-gate 
27*1636e047SRobert Mustacchi /*
28*1636e047SRobert Mustacchi  * Copyright 2021 Oxide Computer Company
29*1636e047SRobert Mustacchi  */
307c478bd9Sstevel@tonic-gate 
317c478bd9Sstevel@tonic-gate /*
327c478bd9Sstevel@tonic-gate  * PCI Mechanism 1 low-level routines
337c478bd9Sstevel@tonic-gate  */
347c478bd9Sstevel@tonic-gate 
357c478bd9Sstevel@tonic-gate #include <sys/types.h>
367c478bd9Sstevel@tonic-gate #include <sys/pci.h>
377c478bd9Sstevel@tonic-gate #include <sys/pci_impl.h>
387c478bd9Sstevel@tonic-gate #include <sys/sunddi.h>
39c88420b3Sdmick #include <sys/pci_cfgspace_impl.h>
407c478bd9Sstevel@tonic-gate 
417c478bd9Sstevel@tonic-gate /*
427c478bd9Sstevel@tonic-gate  * Per PCI 2.1 section 3.7.4.1 and PCI-PCI Bridge Architecture 1.0 section
437c478bd9Sstevel@tonic-gate  * 5.3.1.2:  dev=31 func=7 reg=0 means a special cycle.  We don't want to
447c478bd9Sstevel@tonic-gate  * trigger that by accident, so we pretend that dev 31, func 7 doesn't
457c478bd9Sstevel@tonic-gate  * exist.  If we ever want special cycle support, we'll add explicit
467c478bd9Sstevel@tonic-gate  * special cycle support.
477c478bd9Sstevel@tonic-gate  */
487c478bd9Sstevel@tonic-gate 
497c478bd9Sstevel@tonic-gate uint8_t
pci_mech1_getb(int bus,int device,int function,int reg)507c478bd9Sstevel@tonic-gate pci_mech1_getb(int bus, int device, int function, int reg)
517c478bd9Sstevel@tonic-gate {
527c478bd9Sstevel@tonic-gate 	uint8_t val;
537c478bd9Sstevel@tonic-gate 	if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
547c478bd9Sstevel@tonic-gate 	    function == PCI_MECH1_SPEC_CYCLE_FUNC) {
55*1636e047SRobert Mustacchi 		return (PCI_EINVAL8);
56*1636e047SRobert Mustacchi 	}
57*1636e047SRobert Mustacchi 
58*1636e047SRobert Mustacchi 	if (reg > pci_iocfg_max_offset) {
59*1636e047SRobert Mustacchi 		return (PCI_EINVAL8);
607c478bd9Sstevel@tonic-gate 	}
617c478bd9Sstevel@tonic-gate 
627c478bd9Sstevel@tonic-gate 	mutex_enter(&pcicfg_mutex);
637c478bd9Sstevel@tonic-gate 	outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));
647c478bd9Sstevel@tonic-gate 	val = inb(PCI_CONFDATA | (reg & 0x3));
657c478bd9Sstevel@tonic-gate 	mutex_exit(&pcicfg_mutex);
667c478bd9Sstevel@tonic-gate 	return (val);
677c478bd9Sstevel@tonic-gate }
687c478bd9Sstevel@tonic-gate 
697c478bd9Sstevel@tonic-gate uint16_t
pci_mech1_getw(int bus,int device,int function,int reg)707c478bd9Sstevel@tonic-gate pci_mech1_getw(int bus, int device, int function, int reg)
717c478bd9Sstevel@tonic-gate {
727c478bd9Sstevel@tonic-gate 	uint16_t val;
737c478bd9Sstevel@tonic-gate 
747c478bd9Sstevel@tonic-gate 	if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
757c478bd9Sstevel@tonic-gate 	    function == PCI_MECH1_SPEC_CYCLE_FUNC) {
76*1636e047SRobert Mustacchi 		return (PCI_EINVAL16);
77*1636e047SRobert Mustacchi 	}
78*1636e047SRobert Mustacchi 
79*1636e047SRobert Mustacchi 	if (reg > pci_iocfg_max_offset) {
80*1636e047SRobert Mustacchi 		return (PCI_EINVAL16);
817c478bd9Sstevel@tonic-gate 	}
827c478bd9Sstevel@tonic-gate 
837c478bd9Sstevel@tonic-gate 	mutex_enter(&pcicfg_mutex);
847c478bd9Sstevel@tonic-gate 	outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));
857c478bd9Sstevel@tonic-gate 	val =  inw(PCI_CONFDATA | (reg & 0x2));
867c478bd9Sstevel@tonic-gate 	mutex_exit(&pcicfg_mutex);
877c478bd9Sstevel@tonic-gate 	return (val);
887c478bd9Sstevel@tonic-gate }
897c478bd9Sstevel@tonic-gate 
907c478bd9Sstevel@tonic-gate uint32_t
pci_mech1_getl(int bus,int device,int function,int reg)917c478bd9Sstevel@tonic-gate pci_mech1_getl(int bus, int device, int function, int reg)
927c478bd9Sstevel@tonic-gate {
937c478bd9Sstevel@tonic-gate 	uint32_t val;
947c478bd9Sstevel@tonic-gate 
957c478bd9Sstevel@tonic-gate 	if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
967c478bd9Sstevel@tonic-gate 	    function == PCI_MECH1_SPEC_CYCLE_FUNC) {
97*1636e047SRobert Mustacchi 		return (PCI_EINVAL32);
98*1636e047SRobert Mustacchi 	}
99*1636e047SRobert Mustacchi 
100*1636e047SRobert Mustacchi 	if (reg > pci_iocfg_max_offset) {
101*1636e047SRobert Mustacchi 		return (PCI_EINVAL32);
1027c478bd9Sstevel@tonic-gate 	}
1037c478bd9Sstevel@tonic-gate 
1047c478bd9Sstevel@tonic-gate 	mutex_enter(&pcicfg_mutex);
1057c478bd9Sstevel@tonic-gate 	outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));
1067c478bd9Sstevel@tonic-gate 	val = inl(PCI_CONFDATA);
1077c478bd9Sstevel@tonic-gate 	mutex_exit(&pcicfg_mutex);
1087c478bd9Sstevel@tonic-gate 	return (val);
1097c478bd9Sstevel@tonic-gate }
1107c478bd9Sstevel@tonic-gate 
1117c478bd9Sstevel@tonic-gate void
pci_mech1_putb(int bus,int device,int function,int reg,uint8_t val)1127c478bd9Sstevel@tonic-gate pci_mech1_putb(int bus, int device, int function, int reg, uint8_t val)
1137c478bd9Sstevel@tonic-gate {
1147c478bd9Sstevel@tonic-gate 	if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
1157c478bd9Sstevel@tonic-gate 	    function == PCI_MECH1_SPEC_CYCLE_FUNC) {
1167c478bd9Sstevel@tonic-gate 		return;
1177c478bd9Sstevel@tonic-gate 	}
1187c478bd9Sstevel@tonic-gate 
119*1636e047SRobert Mustacchi 	if (reg > pci_iocfg_max_offset) {
120*1636e047SRobert Mustacchi 		return;
121*1636e047SRobert Mustacchi 	}
122*1636e047SRobert Mustacchi 
1237c478bd9Sstevel@tonic-gate 	mutex_enter(&pcicfg_mutex);
1247c478bd9Sstevel@tonic-gate 	outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));
1257c478bd9Sstevel@tonic-gate 	outb(PCI_CONFDATA | (reg & 0x3), val);
1267c478bd9Sstevel@tonic-gate 	mutex_exit(&pcicfg_mutex);
1277c478bd9Sstevel@tonic-gate }
1287c478bd9Sstevel@tonic-gate 
1297c478bd9Sstevel@tonic-gate void
pci_mech1_putw(int bus,int device,int function,int reg,uint16_t val)1307c478bd9Sstevel@tonic-gate pci_mech1_putw(int bus, int device, int function, int reg, uint16_t val)
1317c478bd9Sstevel@tonic-gate {
1327c478bd9Sstevel@tonic-gate 	if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
1337c478bd9Sstevel@tonic-gate 	    function == PCI_MECH1_SPEC_CYCLE_FUNC) {
1347c478bd9Sstevel@tonic-gate 		return;
1357c478bd9Sstevel@tonic-gate 	}
1367c478bd9Sstevel@tonic-gate 
137*1636e047SRobert Mustacchi 	if (reg > pci_iocfg_max_offset) {
138*1636e047SRobert Mustacchi 		return;
139*1636e047SRobert Mustacchi 	}
140*1636e047SRobert Mustacchi 
1417c478bd9Sstevel@tonic-gate 	mutex_enter(&pcicfg_mutex);
1427c478bd9Sstevel@tonic-gate 	outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));
1437c478bd9Sstevel@tonic-gate 	outw(PCI_CONFDATA | (reg & 0x2), val);
1447c478bd9Sstevel@tonic-gate 	mutex_exit(&pcicfg_mutex);
1457c478bd9Sstevel@tonic-gate }
1467c478bd9Sstevel@tonic-gate 
1477c478bd9Sstevel@tonic-gate void
pci_mech1_putl(int bus,int device,int function,int reg,uint32_t val)1487c478bd9Sstevel@tonic-gate pci_mech1_putl(int bus, int device, int function, int reg, uint32_t val)
1497c478bd9Sstevel@tonic-gate {
1507c478bd9Sstevel@tonic-gate 	if (device == PCI_MECH1_SPEC_CYCLE_DEV &&
1517c478bd9Sstevel@tonic-gate 	    function == PCI_MECH1_SPEC_CYCLE_FUNC) {
1527c478bd9Sstevel@tonic-gate 		return;
1537c478bd9Sstevel@tonic-gate 	}
1547c478bd9Sstevel@tonic-gate 
155*1636e047SRobert Mustacchi 	if (reg > pci_iocfg_max_offset) {
156*1636e047SRobert Mustacchi 		return;
157*1636e047SRobert Mustacchi 	}
158*1636e047SRobert Mustacchi 
1597c478bd9Sstevel@tonic-gate 	mutex_enter(&pcicfg_mutex);
1607c478bd9Sstevel@tonic-gate 	outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));
1617c478bd9Sstevel@tonic-gate 	outl(PCI_CONFDATA, val);
1627c478bd9Sstevel@tonic-gate 	mutex_exit(&pcicfg_mutex);
1637c478bd9Sstevel@tonic-gate }
164