1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #include <sys/types.h> 27 #include <sys/ddi.h> 28 #include <sys/kmem.h> 29 #include <sys/sysmacros.h> 30 #include <sys/sunddi.h> 31 #include <sys/sunpm.h> 32 #include <sys/epm.h> 33 #include <sys/sunndi.h> 34 #include <sys/ddi_impldefs.h> 35 #include <sys/ddi_implfuncs.h> 36 #include <sys/pcie.h> 37 #include <sys/pcie_impl.h> 38 #include <sys/pcie_pwr.h> 39 #include <sys/pcie_acpi.h> /* pcie_x86_priv_t */ 40 41 void pcie_init_plat(dev_info_t * dip)42pcie_init_plat(dev_info_t *dip) 43 { 44 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); 45 bus_p->bus_plat_private = 46 (pcie_x86_priv_t *)kmem_zalloc(sizeof (pcie_x86_priv_t), KM_SLEEP); 47 } 48 49 void pcie_fini_plat(dev_info_t * dip)50pcie_fini_plat(dev_info_t *dip) 51 { 52 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); 53 54 kmem_free(bus_p->bus_plat_private, sizeof (pcie_x86_priv_t)); 55 } 56 57 /* ARGSUSED */ 58 int pcie_plat_pwr_setup(dev_info_t * dip)59pcie_plat_pwr_setup(dev_info_t *dip) 60 { 61 return (DDI_SUCCESS); 62 } 63 64 /* 65 * Undo whatever is done in pcie_plat_pwr_common_setup 66 */ 67 /* ARGSUSED */ 68 void pcie_plat_pwr_teardown(dev_info_t * dip)69pcie_plat_pwr_teardown(dev_info_t *dip) 70 { 71 } 72