17aec1d6eScindi /*
27aec1d6eScindi * CDDL HEADER START
37aec1d6eScindi *
47aec1d6eScindi * The contents of this file are subject to the terms of the
53ad553a7Sgavinm * Common Development and Distribution License (the "License").
63ad553a7Sgavinm * You may not use this file except in compliance with the License.
77aec1d6eScindi *
87aec1d6eScindi * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97aec1d6eScindi * or http://www.opensolaris.org/os/licensing.
107aec1d6eScindi * See the License for the specific language governing permissions
117aec1d6eScindi * and limitations under the License.
127aec1d6eScindi *
137aec1d6eScindi * When distributing Covered Code, include this CDDL HEADER in each
147aec1d6eScindi * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157aec1d6eScindi * If applicable, add the following below this CDDL HEADER, with the
167aec1d6eScindi * fields enclosed by brackets "[]" replaced with your own identifying
177aec1d6eScindi * information: Portions Copyright [yyyy] [name of copyright owner]
187aec1d6eScindi *
197aec1d6eScindi * CDDL HEADER END
207aec1d6eScindi */
217aec1d6eScindi
227aec1d6eScindi /*
23c84b7bbeSAdrian Frost * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
247aec1d6eScindi */
257aec1d6eScindi
267aec1d6eScindi /*
277aec1d6eScindi * The CPU module for the AMD Athlon64 and Opteron processors
287aec1d6eScindi */
297aec1d6eScindi
307aec1d6eScindi #include <sys/types.h>
317aec1d6eScindi #include <sys/cmn_err.h>
327aec1d6eScindi #include <sys/sunddi.h>
3320c794b3Sgavinm #include <sys/cpu_module.h>
3420c794b3Sgavinm #include <sys/cpu_module_ms_impl.h>
357aec1d6eScindi #include <sys/cpuvar.h>
367aec1d6eScindi #include <sys/x86_archext.h>
377aec1d6eScindi #include <sys/kmem.h>
38fb2f18f8Sesaxe #include <sys/pghw.h>
397aec1d6eScindi #include <sys/modctl.h>
407aec1d6eScindi #include <sys/mc.h>
418d7f0877Srab #include <sys/mca_x86.h>
427aec1d6eScindi
437aec1d6eScindi #include "ao.h"
447aec1d6eScindi
4520c794b3Sgavinm int ao_ms_support_disable = 0;
4620c794b3Sgavinm
4720c794b3Sgavinm static struct ao_chipshared *ao_shared[AO_MAX_CHIPS];
488a40a695Sgavinm
497aec1d6eScindi /*
508a40a695Sgavinm * This cpu module supports AMD family 0xf revisions B/C/D/E/F/G. If
518a40a695Sgavinm * a family 0xf cpu beyond the rev G model limit is detected then
528a40a695Sgavinm * return ENOTSUP and let the generic x86 CPU module load instead.
537aec1d6eScindi */
548a40a695Sgavinm uint_t ao_model_limit = 0x6f;
557aec1d6eScindi
5620c794b3Sgavinm int
ao_ms_init(cmi_hdl_t hdl,void ** datap)5720c794b3Sgavinm ao_ms_init(cmi_hdl_t hdl, void **datap)
587aec1d6eScindi {
5920c794b3Sgavinm uint_t chipid = cmi_hdl_chipid(hdl);
608a40a695Sgavinm struct ao_chipshared *sp, *osp;
6120c794b3Sgavinm ao_ms_data_t *ao;
628d7f0877Srab uint64_t cap;
637aec1d6eScindi
6420c794b3Sgavinm if (ao_ms_support_disable || cmi_hdl_model(hdl) >= ao_model_limit)
657aec1d6eScindi return (ENOTSUP);
667aec1d6eScindi
67*7417cfdeSKuriakose Kuruvilla if (!is_x86_feature(x86_featureset, X86FSET_MCA))
688d7f0877Srab return (ENOTSUP);
698d7f0877Srab
7020c794b3Sgavinm if (cmi_hdl_rdmsr(hdl, IA32_MSR_MCG_CAP, &cap) != CMI_SUCCESS)
7120c794b3Sgavinm return (ENOTSUP);
7220c794b3Sgavinm
738d7f0877Srab if (!(cap & MCG_CAP_CTL_P))
748d7f0877Srab return (ENOTSUP);
758d7f0877Srab
76bb86c342Sgavinm if ((cap & MCG_CAP_COUNT_MASK) != AMD_MCA_BANK_COUNT) {
7720c794b3Sgavinm cmn_err(CE_WARN, "Chip %d core %d has %llu MCA banks, "
7820c794b3Sgavinm "expected %u: disabling AMD-specific MCA support on "
7920c794b3Sgavinm "this CPU", chipid, cmi_hdl_coreid(hdl),
8020c794b3Sgavinm (u_longlong_t)cap & MCG_CAP_COUNT_MASK,
81bb86c342Sgavinm AMD_MCA_BANK_COUNT);
82bb86c342Sgavinm return (ENOTSUP);
83bb86c342Sgavinm }
84bb86c342Sgavinm
8520c794b3Sgavinm ao = *datap = kmem_zalloc(sizeof (ao_ms_data_t), KM_SLEEP);
8620c794b3Sgavinm cmi_hdl_hold(hdl); /* release in fini */
8720c794b3Sgavinm ao->ao_ms_hdl = hdl;
887aec1d6eScindi
898a40a695Sgavinm /*
908a40a695Sgavinm * Allocate the chipshared structure if it appears not to have been
918a40a695Sgavinm * allocated already (by a sibling core). Install the newly
928a40a695Sgavinm * allocated pointer atomically in case a sibling core beats
938a40a695Sgavinm * us to it.
948a40a695Sgavinm */
958a40a695Sgavinm if ((sp = ao_shared[chipid]) == NULL) {
968a40a695Sgavinm sp = kmem_zalloc(sizeof (struct ao_chipshared), KM_SLEEP);
97a3c46958Sgavinm sp->aos_chiprev = cmi_hdl_chiprev(hdl);
98a3c46958Sgavinm membar_producer();
99a3c46958Sgavinm
1008a40a695Sgavinm osp = atomic_cas_ptr(&ao_shared[chipid], NULL, sp);
1018a40a695Sgavinm if (osp != NULL) {
1028a40a695Sgavinm kmem_free(sp, sizeof (struct ao_chipshared));
1038a40a695Sgavinm sp = osp;
1048a40a695Sgavinm }
1058a40a695Sgavinm }
10620c794b3Sgavinm ao->ao_ms_shared = sp;
1078a40a695Sgavinm
1087aec1d6eScindi return (0);
1097aec1d6eScindi }
1107aec1d6eScindi
1113ad553a7Sgavinm /*ARGSUSED*/
11220c794b3Sgavinm void
ao_ms_post_mpstartup(cmi_hdl_t hdl)11320c794b3Sgavinm ao_ms_post_mpstartup(cmi_hdl_t hdl)
1143ad553a7Sgavinm {
1153ad553a7Sgavinm (void) ddi_install_driver("mc-amd");
1163ad553a7Sgavinm }
1173ad553a7Sgavinm
118c84b7bbeSAdrian Frost cms_api_ver_t _cms_api_version = CMS_API_VERSION_2;
11920c794b3Sgavinm
12020c794b3Sgavinm const cms_ops_t _cms_ops = {
12120c794b3Sgavinm ao_ms_init, /* cms_init */
12220c794b3Sgavinm ao_ms_post_startup, /* cms_post_startup */
12320c794b3Sgavinm ao_ms_post_mpstartup, /* cms_post_mpstartup */
12420c794b3Sgavinm NULL, /* cms_logout_size */
12520c794b3Sgavinm ao_ms_mcgctl_val, /* cms_mcgctl_val */
12620c794b3Sgavinm ao_ms_bankctl_skipinit, /* cms_bankctl_skipinit */
12720c794b3Sgavinm ao_ms_bankctl_val, /* cms_bankctl_val */
12820c794b3Sgavinm NULL, /* cms_bankstatus_skipinit */
12920c794b3Sgavinm NULL, /* cms_bankstatus_val */
13020c794b3Sgavinm ao_ms_mca_init, /* cms_mca_init */
13120c794b3Sgavinm ao_ms_poll_ownermask, /* cms_poll_ownermask */
13220c794b3Sgavinm NULL, /* cms_bank_logout */
13320c794b3Sgavinm ao_ms_error_action, /* cms_error_action */
13420c794b3Sgavinm ao_ms_disp_match, /* cms_disp_match */
13520c794b3Sgavinm ao_ms_ereport_class, /* cms_ereport_class */
13620c794b3Sgavinm NULL, /* cms_ereport_detector */
13720c794b3Sgavinm ao_ms_ereport_includestack, /* cms_ereport_includestack */
13820c794b3Sgavinm ao_ms_ereport_add_logout, /* cms_ereport_add_logout */
13920c794b3Sgavinm ao_ms_msrinject, /* cms_msrinject */
14020c794b3Sgavinm NULL, /* cms_fini */
1417aec1d6eScindi };
1427aec1d6eScindi
1437aec1d6eScindi static struct modlcpu modlcpu = {
1447aec1d6eScindi &mod_cpuops,
14520c794b3Sgavinm "AMD Athlon64/Opteron Model-Specific Support"
1467aec1d6eScindi };
1477aec1d6eScindi
1487aec1d6eScindi static struct modlinkage modlinkage = {
1497aec1d6eScindi MODREV_1,
1507aec1d6eScindi (void *)&modlcpu,
1517aec1d6eScindi NULL
1527aec1d6eScindi };
1537aec1d6eScindi
1547aec1d6eScindi int
_init(void)1557aec1d6eScindi _init(void)
1567aec1d6eScindi {
15720c794b3Sgavinm return (mod_install(&modlinkage));
1587aec1d6eScindi }
1597aec1d6eScindi
1607aec1d6eScindi int
_info(struct modinfo * modinfop)1617aec1d6eScindi _info(struct modinfo *modinfop)
1627aec1d6eScindi {
1637aec1d6eScindi return (mod_info(&modlinkage, modinfop));
1647aec1d6eScindi }
1657aec1d6eScindi
1667aec1d6eScindi int
_fini(void)1677aec1d6eScindi _fini(void)
1687aec1d6eScindi {
16920c794b3Sgavinm return (mod_remove(&modlinkage));
1707aec1d6eScindi }
171