17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 502acac7eSsl * Common Development and Distribution License (the "License"). 602acac7eSsl * You may not use this file except in compliance with the License. 77c478bd9Sstevel@tonic-gate * 87c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 97c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 107c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 117c478bd9Sstevel@tonic-gate * and limitations under the License. 127c478bd9Sstevel@tonic-gate * 137c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 147c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 157c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 167c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 177c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 187c478bd9Sstevel@tonic-gate * 197c478bd9Sstevel@tonic-gate * CDDL HEADER END 207c478bd9Sstevel@tonic-gate */ 217c478bd9Sstevel@tonic-gate /* 22*0f1b305eSSeth Goldberg * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 237c478bd9Sstevel@tonic-gate * Use is subject to license terms. 247c478bd9Sstevel@tonic-gate */ 257c478bd9Sstevel@tonic-gate 267c478bd9Sstevel@tonic-gate #ifndef _SYS_USB_UHCI_H 277c478bd9Sstevel@tonic-gate #define _SYS_USB_UHCI_H 287c478bd9Sstevel@tonic-gate 297c478bd9Sstevel@tonic-gate 307c478bd9Sstevel@tonic-gate #include <sys/types.h> 317c478bd9Sstevel@tonic-gate 327c478bd9Sstevel@tonic-gate #ifdef __cplusplus 337c478bd9Sstevel@tonic-gate extern "C" { 347c478bd9Sstevel@tonic-gate #endif 357c478bd9Sstevel@tonic-gate 367c478bd9Sstevel@tonic-gate /* 377c478bd9Sstevel@tonic-gate * Universal Host Controller Driver (UHCI) 387c478bd9Sstevel@tonic-gate * 397c478bd9Sstevel@tonic-gate * The UHCI driver is a driver which interfaces to the Universal 407c478bd9Sstevel@tonic-gate * Serial Bus Driver (USBA) and the Host Controller (HC). The interface to 417c478bd9Sstevel@tonic-gate * the Host Controller is defined by the Universal Host Controller 427c478bd9Sstevel@tonic-gate * Interface spec. 437c478bd9Sstevel@tonic-gate */ 447c478bd9Sstevel@tonic-gate 457c478bd9Sstevel@tonic-gate 467c478bd9Sstevel@tonic-gate #define LEGACYMODE_REG_OFFSET 0xc0 477c478bd9Sstevel@tonic-gate #define LEGACYMODE_REG_INIT_VALUE 0xaf00 487c478bd9Sstevel@tonic-gate 497c478bd9Sstevel@tonic-gate /* 507c478bd9Sstevel@tonic-gate * The register set of the UCHI controller 517c478bd9Sstevel@tonic-gate * This structure is laid out for proper alignment so no need to pack(1). 527c478bd9Sstevel@tonic-gate */ 537c478bd9Sstevel@tonic-gate typedef volatile struct hcr_regs { 547c478bd9Sstevel@tonic-gate uint16_t USBCMD; 557c478bd9Sstevel@tonic-gate uint16_t USBSTS; 567c478bd9Sstevel@tonic-gate uint16_t USBINTR; 577c478bd9Sstevel@tonic-gate uint16_t FRNUM; 587c478bd9Sstevel@tonic-gate uint32_t FRBASEADD; 597c478bd9Sstevel@tonic-gate uchar_t SOFMOD; 607c478bd9Sstevel@tonic-gate uchar_t rsvd[3]; 617c478bd9Sstevel@tonic-gate uint16_t PORTSC[2]; 627c478bd9Sstevel@tonic-gate } hc_regs_t; 637c478bd9Sstevel@tonic-gate 647c478bd9Sstevel@tonic-gate /* 657c478bd9Sstevel@tonic-gate * #defines for the USB Command Register 667c478bd9Sstevel@tonic-gate */ 677c478bd9Sstevel@tonic-gate #define USBCMD_REG_MAXPKT_64 0x0080 687c478bd9Sstevel@tonic-gate #define USBCMD_REG_CONFIG_FLAG 0x0040 697c478bd9Sstevel@tonic-gate #define USBCMD_REG_SW_DEBUG 0x0020 707c478bd9Sstevel@tonic-gate #define USBCMD_REG_FGBL_RESUME 0x0010 71*0f1b305eSSeth Goldberg #define USBCMD_REG_ENTER_GBL_SUSPEND 0x0008 727c478bd9Sstevel@tonic-gate #define USBCMD_REG_GBL_RESET 0x0004 737c478bd9Sstevel@tonic-gate #define USBCMD_REG_HC_RESET 0x0002 747c478bd9Sstevel@tonic-gate #define USBCMD_REG_HC_RUN 0x0001 757c478bd9Sstevel@tonic-gate 767c478bd9Sstevel@tonic-gate 777c478bd9Sstevel@tonic-gate /* 787c478bd9Sstevel@tonic-gate * #defines for the USB Status Register 797c478bd9Sstevel@tonic-gate */ 807c478bd9Sstevel@tonic-gate #define USBSTS_REG_HC_HALTED 0x0020 817c478bd9Sstevel@tonic-gate #define USBSTS_REG_HC_PROCESS_ERR 0x0010 827c478bd9Sstevel@tonic-gate #define USBSTS_REG_HOST_SYS_ERR 0x0008 837c478bd9Sstevel@tonic-gate #define USBSTS_REG_RESUME_DETECT 0x0004 847c478bd9Sstevel@tonic-gate #define USBSTS_REG_USB_ERR_INTR 0x0002 857c478bd9Sstevel@tonic-gate #define USBSTS_REG_USB_INTR 0x0001 867c478bd9Sstevel@tonic-gate 877c478bd9Sstevel@tonic-gate /* 887c478bd9Sstevel@tonic-gate * #defines for the USB Root Hub Port Register 897c478bd9Sstevel@tonic-gate */ 907c478bd9Sstevel@tonic-gate #define HCR_PORT_CCS 0x1 917c478bd9Sstevel@tonic-gate #define HCR_PORT_CSC 0x2 927c478bd9Sstevel@tonic-gate #define HCR_PORT_ENABLE 0x4 937c478bd9Sstevel@tonic-gate #define HCR_PORT_ENDIS_CHG 0x8 947c478bd9Sstevel@tonic-gate #define HCR_PORT_LINE_STATSU 0x30 957c478bd9Sstevel@tonic-gate #define HCR_PORT_RESUME_DETECT 0x40 967c478bd9Sstevel@tonic-gate #define HCR_PORT_LSDA 0x100 977c478bd9Sstevel@tonic-gate #define HCR_PORT_RESET 0x200 987c478bd9Sstevel@tonic-gate #define HCR_PORT_SUSPEND 0x1000 997c478bd9Sstevel@tonic-gate 1007c478bd9Sstevel@tonic-gate /* 1017c478bd9Sstevel@tonic-gate * #defines for USB Interrupt Enable Register 1027c478bd9Sstevel@tonic-gate */ 1037c478bd9Sstevel@tonic-gate #define USBINTR_REG_SPINT_EN 0x0008 1047c478bd9Sstevel@tonic-gate #define USBINTR_REG_IOC_EN 0x0004 1057c478bd9Sstevel@tonic-gate #define USBINTR_REG_RESUME_INT_EN 0x0002 1067c478bd9Sstevel@tonic-gate #define USBINTR_REG_TOCRC_INT_EN 0x0001 1077c478bd9Sstevel@tonic-gate 1087c478bd9Sstevel@tonic-gate #define ENABLE_ALL_INTRS 0x000F 1097c478bd9Sstevel@tonic-gate #define DISABLE_ALL_INTRS 0x0000 110932cf989Ssl #define UHCI_INTR_MASK 0x1f 1117c478bd9Sstevel@tonic-gate 1127c478bd9Sstevel@tonic-gate 1137c478bd9Sstevel@tonic-gate #define SetReg32(hndl, addr, val) ddi_put32((hndl), \ 1147c478bd9Sstevel@tonic-gate &(addr), (val)) 1157c478bd9Sstevel@tonic-gate #define GetReg32(hndl, addr) ddi_get32((hndl), &(addr)) 1167c478bd9Sstevel@tonic-gate 1177c478bd9Sstevel@tonic-gate #define SetQH32(ucp, addr, val) \ 1187c478bd9Sstevel@tonic-gate SetReg32((ucp)->uhci_qh_pool_mem_handle, (addr), (val)) 1197c478bd9Sstevel@tonic-gate #define GetQH32(ucp, addr) \ 1207c478bd9Sstevel@tonic-gate GetReg32((ucp)->uhci_qh_pool_mem_handle, (addr)) 1217c478bd9Sstevel@tonic-gate 1227c478bd9Sstevel@tonic-gate #define SetTD32(ucp, addr, val) \ 1237c478bd9Sstevel@tonic-gate SetReg32((ucp)->uhci_td_pool_mem_handle, (addr), (val)) 1247c478bd9Sstevel@tonic-gate #define GetTD32(ucp, addr) \ 1257c478bd9Sstevel@tonic-gate GetReg32((ucp)->uhci_td_pool_mem_handle, (addr)) 1267c478bd9Sstevel@tonic-gate 1277c478bd9Sstevel@tonic-gate #define SetFL32(ucp, addr, val) \ 1287c478bd9Sstevel@tonic-gate SetReg32((ucp)->uhci_flt_mem_handle, (addr), (val)) 1297c478bd9Sstevel@tonic-gate #define GetFL32(ucp, addr) \ 1307c478bd9Sstevel@tonic-gate GetReg32((ucp)->uhci_flt_mem_handle, (addr)) 1317c478bd9Sstevel@tonic-gate 1327c478bd9Sstevel@tonic-gate 1337c478bd9Sstevel@tonic-gate /* 1347c478bd9Sstevel@tonic-gate * UHCI Queue Head structure, aligned on 16 byte boundary 1357c478bd9Sstevel@tonic-gate */ 1367c478bd9Sstevel@tonic-gate typedef struct uhci_qh { 1377c478bd9Sstevel@tonic-gate /* Hardware controlled bits */ 1387c478bd9Sstevel@tonic-gate uint32_t link_ptr; /* Next Queue Head / TD */ 1397c478bd9Sstevel@tonic-gate uint32_t element_ptr; /* Next queue head / TD */ 1407c478bd9Sstevel@tonic-gate 1417c478bd9Sstevel@tonic-gate /* Software controlled bits */ 1427c478bd9Sstevel@tonic-gate uint16_t node; /* Node that its attached */ 1437c478bd9Sstevel@tonic-gate uint16_t qh_flag; /* See below */ 1447c478bd9Sstevel@tonic-gate 1457c478bd9Sstevel@tonic-gate struct uhci_qh *prev_qh; /* Pointer to Prev queue head */ 1467c478bd9Sstevel@tonic-gate struct uhci_td *td_tailp; /* Pointer to the last TD of QH */ 1477c478bd9Sstevel@tonic-gate struct uhci_bulk_isoc_xfer_info *bulk_xfer_info; 1487c478bd9Sstevel@tonic-gate uint64_t __pad1; /* align to 16 bytes */ 1497c478bd9Sstevel@tonic-gate } queue_head_t; 1507c478bd9Sstevel@tonic-gate 1517c478bd9Sstevel@tonic-gate #define NUM_STATIC_NODES 63 1527c478bd9Sstevel@tonic-gate #define NUM_INTR_QH_LISTS 64 1537c478bd9Sstevel@tonic-gate #define NUM_FRAME_LST_ENTRIES 1024 1547c478bd9Sstevel@tonic-gate #define TREE_HEIGHT 5 1557c478bd9Sstevel@tonic-gate #define VIRTUAL_TREE_HEIGHT 5 1567c478bd9Sstevel@tonic-gate #define SIZE_OF_FRAME_LST_TABLE 1024 * 4 1577c478bd9Sstevel@tonic-gate 1587c478bd9Sstevel@tonic-gate #define HC_TD_HEAD 0x0 1597c478bd9Sstevel@tonic-gate #define HC_QUEUE_HEAD 0x2 1607c478bd9Sstevel@tonic-gate #define HC_DEPTH_FIRST 0x4 1617c478bd9Sstevel@tonic-gate #define HC_END_OF_LIST 0x1 1627c478bd9Sstevel@tonic-gate 1637c478bd9Sstevel@tonic-gate #define QUEUE_HEAD_FLAG_STATIC 0x1 1647c478bd9Sstevel@tonic-gate #define QUEUE_HEAD_FLAG_FREE 0x2 1657c478bd9Sstevel@tonic-gate #define QUEUE_HEAD_FLAG_BUSY 0x3 1667c478bd9Sstevel@tonic-gate 1677c478bd9Sstevel@tonic-gate #define QH_LINK_PTR_MASK 0xFFFFFFF0 1687c478bd9Sstevel@tonic-gate #define QH_ELEMENT_PTR_MASK 0xFFFFFFF0 1697c478bd9Sstevel@tonic-gate #define FRAME_LST_PTR_MASK 0xFFFFFFF0 1707c478bd9Sstevel@tonic-gate 1717c478bd9Sstevel@tonic-gate 1727c478bd9Sstevel@tonic-gate #define GetField(u, td, f, o, l) \ 1737c478bd9Sstevel@tonic-gate ((GetTD32(u, (td)->f) >> (o)) & ((1U<<l)-1)) 1747c478bd9Sstevel@tonic-gate 1757c478bd9Sstevel@tonic-gate #define SetField(u, td, f, o, l, v) \ 1767c478bd9Sstevel@tonic-gate SetTD32(u, (td)->f, \ 1777c478bd9Sstevel@tonic-gate (GetTD32(u, (td)->f) & ~(((1U<<l)-1) << o)) | \ 1787c478bd9Sstevel@tonic-gate (((v) & ((1U<<l)-1)) << o)) 1797c478bd9Sstevel@tonic-gate 1807c478bd9Sstevel@tonic-gate #define GetTD_alen(u, td) GetField((u), (td), dw2, 0, 11) 1817c478bd9Sstevel@tonic-gate #define GetTD_status(u, td) GetField((u), (td), dw2, 16, 8) 1827c478bd9Sstevel@tonic-gate #define GetTD_ioc(u, td) GetField((u), (td), dw2, 24, 1) 1837c478bd9Sstevel@tonic-gate #define GetTD_iso(u, td) GetField((u), (td), dw2, 25, 1) 1847c478bd9Sstevel@tonic-gate #define GetTD_ls(u, td) GetField((u), (td), dw2, 26, 1) 1857c478bd9Sstevel@tonic-gate #define GetTD_c_err(u, td) GetField((u), (td), dw2, 27, 2) 1867c478bd9Sstevel@tonic-gate #define GetTD_spd(u, td) GetField((u), (td), dw2, 29, 1) 1877c478bd9Sstevel@tonic-gate #define GetTD_PID(u, td) GetField((u), (td), dw3, 0, 8) 1887c478bd9Sstevel@tonic-gate #define GetTD_devaddr(u, td) GetField((u), (td), dw3, 8, 7) 1897c478bd9Sstevel@tonic-gate #define GetTD_endpt(u, td) GetField((u), (td), dw3, 15, 4) 1907c478bd9Sstevel@tonic-gate #define GetTD_dtogg(u, td) GetField((u), (td), dw3, 19, 1) 1917c478bd9Sstevel@tonic-gate #define GetTD_mlen(u, td) GetField((u), (td), dw3, 21, 11) 1927c478bd9Sstevel@tonic-gate 1937c478bd9Sstevel@tonic-gate #define SetTD_alen(u, td, v) SetField((u), (td), dw2, 0, 11, (v)) 1947c478bd9Sstevel@tonic-gate #define SetTD_status(u, td, v) SetField((u), (td), dw2, 16, 8, (v)) 1957c478bd9Sstevel@tonic-gate #define SetTD_ioc(u, td, v) SetField((u), (td), dw2, 24, 1, (v)) 1967c478bd9Sstevel@tonic-gate #define SetTD_iso(u, td, v) SetField((u), (td), dw2, 25, 1, (v)) 1977c478bd9Sstevel@tonic-gate #define SetTD_ls(u, td, v) SetField((u), (td), dw2, 26, 1, (v)) 1987c478bd9Sstevel@tonic-gate #define SetTD_c_err(u, td, v) SetField((u), (td), dw2, 27, 2, (v)) 1997c478bd9Sstevel@tonic-gate #define SetTD_spd(u, td, v) SetField((u), (td), dw2, 29, 1, (v)) 2007c478bd9Sstevel@tonic-gate #define SetTD_PID(u, td, v) SetField((u), (td), dw3, 0, 8, (v)) 2017c478bd9Sstevel@tonic-gate #define SetTD_devaddr(u, td, v) SetField((u), (td), dw3, 8, 7, (v)) 2027c478bd9Sstevel@tonic-gate #define SetTD_endpt(u, td, v) SetField((u), (td), dw3, 15, 4, (v)) 2037c478bd9Sstevel@tonic-gate #define SetTD_dtogg(u, td, v) SetField((u), (td), dw3, 19, 1, (v)) 2047c478bd9Sstevel@tonic-gate #define SetTD_mlen(u, td, v) SetField((u), (td), dw3, 21, 11, (v)) 2057c478bd9Sstevel@tonic-gate 2067c478bd9Sstevel@tonic-gate /* 2077c478bd9Sstevel@tonic-gate * UHCI Transfer Descriptor structure, aligned on 16 byte boundary 2087c478bd9Sstevel@tonic-gate */ 2097c478bd9Sstevel@tonic-gate typedef struct uhci_td { 2107c478bd9Sstevel@tonic-gate 2117c478bd9Sstevel@tonic-gate /* Information required by HC for executing the request */ 2127c478bd9Sstevel@tonic-gate /* Pointer to the next TD/QH */ 2137c478bd9Sstevel@tonic-gate uint32_t link_ptr; 2147c478bd9Sstevel@tonic-gate uint32_t dw2; 2157c478bd9Sstevel@tonic-gate uint32_t dw3; 21602acac7eSsl /* Data buffer address */ 2177c478bd9Sstevel@tonic-gate uint32_t buffer_address; 2187c478bd9Sstevel@tonic-gate 2197c478bd9Sstevel@tonic-gate /* Information required by HCD for managing the request */ 2207c478bd9Sstevel@tonic-gate struct uhci_td *qh_td_prev; 2217c478bd9Sstevel@tonic-gate struct uhci_td *tw_td_next; 2227c478bd9Sstevel@tonic-gate struct uhci_td *outst_td_next; 2237c478bd9Sstevel@tonic-gate struct uhci_td *outst_td_prev; 2247c478bd9Sstevel@tonic-gate struct uhci_trans_wrapper *tw; 2257c478bd9Sstevel@tonic-gate struct uhci_td *isoc_next; 2267c478bd9Sstevel@tonic-gate struct uhci_td *isoc_prev; 2277c478bd9Sstevel@tonic-gate ushort_t isoc_pkt_index; 2287c478bd9Sstevel@tonic-gate ushort_t flag; 2297c478bd9Sstevel@tonic-gate uint_t starting_frame; 2307c478bd9Sstevel@tonic-gate uint_t _pad[3]; /* 16 byte alignment */ 2317c478bd9Sstevel@tonic-gate } uhci_td_t; 2327c478bd9Sstevel@tonic-gate 2337c478bd9Sstevel@tonic-gate #define TD_FLAG_FREE 0x1 2347c478bd9Sstevel@tonic-gate #define TD_FLAG_BUSY 0x2 2357c478bd9Sstevel@tonic-gate #define TD_FLAG_DUMMY 0x3 2367c478bd9Sstevel@tonic-gate 2377c478bd9Sstevel@tonic-gate #define INTERRUPT_ON_COMPLETION 0x1 2387c478bd9Sstevel@tonic-gate #define END_POINT_ADDRESS_MASK 0xF 2397c478bd9Sstevel@tonic-gate #define UHCI_MAX_ERR_COUNT 3 2407c478bd9Sstevel@tonic-gate #define MAX_NUM_BULK_TDS_PER_XFER 128 2417c478bd9Sstevel@tonic-gate 2427c478bd9Sstevel@tonic-gate /* section 3.2.2 of UHCI1.1 spec, bits 23:16 of status field */ 2437c478bd9Sstevel@tonic-gate #define UHCI_TD_ACTIVE 0x80 2447c478bd9Sstevel@tonic-gate #define UHCI_TD_STALLED 0x40 2457c478bd9Sstevel@tonic-gate #define UHCI_TD_DATA_BUFFER_ERR 0x20 2467c478bd9Sstevel@tonic-gate #define UHCI_TD_BABBLE_ERR 0x10 2477c478bd9Sstevel@tonic-gate #define UHCI_TD_NAK_RECEIVED 0x08 2487c478bd9Sstevel@tonic-gate #define UHCI_TD_CRC_TIMEOUT 0x04 2497c478bd9Sstevel@tonic-gate #define UHCI_TD_BITSTUFF_ERR 0x02 2507c478bd9Sstevel@tonic-gate 2517c478bd9Sstevel@tonic-gate #define TD_INACTIVE 0x7F 2527c478bd9Sstevel@tonic-gate #define TD_STATUS_MASK 0x76 2537c478bd9Sstevel@tonic-gate #define ZERO_LENGTH 0x7FF 2547c478bd9Sstevel@tonic-gate 2557c478bd9Sstevel@tonic-gate #define PID_SETUP 0x2D 2567c478bd9Sstevel@tonic-gate #define PID_IN 0x69 2577c478bd9Sstevel@tonic-gate #define PID_OUT 0xe1 2587c478bd9Sstevel@tonic-gate 2597c478bd9Sstevel@tonic-gate #define SETUP_SIZE 8 2607c478bd9Sstevel@tonic-gate 2617c478bd9Sstevel@tonic-gate #define SETUP 0x11 2627c478bd9Sstevel@tonic-gate #define DATA 0x12 2637c478bd9Sstevel@tonic-gate #define STATUS 0x13 2647c478bd9Sstevel@tonic-gate 2657c478bd9Sstevel@tonic-gate #define UHCI_INVALID_PTR NULL 2667c478bd9Sstevel@tonic-gate #define LOW_SPEED_DEVICE 1 2677c478bd9Sstevel@tonic-gate 2687c478bd9Sstevel@tonic-gate /* 2697c478bd9Sstevel@tonic-gate * These provide synchronization between TD deletions. 2707c478bd9Sstevel@tonic-gate */ 2717c478bd9Sstevel@tonic-gate #define UHCI_NOT_CLAIMED 0x0 2727c478bd9Sstevel@tonic-gate #define UHCI_INTR_HDLR_CLAIMED 0x1 2737c478bd9Sstevel@tonic-gate #define UHCI_MODIFY_TD_BITS_CLAIMED 0x2 2747c478bd9Sstevel@tonic-gate #define UHCI_TIMEOUT_HDLR_CLAIMED 0x3 2757c478bd9Sstevel@tonic-gate 2767c478bd9Sstevel@tonic-gate 27702acac7eSsl /* 27802acac7eSsl * Structure for Bulk and Isoc TD pools 27902acac7eSsl */ 28002acac7eSsl typedef struct uhci_bulk_isoc_td_pool { 28102acac7eSsl caddr_t pool_addr; 28202acac7eSsl ddi_dma_cookie_t cookie; /* DMA cookie */ 28302acac7eSsl ddi_dma_handle_t dma_handle; /* DMA handle */ 28402acac7eSsl ddi_acc_handle_t mem_handle; /* Memory handle */ 28502acac7eSsl ushort_t num_tds; 28602acac7eSsl } uhci_bulk_isoc_td_pool_t; 28702acac7eSsl 2887c478bd9Sstevel@tonic-gate /* 2897c478bd9Sstevel@tonic-gate * Structure for Bulk and Isoc transfers 2907c478bd9Sstevel@tonic-gate */ 2917c478bd9Sstevel@tonic-gate typedef struct uhci_bulk_isoc_xfer_info { 29202acac7eSsl uhci_bulk_isoc_td_pool_t *td_pools; 29302acac7eSsl ushort_t num_pools; 29402acac7eSsl ushort_t num_tds; 29502acac7eSsl } uhci_bulk_isoc_xfer_t; 29602acac7eSsl 29702acac7eSsl /* 29802acac7eSsl * Structure for Isoc DMA buffer 29902acac7eSsl * One Isoc transfer includes multiple Isoc packets. 30002acac7eSsl * One DMA buffer is allocated for one packet each. 30102acac7eSsl */ 30202acac7eSsl typedef struct uhci_isoc_buf { 30302acac7eSsl caddr_t buf_addr; /* Starting buffer address */ 3047c478bd9Sstevel@tonic-gate ddi_dma_cookie_t cookie; /* DMA cookie */ 3057c478bd9Sstevel@tonic-gate ddi_dma_handle_t dma_handle; /* DMA handle */ 3067c478bd9Sstevel@tonic-gate ddi_acc_handle_t mem_handle; /* Memory handle */ 30702acac7eSsl size_t length; /* Buffer length */ 30802acac7eSsl ushort_t index; 30902acac7eSsl } uhci_isoc_buf_t; 3107c478bd9Sstevel@tonic-gate 3117c478bd9Sstevel@tonic-gate /* 3127c478bd9Sstevel@tonic-gate * Macros related to ISOC transfers 3137c478bd9Sstevel@tonic-gate */ 3147c478bd9Sstevel@tonic-gate #define UHCI_SIZE_OF_HW_FRNUM 11 3157c478bd9Sstevel@tonic-gate #define UHCI_BIT_10_MASK 0x400 3167c478bd9Sstevel@tonic-gate #define UHCI_MAX_ISOC_FRAMES 1024 3177c478bd9Sstevel@tonic-gate #define UHCI_MAX_ISOC_PKTS 256 3187c478bd9Sstevel@tonic-gate #define UHCI_DEFAULT_ISOC_RCV_PKTS 1 /* isoc pkts per req */ 3197c478bd9Sstevel@tonic-gate 3207c478bd9Sstevel@tonic-gate #define FRNUM_MASK 0x3FF 3217c478bd9Sstevel@tonic-gate #define SW_FRNUM_MASK 0xFFFFFFFFFFFFF800 3227c478bd9Sstevel@tonic-gate #define INVALID_FRNUM 0 3237c478bd9Sstevel@tonic-gate #define FRNUM_OFFSET 5 3247c478bd9Sstevel@tonic-gate #define MAX_FRAME_NUM 1023 3257c478bd9Sstevel@tonic-gate 3267c478bd9Sstevel@tonic-gate typedef uint32_t frame_lst_table_t; 3277c478bd9Sstevel@tonic-gate 3287c478bd9Sstevel@tonic-gate /* 3297c478bd9Sstevel@tonic-gate * Bandwidth allocation 3307c478bd9Sstevel@tonic-gate * The following definitions are used during bandwidth 3317c478bd9Sstevel@tonic-gate * calculations for a given endpoint maximum packet size. 3327c478bd9Sstevel@tonic-gate */ 3337c478bd9Sstevel@tonic-gate #define MAX_BUS_BANDWIDTH 1500 /* Up to 1500 bytes per frame */ 3347c478bd9Sstevel@tonic-gate #define MAX_POLL_INTERVAL 255 /* Maximum polling interval */ 3357c478bd9Sstevel@tonic-gate #define MIN_POLL_INTERVAL 1 /* Minimum polling interval */ 3367c478bd9Sstevel@tonic-gate #define SOF 6 /* Length in bytes of SOF */ 3377c478bd9Sstevel@tonic-gate #define EOF 2 /* Length in bytes of EOF */ 3387c478bd9Sstevel@tonic-gate 3397c478bd9Sstevel@tonic-gate /* 3407c478bd9Sstevel@tonic-gate * Minimum polling interval for low speed endpoint 3417c478bd9Sstevel@tonic-gate * 3427c478bd9Sstevel@tonic-gate * According USB Specifications, a full-speed endpoint can specify 3437c478bd9Sstevel@tonic-gate * a desired polling interval 1ms to 255ms and a low speed endpoints 3447c478bd9Sstevel@tonic-gate * are limited to specifying only 10ms to 255ms. But some old keyboards 3457c478bd9Sstevel@tonic-gate * and mice uses polling interval of 8ms. For compatibility purpose, 3467c478bd9Sstevel@tonic-gate * we are using polling interval between 8ms and 255ms for low speed 3477c478bd9Sstevel@tonic-gate * endpoints. 3487c478bd9Sstevel@tonic-gate */ 3497c478bd9Sstevel@tonic-gate #define MIN_LOW_SPEED_POLL_INTERVAL 8 3507c478bd9Sstevel@tonic-gate 3517c478bd9Sstevel@tonic-gate /* 3527c478bd9Sstevel@tonic-gate * For non-periodic transfers, reserve at least for one low-speed device 3537c478bd9Sstevel@tonic-gate * transaction and according to USB Bandwidth Analysis white paper, it 3547c478bd9Sstevel@tonic-gate * comes around 12% of USB frame time. Then periodic transfers will get 3557c478bd9Sstevel@tonic-gate * 88% of USB frame time. 3567c478bd9Sstevel@tonic-gate */ 3577c478bd9Sstevel@tonic-gate #define MAX_PERIODIC_BANDWIDTH (((MAX_BUS_BANDWIDTH - SOF - EOF)*88)/100) 3587c478bd9Sstevel@tonic-gate 3597c478bd9Sstevel@tonic-gate /* 3607c478bd9Sstevel@tonic-gate * The following are the protocol overheads in terms of Bytes for the 3617c478bd9Sstevel@tonic-gate * different transfer types. All these protocol overhead values are 3627c478bd9Sstevel@tonic-gate * derived from the 5.9.3 section of USB Specification and with the 3637c478bd9Sstevel@tonic-gate * help of Bandwidth Analysis white paper which is posted on the USB 3647c478bd9Sstevel@tonic-gate * developer forum. 3657c478bd9Sstevel@tonic-gate */ 3667c478bd9Sstevel@tonic-gate #define FS_NON_ISOC_PROTO_OVERHEAD 14 3677c478bd9Sstevel@tonic-gate #define FS_ISOC_INPUT_PROTO_OVERHEAD 11 3687c478bd9Sstevel@tonic-gate #define FS_ISOC_OUTPUT_PROTO_OVERHEAD 10 3697c478bd9Sstevel@tonic-gate #define LOW_SPEED_PROTO_OVERHEAD 97 3707c478bd9Sstevel@tonic-gate #define HUB_LOW_SPEED_PROTO_OVERHEAD 01 3717c478bd9Sstevel@tonic-gate 3727c478bd9Sstevel@tonic-gate /* 3737c478bd9Sstevel@tonic-gate * The Host Controller (HC) delays are the USB host controller specific 3747c478bd9Sstevel@tonic-gate * delays. The value shown below is the host controller delay for the 3757c478bd9Sstevel@tonic-gate * Sand core USB host controller. 3767c478bd9Sstevel@tonic-gate */ 3777c478bd9Sstevel@tonic-gate #define HOST_CONTROLLER_DELAY 18 3787c478bd9Sstevel@tonic-gate 3797c478bd9Sstevel@tonic-gate /* 3807c478bd9Sstevel@tonic-gate * The low speed clock below represents that to transmit one low-speed 3817c478bd9Sstevel@tonic-gate * bit takes eight times more than one full speed bit time. 3827c478bd9Sstevel@tonic-gate */ 3837c478bd9Sstevel@tonic-gate #define LOW_SPEED_CLOCK 8 3847c478bd9Sstevel@tonic-gate 3857c478bd9Sstevel@tonic-gate /* the 16 byte alignment is required for every TD and QH start addr */ 3867c478bd9Sstevel@tonic-gate #define UHCI_QH_ALIGN_SZ 16 3877c478bd9Sstevel@tonic-gate #define UHCI_TD_ALIGN_SZ 16 3887c478bd9Sstevel@tonic-gate 3897c478bd9Sstevel@tonic-gate #ifdef __cplusplus 3907c478bd9Sstevel@tonic-gate } 3917c478bd9Sstevel@tonic-gate #endif 3927c478bd9Sstevel@tonic-gate 3937c478bd9Sstevel@tonic-gate #endif /* _SYS_USB_UHCI_H */ 394