xref: /illumos-gate/usr/src/uts/common/sys/sdcard/sda.h (revision 4bb7efa7)
1*4bb7efa7SGarrett D'Amore /*
2*4bb7efa7SGarrett D'Amore  * CDDL HEADER START
3*4bb7efa7SGarrett D'Amore  *
4*4bb7efa7SGarrett D'Amore  * The contents of this file are subject to the terms of the
5*4bb7efa7SGarrett D'Amore  * Common Development and Distribution License (the "License").
6*4bb7efa7SGarrett D'Amore  * You may not use this file except in compliance with the License.
7*4bb7efa7SGarrett D'Amore  *
8*4bb7efa7SGarrett D'Amore  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*4bb7efa7SGarrett D'Amore  * or http://www.opensolaris.org/os/licensing.
10*4bb7efa7SGarrett D'Amore  * See the License for the specific language governing permissions
11*4bb7efa7SGarrett D'Amore  * and limitations under the License.
12*4bb7efa7SGarrett D'Amore  *
13*4bb7efa7SGarrett D'Amore  * When distributing Covered Code, include this CDDL HEADER in each
14*4bb7efa7SGarrett D'Amore  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*4bb7efa7SGarrett D'Amore  * If applicable, add the following below this CDDL HEADER, with the
16*4bb7efa7SGarrett D'Amore  * fields enclosed by brackets "[]" replaced with your own identifying
17*4bb7efa7SGarrett D'Amore  * information: Portions Copyright [yyyy] [name of copyright owner]
18*4bb7efa7SGarrett D'Amore  *
19*4bb7efa7SGarrett D'Amore  * CDDL HEADER END
20*4bb7efa7SGarrett D'Amore  */
21*4bb7efa7SGarrett D'Amore /*
22*4bb7efa7SGarrett D'Amore  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
23*4bb7efa7SGarrett D'Amore  * Use is subject to license terms.
24*4bb7efa7SGarrett D'Amore  */
25*4bb7efa7SGarrett D'Amore 
26*4bb7efa7SGarrett D'Amore #ifndef	_SYS_SDCARD_SDA_H
27*4bb7efa7SGarrett D'Amore #define	_SYS_SDCARD_SDA_H
28*4bb7efa7SGarrett D'Amore 
29*4bb7efa7SGarrett D'Amore #include <sys/types.h>
30*4bb7efa7SGarrett D'Amore #include <sys/note.h>
31*4bb7efa7SGarrett D'Amore 
32*4bb7efa7SGarrett D'Amore #ifdef	__cplusplus
33*4bb7efa7SGarrett D'Amore extern "C" {
34*4bb7efa7SGarrett D'Amore #endif
35*4bb7efa7SGarrett D'Amore 
36*4bb7efa7SGarrett D'Amore /*
37*4bb7efa7SGarrett D'Amore  * SD card common framework.  This module provides most of the common
38*4bb7efa7SGarrett D'Amore  * functionality so that SecureDigital host adapters and client devices
39*4bb7efa7SGarrett D'Amore  * (such as the sdmem driver) can share common code.
40*4bb7efa7SGarrett D'Amore  */
41*4bb7efa7SGarrett D'Amore 
42*4bb7efa7SGarrett D'Amore /*
43*4bb7efa7SGarrett D'Amore  * SD Commands.  Commmand format is 48-bits as follows:
44*4bb7efa7SGarrett D'Amore  *
45*4bb7efa7SGarrett D'Amore  * bits		value		desc
46*4bb7efa7SGarrett D'Amore  * -------------------------------------------
47*4bb7efa7SGarrett D'Amore  * 47		0		start bit
48*4bb7efa7SGarrett D'Amore  * 46		1		transmission bit
49*4bb7efa7SGarrett D'Amore  * 45:40	cmd		command index (see values listed below)
50*4bb7efa7SGarrett D'Amore  * 39:8		arg		32-bit command argument
51*4bb7efa7SGarrett D'Amore  * 7:1		crc7		crc7 check value
52*4bb7efa7SGarrett D'Amore  * 0		1		end bit
53*4bb7efa7SGarrett D'Amore  * -------------------------------------------
54*4bb7efa7SGarrett D'Amore  */
55*4bb7efa7SGarrett D'Amore typedef enum {
56*4bb7efa7SGarrett D'Amore 	CMD_GO_IDLE = 0,
57*4bb7efa7SGarrett D'Amore 	CMD_SEND_OCR = 1,		/* MMC only */
58*4bb7efa7SGarrett D'Amore 	CMD_BCAST_CID = 2,
59*4bb7efa7SGarrett D'Amore 	CMD_SEND_RCA = 3,
60*4bb7efa7SGarrett D'Amore 	CMD_SET_DSR = 4,
61*4bb7efa7SGarrett D'Amore 	CMD_IO_SEND_OCR = 5,		/* SDIO only */
62*4bb7efa7SGarrett D'Amore 	CMD_SWITCH_FUNC = 6,
63*4bb7efa7SGarrett D'Amore 	CMD_SELECT_CARD = 7,
64*4bb7efa7SGarrett D'Amore 	CMD_SEND_IF_COND = 8,
65*4bb7efa7SGarrett D'Amore 	CMD_SEND_CSD = 9,
66*4bb7efa7SGarrett D'Amore 	CMD_SEND_CID = 10,
67*4bb7efa7SGarrett D'Amore 	CMD_STOP_TRANSMIT = 12,
68*4bb7efa7SGarrett D'Amore 	CMD_SEND_STATUS = 13,
69*4bb7efa7SGarrett D'Amore 	CMD_GO_INACTIVE = 15,
70*4bb7efa7SGarrett D'Amore 	CMD_SET_BLOCKLEN = 16,
71*4bb7efa7SGarrett D'Amore 	CMD_READ_SINGLE = 17,
72*4bb7efa7SGarrett D'Amore 	CMD_READ_MULTI = 18,
73*4bb7efa7SGarrett D'Amore 	CMD_WRITE_SINGLE = 24,
74*4bb7efa7SGarrett D'Amore 	CMD_WRITE_MULTI = 25,
75*4bb7efa7SGarrett D'Amore 	CMD_PROGRAM_CSD = 27,
76*4bb7efa7SGarrett D'Amore 	CMD_SET_WRITE_PROT = 28,
77*4bb7efa7SGarrett D'Amore 	CMD_CLR_WRITE_PROT = 29,
78*4bb7efa7SGarrett D'Amore 	CMD_SEND_WRITE_PROT = 30,
79*4bb7efa7SGarrett D'Amore 	CMD_ERASE_START = 32,
80*4bb7efa7SGarrett D'Amore 	CMD_ERASE_END = 33,
81*4bb7efa7SGarrett D'Amore 	CMD_ERASE = 38,
82*4bb7efa7SGarrett D'Amore 	CMD_LOCK = 42,
83*4bb7efa7SGarrett D'Amore 	CMD_IO_RW_DIRECT = 52,
84*4bb7efa7SGarrett D'Amore 	CMD_IO_RW_EXTENDED = 53,
85*4bb7efa7SGarrett D'Amore 	CMD_APP_CMD = 55,
86*4bb7efa7SGarrett D'Amore 	CMD_GEN_CMD = 56,
87*4bb7efa7SGarrett D'Amore 	/* APP CMD values, send ACMD first */
88*4bb7efa7SGarrett D'Amore 	ACMD_SET_BUS_WIDTH = 6,
89*4bb7efa7SGarrett D'Amore 	ACMD_SD_STATUS = 13,
90*4bb7efa7SGarrett D'Amore 	ACMD_SEND_NUM_WR_BLKS = 22,
91*4bb7efa7SGarrett D'Amore 	ACMD_SET_WR_BLK_ERASE_COUNT = 23,
92*4bb7efa7SGarrett D'Amore 	ACMD_SD_SEND_OCR = 41,
93*4bb7efa7SGarrett D'Amore 	ACMD_SET_CLR_CARD_DETECT = 42,
94*4bb7efa7SGarrett D'Amore 	ACMD_SEND_SCR = 51
95*4bb7efa7SGarrett D'Amore } sda_index_t;
96*4bb7efa7SGarrett D'Amore 
97*4bb7efa7SGarrett D'Amore /*
98*4bb7efa7SGarrett D'Amore  * Classes of response type.  Note that we encode the "busy bit" as
99*4bb7efa7SGarrett D'Amore  * value 0x10.
100*4bb7efa7SGarrett D'Amore  */
101*4bb7efa7SGarrett D'Amore typedef enum {
102*4bb7efa7SGarrett D'Amore 	R0 = 0,
103*4bb7efa7SGarrett D'Amore 	R1 = 1,
104*4bb7efa7SGarrett D'Amore 	R2 = 2,
105*4bb7efa7SGarrett D'Amore 	R3 = 3,
106*4bb7efa7SGarrett D'Amore 	R4 = 4,
107*4bb7efa7SGarrett D'Amore 	R5 = 5,
108*4bb7efa7SGarrett D'Amore 	R6 = 6,
109*4bb7efa7SGarrett D'Amore 	R7 = 7,
110*4bb7efa7SGarrett D'Amore 	Rb = 0x10,
111*4bb7efa7SGarrett D'Amore 	R1b = 0x11,
112*4bb7efa7SGarrett D'Amore 	R5b = 0x15
113*4bb7efa7SGarrett D'Amore } sda_rtype_t;
114*4bb7efa7SGarrett D'Amore 
115*4bb7efa7SGarrett D'Amore /*
116*4bb7efa7SGarrett D'Amore  * R1 status bits.
117*4bb7efa7SGarrett D'Amore  */
118*4bb7efa7SGarrett D'Amore #define	R1_OUT_OF_RANGE		(1U << 31)
119*4bb7efa7SGarrett D'Amore #define	R1_ADDRESS_ERROR	(1U << 30)
120*4bb7efa7SGarrett D'Amore #define	R1_BLOCK_LEN_ERROR	(1U << 29)
121*4bb7efa7SGarrett D'Amore #define	R1_ERASE_SEQ_ERROR	(1U << 28)
122*4bb7efa7SGarrett D'Amore #define	R1_ERASE_PARAM		(1U << 27)
123*4bb7efa7SGarrett D'Amore #define	R1_WP_VIOLATION		(1U << 26)
124*4bb7efa7SGarrett D'Amore #define	R1_CARD_IS_LOCKED	(1U << 25)
125*4bb7efa7SGarrett D'Amore #define	R1_LOCK_FAILED		(1U << 24)
126*4bb7efa7SGarrett D'Amore #define	R1_COM_CRC_ERROR	(1U << 23)
127*4bb7efa7SGarrett D'Amore #define	R1_ILLEGAL_COMMAND	(1U << 22)
128*4bb7efa7SGarrett D'Amore #define	R1_CARD_ECC_FAILED	(1U << 21)
129*4bb7efa7SGarrett D'Amore #define	R1_CC_ERROR		(1U << 20)
130*4bb7efa7SGarrett D'Amore #define	R1_ERROR		(1U << 19)
131*4bb7efa7SGarrett D'Amore #define	R1_CSD_OVERWRITE	(1U << 16)
132*4bb7efa7SGarrett D'Amore #define	R1_WP_ERASE_SKIP	(1U << 15)
133*4bb7efa7SGarrett D'Amore #define	R1_CARD_ECC_DIS		(1U << 14)
134*4bb7efa7SGarrett D'Amore #define	R1_ERASE_RESET		(1U << 13)
135*4bb7efa7SGarrett D'Amore #define	R1_READY_FOR_DATA	(1U << 8)
136*4bb7efa7SGarrett D'Amore #define	R1_APP_CMD		(1U << 5)
137*4bb7efa7SGarrett D'Amore #define	R1_AKE_SEQ_ERROR	(1U << 3)
138*4bb7efa7SGarrett D'Amore 
139*4bb7efa7SGarrett D'Amore /*
140*4bb7efa7SGarrett D'Amore  * Note that R1_COM_CRC_ERR, R1_ILLEGAL_COMMAND, R1_ERASE_SEQ_ERROR, and
141*4bb7efa7SGarrett D'Amore  * R1_AKE_SEQ_ERROR errors are delayed error bits reported on the next
142*4bb7efa7SGarrett D'Amore  * command.  So we don't list them here.
143*4bb7efa7SGarrett D'Amore  */
144*4bb7efa7SGarrett D'Amore #define	R1_ERRS	(\
145*4bb7efa7SGarrett D'Amore 	R1_ERROR | R1_OUT_OF_RANGE | R1_ADDRESS_ERROR | R1_BLOCK_LEN_ERROR | \
146*4bb7efa7SGarrett D'Amore 	R1_ERASE_PARAM | R1_WP_VIOLATION | R1_LOCK_FAILED | \
147*4bb7efa7SGarrett D'Amore 	R1_CARD_ECC_FAILED | R1_CC_ERROR | R1_CSD_OVERWRITE | \
148*4bb7efa7SGarrett D'Amore 	R1_WP_ERASE_SKIP)
149*4bb7efa7SGarrett D'Amore 
150*4bb7efa7SGarrett D'Amore #define	R1_STATE(x)	(((x) & 0xf) >> 9)
151*4bb7efa7SGarrett D'Amore 
152*4bb7efa7SGarrett D'Amore /*
153*4bb7efa7SGarrett D'Amore  * R5 status bits.
154*4bb7efa7SGarrett D'Amore  */
155*4bb7efa7SGarrett D'Amore #define	R5_COM_CRC_ERROR	(1U << 7)
156*4bb7efa7SGarrett D'Amore #define	R5_ILLEGAL_COMMAND	(1U << 6)
157*4bb7efa7SGarrett D'Amore #define	R5_ERROR		(1U << 3)
158*4bb7efa7SGarrett D'Amore #define	R5_RFU			(1U << 2)
159*4bb7efa7SGarrett D'Amore #define	R5_FUNCTION_NUMBER	(1U << 1)
160*4bb7efa7SGarrett D'Amore #define	R5_OUT_OF_RANGE		(1U << 0)
161*4bb7efa7SGarrett D'Amore 
162*4bb7efa7SGarrett D'Amore #define	R5_ERRS	(R5_ERROR | R5_FUNCTION_NUMBER | R5_OUT_OF_RANGE)
163*4bb7efa7SGarrett D'Amore 
164*4bb7efa7SGarrett D'Amore #define	R5_IO_STATE(x)	(((x) & 0x3) >> 4)
165*4bb7efa7SGarrett D'Amore 
166*4bb7efa7SGarrett D'Amore /*
167*4bb7efa7SGarrett D'Amore  * R7 bits (CMD8).
168*4bb7efa7SGarrett D'Amore  */
169*4bb7efa7SGarrett D'Amore #define	R7_VHS_27_36V		(1U << 8)
170*4bb7efa7SGarrett D'Amore #define	R7_PATTERN		(0xAA)
171*4bb7efa7SGarrett D'Amore 
172*4bb7efa7SGarrett D'Amore /*
173*4bb7efa7SGarrett D'Amore  * OCR bits.
174*4bb7efa7SGarrett D'Amore  */
175*4bb7efa7SGarrett D'Amore #define	OCR_POWER_UP		(1U << 31)
176*4bb7efa7SGarrett D'Amore #define	OCR_CCS			(1U << 30)
177*4bb7efa7SGarrett D'Amore #define	OCR_FUNCS(x)		(((x) & 7) >> 28)	/* SDIO only */
178*4bb7efa7SGarrett D'Amore #define	OCR_MEM_PRESENT		(1U << 27)		/* SDIO only */
179*4bb7efa7SGarrett D'Amore #define	OCR_VOLTAGE_MASK	(0xffffffU)		/* (bits 0-23 */
180*4bb7efa7SGarrett D'Amore #define	OCR_HI_MASK		(0xff8000U)		/* 2.7-3.6V */
181*4bb7efa7SGarrett D'Amore #define	OCR_35_36V		(1U << 23)
182*4bb7efa7SGarrett D'Amore #define	OCR_34_35V		(1U << 22)
183*4bb7efa7SGarrett D'Amore #define	OCR_33_34V		(1U << 21)
184*4bb7efa7SGarrett D'Amore #define	OCR_32_33V		(1U << 20)
185*4bb7efa7SGarrett D'Amore #define	OCR_31_32V		(1U << 19)
186*4bb7efa7SGarrett D'Amore #define	OCR_30_31V		(1U << 18)
187*4bb7efa7SGarrett D'Amore #define	OCR_29_30V		(1U << 17)
188*4bb7efa7SGarrett D'Amore #define	OCR_28_29V		(1U << 16)
189*4bb7efa7SGarrett D'Amore #define	OCR_27_28V		(1U << 15)
190*4bb7efa7SGarrett D'Amore #define	OCR_26_27V		(1U << 14)
191*4bb7efa7SGarrett D'Amore #define	OCR_25_26V		(1U << 14)
192*4bb7efa7SGarrett D'Amore #define	OCR_24_25V		(1U << 13)
193*4bb7efa7SGarrett D'Amore #define	OCR_23_24V		(1U << 12)
194*4bb7efa7SGarrett D'Amore #define	OCR_22_23V		(1U << 11)
195*4bb7efa7SGarrett D'Amore #define	OCR_21_22V		(1U << 10)
196*4bb7efa7SGarrett D'Amore #define	OCR_20_21V		(1U << 9)
197*4bb7efa7SGarrett D'Amore #define	OCR_19_20V		(1U << 8)
198*4bb7efa7SGarrett D'Amore #define	OCR_18_19V		(1U << 7)
199*4bb7efa7SGarrett D'Amore #define	OCR_17_18V		(1U << 6)
200*4bb7efa7SGarrett D'Amore 
201*4bb7efa7SGarrett D'Amore 
202*4bb7efa7SGarrett D'Amore /*
203*4bb7efa7SGarrett D'Amore  * Command structure.  Used internally by the framework, and by host
204*4bb7efa7SGarrett D'Amore  * drivers.  Note that it is forbidden to depend on the size of this
205*4bb7efa7SGarrett D'Amore  * structure.
206*4bb7efa7SGarrett D'Amore  */
207*4bb7efa7SGarrett D'Amore typedef struct sda_cmd sda_cmd_t;
208*4bb7efa7SGarrett D'Amore 
209*4bb7efa7SGarrett D'Amore struct sda_cmd {
210*4bb7efa7SGarrett D'Amore 	/*
211*4bb7efa7SGarrett D'Amore 	 * The ordering of these is done to maximize packing.
212*4bb7efa7SGarrett D'Amore 	 */
213*4bb7efa7SGarrett D'Amore 	sda_index_t		sc_index;	/* command name */
214*4bb7efa7SGarrett D'Amore 	sda_rtype_t		sc_rtype;	/* response type expected */
215*4bb7efa7SGarrett D'Amore 	uint16_t		sc_flags;
216*4bb7efa7SGarrett D'Amore 	uint32_t		sc_argument;	/* command argument */
217*4bb7efa7SGarrett D'Amore 
218*4bb7efa7SGarrett D'Amore 	uint32_t		sc_response[4];
219*4bb7efa7SGarrett D'Amore 
220*4bb7efa7SGarrett D'Amore 	uint16_t		sc_nblks;
221*4bb7efa7SGarrett D'Amore 	uint16_t		sc_blksz;
222*4bb7efa7SGarrett D'Amore 
223*4bb7efa7SGarrett D'Amore 	uint32_t		sc_resid;
224*4bb7efa7SGarrett D'Amore 
225*4bb7efa7SGarrett D'Amore 	uint_t			sc_ndmac;	/* # DMA cookies */
226*4bb7efa7SGarrett D'Amore 	ddi_dma_cookie_t	*sc_dmacs;	/* actual DMA cookies */
227*4bb7efa7SGarrett D'Amore 	caddr_t			sc_kvaddr;	/* kernel virtual address */
228*4bb7efa7SGarrett D'Amore 
229*4bb7efa7SGarrett D'Amore #define	SDA_CMDF_READ		0x0001		/* transfer direction */
230*4bb7efa7SGarrett D'Amore #define	SDA_CMDF_WRITE		0x0002		/* transfer direction */
231*4bb7efa7SGarrett D'Amore #define	SDA_CMDF_AUTO_CMD12	0x0004		/* cmd12 requested */
232*4bb7efa7SGarrett D'Amore /* private flags .. not for driver consumption */
233*4bb7efa7SGarrett D'Amore #define	SDA_CMDF_DAT		0x0100		/* data phase pending */
234*4bb7efa7SGarrett D'Amore #define	SDA_CMDF_BUSY		0x0200		/* cmd in-flight or queued */
235*4bb7efa7SGarrett D'Amore #define	SDA_CMDF_INIT		0x0400		/* initialization command */
236*4bb7efa7SGarrett D'Amore #define	SDA_CMDF_MEM		0x0800		/* memory target command */
237*4bb7efa7SGarrett D'Amore };
238*4bb7efa7SGarrett D'Amore 
239*4bb7efa7SGarrett D'Amore _NOTE(SCHEME_PROTECTS_DATA("unshared request", sda_cmd))
240*4bb7efa7SGarrett D'Amore 
241*4bb7efa7SGarrett D'Amore /*
242*4bb7efa7SGarrett D'Amore  * The framework has two APIs.  The first API is for host controllers,
243*4bb7efa7SGarrett D'Amore  * and is referred to as SDHOST.  The second API is for target devices,
244*4bb7efa7SGarrett D'Amore  * and is referred to as SDCLIENT.  Please don't mix and match usage outside
245*4bb7efa7SGarrett D'Amore  * of the framework implementation itself!
246*4bb7efa7SGarrett D'Amore  */
247*4bb7efa7SGarrett D'Amore 
248*4bb7efa7SGarrett D'Amore typedef struct sda_host sda_host_t;
249*4bb7efa7SGarrett D'Amore 
250*4bb7efa7SGarrett D'Amore typedef enum {
251*4bb7efa7SGarrett D'Amore 	SDA_PROP_INSERTED = 	1,	/* R: is card inserted? */
252*4bb7efa7SGarrett D'Amore 	SDA_PROP_WPROTECT =	2,	/* R: is card write protected */
253*4bb7efa7SGarrett D'Amore 	SDA_PROP_LED =		3,	/* W: LED */
254*4bb7efa7SGarrett D'Amore 	SDA_PROP_CLOCK =	4,	/* R: frequency, Hz */
255*4bb7efa7SGarrett D'Amore 	SDA_PROP_BUSWIDTH =	5,	/* W: bus width */
256*4bb7efa7SGarrett D'Amore 	SDA_PROP_OCR =		6,	/* RW: ocr R: supported, W: set curr */
257*4bb7efa7SGarrett D'Amore 	SDA_PROP_CAP_4BITS =	7,	/* R: 4 bit data bus? */
258*4bb7efa7SGarrett D'Amore 	SDA_PROP_CAP_8BITS =	8,	/* R: MMC future expansion */
259*4bb7efa7SGarrett D'Amore 	SDA_PROP_CAP_HISPEED =	9,	/* R: fast bus rates (> 25MHz) */
260*4bb7efa7SGarrett D'Amore 	SDA_PROP_CAP_INTR =	10,	/* R: SDIO interrupt support */
261*4bb7efa7SGarrett D'Amore 	SDA_PROP_CAP_NOPIO =	11,	/* R: Never needs bp_mapin */
262*4bb7efa7SGarrett D'Amore 	SDA_PROP_HISPEED =	12	/* W: high speed (>25MHz) */
263*4bb7efa7SGarrett D'Amore } sda_prop_t;
264*4bb7efa7SGarrett D'Amore 
265*4bb7efa7SGarrett D'Amore typedef enum {
266*4bb7efa7SGarrett D'Amore 	SDA_FAULT_NONE =	0,	/* No failure */
267*4bb7efa7SGarrett D'Amore 	SDA_FAULT_ACMD12 =	1,	/* Auto CMD12 failure */
268*4bb7efa7SGarrett D'Amore 	SDA_FAULT_CRC7 =	2,	/* CRC7 failure on CMD/DAT line */
269*4bb7efa7SGarrett D'Amore 	SDA_FAULT_PROTO =	3,	/* SD/MMC protocol error */
270*4bb7efa7SGarrett D'Amore 	SDA_FAULT_CURRENT =	4,	/* Current overlimit detected */
271*4bb7efa7SGarrett D'Amore 	SDA_FAULT_INIT =	5,	/* Card initialization failure */
272*4bb7efa7SGarrett D'Amore 	SDA_FAULT_TIMEOUT =	6,	/* Unexpected timeout failure */
273*4bb7efa7SGarrett D'Amore 	SDA_FAULT_HOST =	7,	/* Internal host or slot failure */
274*4bb7efa7SGarrett D'Amore 	SDA_FAULT_RESET =	8,	/* Slot failed to reset */
275*4bb7efa7SGarrett D'Amore } sda_fault_t;
276*4bb7efa7SGarrett D'Amore 
277*4bb7efa7SGarrett D'Amore typedef enum {
278*4bb7efa7SGarrett D'Amore 	SDA_EOK =		0,	/* Success */
279*4bb7efa7SGarrett D'Amore 	SDA_ECRC7 =		1,	/* CRC7 failure */
280*4bb7efa7SGarrett D'Amore 	SDA_EPROTO =		2,	/* SD/MMC protocol error */
281*4bb7efa7SGarrett D'Amore 	SDA_EINVAL =		3,	/* Invalid argument */
282*4bb7efa7SGarrett D'Amore 	SDA_ETIME =		4,	/* Timeout */
283*4bb7efa7SGarrett D'Amore 	SDA_ECMD12 =		5,	/* Failed during stop cmd */
284*4bb7efa7SGarrett D'Amore 	SDA_ENOTSUP =		6,	/* Setting/property not supported */
285*4bb7efa7SGarrett D'Amore 	SDA_ERESID =		7,	/* Incomplete transfer */
286*4bb7efa7SGarrett D'Amore 	SDA_EFAULT =		8,	/* Previous fault condition present */
287*4bb7efa7SGarrett D'Amore 	SDA_ENOMEM =		9,	/* Memory exhausted */
288*4bb7efa7SGarrett D'Amore 	SDA_EWPROTECT =		10,	/* Media is write protected */
289*4bb7efa7SGarrett D'Amore 	SDA_ENODEV =		11,	/* Card removed */
290*4bb7efa7SGarrett D'Amore 	SDA_ERESET =		12,	/* Memory card reset */
291*4bb7efa7SGarrett D'Amore 	SDA_EABORT =		13,	/* Memory command aborted */
292*4bb7efa7SGarrett D'Amore 	SDA_EIO =		14,	/* Other generic error */
293*4bb7efa7SGarrett D'Amore 	SDA_ESUSPENDED =	15,	/* Slot has been suspended */
294*4bb7efa7SGarrett D'Amore } sda_err_t;
295*4bb7efa7SGarrett D'Amore 
296*4bb7efa7SGarrett D'Amore typedef struct sda_ops {
297*4bb7efa7SGarrett D'Amore 	int	so_version;
298*4bb7efa7SGarrett D'Amore #define	SDA_OPS_VERSION	1
299*4bb7efa7SGarrett D'Amore 	sda_err_t	(*so_cmd)(void *, sda_cmd_t *);
300*4bb7efa7SGarrett D'Amore 	sda_err_t	(*so_getprop)(void *, sda_prop_t, uint32_t *);
301*4bb7efa7SGarrett D'Amore 	sda_err_t	(*so_setprop)(void *, sda_prop_t, uint32_t);
302*4bb7efa7SGarrett D'Amore 	sda_err_t	(*so_poll)(void *);
303*4bb7efa7SGarrett D'Amore 	sda_err_t	(*so_reset)(void *);
304*4bb7efa7SGarrett D'Amore 	sda_err_t	(*so_halt)(void *);
305*4bb7efa7SGarrett D'Amore } sda_ops_t;
306*4bb7efa7SGarrett D'Amore 
307*4bb7efa7SGarrett D'Amore /*
308*4bb7efa7SGarrett D'Amore  * Host operations.
309*4bb7efa7SGarrett D'Amore  */
310*4bb7efa7SGarrett D'Amore void sda_host_init_ops(struct dev_ops *);
311*4bb7efa7SGarrett D'Amore void sda_host_fini_ops(struct dev_ops *);
312*4bb7efa7SGarrett D'Amore sda_host_t *sda_host_alloc(dev_info_t *, int, sda_ops_t *, ddi_dma_attr_t *);
313*4bb7efa7SGarrett D'Amore void sda_host_free(sda_host_t *);
314*4bb7efa7SGarrett D'Amore void sda_host_set_private(sda_host_t *, int, void *);
315*4bb7efa7SGarrett D'Amore int sda_host_attach(sda_host_t *);
316*4bb7efa7SGarrett D'Amore void sda_host_detach(sda_host_t *);
317*4bb7efa7SGarrett D'Amore void sda_host_detect(sda_host_t *, int);
318*4bb7efa7SGarrett D'Amore void sda_host_fault(sda_host_t *, int, sda_fault_t);
319*4bb7efa7SGarrett D'Amore void sda_host_transfer(sda_host_t *, int, sda_err_t);
320*4bb7efa7SGarrett D'Amore /*PRINTFLIKE3*/
321*4bb7efa7SGarrett D'Amore void sda_host_log(sda_host_t *, int, const char *, ...);
322*4bb7efa7SGarrett D'Amore 
323*4bb7efa7SGarrett D'Amore #ifdef	__cplusplus
324*4bb7efa7SGarrett D'Amore }
325*4bb7efa7SGarrett D'Amore #endif
326*4bb7efa7SGarrett D'Amore 
327*4bb7efa7SGarrett D'Amore #endif	/* _SYS_SDCARD_SDA_H */
328