xref: /illumos-gate/usr/src/uts/common/sys/sdcard/sda.h (revision 3f7d54a6)
14bb7efa7SGarrett D'Amore /*
24bb7efa7SGarrett D'Amore  * CDDL HEADER START
34bb7efa7SGarrett D'Amore  *
44bb7efa7SGarrett D'Amore  * The contents of this file are subject to the terms of the
54bb7efa7SGarrett D'Amore  * Common Development and Distribution License (the "License").
64bb7efa7SGarrett D'Amore  * You may not use this file except in compliance with the License.
74bb7efa7SGarrett D'Amore  *
84bb7efa7SGarrett D'Amore  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
94bb7efa7SGarrett D'Amore  * or http://www.opensolaris.org/os/licensing.
104bb7efa7SGarrett D'Amore  * See the License for the specific language governing permissions
114bb7efa7SGarrett D'Amore  * and limitations under the License.
124bb7efa7SGarrett D'Amore  *
134bb7efa7SGarrett D'Amore  * When distributing Covered Code, include this CDDL HEADER in each
144bb7efa7SGarrett D'Amore  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
154bb7efa7SGarrett D'Amore  * If applicable, add the following below this CDDL HEADER, with the
164bb7efa7SGarrett D'Amore  * fields enclosed by brackets "[]" replaced with your own identifying
174bb7efa7SGarrett D'Amore  * information: Portions Copyright [yyyy] [name of copyright owner]
184bb7efa7SGarrett D'Amore  *
194bb7efa7SGarrett D'Amore  * CDDL HEADER END
204bb7efa7SGarrett D'Amore  */
214bb7efa7SGarrett D'Amore /*
22*3f7d54a6SGarrett D'Amore  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
234bb7efa7SGarrett D'Amore  */
244bb7efa7SGarrett D'Amore 
254bb7efa7SGarrett D'Amore #ifndef	_SYS_SDCARD_SDA_H
264bb7efa7SGarrett D'Amore #define	_SYS_SDCARD_SDA_H
274bb7efa7SGarrett D'Amore 
284bb7efa7SGarrett D'Amore #include <sys/types.h>
294bb7efa7SGarrett D'Amore #include <sys/note.h>
304bb7efa7SGarrett D'Amore 
314bb7efa7SGarrett D'Amore #ifdef	__cplusplus
324bb7efa7SGarrett D'Amore extern "C" {
334bb7efa7SGarrett D'Amore #endif
344bb7efa7SGarrett D'Amore 
354bb7efa7SGarrett D'Amore /*
364bb7efa7SGarrett D'Amore  * SD card common framework.  This module provides most of the common
374bb7efa7SGarrett D'Amore  * functionality so that SecureDigital host adapters and client devices
384bb7efa7SGarrett D'Amore  * (such as the sdmem driver) can share common code.
394bb7efa7SGarrett D'Amore  */
404bb7efa7SGarrett D'Amore 
414bb7efa7SGarrett D'Amore /*
424bb7efa7SGarrett D'Amore  * SD Commands.  Commmand format is 48-bits as follows:
434bb7efa7SGarrett D'Amore  *
444bb7efa7SGarrett D'Amore  * bits		value		desc
454bb7efa7SGarrett D'Amore  * -------------------------------------------
464bb7efa7SGarrett D'Amore  * 47		0		start bit
474bb7efa7SGarrett D'Amore  * 46		1		transmission bit
484bb7efa7SGarrett D'Amore  * 45:40	cmd		command index (see values listed below)
494bb7efa7SGarrett D'Amore  * 39:8		arg		32-bit command argument
504bb7efa7SGarrett D'Amore  * 7:1		crc7		crc7 check value
514bb7efa7SGarrett D'Amore  * 0		1		end bit
524bb7efa7SGarrett D'Amore  * -------------------------------------------
534bb7efa7SGarrett D'Amore  */
544bb7efa7SGarrett D'Amore typedef enum {
554bb7efa7SGarrett D'Amore 	CMD_GO_IDLE = 0,
564bb7efa7SGarrett D'Amore 	CMD_SEND_OCR = 1,		/* MMC only */
574bb7efa7SGarrett D'Amore 	CMD_BCAST_CID = 2,
584bb7efa7SGarrett D'Amore 	CMD_SEND_RCA = 3,
594bb7efa7SGarrett D'Amore 	CMD_SET_DSR = 4,
604bb7efa7SGarrett D'Amore 	CMD_IO_SEND_OCR = 5,		/* SDIO only */
614bb7efa7SGarrett D'Amore 	CMD_SWITCH_FUNC = 6,
624bb7efa7SGarrett D'Amore 	CMD_SELECT_CARD = 7,
634bb7efa7SGarrett D'Amore 	CMD_SEND_IF_COND = 8,
644bb7efa7SGarrett D'Amore 	CMD_SEND_CSD = 9,
654bb7efa7SGarrett D'Amore 	CMD_SEND_CID = 10,
664bb7efa7SGarrett D'Amore 	CMD_STOP_TRANSMIT = 12,
674bb7efa7SGarrett D'Amore 	CMD_SEND_STATUS = 13,
684bb7efa7SGarrett D'Amore 	CMD_GO_INACTIVE = 15,
694bb7efa7SGarrett D'Amore 	CMD_SET_BLOCKLEN = 16,
704bb7efa7SGarrett D'Amore 	CMD_READ_SINGLE = 17,
714bb7efa7SGarrett D'Amore 	CMD_READ_MULTI = 18,
724bb7efa7SGarrett D'Amore 	CMD_WRITE_SINGLE = 24,
734bb7efa7SGarrett D'Amore 	CMD_WRITE_MULTI = 25,
744bb7efa7SGarrett D'Amore 	CMD_PROGRAM_CSD = 27,
754bb7efa7SGarrett D'Amore 	CMD_SET_WRITE_PROT = 28,
764bb7efa7SGarrett D'Amore 	CMD_CLR_WRITE_PROT = 29,
774bb7efa7SGarrett D'Amore 	CMD_SEND_WRITE_PROT = 30,
784bb7efa7SGarrett D'Amore 	CMD_ERASE_START = 32,
794bb7efa7SGarrett D'Amore 	CMD_ERASE_END = 33,
804bb7efa7SGarrett D'Amore 	CMD_ERASE = 38,
814bb7efa7SGarrett D'Amore 	CMD_LOCK = 42,
824bb7efa7SGarrett D'Amore 	CMD_IO_RW_DIRECT = 52,
834bb7efa7SGarrett D'Amore 	CMD_IO_RW_EXTENDED = 53,
844bb7efa7SGarrett D'Amore 	CMD_APP_CMD = 55,
854bb7efa7SGarrett D'Amore 	CMD_GEN_CMD = 56,
864bb7efa7SGarrett D'Amore 	/* APP CMD values, send ACMD first */
874bb7efa7SGarrett D'Amore 	ACMD_SET_BUS_WIDTH = 6,
884bb7efa7SGarrett D'Amore 	ACMD_SD_STATUS = 13,
894bb7efa7SGarrett D'Amore 	ACMD_SEND_NUM_WR_BLKS = 22,
904bb7efa7SGarrett D'Amore 	ACMD_SET_WR_BLK_ERASE_COUNT = 23,
914bb7efa7SGarrett D'Amore 	ACMD_SD_SEND_OCR = 41,
924bb7efa7SGarrett D'Amore 	ACMD_SET_CLR_CARD_DETECT = 42,
934bb7efa7SGarrett D'Amore 	ACMD_SEND_SCR = 51
944bb7efa7SGarrett D'Amore } sda_index_t;
954bb7efa7SGarrett D'Amore 
964bb7efa7SGarrett D'Amore /*
974bb7efa7SGarrett D'Amore  * Classes of response type.  Note that we encode the "busy bit" as
984bb7efa7SGarrett D'Amore  * value 0x10.
994bb7efa7SGarrett D'Amore  */
1004bb7efa7SGarrett D'Amore typedef enum {
1014bb7efa7SGarrett D'Amore 	R0 = 0,
1024bb7efa7SGarrett D'Amore 	R1 = 1,
1034bb7efa7SGarrett D'Amore 	R2 = 2,
1044bb7efa7SGarrett D'Amore 	R3 = 3,
1054bb7efa7SGarrett D'Amore 	R4 = 4,
1064bb7efa7SGarrett D'Amore 	R5 = 5,
1074bb7efa7SGarrett D'Amore 	R6 = 6,
1084bb7efa7SGarrett D'Amore 	R7 = 7,
1094bb7efa7SGarrett D'Amore 	Rb = 0x10,
1104bb7efa7SGarrett D'Amore 	R1b = 0x11,
1114bb7efa7SGarrett D'Amore 	R5b = 0x15
1124bb7efa7SGarrett D'Amore } sda_rtype_t;
1134bb7efa7SGarrett D'Amore 
1144bb7efa7SGarrett D'Amore /*
1154bb7efa7SGarrett D'Amore  * R1 status bits.
1164bb7efa7SGarrett D'Amore  */
1174bb7efa7SGarrett D'Amore #define	R1_OUT_OF_RANGE		(1U << 31)
1184bb7efa7SGarrett D'Amore #define	R1_ADDRESS_ERROR	(1U << 30)
1194bb7efa7SGarrett D'Amore #define	R1_BLOCK_LEN_ERROR	(1U << 29)
1204bb7efa7SGarrett D'Amore #define	R1_ERASE_SEQ_ERROR	(1U << 28)
1214bb7efa7SGarrett D'Amore #define	R1_ERASE_PARAM		(1U << 27)
1224bb7efa7SGarrett D'Amore #define	R1_WP_VIOLATION		(1U << 26)
1234bb7efa7SGarrett D'Amore #define	R1_CARD_IS_LOCKED	(1U << 25)
1244bb7efa7SGarrett D'Amore #define	R1_LOCK_FAILED		(1U << 24)
1254bb7efa7SGarrett D'Amore #define	R1_COM_CRC_ERROR	(1U << 23)
1264bb7efa7SGarrett D'Amore #define	R1_ILLEGAL_COMMAND	(1U << 22)
1274bb7efa7SGarrett D'Amore #define	R1_CARD_ECC_FAILED	(1U << 21)
1284bb7efa7SGarrett D'Amore #define	R1_CC_ERROR		(1U << 20)
1294bb7efa7SGarrett D'Amore #define	R1_ERROR		(1U << 19)
1304bb7efa7SGarrett D'Amore #define	R1_CSD_OVERWRITE	(1U << 16)
1314bb7efa7SGarrett D'Amore #define	R1_WP_ERASE_SKIP	(1U << 15)
1324bb7efa7SGarrett D'Amore #define	R1_CARD_ECC_DIS		(1U << 14)
1334bb7efa7SGarrett D'Amore #define	R1_ERASE_RESET		(1U << 13)
1344bb7efa7SGarrett D'Amore #define	R1_READY_FOR_DATA	(1U << 8)
1354bb7efa7SGarrett D'Amore #define	R1_APP_CMD		(1U << 5)
1364bb7efa7SGarrett D'Amore #define	R1_AKE_SEQ_ERROR	(1U << 3)
1374bb7efa7SGarrett D'Amore 
1384bb7efa7SGarrett D'Amore /*
1394bb7efa7SGarrett D'Amore  * Note that R1_COM_CRC_ERR, R1_ILLEGAL_COMMAND, R1_ERASE_SEQ_ERROR, and
1404bb7efa7SGarrett D'Amore  * R1_AKE_SEQ_ERROR errors are delayed error bits reported on the next
1414bb7efa7SGarrett D'Amore  * command.  So we don't list them here.
1424bb7efa7SGarrett D'Amore  */
1434bb7efa7SGarrett D'Amore #define	R1_ERRS	(\
1444bb7efa7SGarrett D'Amore 	R1_ERROR | R1_OUT_OF_RANGE | R1_ADDRESS_ERROR | R1_BLOCK_LEN_ERROR | \
1454bb7efa7SGarrett D'Amore 	R1_ERASE_PARAM | R1_WP_VIOLATION | R1_LOCK_FAILED | \
1464bb7efa7SGarrett D'Amore 	R1_CARD_ECC_FAILED | R1_CC_ERROR | R1_CSD_OVERWRITE | \
1474bb7efa7SGarrett D'Amore 	R1_WP_ERASE_SKIP)
1484bb7efa7SGarrett D'Amore 
1494bb7efa7SGarrett D'Amore #define	R1_STATE(x)	(((x) & 0xf) >> 9)
1504bb7efa7SGarrett D'Amore 
1514bb7efa7SGarrett D'Amore /*
1524bb7efa7SGarrett D'Amore  * R5 status bits.
1534bb7efa7SGarrett D'Amore  */
1544bb7efa7SGarrett D'Amore #define	R5_COM_CRC_ERROR	(1U << 7)
1554bb7efa7SGarrett D'Amore #define	R5_ILLEGAL_COMMAND	(1U << 6)
1564bb7efa7SGarrett D'Amore #define	R5_ERROR		(1U << 3)
1574bb7efa7SGarrett D'Amore #define	R5_RFU			(1U << 2)
1584bb7efa7SGarrett D'Amore #define	R5_FUNCTION_NUMBER	(1U << 1)
1594bb7efa7SGarrett D'Amore #define	R5_OUT_OF_RANGE		(1U << 0)
1604bb7efa7SGarrett D'Amore 
1614bb7efa7SGarrett D'Amore #define	R5_ERRS	(R5_ERROR | R5_FUNCTION_NUMBER | R5_OUT_OF_RANGE)
1624bb7efa7SGarrett D'Amore 
1634bb7efa7SGarrett D'Amore #define	R5_IO_STATE(x)	(((x) & 0x3) >> 4)
1644bb7efa7SGarrett D'Amore 
1654bb7efa7SGarrett D'Amore /*
1664bb7efa7SGarrett D'Amore  * R7 bits (CMD8).
1674bb7efa7SGarrett D'Amore  */
1684bb7efa7SGarrett D'Amore #define	R7_VHS_27_36V		(1U << 8)
1694bb7efa7SGarrett D'Amore #define	R7_PATTERN		(0xAA)
1704bb7efa7SGarrett D'Amore 
1714bb7efa7SGarrett D'Amore /*
1724bb7efa7SGarrett D'Amore  * OCR bits.
1734bb7efa7SGarrett D'Amore  */
1744bb7efa7SGarrett D'Amore #define	OCR_POWER_UP		(1U << 31)
1754bb7efa7SGarrett D'Amore #define	OCR_CCS			(1U << 30)
1764bb7efa7SGarrett D'Amore #define	OCR_FUNCS(x)		(((x) & 7) >> 28)	/* SDIO only */
1774bb7efa7SGarrett D'Amore #define	OCR_MEM_PRESENT		(1U << 27)		/* SDIO only */
1784bb7efa7SGarrett D'Amore #define	OCR_VOLTAGE_MASK	(0xffffffU)		/* (bits 0-23 */
1794bb7efa7SGarrett D'Amore #define	OCR_HI_MASK		(0xff8000U)		/* 2.7-3.6V */
1804bb7efa7SGarrett D'Amore #define	OCR_35_36V		(1U << 23)
1814bb7efa7SGarrett D'Amore #define	OCR_34_35V		(1U << 22)
1824bb7efa7SGarrett D'Amore #define	OCR_33_34V		(1U << 21)
1834bb7efa7SGarrett D'Amore #define	OCR_32_33V		(1U << 20)
1844bb7efa7SGarrett D'Amore #define	OCR_31_32V		(1U << 19)
1854bb7efa7SGarrett D'Amore #define	OCR_30_31V		(1U << 18)
1864bb7efa7SGarrett D'Amore #define	OCR_29_30V		(1U << 17)
1874bb7efa7SGarrett D'Amore #define	OCR_28_29V		(1U << 16)
1884bb7efa7SGarrett D'Amore #define	OCR_27_28V		(1U << 15)
1894bb7efa7SGarrett D'Amore #define	OCR_26_27V		(1U << 14)
1904bb7efa7SGarrett D'Amore #define	OCR_25_26V		(1U << 14)
1914bb7efa7SGarrett D'Amore #define	OCR_24_25V		(1U << 13)
1924bb7efa7SGarrett D'Amore #define	OCR_23_24V		(1U << 12)
1934bb7efa7SGarrett D'Amore #define	OCR_22_23V		(1U << 11)
1944bb7efa7SGarrett D'Amore #define	OCR_21_22V		(1U << 10)
1954bb7efa7SGarrett D'Amore #define	OCR_20_21V		(1U << 9)
1964bb7efa7SGarrett D'Amore #define	OCR_19_20V		(1U << 8)
1974bb7efa7SGarrett D'Amore #define	OCR_18_19V		(1U << 7)
1984bb7efa7SGarrett D'Amore #define	OCR_17_18V		(1U << 6)
1994bb7efa7SGarrett D'Amore 
2004bb7efa7SGarrett D'Amore 
2014bb7efa7SGarrett D'Amore /*
2024bb7efa7SGarrett D'Amore  * Command structure.  Used internally by the framework, and by host
2034bb7efa7SGarrett D'Amore  * drivers.  Note that it is forbidden to depend on the size of this
2044bb7efa7SGarrett D'Amore  * structure.
2054bb7efa7SGarrett D'Amore  */
2064bb7efa7SGarrett D'Amore typedef struct sda_cmd sda_cmd_t;
2074bb7efa7SGarrett D'Amore 
2084bb7efa7SGarrett D'Amore struct sda_cmd {
2094bb7efa7SGarrett D'Amore 	/*
2104bb7efa7SGarrett D'Amore 	 * The ordering of these is done to maximize packing.
2114bb7efa7SGarrett D'Amore 	 */
2124bb7efa7SGarrett D'Amore 	sda_index_t		sc_index;	/* command name */
2134bb7efa7SGarrett D'Amore 	sda_rtype_t		sc_rtype;	/* response type expected */
2144bb7efa7SGarrett D'Amore 	uint16_t		sc_flags;
2154bb7efa7SGarrett D'Amore 	uint32_t		sc_argument;	/* command argument */
2164bb7efa7SGarrett D'Amore 
2174bb7efa7SGarrett D'Amore 	uint32_t		sc_response[4];
2184bb7efa7SGarrett D'Amore 
2194bb7efa7SGarrett D'Amore 	uint16_t		sc_nblks;
2204bb7efa7SGarrett D'Amore 	uint16_t		sc_blksz;
2214bb7efa7SGarrett D'Amore 
2224bb7efa7SGarrett D'Amore 	uint32_t		sc_resid;
2234bb7efa7SGarrett D'Amore 
224*3f7d54a6SGarrett D'Amore 	ddi_dma_handle_t	sc_dmah;
2254bb7efa7SGarrett D'Amore 	uint_t			sc_ndmac;	/* # DMA cookies */
226*3f7d54a6SGarrett D'Amore 	ddi_dma_cookie_t	sc_dmac;	/* actual DMA cookies */
2274bb7efa7SGarrett D'Amore 	caddr_t			sc_kvaddr;	/* kernel virtual address */
2284bb7efa7SGarrett D'Amore 
2294bb7efa7SGarrett D'Amore #define	SDA_CMDF_READ		0x0001		/* transfer direction */
2304bb7efa7SGarrett D'Amore #define	SDA_CMDF_WRITE		0x0002		/* transfer direction */
2314bb7efa7SGarrett D'Amore #define	SDA_CMDF_AUTO_CMD12	0x0004		/* cmd12 requested */
2324bb7efa7SGarrett D'Amore /* private flags .. not for driver consumption */
2334bb7efa7SGarrett D'Amore #define	SDA_CMDF_DAT		0x0100		/* data phase pending */
2344bb7efa7SGarrett D'Amore #define	SDA_CMDF_BUSY		0x0200		/* cmd in-flight or queued */
2354bb7efa7SGarrett D'Amore #define	SDA_CMDF_INIT		0x0400		/* initialization command */
2364bb7efa7SGarrett D'Amore #define	SDA_CMDF_MEM		0x0800		/* memory target command */
2374bb7efa7SGarrett D'Amore };
2384bb7efa7SGarrett D'Amore 
2394bb7efa7SGarrett D'Amore /*
2404bb7efa7SGarrett D'Amore  * The framework has two APIs.  The first API is for host controllers,
2414bb7efa7SGarrett D'Amore  * and is referred to as SDHOST.  The second API is for target devices,
2424bb7efa7SGarrett D'Amore  * and is referred to as SDCLIENT.  Please don't mix and match usage outside
2434bb7efa7SGarrett D'Amore  * of the framework implementation itself!
2444bb7efa7SGarrett D'Amore  */
2454bb7efa7SGarrett D'Amore 
2464bb7efa7SGarrett D'Amore typedef struct sda_host sda_host_t;
2474bb7efa7SGarrett D'Amore 
2484bb7efa7SGarrett D'Amore typedef enum {
2494bb7efa7SGarrett D'Amore 	SDA_PROP_INSERTED = 	1,	/* R: is card inserted? */
2504bb7efa7SGarrett D'Amore 	SDA_PROP_WPROTECT =	2,	/* R: is card write protected */
2514bb7efa7SGarrett D'Amore 	SDA_PROP_LED =		3,	/* W: LED */
2524bb7efa7SGarrett D'Amore 	SDA_PROP_CLOCK =	4,	/* R: frequency, Hz */
2534bb7efa7SGarrett D'Amore 	SDA_PROP_BUSWIDTH =	5,	/* W: bus width */
2544bb7efa7SGarrett D'Amore 	SDA_PROP_OCR =		6,	/* RW: ocr R: supported, W: set curr */
2554bb7efa7SGarrett D'Amore 	SDA_PROP_CAP_4BITS =	7,	/* R: 4 bit data bus? */
2564bb7efa7SGarrett D'Amore 	SDA_PROP_CAP_8BITS =	8,	/* R: MMC future expansion */
2574bb7efa7SGarrett D'Amore 	SDA_PROP_CAP_HISPEED =	9,	/* R: fast bus rates (> 25MHz) */
2584bb7efa7SGarrett D'Amore 	SDA_PROP_CAP_INTR =	10,	/* R: SDIO interrupt support */
2594bb7efa7SGarrett D'Amore 	SDA_PROP_CAP_NOPIO =	11,	/* R: Never needs bp_mapin */
2604bb7efa7SGarrett D'Amore 	SDA_PROP_HISPEED =	12	/* W: high speed (>25MHz) */
2614bb7efa7SGarrett D'Amore } sda_prop_t;
2624bb7efa7SGarrett D'Amore 
2634bb7efa7SGarrett D'Amore typedef enum {
2644bb7efa7SGarrett D'Amore 	SDA_FAULT_NONE =	0,	/* No failure */
2654bb7efa7SGarrett D'Amore 	SDA_FAULT_ACMD12 =	1,	/* Auto CMD12 failure */
2664bb7efa7SGarrett D'Amore 	SDA_FAULT_CRC7 =	2,	/* CRC7 failure on CMD/DAT line */
2674bb7efa7SGarrett D'Amore 	SDA_FAULT_PROTO =	3,	/* SD/MMC protocol error */
2684bb7efa7SGarrett D'Amore 	SDA_FAULT_CURRENT =	4,	/* Current overlimit detected */
2694bb7efa7SGarrett D'Amore 	SDA_FAULT_INIT =	5,	/* Card initialization failure */
2704bb7efa7SGarrett D'Amore 	SDA_FAULT_TIMEOUT =	6,	/* Unexpected timeout failure */
2714bb7efa7SGarrett D'Amore 	SDA_FAULT_HOST =	7,	/* Internal host or slot failure */
2724bb7efa7SGarrett D'Amore 	SDA_FAULT_RESET =	8,	/* Slot failed to reset */
2734bb7efa7SGarrett D'Amore } sda_fault_t;
2744bb7efa7SGarrett D'Amore 
2754bb7efa7SGarrett D'Amore typedef enum {
2764bb7efa7SGarrett D'Amore 	SDA_EOK =		0,	/* Success */
2774bb7efa7SGarrett D'Amore 	SDA_ECRC7 =		1,	/* CRC7 failure */
2784bb7efa7SGarrett D'Amore 	SDA_EPROTO =		2,	/* SD/MMC protocol error */
2794bb7efa7SGarrett D'Amore 	SDA_EINVAL =		3,	/* Invalid argument */
2804bb7efa7SGarrett D'Amore 	SDA_ETIME =		4,	/* Timeout */
2814bb7efa7SGarrett D'Amore 	SDA_ECMD12 =		5,	/* Failed during stop cmd */
2824bb7efa7SGarrett D'Amore 	SDA_ENOTSUP =		6,	/* Setting/property not supported */
2834bb7efa7SGarrett D'Amore 	SDA_ERESID =		7,	/* Incomplete transfer */
2844bb7efa7SGarrett D'Amore 	SDA_EFAULT =		8,	/* Previous fault condition present */
2854bb7efa7SGarrett D'Amore 	SDA_ENOMEM =		9,	/* Memory exhausted */
2864bb7efa7SGarrett D'Amore 	SDA_EWPROTECT =		10,	/* Media is write protected */
2874bb7efa7SGarrett D'Amore 	SDA_ENODEV =		11,	/* Card removed */
2884bb7efa7SGarrett D'Amore 	SDA_ERESET =		12,	/* Memory card reset */
2894bb7efa7SGarrett D'Amore 	SDA_EABORT =		13,	/* Memory command aborted */
2904bb7efa7SGarrett D'Amore 	SDA_EIO =		14,	/* Other generic error */
2914bb7efa7SGarrett D'Amore 	SDA_ESUSPENDED =	15,	/* Slot has been suspended */
2924bb7efa7SGarrett D'Amore } sda_err_t;
2934bb7efa7SGarrett D'Amore 
2944bb7efa7SGarrett D'Amore typedef struct sda_ops {
2954bb7efa7SGarrett D'Amore 	int	so_version;
2964bb7efa7SGarrett D'Amore #define	SDA_OPS_VERSION	1
2974bb7efa7SGarrett D'Amore 	sda_err_t	(*so_cmd)(void *, sda_cmd_t *);
2984bb7efa7SGarrett D'Amore 	sda_err_t	(*so_getprop)(void *, sda_prop_t, uint32_t *);
2994bb7efa7SGarrett D'Amore 	sda_err_t	(*so_setprop)(void *, sda_prop_t, uint32_t);
3004bb7efa7SGarrett D'Amore 	sda_err_t	(*so_poll)(void *);
3014bb7efa7SGarrett D'Amore 	sda_err_t	(*so_reset)(void *);
3024bb7efa7SGarrett D'Amore 	sda_err_t	(*so_halt)(void *);
3034bb7efa7SGarrett D'Amore } sda_ops_t;
3044bb7efa7SGarrett D'Amore 
3054bb7efa7SGarrett D'Amore /*
3064bb7efa7SGarrett D'Amore  * Host operations.
3074bb7efa7SGarrett D'Amore  */
3084bb7efa7SGarrett D'Amore void sda_host_init_ops(struct dev_ops *);
3094bb7efa7SGarrett D'Amore void sda_host_fini_ops(struct dev_ops *);
3104bb7efa7SGarrett D'Amore sda_host_t *sda_host_alloc(dev_info_t *, int, sda_ops_t *, ddi_dma_attr_t *);
3114bb7efa7SGarrett D'Amore void sda_host_free(sda_host_t *);
3124bb7efa7SGarrett D'Amore void sda_host_set_private(sda_host_t *, int, void *);
3134bb7efa7SGarrett D'Amore int sda_host_attach(sda_host_t *);
3144bb7efa7SGarrett D'Amore void sda_host_detach(sda_host_t *);
315f2b90c3cSGarrett D'Amore void sda_host_suspend(sda_host_t *);
316f2b90c3cSGarrett D'Amore void sda_host_resume(sda_host_t *);
3174bb7efa7SGarrett D'Amore void sda_host_detect(sda_host_t *, int);
3184bb7efa7SGarrett D'Amore void sda_host_fault(sda_host_t *, int, sda_fault_t);
3194bb7efa7SGarrett D'Amore void sda_host_transfer(sda_host_t *, int, sda_err_t);
3204bb7efa7SGarrett D'Amore /*PRINTFLIKE3*/
3214bb7efa7SGarrett D'Amore void sda_host_log(sda_host_t *, int, const char *, ...);
3224bb7efa7SGarrett D'Amore 
3234bb7efa7SGarrett D'Amore #ifdef	__cplusplus
3244bb7efa7SGarrett D'Amore }
3254bb7efa7SGarrett D'Amore #endif
3264bb7efa7SGarrett D'Amore 
3274bb7efa7SGarrett D'Amore #endif	/* _SYS_SDCARD_SDA_H */
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