1*4c06356bSdh /* 2*4c06356bSdh * CDDL HEADER START 3*4c06356bSdh * 4*4c06356bSdh * The contents of this file are subject to the terms of the 5*4c06356bSdh * Common Development and Distribution License (the "License"). 6*4c06356bSdh * You may not use this file except in compliance with the License. 7*4c06356bSdh * 8*4c06356bSdh * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*4c06356bSdh * or http://www.opensolaris.org/os/licensing. 10*4c06356bSdh * See the License for the specific language governing permissions 11*4c06356bSdh * and limitations under the License. 12*4c06356bSdh * 13*4c06356bSdh * When distributing Covered Code, include this CDDL HEADER in each 14*4c06356bSdh * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*4c06356bSdh * If applicable, add the following below this CDDL HEADER, with the 16*4c06356bSdh * fields enclosed by brackets "[]" replaced with your own identifying 17*4c06356bSdh * information: Portions Copyright [yyyy] [name of copyright owner] 18*4c06356bSdh * 19*4c06356bSdh * CDDL HEADER END 20*4c06356bSdh * 21*4c06356bSdh * 22*4c06356bSdh * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23*4c06356bSdh * Use is subject to license terms. 24*4c06356bSdh */ 25*4c06356bSdh /* 26*4c06356bSdh * ATAPI-7 Definitions (subset) that include Serial ATA 27*4c06356bSdh * ATA/ATAPI-7 V3 (d1532v3r4b-ATA-ATAPI-7) 28*4c06356bSdh */ 29*4c06356bSdh #ifndef _ATAPI7V3_H 30*4c06356bSdh #define _ATAPI7V3_H 31*4c06356bSdh #ifdef __cplusplus 32*4c06356bSdh extern "C" { 33*4c06356bSdh #endif 34*4c06356bSdh 35*4c06356bSdh /* 36*4c06356bSdh * Register - Host to Device FIS 37*4c06356bSdh */ 38*4c06356bSdh typedef struct { 39*4c06356bSdh uint8_t fis_type; 40*4c06356bSdh uint8_t idcbits; 41*4c06356bSdh uint8_t cmd; 42*4c06356bSdh uint8_t features; 43*4c06356bSdh #define FEATURE_LBA 0x40 44*4c06356bSdh uint8_t lba_low; 45*4c06356bSdh uint8_t lba_mid; 46*4c06356bSdh uint8_t lba_hi; 47*4c06356bSdh uint8_t device; 48*4c06356bSdh uint8_t lba_low_exp; 49*4c06356bSdh uint8_t lba_mid_exp; 50*4c06356bSdh uint8_t lba_hi_exp; 51*4c06356bSdh uint8_t features_exp; 52*4c06356bSdh uint8_t sector_count; 53*4c06356bSdh uint8_t sector_count_exp; 54*4c06356bSdh uint8_t reserved0; 55*4c06356bSdh uint8_t control; 56*4c06356bSdh uint8_t reserved1[4]; 57*4c06356bSdh } register_h2d_fis_t; 58*4c06356bSdh 59*4c06356bSdh /* 60*4c06356bSdh * Register - Device to Host FIS 61*4c06356bSdh */ 62*4c06356bSdh typedef struct { 63*4c06356bSdh uint8_t fis_type; 64*4c06356bSdh uint8_t idcbits; 65*4c06356bSdh uint8_t status; 66*4c06356bSdh uint8_t error; 67*4c06356bSdh uint8_t lba_low; 68*4c06356bSdh uint8_t lba_mid; 69*4c06356bSdh uint8_t lba_hi; 70*4c06356bSdh uint8_t device; 71*4c06356bSdh uint8_t lba_low_exp; 72*4c06356bSdh uint8_t lba_mid_exp; 73*4c06356bSdh uint8_t lba_hi_exp; 74*4c06356bSdh uint8_t reserved0; 75*4c06356bSdh uint8_t sector_count; 76*4c06356bSdh uint8_t sector_count_exp; 77*4c06356bSdh uint8_t reserved1[6]; 78*4c06356bSdh } register_d2h_fis_t; 79*4c06356bSdh 80*4c06356bSdh typedef struct { 81*4c06356bSdh uint8_t fis_type; 82*4c06356bSdh uint8_t idcbits; 83*4c06356bSdh uint8_t status_bits; 84*4c06356bSdh #define STATUS_HI_MASK 0xE 85*4c06356bSdh #define STATUS_HI_SHIFT 4 86*4c06356bSdh #define STATUS_LO_MASK 0x7 87*4c06356bSdh uint8_t error; 88*4c06356bSdh uint8_t reserved; 89*4c06356bSdh } set_device_bits_fis_t; 90*4c06356bSdh 91*4c06356bSdh typedef struct { 92*4c06356bSdh uint8_t fis_type; 93*4c06356bSdh uint8_t reserved[3]; 94*4c06356bSdh } dma_activate_fis_type; 95*4c06356bSdh 96*4c06356bSdh typedef struct { 97*4c06356bSdh uint8_t fis_type; 98*4c06356bSdh uint8_t idcbits; 99*4c06356bSdh uint8_t reserved0[2]; 100*4c06356bSdh uint32_t dma_buffer_id_lo; 101*4c06356bSdh uint32_t dma_buffer_id_hi; 102*4c06356bSdh uint32_t reserved1; 103*4c06356bSdh uint32_t dma_buffer_offset; 104*4c06356bSdh uint32_t dma_buffer_count; 105*4c06356bSdh uint32_t reserved2; 106*4c06356bSdh } dma_fpactivate_fis_t; 107*4c06356bSdh 108*4c06356bSdh typedef struct { 109*4c06356bSdh uint8_t fis_type; 110*4c06356bSdh uint8_t reserved0; 111*4c06356bSdh uint8_t bist_bits; 112*4c06356bSdh uint8_t reserved1; 113*4c06356bSdh uint8_t data[8]; 114*4c06356bSdh } bist_activate_fis_t; 115*4c06356bSdh #define BIST_T 0x80 116*4c06356bSdh #define BIST_A 0x40 117*4c06356bSdh #define BIST_S 0x20 118*4c06356bSdh #define BIST_L 0x10 119*4c06356bSdh #define BIST_F 0x08 120*4c06356bSdh #define BIST_P 0x04 121*4c06356bSdh #define BIST_V 0x01 122*4c06356bSdh 123*4c06356bSdh typedef struct { 124*4c06356bSdh uint8_t fis_type; 125*4c06356bSdh uint8_t idcbits; 126*4c06356bSdh uint8_t status; 127*4c06356bSdh uint8_t error; 128*4c06356bSdh uint8_t lba_low; 129*4c06356bSdh uint8_t lba_mid; 130*4c06356bSdh uint8_t lba_high; 131*4c06356bSdh uint8_t device; 132*4c06356bSdh uint8_t lba_low_exp; 133*4c06356bSdh uint8_t lba_mid_exp; 134*4c06356bSdh uint8_t lba_high_exp; 135*4c06356bSdh uint8_t reserved0; 136*4c06356bSdh uint8_t sector_count; 137*4c06356bSdh uint8_t sector_count_exp; 138*4c06356bSdh uint8_t reserved1; 139*4c06356bSdh uint8_t E_status; 140*4c06356bSdh uint16_t transfer_count; 141*4c06356bSdh uint16_t reserved2; 142*4c06356bSdh } pio_setup_fis_t; 143*4c06356bSdh 144*4c06356bSdh typedef struct { 145*4c06356bSdh uint8_t fis_type; 146*4c06356bSdh uint32_t dwords[1]; 147*4c06356bSdh } bidirectional_fis_t; 148*4c06356bSdh 149*4c06356bSdh /* 150*4c06356bSdh * FIS Types 151*4c06356bSdh */ 152*4c06356bSdh 153*4c06356bSdh #define FIS_REG_H2DEV 0x27 /* 5 DWORDS */ 154*4c06356bSdh #define FIS_REG_D2H 0x34 /* 5 DWORDS */ 155*4c06356bSdh #define FIS_SET_DEVICE_BITS 0xA1 /* 2 DWORDS */ 156*4c06356bSdh #define FIS_DMA_ACTIVATE 0x39 /* 1 DWORD */ 157*4c06356bSdh #define FIS_DMA_FPSETUP 0x41 /* 7 DWORDS */ 158*4c06356bSdh #define FIS_BIST_ACTIVATE 0x58 /* 3 DWORDS */ 159*4c06356bSdh #define FIS_PIO_SETUP 0x5F /* 5 DWORDS */ 160*4c06356bSdh #define FIS_BI 0x46 /* 1 DWORD min, 2048 DWORD max */ 161*4c06356bSdh 162*4c06356bSdh /* 163*4c06356bSdh * IDC bits 164*4c06356bSdh */ 165*4c06356bSdh #define C_BIT 0x80 166*4c06356bSdh #define I_BIT 0x40 167*4c06356bSdh #define D_BIT 0x20 168*4c06356bSdh 169*4c06356bSdh /* 170*4c06356bSdh * 28-Bit Command Mapping from ACS to FIS 171*4c06356bSdh * 172*4c06356bSdh * ACS Field FIS Field 173*4c06356bSdh * -------------------------------------- 174*4c06356bSdh * Feature (7:0) -> Feature 175*4c06356bSdh * Count (7:0) -> Sector Count 176*4c06356bSdh * LBA (7:0) -> LBA Low 177*4c06356bSdh * LBA (15:8) -> LBA Mid 178*4c06356bSdh * LBA (23:16) -> LBA High 179*4c06356bSdh * LBA (27:24) -> Device (3:0) 180*4c06356bSdh * Device (15:12) -> Device (7:4) 181*4c06356bSdh * Command -> Command 182*4c06356bSdh * 183*4c06356bSdh * 48- Bit Command Mapping from ACS to FIS 184*4c06356bSdh * 185*4c06356bSdh * ACS Field FIS Field 186*4c06356bSdh * -------------------------------------- 187*4c06356bSdh * Feature (7:0) -> Feature 188*4c06356bSdh * Feature (15:8) -> Feature (exp) 189*4c06356bSdh * Count (7:0) -> Sector Count 190*4c06356bSdh * Count (15:8) -> Sector Count (exp) 191*4c06356bSdh * LBA (7:0) -> LBA Low 192*4c06356bSdh * LBA (15:8) -> LBA Mid 193*4c06356bSdh * LBA (23:16) -> LBA High 194*4c06356bSdh * LBA (31:24) -> LBA Low (exp) 195*4c06356bSdh * LBA (39:32) -> LBA Mid (exp) 196*4c06356bSdh * LBA (47:40) -> LBA High (exp) 197*4c06356bSdh * Device (15:12) -> Device (7:4) 198*4c06356bSdh * Command -> Command 199*4c06356bSdh * 200*4c06356bSdh * FIS (FIS_REG_H2DEV) layout: 201*4c06356bSdh * 202*4c06356bSdh * 31.........24 23...........16 15....................8.7.............0 203*4c06356bSdh * FEATURE | COMMAND | C R R RESERVED | FIS TYPE 0x27 204*4c06356bSdh * DEVICE | LBA HIGH | LBA MID | LBA LOW 205*4c06356bSdh * FEATURE(exp) | LBA HIGH(exp) | LBA MID(exp) | LBA LOW(exp) 206*4c06356bSdh * CONTROL | RESERVED | Sector Count(exp) | Sector Count 207*4c06356bSdh * RESERVED | RESERVED | RESERVED | RESERVED 208*4c06356bSdh * 209*4c06356bSdh * FIS (FIS_REG_D2H) layout: 210*4c06356bSdh * 211*4c06356bSdh * 31.........24 23...........16 15....................8.7.............0 212*4c06356bSdh * ERROR | STATUS | R I R RESERVED | FIS TYPE 0x34 213*4c06356bSdh * DEVICE | LBA HIGH | LBA MID | LBA LOW 214*4c06356bSdh * RESERVED | LBA HIGH(exp) | LBA MID(exp) | LBA LOW(exp) 215*4c06356bSdh * RESERVED | RESERVED | Sector Count(exp) | Sector Count 216*4c06356bSdh * RESERVED | RESERVED | RESERVED | RESERVED 217*4c06356bSdh */ 218*4c06356bSdh 219*4c06356bSdh 220*4c06356bSdh /* 221*4c06356bSdh * Reasonable size to reserve for holding the most common FIS types. 222*4c06356bSdh */ 223*4c06356bSdh typedef uint32_t fis_t[5]; 224*4c06356bSdh 225*4c06356bSdh #ifdef __cplusplus 226*4c06356bSdh } 227*4c06356bSdh #endif 228*4c06356bSdh #endif /* _ATAPI7V3_H */ 229