1ba2e4443Sseb /* 2ba2e4443Sseb * CDDL HEADER START 3ba2e4443Sseb * 4ba2e4443Sseb * The contents of this file are subject to the terms of the 5ba2e4443Sseb * Common Development and Distribution License (the "License"). 6ba2e4443Sseb * You may not use this file except in compliance with the License. 7ba2e4443Sseb * 8ba2e4443Sseb * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9ba2e4443Sseb * or http://www.opensolaris.org/os/licensing. 10ba2e4443Sseb * See the License for the specific language governing permissions 11ba2e4443Sseb * and limitations under the License. 12ba2e4443Sseb * 13ba2e4443Sseb * When distributing Covered Code, include this CDDL HEADER in each 14ba2e4443Sseb * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15ba2e4443Sseb * If applicable, add the following below this CDDL HEADER, with the 16ba2e4443Sseb * fields enclosed by brackets "[]" replaced with your own identifying 17ba2e4443Sseb * information: Portions Copyright [yyyy] [name of copyright owner] 18ba2e4443Sseb * 19ba2e4443Sseb * CDDL HEADER END 20ba2e4443Sseb */ 21ba2e4443Sseb /* 22aca118b7Slucy wang - Sun Microsystems - Beijing China * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23ba2e4443Sseb * Use is subject to license terms. 243bc4925dSGarrett D'Amore * 253bc4925dSGarrett D'Amore * Copyright 2015 Garrett D'Amore <garrett@damore.org> 263d75a287SRobert Mustacchi * Copyright 2016 Joyent, Inc. 27dd72704bSRobert Mustacchi * Copyright 2023 Oxide Computer Company 28ba2e4443Sseb */ 29ba2e4443Sseb 30ba2e4443Sseb #ifndef _SYS_MAC_ETHER_H 31ba2e4443Sseb #define _SYS_MAC_ETHER_H 32ba2e4443Sseb 33ba2e4443Sseb /* 34ba2e4443Sseb * Ethernet MAC Plugin 35ba2e4443Sseb */ 36ba2e4443Sseb 37ba2e4443Sseb #ifdef __cplusplus 38ba2e4443Sseb extern "C" { 39ba2e4443Sseb #endif 40ba2e4443Sseb 41dd72704bSRobert Mustacchi /* 42dd72704bSRobert Mustacchi * Ethernet-specific media types for use with MAC_PROP_MEDIA and 43dd72704bSRobert Mustacchi * ETHER_STAT_XCVR_INUSE. See mac(9E) for more information. 44dd72704bSRobert Mustacchi */ 45dd72704bSRobert Mustacchi typedef enum { 46dd72704bSRobert Mustacchi ETHER_MEDIA_UNKNOWN = 0, 47dd72704bSRobert Mustacchi ETHER_MEDIA_NONE, 48dd72704bSRobert Mustacchi ETHER_MEDIA_10BASE_T, 49dd72704bSRobert Mustacchi ETHER_MEDIA_100BASE_T4, 50dd72704bSRobert Mustacchi /* 51dd72704bSRobert Mustacchi * 100BASE-X is a catchall term defined in 802.3. In 802.3 section 52dd72704bSRobert Mustacchi * 24.1.1 100BASE-X is used to cover the more specific 100BASE-TX and 53dd72704bSRobert Mustacchi * 100BASE-FX realized in copper and fiber. The PCS is shared between 54dd72704bSRobert Mustacchi * the two, but the PMD is different. Use this if you can't determine TX 55dd72704bSRobert Mustacchi * vs. FX. 56dd72704bSRobert Mustacchi */ 57dd72704bSRobert Mustacchi ETHER_MEDIA_100BASE_X, 58dd72704bSRobert Mustacchi /* 59dd72704bSRobert Mustacchi * Note, previously there was never a 100BASE-TX value so some drivers 60dd72704bSRobert Mustacchi * would have returned this for 100BASE-TX. 61dd72704bSRobert Mustacchi */ 62dd72704bSRobert Mustacchi ETHER_MEDIA_100BASE_T2, 63dd72704bSRobert Mustacchi /* 64dd72704bSRobert Mustacchi * 1000BASE-X is a fiber catch all. This is for compatibility with the 65dd72704bSRobert Mustacchi * traditional ETHER_STAT_XCVR_INUSE 1000BASE-X value. More specific 66dd72704bSRobert Mustacchi * variants are listed below. USe this if nothing more specific is 67dd72704bSRobert Mustacchi * feasible. 68dd72704bSRobert Mustacchi */ 69dd72704bSRobert Mustacchi ETHER_MEDIA_1000BASE_X, 70dd72704bSRobert Mustacchi ETHER_MEDIA_1000BASE_T, 71dd72704bSRobert Mustacchi ETHER_MEDIA_1000BASE_KX, 72dd72704bSRobert Mustacchi ETHER_MEDIA_1000BASE_T1, 73dd72704bSRobert Mustacchi ETHER_MEDIA_1000BASE_CX, 74dd72704bSRobert Mustacchi ETHER_MEDIA_1000BASE_SX, 75dd72704bSRobert Mustacchi ETHER_MEDIA_1000BASE_LX, 76dd72704bSRobert Mustacchi ETHER_MEDIA_1000BASE_BX, 77dd72704bSRobert Mustacchi ETHER_MEDIA_1000_SGMII, 78dd72704bSRobert Mustacchi 79dd72704bSRobert Mustacchi /* 80dd72704bSRobert Mustacchi * Additional more recent or erroneously skipped 10/100 modes. 81dd72704bSRobert Mustacchi */ 82dd72704bSRobert Mustacchi ETHER_MEDIA_100BASE_TX, 83dd72704bSRobert Mustacchi ETHER_MEDIA_100BASE_FX, 84dd72704bSRobert Mustacchi ETHER_MEDIA_100_SGMII, 85dd72704bSRobert Mustacchi ETHER_MEDIA_10BASE_T1, 86dd72704bSRobert Mustacchi ETHER_MEDIA_100BASE_T1, 87dd72704bSRobert Mustacchi 88dd72704bSRobert Mustacchi /* 89dd72704bSRobert Mustacchi * 2.5 GbE, 5.0 GbE, single lane. 90dd72704bSRobert Mustacchi */ 91dd72704bSRobert Mustacchi ETHER_MEDIA_2500BASE_T, 92dd72704bSRobert Mustacchi ETHER_MEDIA_2500BASE_KX, 93dd72704bSRobert Mustacchi ETHER_MEDIA_2500BASE_X, 94dd72704bSRobert Mustacchi ETHER_MEDIA_5000BASE_T, 95dd72704bSRobert Mustacchi ETHER_MEDIA_5000BASE_KR, 96dd72704bSRobert Mustacchi 97dd72704bSRobert Mustacchi /* 98dd72704bSRobert Mustacchi * 10 GbE, all lane configurations. 99dd72704bSRobert Mustacchi */ 100dd72704bSRobert Mustacchi ETHER_MEDIA_10GBASE_T, 101dd72704bSRobert Mustacchi ETHER_MEDIA_10GBASE_SR, 102dd72704bSRobert Mustacchi ETHER_MEDIA_10GBASE_LR, 103dd72704bSRobert Mustacchi ETHER_MEDIA_10GBASE_LRM, 104dd72704bSRobert Mustacchi ETHER_MEDIA_10GBASE_KR, 105dd72704bSRobert Mustacchi ETHER_MEDIA_10GBASE_CX4, 106dd72704bSRobert Mustacchi ETHER_MEDIA_10GBASE_KX4, 107dd72704bSRobert Mustacchi ETHER_MEDIA_10G_XAUI, 108dd72704bSRobert Mustacchi ETHER_MEDIA_10GBASE_AOC, 109dd72704bSRobert Mustacchi ETHER_MEDIA_10GBASE_ACC, 110dd72704bSRobert Mustacchi ETHER_MEDIA_10GBASE_CR, 111dd72704bSRobert Mustacchi ETHER_MEDIA_10GBASE_ER, 112dd72704bSRobert Mustacchi ETHER_MEDIA_10G_SFI, 113dd72704bSRobert Mustacchi ETHER_MEDIA_10G_XFI, 114dd72704bSRobert Mustacchi 115dd72704bSRobert Mustacchi /* 116dd72704bSRobert Mustacchi * 25 GbE, single lane. 117dd72704bSRobert Mustacchi */ 118dd72704bSRobert Mustacchi ETHER_MEDIA_25GBASE_T, 119dd72704bSRobert Mustacchi ETHER_MEDIA_25GBASE_SR, 120dd72704bSRobert Mustacchi ETHER_MEDIA_25GBASE_LR, 121dd72704bSRobert Mustacchi ETHER_MEDIA_25GBASE_ER, 122dd72704bSRobert Mustacchi ETHER_MEDIA_25GBASE_KR, 123dd72704bSRobert Mustacchi ETHER_MEDIA_25GBASE_CR, 124dd72704bSRobert Mustacchi ETHER_MEDIA_25GBASE_AOC, 125dd72704bSRobert Mustacchi ETHER_MEDIA_25GBASE_ACC, 126dd72704bSRobert Mustacchi ETHER_MEDIA_25G_AUI, 127dd72704bSRobert Mustacchi 128dd72704bSRobert Mustacchi /* 129dd72704bSRobert Mustacchi * 40 GbE based on 10 GbE 130dd72704bSRobert Mustacchi */ 131dd72704bSRobert Mustacchi ETHER_MEDIA_40GBASE_T, 132dd72704bSRobert Mustacchi ETHER_MEDIA_40GBASE_CR4, 133dd72704bSRobert Mustacchi ETHER_MEDIA_40GBASE_KR4, 134dd72704bSRobert Mustacchi ETHER_MEDIA_40GBASE_LR4, 135dd72704bSRobert Mustacchi ETHER_MEDIA_40GBASE_SR4, 136dd72704bSRobert Mustacchi ETHER_MEDIA_40GBASE_ER4, 137dd72704bSRobert Mustacchi ETHER_MEDIA_40GBASE_LM4, 138dd72704bSRobert Mustacchi ETHER_MEDIA_40GBASE_AOC4, 139dd72704bSRobert Mustacchi ETHER_MEDIA_40GBASE_ACC4, 140dd72704bSRobert Mustacchi ETHER_MEDIA_40G_XLAUI, 141dd72704bSRobert Mustacchi ETHER_MEDIA_40G_XLPPI, 142dd72704bSRobert Mustacchi 143dd72704bSRobert Mustacchi /* 144dd72704bSRobert Mustacchi * 50 GbE based on 25 GbE 145dd72704bSRobert Mustacchi */ 146dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_KR2, 147dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_CR2, 148dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_SR2, 149dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_LR2, 150dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_AOC2, 151dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_ACC2, 152dd72704bSRobert Mustacchi 153dd72704bSRobert Mustacchi /* 154dd72704bSRobert Mustacchi * 50 GbE based on 50 GbE PAM4 155dd72704bSRobert Mustacchi */ 156dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_KR, 157dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_CR, 158dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_SR, 159dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_LR, 160dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_FR, 161dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_ER, 162dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_AOC, 163dd72704bSRobert Mustacchi ETHER_MEDIA_50GBASE_ACC, 164dd72704bSRobert Mustacchi 165dd72704bSRobert Mustacchi /* 166dd72704bSRobert Mustacchi * 100 GbE based on 10 GbE 167dd72704bSRobert Mustacchi */ 168dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_CR10, 169dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_SR10, 170dd72704bSRobert Mustacchi 171dd72704bSRobert Mustacchi /* 172dd72704bSRobert Mustacchi * 100 GbE based on 25 GbE 173dd72704bSRobert Mustacchi */ 174dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_SR4, 175dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_LR4, 176dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_ER4, 177dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_KR4, 178dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_CR4, 179dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_CAUI4, 180dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_AOC4, 181dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_ACC4, 182dd72704bSRobert Mustacchi 183dd72704bSRobert Mustacchi /* 184dd72704bSRobert Mustacchi * 100 GbE based on 50 GbE 185dd72704bSRobert Mustacchi */ 186dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_KR2, 187dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_CR2, 188dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_SR2, 189dd72704bSRobert Mustacchi 190dd72704bSRobert Mustacchi /* 191dd72704bSRobert Mustacchi * 100 GbE based on 100 GbE 192dd72704bSRobert Mustacchi */ 193dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_KR, 194dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_CR, 195dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_SR, 196dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_DR, 197dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_LR, 198dd72704bSRobert Mustacchi ETHER_MEDIA_100GBASE_FR, 199dd72704bSRobert Mustacchi 200dd72704bSRobert Mustacchi /* 201dd72704bSRobert Mustacchi * 200G Ethernet based on 50 GbE 202dd72704bSRobert Mustacchi */ 203dd72704bSRobert Mustacchi ETHER_MEDIA_200GAUI_4, 204dd72704bSRobert Mustacchi ETHER_MEDIA_200GBASE_CR4, 205dd72704bSRobert Mustacchi ETHER_MEDIA_200GBASE_KR4, 206dd72704bSRobert Mustacchi ETHER_MEDIA_200GBASE_SR4, 207dd72704bSRobert Mustacchi ETHER_MEDIA_200GBASE_DR4, 208dd72704bSRobert Mustacchi ETHER_MEDIA_200GBASE_FR4, 209dd72704bSRobert Mustacchi ETHER_MEDIA_200GBASE_LR4, 210dd72704bSRobert Mustacchi ETHER_MEDIA_200GBASE_ER4, 211dd72704bSRobert Mustacchi 212dd72704bSRobert Mustacchi /* 213dd72704bSRobert Mustacchi * 200G Ethernet based on 100 GbE 214dd72704bSRobert Mustacchi */ 215dd72704bSRobert Mustacchi ETHER_MEDIA_200GAUI_2, 216dd72704bSRobert Mustacchi ETHER_MEDIA_200GBASE_KR2, 217dd72704bSRobert Mustacchi ETHER_MEDIA_200GBASE_CR2, 218dd72704bSRobert Mustacchi ETHER_MEDIA_200GBASE_SR2, 219dd72704bSRobert Mustacchi 220dd72704bSRobert Mustacchi /* 221dd72704bSRobert Mustacchi * 400G based on 50 GbE 222dd72704bSRobert Mustacchi */ 223dd72704bSRobert Mustacchi ETHER_MEDIA_400GAUI_8, 224dd72704bSRobert Mustacchi ETHER_MEDIA_400GBASE_KR8, 225dd72704bSRobert Mustacchi ETHER_MEDIA_400GBASE_FR8, 226dd72704bSRobert Mustacchi ETHER_MEDIA_400GBASE_LR8, 227dd72704bSRobert Mustacchi ETHER_MEDIA_400GBASE_ER8, 228dd72704bSRobert Mustacchi 229dd72704bSRobert Mustacchi /* 230dd72704bSRobert Mustacchi * 400G based on 100 GbE 231dd72704bSRobert Mustacchi */ 232dd72704bSRobert Mustacchi ETHER_MEDIA_400GAUI_4, 233dd72704bSRobert Mustacchi ETHER_MEDIA_400GBASE_KR4, 234dd72704bSRobert Mustacchi ETHER_MEDIA_400GBASE_CR4, 235dd72704bSRobert Mustacchi ETHER_MEDIA_400GBASE_SR4, 236dd72704bSRobert Mustacchi ETHER_MEDIA_400GBASE_DR4, 237dd72704bSRobert Mustacchi ETHER_MEDIA_400GBASE_FR4 238dd72704bSRobert Mustacchi } mac_ether_media_t; 239dd72704bSRobert Mustacchi 240ba2e4443Sseb #ifdef _KERNEL 241ba2e4443Sseb 242ba2e4443Sseb #define MAC_PLUGIN_IDENT_ETHER "mac_ether" 243ba2e4443Sseb 2449b14cf1dSgd /* 2459b14cf1dSgd * Do not reorder, and add only to the end of this list. 2469b14cf1dSgd */ 247ba2e4443Sseb enum ether_stat { 248ba2e4443Sseb /* RFC 1643 stats */ 249ba2e4443Sseb ETHER_STAT_ALIGN_ERRORS = MACTYPE_STAT_MIN, 250ba2e4443Sseb ETHER_STAT_FCS_ERRORS, 251ba2e4443Sseb ETHER_STAT_FIRST_COLLISIONS, 252ba2e4443Sseb ETHER_STAT_MULTI_COLLISIONS, 253ba2e4443Sseb ETHER_STAT_SQE_ERRORS, 254ba2e4443Sseb ETHER_STAT_DEFER_XMTS, 255ba2e4443Sseb ETHER_STAT_TX_LATE_COLLISIONS, 256ba2e4443Sseb ETHER_STAT_EX_COLLISIONS, 257ba2e4443Sseb ETHER_STAT_MACXMT_ERRORS, 258ba2e4443Sseb ETHER_STAT_CARRIER_ERRORS, 259ba2e4443Sseb ETHER_STAT_TOOLONG_ERRORS, 260ba2e4443Sseb ETHER_STAT_MACRCV_ERRORS, 261ba2e4443Sseb 262ba2e4443Sseb /* MII/GMII stats */ 263ba2e4443Sseb ETHER_STAT_XCVR_ADDR, 264ba2e4443Sseb ETHER_STAT_XCVR_ID, 265ba2e4443Sseb ETHER_STAT_XCVR_INUSE, 266ba2e4443Sseb ETHER_STAT_CAP_1000FDX, 267ba2e4443Sseb ETHER_STAT_CAP_1000HDX, 268ba2e4443Sseb ETHER_STAT_CAP_100FDX, 269ba2e4443Sseb ETHER_STAT_CAP_100HDX, 270ba2e4443Sseb ETHER_STAT_CAP_10FDX, 271ba2e4443Sseb ETHER_STAT_CAP_10HDX, 272ba2e4443Sseb ETHER_STAT_CAP_ASMPAUSE, 273ba2e4443Sseb ETHER_STAT_CAP_PAUSE, 274ba2e4443Sseb ETHER_STAT_CAP_AUTONEG, 275ba2e4443Sseb ETHER_STAT_ADV_CAP_1000FDX, 276ba2e4443Sseb ETHER_STAT_ADV_CAP_1000HDX, 277ba2e4443Sseb ETHER_STAT_ADV_CAP_100FDX, 278ba2e4443Sseb ETHER_STAT_ADV_CAP_100HDX, 279ba2e4443Sseb ETHER_STAT_ADV_CAP_10FDX, 280ba2e4443Sseb ETHER_STAT_ADV_CAP_10HDX, 281ba2e4443Sseb ETHER_STAT_ADV_CAP_ASMPAUSE, 282ba2e4443Sseb ETHER_STAT_ADV_CAP_PAUSE, 283ba2e4443Sseb ETHER_STAT_ADV_CAP_AUTONEG, 284ba2e4443Sseb ETHER_STAT_LP_CAP_1000FDX, 285ba2e4443Sseb ETHER_STAT_LP_CAP_1000HDX, 286ba2e4443Sseb ETHER_STAT_LP_CAP_100FDX, 287ba2e4443Sseb ETHER_STAT_LP_CAP_100HDX, 288ba2e4443Sseb ETHER_STAT_LP_CAP_10FDX, 289ba2e4443Sseb ETHER_STAT_LP_CAP_10HDX, 290ba2e4443Sseb ETHER_STAT_LP_CAP_ASMPAUSE, 291ba2e4443Sseb ETHER_STAT_LP_CAP_PAUSE, 292ba2e4443Sseb ETHER_STAT_LP_CAP_AUTONEG, 293ba2e4443Sseb ETHER_STAT_LINK_ASMPAUSE, 294ba2e4443Sseb ETHER_STAT_LINK_PAUSE, 295ba2e4443Sseb ETHER_STAT_LINK_AUTONEG, 2969b14cf1dSgd ETHER_STAT_LINK_DUPLEX, 2979b14cf1dSgd 2989b14cf1dSgd ETHER_STAT_TOOSHORT_ERRORS, 2999b14cf1dSgd ETHER_STAT_CAP_REMFAULT, 3009b14cf1dSgd ETHER_STAT_ADV_REMFAULT, 3010d2a8e5eSgd ETHER_STAT_LP_REMFAULT, 3020d2a8e5eSgd 3030d2a8e5eSgd ETHER_STAT_JABBER_ERRORS, 3040d2a8e5eSgd ETHER_STAT_CAP_100T4, 3050d2a8e5eSgd ETHER_STAT_ADV_CAP_100T4, 3060d2a8e5eSgd ETHER_STAT_LP_CAP_100T4, 307aca118b7Slucy wang - Sun Microsystems - Beijing China 308aca118b7Slucy wang - Sun Microsystems - Beijing China ETHER_STAT_CAP_10GFDX, 309aca118b7Slucy wang - Sun Microsystems - Beijing China ETHER_STAT_ADV_CAP_10GFDX, 310aca118b7Slucy wang - Sun Microsystems - Beijing China ETHER_STAT_LP_CAP_10GFDX, 3113bc4925dSGarrett D'Amore 3123bc4925dSGarrett D'Amore ETHER_STAT_CAP_40GFDX, 3133bc4925dSGarrett D'Amore ETHER_STAT_ADV_CAP_40GFDX, 3143bc4925dSGarrett D'Amore ETHER_STAT_LP_CAP_40GFDX, 3153bc4925dSGarrett D'Amore 3163bc4925dSGarrett D'Amore ETHER_STAT_CAP_100GFDX, 3173bc4925dSGarrett D'Amore ETHER_STAT_ADV_CAP_100GFDX, 3183bc4925dSGarrett D'Amore ETHER_STAT_LP_CAP_100GFDX, 3193bc4925dSGarrett D'Amore 3203bc4925dSGarrett D'Amore ETHER_STAT_CAP_2500FDX, 3213bc4925dSGarrett D'Amore ETHER_STAT_ADV_CAP_2500FDX, 3223bc4925dSGarrett D'Amore ETHER_STAT_LP_CAP_2500FDX, 3233bc4925dSGarrett D'Amore 3243bc4925dSGarrett D'Amore ETHER_STAT_CAP_5000FDX, 3253bc4925dSGarrett D'Amore ETHER_STAT_ADV_CAP_5000FDX, 3263bc4925dSGarrett D'Amore ETHER_STAT_LP_CAP_5000FDX, 3273d75a287SRobert Mustacchi 3283d75a287SRobert Mustacchi ETHER_STAT_CAP_25GFDX, 3293d75a287SRobert Mustacchi ETHER_STAT_ADV_CAP_25GFDX, 3303d75a287SRobert Mustacchi ETHER_STAT_LP_CAP_25GFDX, 3313d75a287SRobert Mustacchi 3323d75a287SRobert Mustacchi ETHER_STAT_CAP_50GFDX, 3333d75a287SRobert Mustacchi ETHER_STAT_ADV_CAP_50GFDX, 3343d75a287SRobert Mustacchi ETHER_STAT_LP_CAP_50GFDX, 335*2aaafd60SRobert Mustacchi 336*2aaafd60SRobert Mustacchi ETHER_STAT_CAP_200GFDX, 337*2aaafd60SRobert Mustacchi ETHER_STAT_ADV_CAP_200GFDX, 338*2aaafd60SRobert Mustacchi ETHER_STAT_LP_CAP_200GFDX, 339*2aaafd60SRobert Mustacchi 340*2aaafd60SRobert Mustacchi ETHER_STAT_CAP_400GFDX, 341*2aaafd60SRobert Mustacchi ETHER_STAT_ADV_CAP_400GFDX, 342*2aaafd60SRobert Mustacchi ETHER_STAT_LP_CAP_400GFDX, 343ba2e4443Sseb }; 344ba2e4443Sseb 3453bc4925dSGarrett D'Amore #define ETHER_NSTAT \ 346*2aaafd60SRobert Mustacchi (ETHER_STAT_LP_CAP_400GFDX - ETHER_STAT_ALIGN_ERRORS + 1) 347ba2e4443Sseb 348ba2e4443Sseb #define ETHER_STAT_ISACOUNTER(_ether_stat) \ 349ba2e4443Sseb ((_ether_stat) == ETHER_STAT_ALIGN_ERRORS || \ 350ba2e4443Sseb (_ether_stat) == ETHER_STAT_FCS_ERRORS || \ 351ba2e4443Sseb (_ether_stat) == ETHER_STAT_FIRST_COLLISIONS || \ 352ba2e4443Sseb (_ether_stat) == ETHER_STAT_MULTI_COLLISIONS || \ 353ba2e4443Sseb (_ether_stat) == ETHER_STAT_SQE_ERRORS || \ 354ba2e4443Sseb (_ether_stat) == ETHER_STAT_DEFER_XMTS || \ 355ba2e4443Sseb (_ether_stat) == ETHER_STAT_TX_LATE_COLLISIONS || \ 356ba2e4443Sseb (_ether_stat) == ETHER_STAT_EX_COLLISIONS || \ 357ba2e4443Sseb (_ether_stat) == ETHER_STAT_MACXMT_ERRORS || \ 358ba2e4443Sseb (_ether_stat) == ETHER_STAT_CARRIER_ERRORS || \ 359ba2e4443Sseb (_ether_stat) == ETHER_STAT_TOOLONG_ERRORS || \ 3609b14cf1dSgd (_ether_stat) == ETHER_STAT_TOOSHORT_ERRORS || \ 3610d2a8e5eSgd (_ether_stat) == ETHER_STAT_JABBER_ERRORS || \ 362ba2e4443Sseb (_ether_stat) == ETHER_STAT_MACRCV_ERRORS) 363ba2e4443Sseb 364ba2e4443Sseb #endif /* _KERNEL */ 365ba2e4443Sseb 366ba2e4443Sseb #ifdef __cplusplus 367ba2e4443Sseb } 368ba2e4443Sseb #endif 369ba2e4443Sseb 370ba2e4443Sseb #endif /* _SYS_MAC_ETHER_H */ 371