1fcf3ce44SJohn Forte /* 2fcf3ce44SJohn Forte * CDDL HEADER START 3fcf3ce44SJohn Forte * 4fcf3ce44SJohn Forte * The contents of this file are subject to the terms of the 5fcf3ce44SJohn Forte * Common Development and Distribution License (the "License"). 6fcf3ce44SJohn Forte * You may not use this file except in compliance with the License. 7fcf3ce44SJohn Forte * 8fcf3ce44SJohn Forte * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9fcf3ce44SJohn Forte * or http://www.opensolaris.org/os/licensing. 10fcf3ce44SJohn Forte * See the License for the specific language governing permissions 11fcf3ce44SJohn Forte * and limitations under the License. 12fcf3ce44SJohn Forte * 13fcf3ce44SJohn Forte * When distributing Covered Code, include this CDDL HEADER in each 14fcf3ce44SJohn Forte * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15fcf3ce44SJohn Forte * If applicable, add the following below this CDDL HEADER, with the 16fcf3ce44SJohn Forte * fields enclosed by brackets "[]" replaced with your own identifying 17fcf3ce44SJohn Forte * information: Portions Copyright [yyyy] [name of copyright owner] 18fcf3ce44SJohn Forte * 19fcf3ce44SJohn Forte * CDDL HEADER END 20fcf3ce44SJohn Forte */ 21fcf3ce44SJohn Forte 22fcf3ce44SJohn Forte /* 23291a2b48SSukumar Swaminathan * Copyright 2009 Emulex. All rights reserved. 24*82527734SSukumar Swaminathan * Use is subject to license terms. 25fcf3ce44SJohn Forte */ 26fcf3ce44SJohn Forte 27fcf3ce44SJohn Forte #ifndef _EMLXS_DFCLIB_H 28fcf3ce44SJohn Forte #define _EMLXS_DFCLIB_H 29fcf3ce44SJohn Forte 30fcf3ce44SJohn Forte #ifdef __cplusplus 31fcf3ce44SJohn Forte extern "C" { 32fcf3ce44SJohn Forte #endif 33fcf3ce44SJohn Forte 34fcf3ce44SJohn Forte #define MAX_DFC_EVENTS 16 35fcf3ce44SJohn Forte #define MAX_EMLXS_BRDS 128 36fcf3ce44SJohn Forte #define MAX_CFG_PARAM 64 37*82527734SSukumar Swaminathan #define MAX_NODES 4096 38fcf3ce44SJohn Forte 39fcf3ce44SJohn Forte #ifndef MAX_VPORTS 40fcf3ce44SJohn Forte #define MAX_VPORTS 256 41291a2b48SSukumar Swaminathan #endif /* MAX_VPORTS */ 42fcf3ce44SJohn Forte 43291a2b48SSukumar Swaminathan #ifdef EMLXS_SPARC 44fcf3ce44SJohn Forte #define EMLXS_BIG_ENDIAN 45291a2b48SSukumar Swaminathan #endif /* EMLXS_SPARC */ 46291a2b48SSukumar Swaminathan 47291a2b48SSukumar Swaminathan #ifdef EMLXS_I386 48fcf3ce44SJohn Forte #define EMLXS_LITTLE_ENDIAN 49291a2b48SSukumar Swaminathan #endif /* EMLXS_I386 */ 50fcf3ce44SJohn Forte 51fcf3ce44SJohn Forte 52291a2b48SSukumar Swaminathan typedef struct brdinfo 53291a2b48SSukumar Swaminathan { 54fcf3ce44SJohn Forte uint32_t a_mem_hi; /* memory identifier for adapter access */ 55fcf3ce44SJohn Forte uint32_t a_mem_low; /* memory identifier for adapter access */ 56fcf3ce44SJohn Forte uint32_t a_flash_hi; /* memory identifier for adapter access */ 57fcf3ce44SJohn Forte uint32_t a_flash_low; /* memory identifier for adapter access */ 58fcf3ce44SJohn Forte uint32_t a_ctlreg_hi; /* memory identifier for adapter access */ 59fcf3ce44SJohn Forte uint32_t a_ctlreg_low; /* memory identifier for adapter access */ 60fcf3ce44SJohn Forte uint32_t a_intrlvl; /* interrupt level for adapter */ 61fcf3ce44SJohn Forte uint32_t a_pci; /* PCI identifier (device / vendor id) */ 62fcf3ce44SJohn Forte uint32_t a_busid; /* identifier of PCI bus adapter is on */ 63fcf3ce44SJohn Forte uint32_t a_devid; /* identifier of PCI device number */ 64291a2b48SSukumar Swaminathan uint8_t a_rsvd1; /* reserved for future use */ 65291a2b48SSukumar Swaminathan uint8_t a_rsvd2; /* reserved for future use */ 66291a2b48SSukumar Swaminathan uint8_t a_siglvl; /* signal handler used by library */ 67291a2b48SSukumar Swaminathan uint8_t a_ddi; /* identifier device driver instance number */ 68fcf3ce44SJohn Forte uint32_t a_onmask; /* mask of ONDI primatives supported */ 69fcf3ce44SJohn Forte uint32_t a_offmask; /* mask of OFFDI primatives supported */ 70291a2b48SSukumar Swaminathan uint8_t a_drvrid[16]; /* driver version */ 71291a2b48SSukumar Swaminathan uint8_t a_fwname[32]; /* firmware version */ 72fcf3ce44SJohn Forte } brdinfo_t; 73fcf3ce44SJohn Forte 74fcf3ce44SJohn Forte 75291a2b48SSukumar Swaminathan typedef struct dfc_brdinfo 76291a2b48SSukumar Swaminathan { 77fcf3ce44SJohn Forte uint32_t a_mem_hi; /* memory identifier for adapter access */ 78fcf3ce44SJohn Forte uint32_t a_mem_low; /* memory identifier for adapter access */ 79fcf3ce44SJohn Forte uint32_t a_flash_hi; /* memory identifier for adapter access */ 80fcf3ce44SJohn Forte uint32_t a_flash_low; /* memory identifier for adapter access */ 81fcf3ce44SJohn Forte uint32_t a_ctlreg_hi; /* memory identifier for adapter access */ 82fcf3ce44SJohn Forte uint32_t a_ctlreg_low; /* memory identifier for adapter access */ 83fcf3ce44SJohn Forte uint32_t a_intrlvl; /* interrupt level for adapter */ 84fcf3ce44SJohn Forte uint32_t a_pci; /* PCI identifier (device / vendor id) */ 85fcf3ce44SJohn Forte uint32_t a_busid; /* identifier of PCI bus adapter is on */ 86fcf3ce44SJohn Forte uint32_t a_devid; /* identifier of PCI device number */ 87*82527734SSukumar Swaminathan uint8_t a_pciFunc; /* identifier of PCI function number */ 88291a2b48SSukumar Swaminathan uint8_t a_siglvl; /* signal handler used by library */ 89fcf3ce44SJohn Forte uint16_t a_ddi; /* identifier device driver instance number */ 90fcf3ce44SJohn Forte uint32_t a_onmask; /* mask of ONDI primatives supported */ 91fcf3ce44SJohn Forte uint32_t a_offmask; /* mask of OFFDI primatives supported */ 92291a2b48SSukumar Swaminathan uint8_t a_drvrid[16]; /* driver version */ 93291a2b48SSukumar Swaminathan uint8_t a_fwname[32]; /* firmware version */ 94291a2b48SSukumar Swaminathan uint8_t a_wwpn[8]; /* worldwide portname */ 95fcf3ce44SJohn Forte } dfc_brdinfo_t; 96fcf3ce44SJohn Forte 97fcf3ce44SJohn Forte 98*82527734SSukumar Swaminathan #define PADDR_LO(addr) ((uint32_t)(((uint64_t)(addr)) & 0xffffffff)) 99*82527734SSukumar Swaminathan #define PADDR_HI(addr) ((uint32_t)(((uint64_t)(addr)) >> 32)) 100*82527734SSukumar Swaminathan #define PADDR(high, low) ((uint64_t)((((uint64_t)(high)) << 32) \ 101291a2b48SSukumar Swaminathan | (((uint64_t)(low)) & 0xffffffff))) 102fcf3ce44SJohn Forte 103291a2b48SSukumar Swaminathan typedef struct ulp_bde 104291a2b48SSukumar Swaminathan { 105291a2b48SSukumar Swaminathan uint32_t bdeAddress; 106fcf3ce44SJohn Forte 107fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 108291a2b48SSukumar Swaminathan uint32_t bdeReserved:4; 109291a2b48SSukumar Swaminathan uint32_t bdeAddrHigh:4; 110291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 111fcf3ce44SJohn Forte #endif 112fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 113291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 114291a2b48SSukumar Swaminathan uint32_t bdeAddrHigh:4; 115291a2b48SSukumar Swaminathan uint32_t bdeReserved:4; 116fcf3ce44SJohn Forte #endif 117fcf3ce44SJohn Forte } ulp_bde_t; 118fcf3ce44SJohn Forte 119291a2b48SSukumar Swaminathan typedef struct ulp_bde64 120291a2b48SSukumar Swaminathan { 121291a2b48SSukumar Swaminathan union 122291a2b48SSukumar Swaminathan { 123291a2b48SSukumar Swaminathan uint32_t w; 124291a2b48SSukumar Swaminathan struct 125291a2b48SSukumar Swaminathan { 126fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 127291a2b48SSukumar Swaminathan uint32_t bdeFlags:8; 128291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 129fcf3ce44SJohn Forte #endif 130fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 131291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 132291a2b48SSukumar Swaminathan uint32_t bdeFlags:8; 133fcf3ce44SJohn Forte #endif 134fcf3ce44SJohn Forte 135291a2b48SSukumar Swaminathan #define BUFF_USE_RSVD 0x01 /* bdeFlags */ 136291a2b48SSukumar Swaminathan #define BUFF_USE_INTRPT 0x02 /* Not Implemented with LP6000 */ 137291a2b48SSukumar Swaminathan #define BUFF_USE_CMND 0x04 /* Optional, 1=cmd/rsp 0=data buffer */ 138291a2b48SSukumar Swaminathan #define BUFF_USE_RCV 0x08 /* "" "", 1=rcv buffer, 0=xmit buffer */ 139291a2b48SSukumar Swaminathan #define BUFF_TYPE_32BIT 0x10 /* "" "", 1=32 bit addr 0=64 bit addr */ 140291a2b48SSukumar Swaminathan #define BUFF_TYPE_SPECIAL 0x20 /* Not Implemented with LP6000 */ 141291a2b48SSukumar Swaminathan #define BUFF_TYPE_BDL 0x40 /* Optional, may be set in BDL */ 142291a2b48SSukumar Swaminathan #define BUFF_TYPE_INVALID 0x80 /* "" "" */ 143fcf3ce44SJohn Forte } f; 144fcf3ce44SJohn Forte } tus; 145fcf3ce44SJohn Forte 146291a2b48SSukumar Swaminathan uint32_t addrLow; 147291a2b48SSukumar Swaminathan uint32_t addrHigh; 148fcf3ce44SJohn Forte } ulp_bde64_t; 149fcf3ce44SJohn Forte 150*82527734SSukumar Swaminathan 151*82527734SSukumar Swaminathan /* ==== Mailbox Commands ==== */ 152*82527734SSukumar Swaminathan #define MBX_SHUTDOWN 0x00 153*82527734SSukumar Swaminathan #define MBX_LOAD_SM 0x01 154*82527734SSukumar Swaminathan #define MBX_READ_NV 0x02 155*82527734SSukumar Swaminathan #define MBX_WRITE_NV 0x03 156*82527734SSukumar Swaminathan #define MBX_RUN_BIU_DIAG 0x04 157*82527734SSukumar Swaminathan #define MBX_INIT_LINK 0x05 158*82527734SSukumar Swaminathan #define MBX_DOWN_LINK 0x06 159*82527734SSukumar Swaminathan #define MBX_CONFIG_LINK 0x07 160*82527734SSukumar Swaminathan #define MBX_PART_SLIM 0x08 161*82527734SSukumar Swaminathan #define MBX_CONFIG_RING 0x09 162*82527734SSukumar Swaminathan #define MBX_RESET_RING 0x0A 163*82527734SSukumar Swaminathan #define MBX_READ_CONFIG 0x0B 164*82527734SSukumar Swaminathan #define MBX_READ_RCONFIG 0x0C 165*82527734SSukumar Swaminathan #define MBX_READ_SPARM 0x0D 166*82527734SSukumar Swaminathan #define MBX_READ_STATUS 0x0E 167*82527734SSukumar Swaminathan #define MBX_READ_RPI 0x0F 168*82527734SSukumar Swaminathan #define MBX_READ_XRI 0x10 169*82527734SSukumar Swaminathan #define MBX_READ_REV 0x11 170*82527734SSukumar Swaminathan #define MBX_READ_LNK_STAT 0x12 171*82527734SSukumar Swaminathan #define MBX_REG_LOGIN 0x13 172*82527734SSukumar Swaminathan #define MBX_UNREG_LOGIN 0x14 173*82527734SSukumar Swaminathan #define MBX_READ_LA 0x15 174*82527734SSukumar Swaminathan #define MBX_CLEAR_LA 0x16 175*82527734SSukumar Swaminathan #define MBX_DUMP_MEMORY 0x17 176*82527734SSukumar Swaminathan #define MBX_DUMP_CONTEXT 0x18 177*82527734SSukumar Swaminathan #define MBX_RUN_DIAGS 0x19 178*82527734SSukumar Swaminathan #define MBX_RESTART 0x1A 179*82527734SSukumar Swaminathan #define MBX_UPDATE_CFG 0x1B 180*82527734SSukumar Swaminathan #define MBX_DOWN_LOAD 0x1C 181*82527734SSukumar Swaminathan #define MBX_DEL_LD_ENTRY 0x1D 182*82527734SSukumar Swaminathan #define MBX_RUN_PROGRAM 0x1E 183*82527734SSukumar Swaminathan #define MBX_SET_MASK 0x20 184*82527734SSukumar Swaminathan #define MBX_SET_SLIM 0x21 185*82527734SSukumar Swaminathan #define MBX_UNREG_D_ID 0x23 186*82527734SSukumar Swaminathan #define MBX_KILL_BOARD 0x24 187*82527734SSukumar Swaminathan #define MBX_CONFIG_FARP 0x25 188*82527734SSukumar Swaminathan #define MBX_WRITE_VPARMS 0x32 189*82527734SSukumar Swaminathan #define MBX_LOAD_AREA 0x81 190*82527734SSukumar Swaminathan #define MBX_RUN_BIU_DIAG64 0x84 191*82527734SSukumar Swaminathan #define MBX_CONFIG_PORT 0x88 192*82527734SSukumar Swaminathan #define MBX_READ_SPARM64 0x8D 193*82527734SSukumar Swaminathan #define MBX_READ_RPI64 0x8F 194*82527734SSukumar Swaminathan #define MBX_CONFIG_MSI 0x90 195*82527734SSukumar Swaminathan #define MBX_REG_LOGIN64 0x93 196*82527734SSukumar Swaminathan #define MBX_READ_LA64 0x95 197*82527734SSukumar Swaminathan #define MBX_FLASH_WR_ULA 0x98 198*82527734SSukumar Swaminathan #define MBX_SET_DEBUG 0x99 199*82527734SSukumar Swaminathan #define MBX_LOAD_EXP_ROM 0x9C 200*82527734SSukumar Swaminathan #define MBX_REQUEST_FEATURES 0x9D 201*82527734SSukumar Swaminathan #define MBX_RESUME_RPI 0x9E 202*82527734SSukumar Swaminathan #define MBX_REG_VFI 0x9F 203*82527734SSukumar Swaminathan #define MBX_REG_FCFI 0xA0 204*82527734SSukumar Swaminathan #define MBX_UNREG_VFI 0xA1 205*82527734SSukumar Swaminathan #define MBX_UNREG_FCFI 0xA2 206*82527734SSukumar Swaminathan #define MBX_INIT_VFI 0xA3 207*82527734SSukumar Swaminathan #define MBX_INIT_VPI 0xA4 208*82527734SSukumar Swaminathan #define MBX_ACCESS_VDATA 0xA5 209*82527734SSukumar Swaminathan #define MBX_MAX_CMDS 0xA6 210*82527734SSukumar Swaminathan #define MBX_SLI2_CMD_MASK 0x80 211*82527734SSukumar Swaminathan 212*82527734SSukumar Swaminathan 213291a2b48SSukumar Swaminathan typedef struct read_sparm_var 214291a2b48SSukumar Swaminathan { 215291a2b48SSukumar Swaminathan uint32_t rsvd1; 216291a2b48SSukumar Swaminathan uint32_t rsvd2; 217291a2b48SSukumar Swaminathan union 218291a2b48SSukumar Swaminathan { 219291a2b48SSukumar Swaminathan ulp_bde_t sp; 220291a2b48SSukumar Swaminathan ulp_bde64_t sp64; 221fcf3ce44SJohn Forte } un; 222fcf3ce44SJohn Forte } read_sparm_var_t; 223fcf3ce44SJohn Forte 224*82527734SSukumar Swaminathan 225291a2b48SSukumar Swaminathan typedef struct read_rev_var 226291a2b48SSukumar Swaminathan { 227fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 228291a2b48SSukumar Swaminathan uint32_t cv:1; 229291a2b48SSukumar Swaminathan uint32_t rr:1; 230291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 231291a2b48SSukumar Swaminathan uint32_t rv:1; 232fcf3ce44SJohn Forte #endif 233fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 234291a2b48SSukumar Swaminathan uint32_t rv:1; 235291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 236291a2b48SSukumar Swaminathan uint32_t rr:1; 237291a2b48SSukumar Swaminathan uint32_t cv:1; 238fcf3ce44SJohn Forte #endif 239291a2b48SSukumar Swaminathan uint32_t biuRev; 240291a2b48SSukumar Swaminathan uint32_t smRev; 241291a2b48SSukumar Swaminathan union 242291a2b48SSukumar Swaminathan { 243291a2b48SSukumar Swaminathan uint32_t smFwRev; 244291a2b48SSukumar Swaminathan struct 245291a2b48SSukumar Swaminathan { 246fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 247291a2b48SSukumar Swaminathan uint8_t ProgType; 248291a2b48SSukumar Swaminathan uint8_t ProgId; 249291a2b48SSukumar Swaminathan uint16_t ProgVer:4; 250291a2b48SSukumar Swaminathan uint16_t ProgRev:4; 251291a2b48SSukumar Swaminathan uint16_t ProgFixLvl:2; 252291a2b48SSukumar Swaminathan uint16_t ProgDistType:2; 253291a2b48SSukumar Swaminathan uint16_t DistCnt:4; 254fcf3ce44SJohn Forte #endif 255fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 256291a2b48SSukumar Swaminathan uint16_t DistCnt:4; 257291a2b48SSukumar Swaminathan uint16_t ProgDistType:2; 258291a2b48SSukumar Swaminathan uint16_t ProgFixLvl:2; 259291a2b48SSukumar Swaminathan uint16_t ProgRev:4; 260291a2b48SSukumar Swaminathan uint16_t ProgVer:4; 261291a2b48SSukumar Swaminathan uint8_t ProgId; 262291a2b48SSukumar Swaminathan uint8_t ProgType; 263fcf3ce44SJohn Forte #endif 264fcf3ce44SJohn Forte } b; 265fcf3ce44SJohn Forte } un; 266291a2b48SSukumar Swaminathan uint32_t endecRev; 267fcf3ce44SJohn Forte 268fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 269291a2b48SSukumar Swaminathan uint8_t feaLevelHigh; 270291a2b48SSukumar Swaminathan uint8_t feaLevelLow; 271291a2b48SSukumar Swaminathan uint8_t fcphHigh; 272291a2b48SSukumar Swaminathan uint8_t fcphLow; 273fcf3ce44SJohn Forte #endif 274fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 275291a2b48SSukumar Swaminathan uint8_t fcphLow; 276291a2b48SSukumar Swaminathan uint8_t fcphHigh; 277291a2b48SSukumar Swaminathan uint8_t feaLevelLow; 278291a2b48SSukumar Swaminathan uint8_t feaLevelHigh; 279fcf3ce44SJohn Forte #endif 280291a2b48SSukumar Swaminathan uint32_t postKernRev; 281291a2b48SSukumar Swaminathan uint32_t opFwRev; 282291a2b48SSukumar Swaminathan uint8_t opFwName[16]; 283291a2b48SSukumar Swaminathan uint32_t sli1FwRev; 284291a2b48SSukumar Swaminathan uint8_t sli1FwName[16]; 285291a2b48SSukumar Swaminathan uint32_t sli2FwRev; 286291a2b48SSukumar Swaminathan uint8_t sli2FwName[16]; 287fcf3ce44SJohn Forte } read_rev_var_t; 288fcf3ce44SJohn Forte 289fcf3ce44SJohn Forte 290291a2b48SSukumar Swaminathan typedef struct dump_var 291291a2b48SSukumar Swaminathan { 292fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 293291a2b48SSukumar Swaminathan uint32_t rsvd:25; 294291a2b48SSukumar Swaminathan uint32_t ra:1; 295291a2b48SSukumar Swaminathan uint32_t co:1; 296291a2b48SSukumar Swaminathan uint32_t cv:1; 297291a2b48SSukumar Swaminathan uint32_t type:4; 298291a2b48SSukumar Swaminathan 299291a2b48SSukumar Swaminathan uint32_t entry_index:16; 300291a2b48SSukumar Swaminathan uint32_t region_id:16; 301fcf3ce44SJohn Forte #endif 302fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 303291a2b48SSukumar Swaminathan uint32_t type:4; 304291a2b48SSukumar Swaminathan uint32_t cv:1; 305291a2b48SSukumar Swaminathan uint32_t co:1; 306291a2b48SSukumar Swaminathan uint32_t ra:1; 307291a2b48SSukumar Swaminathan uint32_t rsvd:25; 308291a2b48SSukumar Swaminathan 309291a2b48SSukumar Swaminathan uint32_t region_id:16; 310291a2b48SSukumar Swaminathan uint32_t entry_index:16; 311fcf3ce44SJohn Forte #endif 312291a2b48SSukumar Swaminathan uint32_t base_adr; 313291a2b48SSukumar Swaminathan uint32_t word_cnt; 314291a2b48SSukumar Swaminathan uint32_t resp_offset; 315fcf3ce44SJohn Forte } dump_var_t; 316fcf3ce44SJohn Forte 317fcf3ce44SJohn Forte 318*82527734SSukumar Swaminathan typedef struct dump4_var 319*82527734SSukumar Swaminathan { 320*82527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 321*82527734SSukumar Swaminathan uint32_t link:8; 322*82527734SSukumar Swaminathan uint32_t rsvd:20; 323*82527734SSukumar Swaminathan uint32_t type:4; 324*82527734SSukumar Swaminathan 325*82527734SSukumar Swaminathan uint32_t entry_index:16; 326*82527734SSukumar Swaminathan uint32_t region_id:16; 327*82527734SSukumar Swaminathan #endif 328*82527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 329*82527734SSukumar Swaminathan uint32_t type:4; 330*82527734SSukumar Swaminathan uint32_t rsvd:20; 331*82527734SSukumar Swaminathan uint32_t link:8; 332*82527734SSukumar Swaminathan 333*82527734SSukumar Swaminathan uint32_t region_id:16; 334*82527734SSukumar Swaminathan uint32_t entry_index:16; 335*82527734SSukumar Swaminathan #endif 336*82527734SSukumar Swaminathan uint32_t available_cnt; 337*82527734SSukumar Swaminathan uint32_t addrLow; 338*82527734SSukumar Swaminathan uint32_t addrHigh; 339*82527734SSukumar Swaminathan uint32_t rsp_cnt; 340*82527734SSukumar Swaminathan } dump4_var_t; 341*82527734SSukumar Swaminathan 342*82527734SSukumar Swaminathan 343*82527734SSukumar Swaminathan typedef struct update_cfg 344*82527734SSukumar Swaminathan { 345*82527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 346*82527734SSukumar Swaminathan uint32_t rsvd2:16; 347*82527734SSukumar Swaminathan uint32_t proc_type:8; 348*82527734SSukumar Swaminathan uint32_t rsvd1:1; 349*82527734SSukumar Swaminathan uint32_t Abit:1; 350*82527734SSukumar Swaminathan uint32_t DIbit:1; 351*82527734SSukumar Swaminathan uint32_t Vbit:1; 352*82527734SSukumar Swaminathan uint32_t req_type:4; 353*82527734SSukumar Swaminathan #define INIT_REGION 1 354*82527734SSukumar Swaminathan #define UPDATE_DATA 2 355*82527734SSukumar Swaminathan #define CLEAN_UP_CFG 3 356*82527734SSukumar Swaminathan uint32_t entry_len:16; 357*82527734SSukumar Swaminathan uint32_t region_id:16; 358*82527734SSukumar Swaminathan #endif 359*82527734SSukumar Swaminathan 360*82527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 361*82527734SSukumar Swaminathan uint32_t req_type:4; 362*82527734SSukumar Swaminathan #define INIT_REGION 1 363*82527734SSukumar Swaminathan #define UPDATE_DATA 2 364*82527734SSukumar Swaminathan #define CLEAN_UP_CFG 3 365*82527734SSukumar Swaminathan uint32_t Vbit:1; 366*82527734SSukumar Swaminathan uint32_t DIbit:1; 367*82527734SSukumar Swaminathan uint32_t Abit:1; 368*82527734SSukumar Swaminathan uint32_t rsvd1:1; 369*82527734SSukumar Swaminathan uint32_t proc_type:8; 370*82527734SSukumar Swaminathan uint32_t rsvd2:16; 371*82527734SSukumar Swaminathan 372*82527734SSukumar Swaminathan uint32_t region_id:16; 373*82527734SSukumar Swaminathan uint32_t entry_len:16; 374*82527734SSukumar Swaminathan #endif 375*82527734SSukumar Swaminathan 376*82527734SSukumar Swaminathan uint32_t rsp_info; 377*82527734SSukumar Swaminathan uint32_t byte_len; 378*82527734SSukumar Swaminathan uint32_t cfg_data; 379*82527734SSukumar Swaminathan } update_cfg_var_t; 380*82527734SSukumar Swaminathan 381*82527734SSukumar Swaminathan 382291a2b48SSukumar Swaminathan typedef struct read_cfg_var 383291a2b48SSukumar Swaminathan { 384fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 385291a2b48SSukumar Swaminathan uint32_t cr:1; 386291a2b48SSukumar Swaminathan uint32_t ci:1; 387291a2b48SSukumar Swaminathan uint32_t cr_delay:6; 388291a2b48SSukumar Swaminathan uint32_t cr_count:8; 389291a2b48SSukumar Swaminathan uint32_t InitBBC:8; 390291a2b48SSukumar Swaminathan uint32_t MaxBBC:8; 391fcf3ce44SJohn Forte #endif 392fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 393291a2b48SSukumar Swaminathan uint32_t MaxBBC:8; 394291a2b48SSukumar Swaminathan uint32_t InitBBC:8; 395291a2b48SSukumar Swaminathan uint32_t cr_count:8; 396291a2b48SSukumar Swaminathan uint32_t cr_delay:6; 397291a2b48SSukumar Swaminathan uint32_t ci:1; 398291a2b48SSukumar Swaminathan uint32_t cr:1; 399fcf3ce44SJohn Forte #endif 400fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 401291a2b48SSukumar Swaminathan uint32_t topology:8; 402291a2b48SSukumar Swaminathan uint32_t myDid:24; 403fcf3ce44SJohn Forte #endif 404fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 405291a2b48SSukumar Swaminathan uint32_t myDid:24; 406291a2b48SSukumar Swaminathan uint32_t topology:8; 407fcf3ce44SJohn Forte #endif 408fcf3ce44SJohn Forte /* Defines for topology (defined previously) */ 409fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 410291a2b48SSukumar Swaminathan uint32_t AR:1; 411291a2b48SSukumar Swaminathan uint32_t IR:1; 412291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 413291a2b48SSukumar Swaminathan uint32_t ack0:1; 414fcf3ce44SJohn Forte #endif 415fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 416291a2b48SSukumar Swaminathan uint32_t ack0:1; 417291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 418291a2b48SSukumar Swaminathan uint32_t IR:1; 419291a2b48SSukumar Swaminathan uint32_t AR:1; 420fcf3ce44SJohn Forte #endif 421291a2b48SSukumar Swaminathan uint32_t edtov; 422291a2b48SSukumar Swaminathan uint32_t arbtov; 423291a2b48SSukumar Swaminathan uint32_t ratov; 424291a2b48SSukumar Swaminathan uint32_t rttov; 425291a2b48SSukumar Swaminathan uint32_t altov; 426291a2b48SSukumar Swaminathan uint32_t lmt; 427fcf3ce44SJohn Forte 428fcf3ce44SJohn Forte #define LMT_1GB_CAPABLE 0x0004 429fcf3ce44SJohn Forte #define LMT_2GB_CAPABLE 0x0008 430fcf3ce44SJohn Forte #define LMT_4GB_CAPABLE 0x0040 431fcf3ce44SJohn Forte #define LMT_8GB_CAPABLE 0x0080 432fcf3ce44SJohn Forte #define LMT_10GB_CAPABLE 0x0100 433fcf3ce44SJohn Forte 434291a2b48SSukumar Swaminathan uint32_t rsvd2; 435291a2b48SSukumar Swaminathan uint32_t rsvd3; 436291a2b48SSukumar Swaminathan uint32_t max_xri; 437291a2b48SSukumar Swaminathan uint32_t max_iocb; 438291a2b48SSukumar Swaminathan uint32_t max_rpi; 439291a2b48SSukumar Swaminathan uint32_t avail_xri; 440291a2b48SSukumar Swaminathan uint32_t avail_iocb; 441291a2b48SSukumar Swaminathan uint32_t avail_rpi; 442291a2b48SSukumar Swaminathan uint32_t default_rpi; 443fcf3ce44SJohn Forte } read_cfg_var_t; 444fcf3ce44SJohn Forte 445fcf3ce44SJohn Forte 446291a2b48SSukumar Swaminathan typedef struct read_log_var 447291a2b48SSukumar Swaminathan { 448fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 449291a2b48SSukumar Swaminathan uint32_t type:8; 450291a2b48SSukumar Swaminathan uint32_t byte_count:8; 451291a2b48SSukumar Swaminathan uint32_t write:1; 452291a2b48SSukumar Swaminathan uint32_t resv:3; 453291a2b48SSukumar Swaminathan uint32_t offset:12; 454fcf3ce44SJohn Forte #endif 455fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 456291a2b48SSukumar Swaminathan uint32_t offset:12; 457291a2b48SSukumar Swaminathan uint32_t resv:3; 458291a2b48SSukumar Swaminathan uint32_t write:1; 459291a2b48SSukumar Swaminathan uint32_t byte_count:8; 460291a2b48SSukumar Swaminathan uint32_t type:8; 461fcf3ce44SJohn Forte #endif 462fcf3ce44SJohn Forte 463291a2b48SSukumar Swaminathan uint32_t data; 464fcf3ce44SJohn Forte } read_log_var_t; 465fcf3ce44SJohn Forte 466fcf3ce44SJohn Forte 467291a2b48SSukumar Swaminathan typedef struct log_status_var 468291a2b48SSukumar Swaminathan { 469fcf3ce44SJohn Forte 470fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 471291a2b48SSukumar Swaminathan uint16_t split_log_next; 472291a2b48SSukumar Swaminathan uint16_t log_next; 473fcf3ce44SJohn Forte 474291a2b48SSukumar Swaminathan uint32_t size; 475fcf3ce44SJohn Forte 476291a2b48SSukumar Swaminathan uint32_t format:8; 477291a2b48SSukumar Swaminathan uint32_t resv2:22; 478291a2b48SSukumar Swaminathan uint32_t log_level:1; 479291a2b48SSukumar Swaminathan uint32_t split_log:1; 480fcf3ce44SJohn Forte #endif 481fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 482291a2b48SSukumar Swaminathan uint16_t log_next; 483291a2b48SSukumar Swaminathan uint16_t split_log_next; 484fcf3ce44SJohn Forte 485291a2b48SSukumar Swaminathan uint32_t size; 486fcf3ce44SJohn Forte 487291a2b48SSukumar Swaminathan uint32_t split_log:1; 488291a2b48SSukumar Swaminathan uint32_t log_level:1; 489291a2b48SSukumar Swaminathan uint32_t resv2:22; 490291a2b48SSukumar Swaminathan uint32_t format:8; 491fcf3ce44SJohn Forte #endif 492fcf3ce44SJohn Forte 493291a2b48SSukumar Swaminathan uint32_t offset; 494fcf3ce44SJohn Forte } log_status_var_t; 495fcf3ce44SJohn Forte 496fcf3ce44SJohn Forte 497291a2b48SSukumar Swaminathan typedef struct read_evt_log_var 498291a2b48SSukumar Swaminathan { 499fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 500291a2b48SSukumar Swaminathan uint32_t read_log:1; 501291a2b48SSukumar Swaminathan uint32_t clear_log:1; 502291a2b48SSukumar Swaminathan uint32_t mbox_rsp:1; 503291a2b48SSukumar Swaminathan uint32_t resv:28; 504fcf3ce44SJohn Forte #endif 505fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 506291a2b48SSukumar Swaminathan uint32_t resv:28; 507291a2b48SSukumar Swaminathan uint32_t mbox_rsp:1; 508291a2b48SSukumar Swaminathan uint32_t clear_log:1; 509291a2b48SSukumar Swaminathan uint32_t read_log:1; 510fcf3ce44SJohn Forte #endif 511fcf3ce44SJohn Forte 512291a2b48SSukumar Swaminathan uint32_t offset; 513fcf3ce44SJohn Forte 514291a2b48SSukumar Swaminathan union 515291a2b48SSukumar Swaminathan { 516291a2b48SSukumar Swaminathan ulp_bde_t sp; 517291a2b48SSukumar Swaminathan ulp_bde64_t sp64; 518fcf3ce44SJohn Forte } un; 519fcf3ce44SJohn Forte } read_evt_log_var_t; 520fcf3ce44SJohn Forte 521fcf3ce44SJohn Forte 522291a2b48SSukumar Swaminathan typedef struct dfc_mailbox 523291a2b48SSukumar Swaminathan { 524fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 525291a2b48SSukumar Swaminathan uint16_t mbxStatus; 526291a2b48SSukumar Swaminathan uint8_t mbxCommand; 527291a2b48SSukumar Swaminathan uint8_t mbxReserved:6; 528291a2b48SSukumar Swaminathan uint8_t mbxHc:1; 529291a2b48SSukumar Swaminathan uint8_t mbxOwner:1; /* Low order bit first word */ 530fcf3ce44SJohn Forte #endif 531fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 532291a2b48SSukumar Swaminathan uint8_t mbxOwner:1; /* Low order bit first word */ 533291a2b48SSukumar Swaminathan uint8_t mbxHc:1; 534291a2b48SSukumar Swaminathan uint8_t mbxReserved:6; 535291a2b48SSukumar Swaminathan uint8_t mbxCommand; 536291a2b48SSukumar Swaminathan uint16_t mbxStatus; 537fcf3ce44SJohn Forte #endif 538fcf3ce44SJohn Forte 539291a2b48SSukumar Swaminathan union 540291a2b48SSukumar Swaminathan { 541291a2b48SSukumar Swaminathan uint32_t varWords[31]; 542291a2b48SSukumar Swaminathan read_sparm_var_t varRdSparm; 543291a2b48SSukumar Swaminathan read_rev_var_t varRdRev; 544291a2b48SSukumar Swaminathan read_cfg_var_t varRdCfg; 545291a2b48SSukumar Swaminathan dump_var_t varDmp; 546291a2b48SSukumar Swaminathan read_log_var_t varRdLog; 547291a2b48SSukumar Swaminathan log_status_var_t varLogStat; 548291a2b48SSukumar Swaminathan read_evt_log_var_t varRdEvtLog; 549fcf3ce44SJohn Forte 550fcf3ce44SJohn Forte } un; 551fcf3ce44SJohn Forte } dfc_mailbox_t; 552fcf3ce44SJohn Forte 553fcf3ce44SJohn Forte 554*82527734SSukumar Swaminathan typedef struct dfc_mailbox4 555*82527734SSukumar Swaminathan { 556*82527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 557*82527734SSukumar Swaminathan uint16_t mbxStatus; 558*82527734SSukumar Swaminathan uint8_t mbxCommand; 559*82527734SSukumar Swaminathan uint8_t mbxReserved:6; 560*82527734SSukumar Swaminathan uint8_t mbxHc:1; 561*82527734SSukumar Swaminathan uint8_t mbxOwner:1; /* Low order bit first word */ 562*82527734SSukumar Swaminathan #endif 563*82527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 564*82527734SSukumar Swaminathan uint8_t mbxOwner:1; /* Low order bit first word */ 565*82527734SSukumar Swaminathan uint8_t mbxHc:1; 566*82527734SSukumar Swaminathan uint8_t mbxReserved:6; 567*82527734SSukumar Swaminathan uint8_t mbxCommand; 568*82527734SSukumar Swaminathan uint16_t mbxStatus; 569*82527734SSukumar Swaminathan #endif 570*82527734SSukumar Swaminathan 571*82527734SSukumar Swaminathan union 572*82527734SSukumar Swaminathan { 573*82527734SSukumar Swaminathan uint32_t varWords[63]; 574*82527734SSukumar Swaminathan dump4_var_t varDmp; 575*82527734SSukumar Swaminathan update_cfg_var_t varUpdateCfg; 576*82527734SSukumar Swaminathan } un; 577*82527734SSukumar Swaminathan } dfc_mailbox4_t; 578*82527734SSukumar Swaminathan 579*82527734SSukumar Swaminathan 580*82527734SSukumar Swaminathan /* Config Region 23 Records */ 581*82527734SSukumar Swaminathan 582*82527734SSukumar Swaminathan typedef struct tlv_fcoe { 583*82527734SSukumar Swaminathan uint8_t type; 584*82527734SSukumar Swaminathan uint8_t length; 585*82527734SSukumar Swaminathan uint8_t version; 586*82527734SSukumar Swaminathan #define TLV_FCOE_VER 1 587*82527734SSukumar Swaminathan 588*82527734SSukumar Swaminathan uint8_t fip_flags; 589*82527734SSukumar Swaminathan #define TLV_FCOE_FIP 0x40 590*82527734SSukumar Swaminathan #define TLV_FCOE_VLAN 0x01 591*82527734SSukumar Swaminathan 592*82527734SSukumar Swaminathan uint8_t FCMap[3]; 593*82527734SSukumar Swaminathan uint8_t reserved; 594*82527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 595*82527734SSukumar Swaminathan uint32_t rsvd:20; 596*82527734SSukumar Swaminathan uint32_t VLanId:12; 597*82527734SSukumar Swaminathan #endif 598*82527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 599*82527734SSukumar Swaminathan uint32_t VLanId:12; 600*82527734SSukumar Swaminathan uint32_t rsvd:20; 601*82527734SSukumar Swaminathan #endif 602*82527734SSukumar Swaminathan } tlv_fcoe_t; 603*82527734SSukumar Swaminathan 604*82527734SSukumar Swaminathan 605*82527734SSukumar Swaminathan typedef struct tlv_fcfconnectentry { 606*82527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 607*82527734SSukumar Swaminathan uint32_t rsvd1:4; 608*82527734SSukumar Swaminathan uint32_t VLanId:12; 609*82527734SSukumar Swaminathan uint32_t rsvd2:7; 610*82527734SSukumar Swaminathan uint32_t AddrMode:1; 611*82527734SSukumar Swaminathan uint32_t AddrModePreferred:1; 612*82527734SSukumar Swaminathan uint32_t AddrModeValid:1; 613*82527734SSukumar Swaminathan uint32_t VLanValid:1; 614*82527734SSukumar Swaminathan uint32_t SwitchNameValid:1; 615*82527734SSukumar Swaminathan uint32_t FabricNameValid:1; 616*82527734SSukumar Swaminathan uint32_t Primary:1; 617*82527734SSukumar Swaminathan uint32_t Boot:1; 618*82527734SSukumar Swaminathan uint32_t Valid:1; 619*82527734SSukumar Swaminathan #endif 620*82527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 621*82527734SSukumar Swaminathan uint32_t Valid:1; 622*82527734SSukumar Swaminathan uint32_t Boot:1; 623*82527734SSukumar Swaminathan uint32_t Primary:1; 624*82527734SSukumar Swaminathan uint32_t FabricNameValid:1; 625*82527734SSukumar Swaminathan uint32_t SwitchNameValid:1; 626*82527734SSukumar Swaminathan uint32_t VLanValid:1; 627*82527734SSukumar Swaminathan uint32_t AddrModeValid:1; 628*82527734SSukumar Swaminathan uint32_t AddrModePreferred:1; 629*82527734SSukumar Swaminathan uint32_t AddrMode:1; 630*82527734SSukumar Swaminathan uint32_t rsvd2:7; 631*82527734SSukumar Swaminathan uint32_t VLanId:12; 632*82527734SSukumar Swaminathan uint32_t rsvd1:4; 633*82527734SSukumar Swaminathan #endif 634*82527734SSukumar Swaminathan uint8_t FabricName[8]; 635*82527734SSukumar Swaminathan uint8_t SwitchName[8]; 636*82527734SSukumar Swaminathan } tlv_fcfconnectentry_t; 637*82527734SSukumar Swaminathan 638*82527734SSukumar Swaminathan 639*82527734SSukumar Swaminathan #define MAX_FCFCONNECTLIST_ENTRIES 16 640*82527734SSukumar Swaminathan typedef struct tlv_fcfconnectlist { 641*82527734SSukumar Swaminathan uint8_t type; 642*82527734SSukumar Swaminathan uint8_t length; 643*82527734SSukumar Swaminathan uint16_t rsvd; 644*82527734SSukumar Swaminathan tlv_fcfconnectentry_t entry[MAX_FCFCONNECTLIST_ENTRIES]; 645*82527734SSukumar Swaminathan } tlv_fcfconnectlist_t; 646*82527734SSukumar Swaminathan 647*82527734SSukumar Swaminathan 648291a2b48SSukumar Swaminathan typedef struct dfc_ioinfo 649291a2b48SSukumar Swaminathan { 650fcf3ce44SJohn Forte uint32_t a_mboxCmd; /* mailbox commands issued */ 651fcf3ce44SJohn Forte uint32_t a_mboxCmpl; /* mailbox commands completed */ 652fcf3ce44SJohn Forte uint32_t a_mboxErr; /* mailbox commands completed, error status */ 653fcf3ce44SJohn Forte uint32_t a_iocbCmd; /* iocb command ring issued */ 654fcf3ce44SJohn Forte uint32_t a_iocbRsp; /* iocb rsp ring received */ 655fcf3ce44SJohn Forte uint32_t a_adapterIntr; /* adapter interrupt events */ 656fcf3ce44SJohn Forte uint32_t a_fcpCmd; /* FCP commands issued */ 657fcf3ce44SJohn Forte uint32_t a_fcpCmpl; /* FCP command completions received */ 658fcf3ce44SJohn Forte uint32_t a_fcpErr; /* FCP command completions errors */ 659fcf3ce44SJohn Forte uint32_t a_seqXmit; /* IP xmit sequences sent */ 660fcf3ce44SJohn Forte uint32_t a_seqRcv; /* IP sequences received */ 661fcf3ce44SJohn Forte uint32_t a_bcastXmit; /* cnt of successful xmit bcast cmds issued */ 662fcf3ce44SJohn Forte uint32_t a_bcastRcv; /* cnt of receive bcast cmds received */ 663fcf3ce44SJohn Forte uint32_t a_elsXmit; /* cnt of successful ELS req cmds issued */ 664fcf3ce44SJohn Forte uint32_t a_elsRcv; /* cnt of ELS request commands received */ 665fcf3ce44SJohn Forte uint32_t a_RSCNRcv; /* cnt of RSCN commands received */ 666fcf3ce44SJohn Forte uint32_t a_seqXmitErr; /* cnt of unsuccessful xmit bcast cmds issued */ 667fcf3ce44SJohn Forte uint32_t a_elsXmitErr; /* cnt of unsuccessful ELS req cmds issued */ 668fcf3ce44SJohn Forte uint32_t a_elsBufPost; /* cnt of ELS buffers posted to adapter */ 669fcf3ce44SJohn Forte uint32_t a_ipBufPost; /* cnt of IP buffers posted to adapter */ 670fcf3ce44SJohn Forte uint32_t a_cnt1; /* generic counter */ 671fcf3ce44SJohn Forte uint32_t a_cnt2; /* generic counter */ 672fcf3ce44SJohn Forte uint32_t a_cnt3; /* generic counter */ 673fcf3ce44SJohn Forte uint32_t a_cnt4; /* generic counter */ 674fcf3ce44SJohn Forte 675fcf3ce44SJohn Forte } dfc_ioinfo_t; 676fcf3ce44SJohn Forte 677fcf3ce44SJohn Forte 678291a2b48SSukumar Swaminathan typedef struct dfc_linkinfo 679291a2b48SSukumar Swaminathan { 680291a2b48SSukumar Swaminathan uint32_t a_linkEventTag; 681291a2b48SSukumar Swaminathan uint32_t a_linkUp; 682291a2b48SSukumar Swaminathan uint32_t a_linkDown; 683291a2b48SSukumar Swaminathan uint32_t a_linkMulti; 684291a2b48SSukumar Swaminathan uint32_t a_DID; 685291a2b48SSukumar Swaminathan uint8_t a_topology; 686291a2b48SSukumar Swaminathan uint8_t a_linkState; 687291a2b48SSukumar Swaminathan uint8_t a_alpa; 688291a2b48SSukumar Swaminathan uint8_t a_alpaCnt; 689291a2b48SSukumar Swaminathan uint8_t a_alpaMap[128]; 690291a2b48SSukumar Swaminathan uint8_t a_wwpName[8]; 691291a2b48SSukumar Swaminathan uint8_t a_wwnName[8]; 692fcf3ce44SJohn Forte } dfc_linkinfo_t; 693fcf3ce44SJohn Forte 694fcf3ce44SJohn Forte /* values for a_topology */ 695fcf3ce44SJohn Forte #define LNK_LOOP 0x1 696fcf3ce44SJohn Forte #define LNK_PUBLIC_LOOP 0x2 697fcf3ce44SJohn Forte #define LNK_FABRIC 0x3 698fcf3ce44SJohn Forte #define LNK_PT2PT 0x4 699fcf3ce44SJohn Forte #define LNK_MENLO_MAINTENANCE 0x5 700fcf3ce44SJohn Forte 701fcf3ce44SJohn Forte /* values for a_linkState */ 702fcf3ce44SJohn Forte #define LNK_DOWN 0x1 703fcf3ce44SJohn Forte #define LNK_UP 0x2 704fcf3ce44SJohn Forte #define LNK_FLOGI 0x3 705fcf3ce44SJohn Forte #define LNK_DISCOVERY 0x4 706fcf3ce44SJohn Forte #define LNK_REDISCOVERY 0x5 707fcf3ce44SJohn Forte #define LNK_READY 0x6 708*82527734SSukumar Swaminathan #define LNK_DOWN_PERSIST 0x7 709fcf3ce44SJohn Forte 710fcf3ce44SJohn Forte 711291a2b48SSukumar Swaminathan typedef struct dfc_traceinfo 712291a2b48SSukumar Swaminathan { 713291a2b48SSukumar Swaminathan uint8_t a_event; 714291a2b48SSukumar Swaminathan uint8_t a_cmd; 715291a2b48SSukumar Swaminathan uint16_t a_status; 716291a2b48SSukumar Swaminathan uint32_t a_information; 717fcf3ce44SJohn Forte } dfc_traceinfo_t; 718fcf3ce44SJohn Forte 719fcf3ce44SJohn Forte 720291a2b48SSukumar Swaminathan typedef struct dfc_cfgparam 721291a2b48SSukumar Swaminathan { 722291a2b48SSukumar Swaminathan char a_string[32]; 723291a2b48SSukumar Swaminathan uint32_t a_low; 724291a2b48SSukumar Swaminathan uint32_t a_hi; 725291a2b48SSukumar Swaminathan uint32_t a_default; 726291a2b48SSukumar Swaminathan uint32_t a_current; 727291a2b48SSukumar Swaminathan uint16_t a_flag; 728291a2b48SSukumar Swaminathan #define CFG_EXPORT 0x1 /* Export this parameter to end user */ 729fcf3ce44SJohn Forte #define CFG_IGNORE 0x2 /* Ignore this parameter */ 730*82527734SSukumar Swaminathan #define CFG_APPLICABLE 0x4 /* Applicable to this HBA */ 731*82527734SSukumar Swaminathan #define CFG_COMMON 0x8 /* Common to all HBAs */ 732fcf3ce44SJohn Forte 733291a2b48SSukumar Swaminathan uint16_t a_changestate; 734fcf3ce44SJohn Forte #define CFG_REBOOT 0x0 /* Changes effective after system */ 735fcf3ce44SJohn Forte /* reboot */ 736fcf3ce44SJohn Forte #define CFG_DYMANIC 0x1 /* Changes effective immediately */ 737fcf3ce44SJohn Forte #define CFG_RESTART 0x2 /* Changes effective after adapter */ 738fcf3ce44SJohn Forte /* restart */ 739291a2b48SSukumar Swaminathan #define CFG_LINKRESET 0x3 /* Changes effective after link reset */ 740fcf3ce44SJohn Forte 741291a2b48SSukumar Swaminathan char a_help[80]; 742fcf3ce44SJohn Forte } dfc_cfgparam_t; 743fcf3ce44SJohn Forte 744fcf3ce44SJohn Forte 745fcf3ce44SJohn Forte 746291a2b48SSukumar Swaminathan typedef struct dfc_nodeinfo 747291a2b48SSukumar Swaminathan { 748291a2b48SSukumar Swaminathan uint16_t a_flag; 749291a2b48SSukumar Swaminathan uint16_t a_state; 750291a2b48SSukumar Swaminathan uint32_t a_did; 751291a2b48SSukumar Swaminathan uint8_t a_wwpn[8]; 752291a2b48SSukumar Swaminathan uint8_t a_wwnn[8]; 753291a2b48SSukumar Swaminathan uint32_t a_targetid; 754fcf3ce44SJohn Forte } dfc_nodeinfo_t; 755fcf3ce44SJohn Forte 756fcf3ce44SJohn Forte /* Defines for a_state */ 757291a2b48SSukumar Swaminathan #define NODE_UNUSED 0 /* unused NL_PORT entry */ 758291a2b48SSukumar Swaminathan #define NODE_LIMBO 0x1 /* entry needs to hang around for wwpn / sid */ 759291a2b48SSukumar Swaminathan #define NODE_LOGOUT 0x2 /* NL_PORT is not logged in - entry is cached */ 760291a2b48SSukumar Swaminathan #define NODE_PLOGI 0x3 /* PLOGI was sent to NL_PORT */ 761291a2b48SSukumar Swaminathan #define NODE_LOGIN 0x4 /* NL_PORT is logged in / login REG_LOGINed */ 762291a2b48SSukumar Swaminathan #define NODE_PRLI 0x5 /* PRLI was sent to NL_PORT */ 763291a2b48SSukumar Swaminathan #define NODE_ALLOC 0x6 /* NL_PORT is ready to initiate adapter I/O */ 764291a2b48SSukumar Swaminathan #define NODE_SEED 0x7 /* seed scsi id bind in table */ 765fcf3ce44SJohn Forte 766fcf3ce44SJohn Forte /* Defines for a_flag */ 767291a2b48SSukumar Swaminathan #define NODE_RPI_XRI 0x1 /* creating xri for entry */ 768291a2b48SSukumar Swaminathan #define NODE_REQ_SND 0x2 /* sent ELS request for this entry */ 769291a2b48SSukumar Swaminathan #define NODE_ADDR_AUTH 0x4 /* Authenticating addr for this entry */ 770291a2b48SSukumar Swaminathan #define NODE_RM_ENTRY 0x8 /* Remove this entry */ 771291a2b48SSukumar Swaminathan #define NODE_FARP_SND 0x10 /* sent FARP request for this entry */ 772291a2b48SSukumar Swaminathan #define NODE_FABRIC 0x20 /* this entry represents the Fabric */ 773291a2b48SSukumar Swaminathan #define NODE_FCP_TARGET 0x40 /* this entry is an FCP target */ 774291a2b48SSukumar Swaminathan #define NODE_IP_NODE 0x80 /* this entry is an IP node */ 775291a2b48SSukumar Swaminathan #define NODE_DISC_START 0x100 /* start discovery on this entry */ 776291a2b48SSukumar Swaminathan #define NODE_SEED_WWPN 0x200 /* Entry scsi id is seeded for WWPN */ 777291a2b48SSukumar Swaminathan #define NODE_SEED_WWNN 0x400 /* Entry scsi id is seeded for WWNN */ 778291a2b48SSukumar Swaminathan #define NODE_SEED_DID 0x800 /* Entry scsi id is seeded for DID */ 779291a2b48SSukumar Swaminathan #define NODE_SEED_MASK 0xe00 /* mask for seeded flags */ 780291a2b48SSukumar Swaminathan #define NODE_AUTOMAP 0x1000 /* This entry was automap'ed */ 781291a2b48SSukumar Swaminathan #define NODE_NS_REMOVED 0x2000 /* This entry removed from NameServer */ 782291a2b48SSukumar Swaminathan 783291a2b48SSukumar Swaminathan 784291a2b48SSukumar Swaminathan typedef struct dfc_vpd 785291a2b48SSukumar Swaminathan { 786291a2b48SSukumar Swaminathan uint32_t version; 787fcf3ce44SJohn Forte #define DFC_VPD_VERSION 1 788fcf3ce44SJohn Forte 789291a2b48SSukumar Swaminathan char ModelDescription[256]; /* VPD field V1 */ 790291a2b48SSukumar Swaminathan char Model[80]; /* VPD field V2 */ 791291a2b48SSukumar Swaminathan char ProgramType[256]; /* VPD field V3 */ 792291a2b48SSukumar Swaminathan char PortNum[20]; /* VPD field V4 */ 793fcf3ce44SJohn Forte } dfc_vpd_t; 794fcf3ce44SJohn Forte 795291a2b48SSukumar Swaminathan typedef struct dfc_destid 796291a2b48SSukumar Swaminathan { 797291a2b48SSukumar Swaminathan uint32_t idType; /* 0 - wwpn, 1 - d_id */ 798291a2b48SSukumar Swaminathan uint32_t d_id; 799291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 800fcf3ce44SJohn Forte } dfc_destid_t; 801fcf3ce44SJohn Forte 802fcf3ce44SJohn Forte 803291a2b48SSukumar Swaminathan typedef struct dfc_loopback 804291a2b48SSukumar Swaminathan { 805291a2b48SSukumar Swaminathan uint32_t bufSize; 806291a2b48SSukumar Swaminathan uint8_t *XmitBuffer; 807291a2b48SSukumar Swaminathan uint8_t *RcvBuffer; 808fcf3ce44SJohn Forte } dfc_loopback_t; 809fcf3ce44SJohn Forte 810fcf3ce44SJohn Forte 811291a2b48SSukumar Swaminathan typedef struct dfc_drvinfo 812291a2b48SSukumar Swaminathan { 813291a2b48SSukumar Swaminathan uint8_t drvInfoVer; /* Version of this structure */ 814291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION2 0x02 815291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION3 0x03 /* NPIV */ 816291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION4 0x04 /* DHCHAP */ 817291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION DFC_DRVINFO_VERSION3 818fcf3ce44SJohn Forte 819fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 820fcf3ce44SJohn Forte #undef DFC_DRVINFO_VERSION 821291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION DFC_DRVINFO_VERSION4 822291a2b48SSukumar Swaminathan #endif /* DHCHAP_SUPPORT */ 823fcf3ce44SJohn Forte 824291a2b48SSukumar Swaminathan uint8_t drvType; 825fcf3ce44SJohn Forte #define DFC_DRVINFO_SOLARIS 0x11 /* Solaris */ 826291a2b48SSukumar Swaminathan #define DFC_DRVINFO_LEADVILLE 0x14 /* Solaris Leadville ULP */ 827291a2b48SSukumar Swaminathan #define DFC_DRVINFO_COMSTAR 0x16 /* Solaris Comstar ULP */ 828fcf3ce44SJohn Forte 829291a2b48SSukumar Swaminathan uint16_t reserved; 830291a2b48SSukumar Swaminathan uint8_t rmLevel; /* Remote Management (HBAnyware) */ 831291a2b48SSukumar Swaminathan /* Support Level */ 832291a2b48SSukumar Swaminathan #define DFC_DRVINFO_RMLEVEL 0x02 /* HBAnyware v2.3 */ 833fcf3ce44SJohn Forte 834291a2b48SSukumar Swaminathan uint8_t mpLevel; /* MultiPulse support Level */ 835291a2b48SSukumar Swaminathan uint8_t hbaapiLevel; /* HBAAPI support level */ 836fcf3ce44SJohn Forte #define DFC_DRVINFO_HBAAPI 0x01 /* HBAAPI v1.0 */ 837fcf3ce44SJohn Forte 838291a2b48SSukumar Swaminathan uint8_t reserved1; 839291a2b48SSukumar Swaminathan char drvVer[16]; /* Driver Version string */ 840291a2b48SSukumar Swaminathan char drvName[8]; /* Driver Name */ 841291a2b48SSukumar Swaminathan char ftrDrvVer[16]; /* Filter/IOCtl Driver Version string */ 842291a2b48SSukumar Swaminathan char ftrDrvName[8]; /* Filter/IOCtl Driver Name */ 843291a2b48SSukumar Swaminathan char ipDrvVer[16]; /* IP Driver/component Version string */ 844291a2b48SSukumar Swaminathan char ipDrvName[8]; /* IP Driver/component Name */ 845291a2b48SSukumar Swaminathan uint32_t d_id; 846291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 847291a2b48SSukumar Swaminathan uint8_t wwnn[8]; 848291a2b48SSukumar Swaminathan uint8_t hostname[32]; /* IP node hostname from uname -n */ 849fcf3ce44SJohn Forte 850fcf3ce44SJohn Forte #if (DFC_DRVINFO_VERSION >= DFC_DRVINFO_VERSION3) 851291a2b48SSukumar Swaminathan uint32_t NPIVsupport; 852fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_DRV 0x00000001 853fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_MODS 0x00000002 854fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_PARMS 0x00000004 855fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_FW 0x00000008 856fcf3ce44SJohn Forte 857fcf3ce44SJohn Forte #endif /* >= DFC_DRVINFO_VERSION3 */ 858fcf3ce44SJohn Forte 859fcf3ce44SJohn Forte #if (DFC_DRVINFO_VERSION >= DFC_DRVINFO_VERSION4) 860291a2b48SSukumar Swaminathan uint32_t sliMode; 861291a2b48SSukumar Swaminathan uint64_t featureList; 862fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_DIAG 0x00000001 863fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_MAPPING 0x00000002 864fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_DHCHAP 0x00000004 865fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_IKE 0x00000008 866fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_NPIV 0x00000010 867fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_RESET_WWN 0x00000020 868fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_VOLATILE_WWN 0x00000040 869fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_E2E_AUTH 0x00000080 870*82527734SSukumar Swaminathan #define DFC_DRVINFO_FEATURE_SAN_DIAG 0x00000100 871*82527734SSukumar Swaminathan #define DFC_DRVINFO_FEATURE_FCOE 0x00000200 872*82527734SSukumar Swaminathan #define DFC_DRVINFO_FEATURE_PERSISTLINK 0x00000400 873*82527734SSukumar Swaminathan #define DFC_DRVINFO_FEATURE_TARGET_MODE 0x00000800 874fcf3ce44SJohn Forte 875291a2b48SSukumar Swaminathan #endif /* >= DFC_DRVINFO_VERSION4 */ 876fcf3ce44SJohn Forte } dfc_drvinfo_t; 877fcf3ce44SJohn Forte 878fcf3ce44SJohn Forte 879fcf3ce44SJohn Forte 880291a2b48SSukumar Swaminathan typedef struct dfc_regevent 881291a2b48SSukumar Swaminathan { 882291a2b48SSukumar Swaminathan uint32_t ppid; 883291a2b48SSukumar Swaminathan uint32_t cpid; 884fcf3ce44SJohn Forte 885291a2b48SSukumar Swaminathan uint32_t event; 886291a2b48SSukumar Swaminathan uint32_t type; 887291a2b48SSukumar Swaminathan uint32_t outsz; 888291a2b48SSukumar Swaminathan void *ctx; 889291a2b48SSukumar Swaminathan void (*func) (); 890fcf3ce44SJohn Forte 891291a2b48SSukumar Swaminathan uint32_t cindex; /* Set only by child */ 892291a2b48SSukumar Swaminathan uint32_t state; /* Set only by child */ 893fcf3ce44SJohn Forte 894fcf3ce44SJohn Forte /* state */ 895fcf3ce44SJohn Forte #define CHILD_UNKNOWN 0 896fcf3ce44SJohn Forte #define CHILD_UNBORN 1 897fcf3ce44SJohn Forte #define CHILD_ALIVE 2 898fcf3ce44SJohn Forte #define CHILD_REGISTERED 3 899fcf3ce44SJohn Forte #define CHILD_ASLEEP 4 900fcf3ce44SJohn Forte #define CHILD_AWAKE 5 901fcf3ce44SJohn Forte #define CHILD_DIED 6 902fcf3ce44SJohn Forte 903291a2b48SSukumar Swaminathan uint32_t pindex; /* Set only by parent */ 904291a2b48SSukumar Swaminathan uint32_t flags; /* Set only by parent */ 905fcf3ce44SJohn Forte 906fcf3ce44SJohn Forte /* flags */ 907fcf3ce44SJohn Forte #define EVENT_REGISTERED 0x01 908fcf3ce44SJohn Forte #define EVENT_SERVICE_ACTIVE 0x02 909fcf3ce44SJohn Forte 910291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 911291a2b48SSukumar Swaminathan HBA_WWN portname; 912291a2b48SSukumar Swaminathan #endif /* SAN_DIAG_SUPPORT */ 913fcf3ce44SJohn Forte } dfc_regevent_t; 914fcf3ce44SJohn Forte 915fcf3ce44SJohn Forte 916fcf3ce44SJohn Forte /* Defines for RegisterForEvent mask */ 917291a2b48SSukumar Swaminathan #define FC_REG_LINK_EVENT 0x01 /* Register for link up/down */ 918291a2b48SSukumar Swaminathan /* events */ 919291a2b48SSukumar Swaminathan #define FC_REG_RSCN_EVENT 0x02 /* Register for RSCN events */ 920291a2b48SSukumar Swaminathan #define FC_REG_CT_EVENT 0x04 /* Register for CT request */ 921291a2b48SSukumar Swaminathan /* events */ 922291a2b48SSukumar Swaminathan #define FC_REG_MULTIPULSE_EVENT 0x08 /* Register for MultiPulse */ 923291a2b48SSukumar Swaminathan /* events */ 924291a2b48SSukumar Swaminathan #define FC_REG_DUMP_EVENT 0x10 /* Register for Diagnostic */ 925291a2b48SSukumar Swaminathan /* Dump events */ 926291a2b48SSukumar Swaminathan #define FC_REG_TEMP_EVENT 0x20 /* Register for Temperature */ 927291a2b48SSukumar Swaminathan /* events */ 928291a2b48SSukumar Swaminathan #define FC_REG_VPORTRSCN_EVENT 0x40 /* Register for VPort RSCN */ 929291a2b48SSukumar Swaminathan /* events */ 930291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 931291a2b48SSukumar Swaminathan #define FC_REG_SD_ELS_EVENT 0x1000 /* Register for SANDiag ELS */ 932291a2b48SSukumar Swaminathan /* events */ 933291a2b48SSukumar Swaminathan #define FC_REG_SD_FABRIC_EVENT 0x2000 /* Register for SANDiag */ 934291a2b48SSukumar Swaminathan /* Fabric events */ 935291a2b48SSukumar Swaminathan #define FC_REG_SD_SCSI_EVENT 0x4000 /* Register for SANDiag SCSI */ 936291a2b48SSukumar Swaminathan /* events */ 937291a2b48SSukumar Swaminathan #define FC_REG_SD_BOARD_EVENT 0x8000 /* Register for SANDiag Board */ 938291a2b48SSukumar Swaminathan /* events */ 939291a2b48SSukumar Swaminathan #endif /* SAN_DIAG_SUPPORT */ 940fcf3ce44SJohn Forte #define FC_REG_FCOE_EVENT 0x80000000 /* (Unofficial) Register for */ 941fcf3ce44SJohn Forte /* FCOE events */ 942fcf3ce44SJohn Forte 943fcf3ce44SJohn Forte #define MAX_RSCN_PAYLOAD 1024 944fcf3ce44SJohn Forte #define MAX_CT_PAYLOAD (1024*320) 945fcf3ce44SJohn Forte 946fcf3ce44SJohn Forte /* Temperature event types */ 947fcf3ce44SJohn Forte #define DFC_TEMP_CRITICAL 1 948fcf3ce44SJohn Forte #define DFC_TEMP_WARNING 2 949fcf3ce44SJohn Forte #define DFC_TEMP_SAFE 3 950fcf3ce44SJohn Forte 951fcf3ce44SJohn Forte /* bits in a_onmask */ 952291a2b48SSukumar Swaminathan #define ONDI_MBOX 0x1 /* allows non-destructive mailbox */ 953291a2b48SSukumar Swaminathan /* commands */ 954291a2b48SSukumar Swaminathan #define ONDI_IOINFO 0x2 /* supports retrieval of I/O info */ 955291a2b48SSukumar Swaminathan #define ONDI_LNKINFO 0x4 /* supports retrieval of link info */ 956291a2b48SSukumar Swaminathan #define ONDI_NODEINFO 0x8 /* supports retrieval of node info */ 957291a2b48SSukumar Swaminathan #define ONDI_TRACEINFO 0x10 /* supports retrieval of trace info */ 958291a2b48SSukumar Swaminathan #define ONDI_SETTRACE 0x20 /* supports configuration of trace */ 959291a2b48SSukumar Swaminathan /* info */ 960291a2b48SSukumar Swaminathan #define ONDI_SLI1 0x40 /* hardware supports SLI-1 interface */ 961291a2b48SSukumar Swaminathan #define ONDI_SLI2 0x80 /* hardware supports SLI-2 interface */ 962291a2b48SSukumar Swaminathan #define ONDI_BIG_ENDIAN 0x100 /* DDI interface is BIG Endian */ 963291a2b48SSukumar Swaminathan #define ONDI_LTL_ENDIAN 0x200 /* DDI interface is LITTLE Endian */ 964291a2b48SSukumar Swaminathan #define ONDI_RMEM 0x400 /* allows reading of adapter shared */ 965291a2b48SSukumar Swaminathan /* memory */ 966291a2b48SSukumar Swaminathan #define ONDI_RFLASH 0x800 /* allows reading of adapter flash */ 967291a2b48SSukumar Swaminathan #define ONDI_RPCI 0x1000 /* allows reading of adapter pci */ 968291a2b48SSukumar Swaminathan /* registers */ 969291a2b48SSukumar Swaminathan #define ONDI_RCTLREG 0x2000 /* allows reading of adapter cntrol */ 970291a2b48SSukumar Swaminathan /* registers */ 971291a2b48SSukumar Swaminathan #define ONDI_CFGPARAM 0x4000 /* supports get/set configuration */ 972291a2b48SSukumar Swaminathan /* parameters */ 973291a2b48SSukumar Swaminathan #define ONDI_CT 0x8000 /* supports passthru CT interface */ 974291a2b48SSukumar Swaminathan #define ONDI_HBAAPI 0x10000 /* supports HBA API interface */ 975291a2b48SSukumar Swaminathan #define ONDI_SBUS 0x20000 /* supports SBUS adapter interface */ 976fcf3ce44SJohn Forte 977fcf3ce44SJohn Forte /* bits in a_offmask */ 978291a2b48SSukumar Swaminathan #define OFFDI_MBOX 0x1 /* allows all mailbox commands */ 979291a2b48SSukumar Swaminathan #define OFFDI_RMEM 0x2 /* allows reading of adapter shared */ 980291a2b48SSukumar Swaminathan /* memory */ 981291a2b48SSukumar Swaminathan #define OFFDI_WMEM 0x4 /* allows writing of adapter shared */ 982291a2b48SSukumar Swaminathan /* memory */ 983291a2b48SSukumar Swaminathan #define OFFDI_RFLASH 0x8 /* allows reading of adapter flash */ 984291a2b48SSukumar Swaminathan #define OFFDI_WFLASH 0x10 /* allows writing of adapter flash */ 985291a2b48SSukumar Swaminathan #define OFFDI_RPCI 0x20 /* allows reading of adapter pci */ 986291a2b48SSukumar Swaminathan /* registers */ 987291a2b48SSukumar Swaminathan #define OFFDI_WPCI 0x40 /* allows writing of adapter pci */ 988291a2b48SSukumar Swaminathan /* registers */ 989291a2b48SSukumar Swaminathan #define OFFDI_RCTLREG 0x80 /* allows reading of adapter cntrol */ 990291a2b48SSukumar Swaminathan /* registers */ 991291a2b48SSukumar Swaminathan #define OFFDI_WCTLREG 0x100 /* allows writing of adapter cntrol */ 992291a2b48SSukumar Swaminathan /* registers */ 993fcf3ce44SJohn Forte #define OFFDI_OFFLINE 0x80000000 /* if set, adapter is in offline */ 994fcf3ce44SJohn Forte /* state */ 995fcf3ce44SJohn Forte 996fcf3ce44SJohn Forte 997fcf3ce44SJohn Forte #define DDI_SHOW 0x0 998fcf3ce44SJohn Forte #define DDI_ONDI 0x1 999fcf3ce44SJohn Forte #define DDI_OFFDI 0x2 1000fcf3ce44SJohn Forte #define DDI_WARMDI 0x3 1001fcf3ce44SJohn Forte #define DDI_DIAGDI 0x4 1002fcf3ce44SJohn Forte 1003fcf3ce44SJohn Forte /* mbxStatus */ 1004fcf3ce44SJohn Forte #define DFC_MBX_SUCCESS 0x00 1005fcf3ce44SJohn Forte #define DFC_MBXERR_NUM_RINGS 0x01 1006fcf3ce44SJohn Forte #define DFC_MBXERR_NUM_IOCBS 0x02 1007fcf3ce44SJohn Forte #define DFC_MBXERR_IOCBS_EXCEEDED 0x03 1008fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_RING_NUMBER 0x04 1009fcf3ce44SJohn Forte #define DFC_MBXERR_MASK_ENTRIES_RANGE 0x05 1010fcf3ce44SJohn Forte #define DFC_MBXERR_MASKS_EXCEEDED 0x06 1011fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_PROFILE 0x07 1012fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_DEF_CLASS 0x08 1013fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_MAX_RESPONDER 0x09 1014fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_MAX_ORIGINATOR 0x0A 1015fcf3ce44SJohn Forte #define DFC_MBXERR_RPI_REGISTERED 0x0B 1016fcf3ce44SJohn Forte #define DFC_MBXERR_RPI_FULL 0x0C 1017fcf3ce44SJohn Forte #define DFC_MBXERR_NO_RESOURCES 0x0D 1018fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_RCV_LENGTH 0x0E 1019fcf3ce44SJohn Forte #define DFC_MBXERR_DMA_ERROR 0x0F 1020fcf3ce44SJohn Forte #define DFC_MBXERR_ERROR 0x10 1021fcf3ce44SJohn Forte 1022fcf3ce44SJohn Forte #define DFC_MBXERR_OVERTEMP_ERROR 0xFA 1023fcf3ce44SJohn Forte #define DFC_MBXERR_HARDWARE_ERROR 0xFB 1024fcf3ce44SJohn Forte #define DFC_MBXERR_DRVR_ERROR 0xFC 1025fcf3ce44SJohn Forte #define DFC_MBXERR_BUSY 0xFD 1026fcf3ce44SJohn Forte #define DFC_MBXERR_TIMEOUT 0xFE 1027fcf3ce44SJohn Forte #define DFC_MBX_NOT_FINISHED 0xFF 1028fcf3ce44SJohn Forte 1029fcf3ce44SJohn Forte 1030fcf3ce44SJohn Forte 1031fcf3ce44SJohn Forte /* Error codes for library calls */ 1032fcf3ce44SJohn Forte #define DFC_ERR_GENERAL_ERROR 0x1 1033fcf3ce44SJohn Forte 1034fcf3ce44SJohn Forte #define DFC_ERR_MBOX_ERROR 0x2 1035fcf3ce44SJohn Forte #define DFC_ERR_LINK_DOWN 0x2 1036fcf3ce44SJohn Forte #define DFC_ERR_INCORRECT_VER 0x2 1037fcf3ce44SJohn Forte #define DFC_ERR_INVALID_ID 0x2 1038fcf3ce44SJohn Forte #define DFC_ERR_TIMEOUT 0x2 1039fcf3ce44SJohn Forte #define DFC_ERR_NOT_SUPPORTED 0x2 1040fcf3ce44SJohn Forte #define DFC_ERR_NPIV_ACTIVE 0x2 1041fcf3ce44SJohn Forte 1042fcf3ce44SJohn Forte #define DFC_ERR_NO_RPI 0x3 1043fcf3ce44SJohn Forte #define DFC_ERR_BUFFER_OVERFLOW 0x3 1044fcf3ce44SJohn Forte #define DFC_ERR_INVALID_LOOPBACK_TYPE 0x3 1045fcf3ce44SJohn Forte #define DFC_ERR_OVERTEMP 0x3 1046fcf3ce44SJohn Forte 1047fcf3ce44SJohn Forte #define DFC_ERR_LOOPBACK_BUSY 0x4 1048fcf3ce44SJohn Forte #define DFC_ERR_INVALID_RESET_TYPE 0x4 1049fcf3ce44SJohn Forte #define DFC_ERR_MENLO_LINKDOWN 0x4 1050fcf3ce44SJohn Forte 1051fcf3ce44SJohn Forte #define DFC_ERR_SEQ_TIMEOUT 0x5 1052fcf3ce44SJohn Forte 1053fcf3ce44SJohn Forte #define DFC_ERR_NO_XMIT 0x6 1054fcf3ce44SJohn Forte #define DFC_ERR_INVALID_NUMBER 0x6 1055fcf3ce44SJohn Forte 1056fcf3ce44SJohn Forte #define DFC_ERR_RESET_RECV 0x7 1057fcf3ce44SJohn Forte 1058fcf3ce44SJohn Forte 1059fcf3ce44SJohn Forte 1060fcf3ce44SJohn Forte 1061fcf3ce44SJohn Forte /* type definitions for GetBindList function */ 1062291a2b48SSukumar Swaminathan typedef enum dfc_bindtype 1063291a2b48SSukumar Swaminathan { 1064fcf3ce44SJohn Forte BIND_NONE, 1065fcf3ce44SJohn Forte BIND_WWNN, 1066fcf3ce44SJohn Forte BIND_WWPN, 1067fcf3ce44SJohn Forte BIND_DID, 1068fcf3ce44SJohn Forte BIND_ALPA 1069fcf3ce44SJohn Forte } dfc_bindtype_t; 1070fcf3ce44SJohn Forte 1071fcf3ce44SJohn Forte 1072291a2b48SSukumar Swaminathan typedef struct dfc_bind_entry 1073291a2b48SSukumar Swaminathan { 1074291a2b48SSukumar Swaminathan dfc_bindtype_t bind_type; 1075291a2b48SSukumar Swaminathan uint32_t scsi_id; 1076291a2b48SSukumar Swaminathan uint32_t did; 1077291a2b48SSukumar Swaminathan uint8_t wwnn[8]; 1078291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 1079291a2b48SSukumar Swaminathan uint32_t flags; 1080fcf3ce44SJohn Forte 1081fcf3ce44SJohn Forte /* Bind Entry flags */ 1082fcf3ce44SJohn Forte #define DFC_BIND_AUTOMAP 0x1 /* Node is automapped */ 1083fcf3ce44SJohn Forte #define DFC_BIND_BINDLIST 0x2 /* entry in bind list not mapped */ 1084fcf3ce44SJohn Forte #define DFC_BIND_MAPPED 0x4 /* Node is mapped to a scsiid */ 1085fcf3ce44SJohn Forte #define DFC_BIND_UNMAPPED 0x8 /* Node is unmapped */ 1086fcf3ce44SJohn Forte #define DFC_BIND_NODEVTMO 0x10 /* NODEVTMO flag of the node */ 1087fcf3ce44SJohn Forte #define DFC_BIND_NOSCSIID 0x20 /* No scsi id is assigned yet */ 1088291a2b48SSukumar Swaminathan #define DFC_BIND_RPTLUNST 0x40 /* Node is in report lun cmpl st */ 1089fcf3ce44SJohn Forte } dfc_bind_entry_t; 1090fcf3ce44SJohn Forte 1091291a2b48SSukumar Swaminathan typedef struct dfc_bind_list 1092291a2b48SSukumar Swaminathan { 1093291a2b48SSukumar Swaminathan uint32_t NumberOfEntries; 1094291a2b48SSukumar Swaminathan dfc_bind_entry_t entry[1]; /* Variable length array */ 1095fcf3ce44SJohn Forte } dfc_bind_list_t; 1096fcf3ce44SJohn Forte 1097fcf3ce44SJohn Forte 1098fcf3ce44SJohn Forte 1099fcf3ce44SJohn Forte /* Defines for error codes -OLD- */ 1100fcf3ce44SJohn Forte #define FC_ERROR_BUFFER_OVERFLOW 0xff 1101fcf3ce44SJohn Forte #define FC_ERROR_RESPONSE_TIMEOUT 0xfe 1102fcf3ce44SJohn Forte #define FC_ERROR_LINK_UNAVAILABLE 0xfd 1103fcf3ce44SJohn Forte #define FC_ERROR_INSUFFICIENT_RESOURCES 0xfc 1104fcf3ce44SJohn Forte #define FC_ERROR_EXISTING_REGISTRATION 0xfb 1105fcf3ce44SJohn Forte #define FC_ERROR_INVALID_TAG 0xfa 1106fcf3ce44SJohn Forte #define FC_ERROR_INVALID_WWN 0xf9 1107fcf3ce44SJohn Forte #define FC_ERROR_CREATEVENT_FAILED 0xf8 1108fcf3ce44SJohn Forte 1109fcf3ce44SJohn Forte 1110fcf3ce44SJohn Forte 1111291a2b48SSukumar Swaminathan typedef union dfc_ct_rev 1112291a2b48SSukumar Swaminathan { 1113fcf3ce44SJohn Forte /* Structure is in Big Endian format */ 1114291a2b48SSukumar Swaminathan struct 1115291a2b48SSukumar Swaminathan { 1116291a2b48SSukumar Swaminathan uint32_t Revision:8; 1117291a2b48SSukumar Swaminathan uint32_t InId:24; 1118fcf3ce44SJohn Forte } bits; 1119291a2b48SSukumar Swaminathan uint32_t word; 1120fcf3ce44SJohn Forte } dfc_ct_rev_t; 1121fcf3ce44SJohn Forte 1122291a2b48SSukumar Swaminathan typedef union dfc_ct_resp 1123291a2b48SSukumar Swaminathan { 1124fcf3ce44SJohn Forte /* Structure is in Big Endian format */ 1125291a2b48SSukumar Swaminathan struct 1126291a2b48SSukumar Swaminathan { 1127291a2b48SSukumar Swaminathan uint32_t CmdRsp:16; 1128291a2b48SSukumar Swaminathan uint32_t Size:16; 1129fcf3ce44SJohn Forte } bits; 1130291a2b48SSukumar Swaminathan uint32_t word; 1131fcf3ce44SJohn Forte } dfc_ct_resp_t; 1132fcf3ce44SJohn Forte 1133291a2b48SSukumar Swaminathan typedef struct dfc_ct_request 1134291a2b48SSukumar Swaminathan { 1135fcf3ce44SJohn Forte /* Structure is in Big Endian format */ 1136291a2b48SSukumar Swaminathan dfc_ct_rev_t RevisionId; 1137291a2b48SSukumar Swaminathan uint8_t FsType; 1138291a2b48SSukumar Swaminathan uint8_t FsSubType; 1139291a2b48SSukumar Swaminathan uint8_t Options; 1140291a2b48SSukumar Swaminathan uint8_t Rsrvd1; 1141291a2b48SSukumar Swaminathan dfc_ct_resp_t CommandResponse; 1142291a2b48SSukumar Swaminathan uint8_t Rsrvd2; 1143291a2b48SSukumar Swaminathan uint8_t ReasonCode; 1144291a2b48SSukumar Swaminathan uint8_t Explanation; 1145291a2b48SSukumar Swaminathan uint8_t VendorUnique; 1146fcf3ce44SJohn Forte } dfc_ct_request_t; 1147fcf3ce44SJohn Forte 1148291a2b48SSukumar Swaminathan #define SLI_CT_REVISION 1 1149fcf3ce44SJohn Forte 1150291a2b48SSukumar Swaminathan #define FC_FSTYPE_ALL 0xffff /* match on all fsTypes */ 1151fcf3ce44SJohn Forte 1152fcf3ce44SJohn Forte /* Emulex Vendor-Unique CT Request Command Codes */ 1153291a2b48SSukumar Swaminathan #define CT_OP_GSAT 0x0101 /* Get Server Attributes */ 1154291a2b48SSukumar Swaminathan #define CT_OP_GHAT 0x0102 /* Get HBA Attributes */ 1155291a2b48SSukumar Swaminathan #define CT_OP_GPAT 0x0103 /* Get Port Attributes */ 1156291a2b48SSukumar Swaminathan #define CT_OP_GDAT 0x0104 /* Get Driver Attributes */ 1157291a2b48SSukumar Swaminathan #define CT_OP_GPST 0x0105 /* Get Port Statistics */ 1158291a2b48SSukumar Swaminathan /* 0x0106 is reserved */ 1159291a2b48SSukumar Swaminathan #define CT_OP_GDP 0x0107 /* Get Driver Parameters */ 1160291a2b48SSukumar Swaminathan #define CT_OP_GDPG 0x0108 /* Get Driver Parameters Global */ 1161291a2b48SSukumar Swaminathan #define CT_OP_GEPS 0x0109 /* Get Extended Port Statistics */ 1162291a2b48SSukumar Swaminathan #define CT_OP_GLAT 0x010A /* Get Lun Attributes */ 1163291a2b48SSukumar Swaminathan 1164291a2b48SSukumar Swaminathan #define CT_OP_SSAT 0x0111 /* Set Server Attributes */ 1165291a2b48SSukumar Swaminathan #define CT_OP_SHAT 0x0112 /* Set HBA Attributes */ 1166291a2b48SSukumar Swaminathan #define CT_OP_SPAT 0x0113 /* Set Port Attributes */ 1167291a2b48SSukumar Swaminathan #define CT_OP_SDAT 0x0114 /* Set Driver Attributes */ 1168291a2b48SSukumar Swaminathan /* 0x0115 is reserved */ 1169291a2b48SSukumar Swaminathan /* 0x0116 is reserved */ 1170291a2b48SSukumar Swaminathan #define CT_OP_SDP 0x0117 /* Set Driver Parameter */ 1171291a2b48SSukumar Swaminathan #define CT_OP_SBBS 0x0118 /* Set Boot Bios State */ 1172291a2b48SSukumar Swaminathan 1173291a2b48SSukumar Swaminathan #define CT_OP_RPST 0x0121 /* Reset Port Statistics */ 1174291a2b48SSukumar Swaminathan #define CT_OP_VFW 0x0122 /* Verify Firmware */ 1175291a2b48SSukumar Swaminathan #define CT_OP_DFW 0x0123 /* Download Firmware */ 1176291a2b48SSukumar Swaminathan #define CT_OP_RES 0x0124 /* Reset HBA */ 1177291a2b48SSukumar Swaminathan #define CT_OP_RHD 0x0125 /* Run HBA Diagnostic */ 1178291a2b48SSukumar Swaminathan #define CT_OP_UFW 0x0126 /* Upgrade Firmware */ 1179291a2b48SSukumar Swaminathan #define CT_OP_RDP 0x0127 /* Reset Driver Parameters */ 1180291a2b48SSukumar Swaminathan #define CT_OP_GHDR 0x0128 /* Get HBA Diagnotic Results */ 1181291a2b48SSukumar Swaminathan #define CT_OP_CHD 0x0129 /* Cancel HBA Diagnostic */ 1182291a2b48SSukumar Swaminathan 1183291a2b48SSukumar Swaminathan /* 0x0131 is reserved */ 1184291a2b48SSukumar Swaminathan /* 0x0132 is reserved */ 1185291a2b48SSukumar Swaminathan #define CT_OP_SSR 0x0133 /* Send Software Resource */ 1186291a2b48SSukumar Swaminathan 1187291a2b48SSukumar Swaminathan #define CT_OP_RSAT 0x0141 /* Read SA Table */ 1188291a2b48SSukumar Swaminathan #define CT_OP_WSAT 0x0142 /* Write SA Table */ 1189291a2b48SSukumar Swaminathan #define CT_OP_RSAH 0x0143 /* Read SA Table Header */ 1190291a2b48SSukumar Swaminathan #define CT_OP_WSAH 0x0144 /* Write SA Table Header */ 1191291a2b48SSukumar Swaminathan #define CT_OP_RACT 0x0145 /* Read Access Control Table */ 1192291a2b48SSukumar Swaminathan #define CT_OP_WACT 0x0146 /* Write Access Control Table */ 1193291a2b48SSukumar Swaminathan #define CT_OP_RKT 0x0147 /* Read Key Table Table */ 1194291a2b48SSukumar Swaminathan #define CT_OP_WKT 0x0148 /* Write Key Table Table */ 1195291a2b48SSukumar Swaminathan #define CT_OP_SSC 0x0149 /* Cause SA Table re-read;sync */ 1196291a2b48SSukumar Swaminathan 1197291a2b48SSukumar Swaminathan #define CT_OP_QHBA 0x0151 /* Query HBA */ 1198291a2b48SSukumar Swaminathan #define CT_OP_GST 0x0152 /* Get Status */ 1199291a2b48SSukumar Swaminathan 1200291a2b48SSukumar Swaminathan #define CT_OP_GFTM 0x0161 /* Get FCP Target Mapping */ 1201291a2b48SSukumar Swaminathan #define CT_OP_SRL 0x0162 /* SCSI Report Luns */ 1202291a2b48SSukumar Swaminathan #define CT_OP_SI 0x0163 /* SCSI Inquiry */ 1203291a2b48SSukumar Swaminathan #define CT_OP_SRC 0x0164 /* SCSI Read Capacity */ 1204291a2b48SSukumar Swaminathan 1205291a2b48SSukumar Swaminathan #define CT_OP_GPB 0x0171 /* Get FCP Persistent Binding */ 1206291a2b48SSukumar Swaminathan #define CT_OP_SPB 0x0172 /* Set FCP Persistent Binding */ 1207291a2b48SSukumar Swaminathan #define CT_OP_RPB 0x0173 /* Remove FCP Persistent Binding */ 1208291a2b48SSukumar Swaminathan #define CT_OP_RAPB 0x0174 /* Remove All FCP Persistent Bindings */ 1209291a2b48SSukumar Swaminathan #define CT_OP_GBC 0x0175 /* Get Binding Capability */ 1210291a2b48SSukumar Swaminathan #define CT_OP_GBS 0x0176 /* Get Binding Support */ 1211291a2b48SSukumar Swaminathan #define CT_OP_SBS 0x0177 /* Set Binding Support */ 1212291a2b48SSukumar Swaminathan #define CT_OP_GANI 0x0178 /* Get All Nodes Info */ 1213291a2b48SSukumar Swaminathan #define CT_OP_GRV 0x0179 /* Get Range Value for Bus#, Target#, Lun# */ 1214291a2b48SSukumar Swaminathan #define CT_OP_GAPBS 0x017A /* Get AutoPB service state */ 1215291a2b48SSukumar Swaminathan /* (AutoPilotManager) */ 1216291a2b48SSukumar Swaminathan #define CT_OP_APBC 0x017B /* Configure AutoPB service */ 1217291a2b48SSukumar Swaminathan /* (AutoPilotManager) */ 1218291a2b48SSukumar Swaminathan 1219291a2b48SSukumar Swaminathan #define CT_OP_GDT 0x0180 /* Get Driver Type */ 1220291a2b48SSukumar Swaminathan #define CT_OP_GDLMI 0x0181 /* Get Drive Letter Mapping */ 1221291a2b48SSukumar Swaminathan /* Information [GDLM] */ 1222291a2b48SSukumar Swaminathan #define CT_OP_GANA 0x0182 /* Get All Node Addresses */ 1223291a2b48SSukumar Swaminathan #define CT_OP_GDLV 0x0183 /* Get Driver Library Version */ 1224291a2b48SSukumar Swaminathan #define CT_OP_GWUP 0x0184 /* Get Adapter Wakeup Parameters */ 1225291a2b48SSukumar Swaminathan #define CT_OP_GLM 0x0185 /* Get Adapter Loopmap */ 1226291a2b48SSukumar Swaminathan #define CT_OP_GABS 0x0186 /* Get Adapter Beacon State */ 1227291a2b48SSukumar Swaminathan #define CT_OP_SABS 0x0187 /* Set Adapter Beacon State */ 1228291a2b48SSukumar Swaminathan #define CT_OP_RPR 0x0188 /* Read Adapter PCI Registers */ 1229fcf3ce44SJohn Forte 1230fcf3ce44SJohn Forte /* NPIV return codes */ 1231fcf3ce44SJohn Forte #define DFC_NPIV_SUCCESS 0 1232fcf3ce44SJohn Forte #define DFC_NPIV_GENERAL_ERROR 1 1233fcf3ce44SJohn Forte #define DFC_NPIV_NOT_SUPPORTED 2 1234fcf3ce44SJohn Forte #define DFC_NPIV_NO_RESOURCES 3 1235fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_HANDLE 3 1236fcf3ce44SJohn Forte #define DFC_NPIV_ILLEGAL_WWPN 4 1237fcf3ce44SJohn Forte #define DFC_NPIV_TOO_MANY_VPORTS 4 1238fcf3ce44SJohn Forte #define DFC_NPIV_ILLEGAL_WWN 5 1239fcf3ce44SJohn Forte #define DFC_NPIV_BUSY 5 1240fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_WWN 6 1241fcf3ce44SJohn Forte #define DFC_NPIV_LINK_DOWN 7 1242fcf3ce44SJohn Forte #define DFC_NPIV_MORE_DATA 7 1243fcf3ce44SJohn Forte #define DFC_NPIV_FABRIC_NOT_SUPPORTED 8 1244fcf3ce44SJohn Forte #define DFC_NPIV_FABRIC_OUT_OF_RESOURCE 9 1245fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_ACCESS_KEY 10 1246fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_HANDLE_AT_CREATE 11 1247fcf3ce44SJohn Forte #define DFC_NPIV_UNSUPPORTED_OPTION 12 1248fcf3ce44SJohn Forte 1249291a2b48SSukumar Swaminathan typedef struct dfc_vport_QoS 1250291a2b48SSukumar Swaminathan { 1251291a2b48SSukumar Swaminathan uint32_t resv; 1252fcf3ce44SJohn Forte } dfc_vport_QoS_t; 1253fcf3ce44SJohn Forte 1254fcf3ce44SJohn Forte 1255fcf3ce44SJohn Forte /* VPORT type */ 1256291a2b48SSukumar Swaminathan #define VPORT_TYPE_PHYSICAL 0 1257291a2b48SSukumar Swaminathan #define VPORT_TYPE_VIRTUAL 1 1258fcf3ce44SJohn Forte 1259fcf3ce44SJohn Forte /* VPORT States */ 1260fcf3ce44SJohn Forte #define VPORT_STATE_UNKNOWN 0 1261fcf3ce44SJohn Forte #define VPORT_STATE_LINKDOWN 1 1262fcf3ce44SJohn Forte #define VPORT_STATE_INIT 2 1263fcf3ce44SJohn Forte #define VPORT_STATE_NO_FABRIC_SUPPORT 3 1264fcf3ce44SJohn Forte #define VPORT_STATE_NO_FABRIC_RESOURCE 4 1265fcf3ce44SJohn Forte #define VPORT_STATE_FABRIC_LOGOUT 5 1266fcf3ce44SJohn Forte #define VPORT_STATE_FABRIC_REJECT_WWN 6 1267fcf3ce44SJohn Forte #define VPORT_STATE_FABRIC_LOGIN_FAIL 7 1268fcf3ce44SJohn Forte #define VPORT_STATE_ACTIVE 8 1269fcf3ce44SJohn Forte #define VPORT_STATE_AUTH_FAILED 9 1270fcf3ce44SJohn Forte 1271fcf3ce44SJohn Forte /* VPORT Options */ 1272291a2b48SSukumar Swaminathan #define VPORT_OPT_AUTORETRY 0x00000001 1273291a2b48SSukumar Swaminathan #define VPORT_OPT_AUTOWWN 0x00000002 1274291a2b48SSukumar Swaminathan #define VPORT_OPT_ACTIVATE 0x00000004 1275fcf3ce44SJohn Forte 1276291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_CREATE_ONLY 0x00000000 1277291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_CREATE_UPDATE 0x00000010 1278291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_UPDATE_ONLY 0x00000018 1279291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_MASK 0x00000018 1280fcf3ce44SJohn Forte 1281291a2b48SSukumar Swaminathan #define VPORT_OPT_RESTRICT 0x00000020 1282291a2b48SSukumar Swaminathan #define VPORT_OPT_UNRESTRICT 0x00000040 1283291a2b48SSukumar Swaminathan #define VPORT_OPT_RESTRICT_MASK 0x00000060 1284fcf3ce44SJohn Forte 1285291a2b48SSukumar Swaminathan #define VPORT_OPT_FAILOVER 0x00000080 1286fcf3ce44SJohn Forte 1287fcf3ce44SJohn Forte /* Check list bit-mapped value */ 1288291a2b48SSukumar Swaminathan #define CL_NPIV_PARM_ENABLE 0x00000001 1289291a2b48SSukumar Swaminathan #define CL_SLI3_ENABLE 0x00000002 1290291a2b48SSukumar Swaminathan #define CL_HBA_SUPPORT_NPIV 0x00000004 1291291a2b48SSukumar Swaminathan #define CL_HBA_HAS_RESOURCES 0x00000008 1292291a2b48SSukumar Swaminathan #define CL_HBA_LINKUP 0x00000010 1293291a2b48SSukumar Swaminathan #define CL_P2P_TOPOLOGY 0x00000020 1294291a2b48SSukumar Swaminathan #define CL_FABRIC_SUPPORTS_NPIV 0x00000040 1295291a2b48SSukumar Swaminathan #define CL_FABRIC_HAS_RESOURCES 0x00000080 1296291a2b48SSukumar Swaminathan #define CL_NPIV_READY 0x000000FF 1297fcf3ce44SJohn Forte 1298fcf3ce44SJohn Forte 1299fcf3ce44SJohn Forte 1300fcf3ce44SJohn Forte 1301291a2b48SSukumar Swaminathan #define DFC_VPORT_ATTR_VERSION 2 1302291a2b48SSukumar Swaminathan typedef struct dfc_vport_attrs 1303291a2b48SSukumar Swaminathan { 1304291a2b48SSukumar Swaminathan uint8_t version; /* 2 = version of this structure, */ 1305291a2b48SSukumar Swaminathan /* for compatibility check */ 1306291a2b48SSukumar Swaminathan uint8_t reserved1[3]; 1307fcf3ce44SJohn Forte 1308291a2b48SSukumar Swaminathan uint8_t wwpn[8]; /* virtual port WWPN */ 1309291a2b48SSukumar Swaminathan uint8_t wwnn[8]; /* virtual port WWNN */ 1310291a2b48SSukumar Swaminathan char name[256]; /* name to be register with the */ 1311291a2b48SSukumar Swaminathan /* fabric */ 1312fcf3ce44SJohn Forte 1313291a2b48SSukumar Swaminathan uint32_t options; 1314fcf3ce44SJohn Forte 1315291a2b48SSukumar Swaminathan uint32_t portFcId; /* D-ID; set when the N-port is */ 1316291a2b48SSukumar Swaminathan /* created successfully */ 1317fcf3ce44SJohn Forte 1318291a2b48SSukumar Swaminathan uint8_t state; /* VPORT state */ 1319291a2b48SSukumar Swaminathan uint8_t restrictLogin; 1320*82527734SSukumar Swaminathan uint8_t flags; 1321*82527734SSukumar Swaminathan uint8_t reserved2; 1322291a2b48SSukumar Swaminathan uint64_t buf; /* Used for VPI */ 1323fcf3ce44SJohn Forte 1324291a2b48SSukumar Swaminathan uint8_t fabric_wwn[8]; /* Fabric WWN (WWNN) */ 1325291a2b48SSukumar Swaminathan uint32_t checklist; 1326291a2b48SSukumar Swaminathan uint8_t accessKey[32]; 1327fcf3ce44SJohn Forte } dfc_vport_attrs_t; 1328fcf3ce44SJohn Forte 1329fcf3ce44SJohn Forte 1330291a2b48SSukumar Swaminathan typedef struct dfc_vport_entry 1331291a2b48SSukumar Swaminathan { 1332291a2b48SSukumar Swaminathan uint8_t wwpn[8]; /* wwpn of the virtual port */ 1333291a2b48SSukumar Swaminathan uint8_t wwnn[8]; /* wwnn of the virtual port */ 1334291a2b48SSukumar Swaminathan uint32_t PortFcId; /* FC port ID assigned to this */ 1335291a2b48SSukumar Swaminathan /* virtual port */ 1336fcf3ce44SJohn Forte } dfc_vport_entry_t; 1337fcf3ce44SJohn Forte 1338fcf3ce44SJohn Forte 1339291a2b48SSukumar Swaminathan typedef struct dfc_vport_entry_list 1340291a2b48SSukumar Swaminathan { 1341291a2b48SSukumar Swaminathan uint32_t NumberOfEntries; 1342291a2b48SSukumar Swaminathan dfc_vport_entry_t entry[MAX_VPORTS]; 1343fcf3ce44SJohn Forte } dfc_vport_entry_list_t; 1344fcf3ce44SJohn Forte 1345fcf3ce44SJohn Forte 1346291a2b48SSukumar Swaminathan typedef struct dfc_vport_nodeinfo_entry 1347291a2b48SSukumar Swaminathan { 1348291a2b48SSukumar Swaminathan uint32_t bind_type; 1349fcf3ce44SJohn Forte #define VPORT_NODE_BINDDID 0x0000 1350fcf3ce44SJohn Forte #define VPORT_NODE_BINDWWNN 0x0001 1351fcf3ce44SJohn Forte #define VPORT_NODE_BINDWWPN 0x0002 1352fcf3ce44SJohn Forte #define VPORT_NODE_AUTOMAP 0x0004 1353291a2b48SSukumar Swaminathan #define VPORT_NODE_UNMASK_ALL_LUN 0x0008 1354fcf3ce44SJohn Forte #define VPORT_NODE_DISABLE_LUN_AUTOMAP 0x0010 1355fcf3ce44SJohn Forte #define VPORT_NODE_ALPA 0x0020 1356fcf3ce44SJohn Forte 1357291a2b48SSukumar Swaminathan HBA_SCSIID scsiId; 1358291a2b48SSukumar Swaminathan HBA_FCPID fcpId; 1359fcf3ce44SJohn Forte 1360291a2b48SSukumar Swaminathan uint32_t nodeState; 1361fcf3ce44SJohn Forte #define VPORT_NODESTATE_EXIST 0x0001 1362fcf3ce44SJohn Forte #define VPORT_NODESTATE_READY 0x0002 1363fcf3ce44SJohn Forte #define VPORT_NODESTATE_LINKDOWN 0x0004 1364fcf3ce44SJohn Forte #define VPORT_NODESTATE_UNMAPPED 0x0008 1365fcf3ce44SJohn Forte #define VPORT_NODESTATE_BOUND 0x0010 1366fcf3ce44SJohn Forte 1367291a2b48SSukumar Swaminathan uint32_t reserved; 1368fcf3ce44SJohn Forte } dfc_vport_nodeinfo_entry_t; 1369fcf3ce44SJohn Forte 1370291a2b48SSukumar Swaminathan typedef struct dfc_vport_get_nodeinfo 1371291a2b48SSukumar Swaminathan { 1372291a2b48SSukumar Swaminathan uint32_t NumberOfEntries; /* number of nodes */ 1373291a2b48SSukumar Swaminathan dfc_vport_nodeinfo_entry_t entry[MAX_NODES]; /* start of array */ 1374fcf3ce44SJohn Forte } dfc_vport_get_nodeinfo_t; 1375fcf3ce44SJohn Forte 1376fcf3ce44SJohn Forte 1377291a2b48SSukumar Swaminathan typedef struct dfc_vport_resource 1378291a2b48SSukumar Swaminathan { 1379291a2b48SSukumar Swaminathan uint32_t vpi_max; 1380291a2b48SSukumar Swaminathan uint32_t vpi_inuse; 1381291a2b48SSukumar Swaminathan uint32_t rpi_max; 1382291a2b48SSukumar Swaminathan uint32_t rpi_inuse; 1383fcf3ce44SJohn Forte } dfc_vport_resource_t; 1384fcf3ce44SJohn Forte 1385fcf3ce44SJohn Forte 1386291a2b48SSukumar Swaminathan typedef struct dfc_vlinkinfo 1387291a2b48SSukumar Swaminathan { 1388291a2b48SSukumar Swaminathan uint32_t api_versions; 1389fcf3ce44SJohn Forte 1390291a2b48SSukumar Swaminathan uint8_t linktype; 1391291a2b48SSukumar Swaminathan uint8_t state; 1392291a2b48SSukumar Swaminathan uint8_t fail_reason; 1393291a2b48SSukumar Swaminathan uint8_t prev_fail_reason; 1394fcf3ce44SJohn Forte #define VPORT_FAIL_UNKNOWN 0 1395fcf3ce44SJohn Forte #define VPORT_FAIL_LINKDOWN 1 1396fcf3ce44SJohn Forte #define VPORT_FAIL_FAB_UNSUPPORTED 2 1397fcf3ce44SJohn Forte #define VPORT_FAIL_FAB_NORESOURCES 3 1398fcf3ce44SJohn Forte #define VPORT_FAIL_FAB_LOGOUT 4 1399fcf3ce44SJohn Forte #define VPORT_FAIL_HBA_NORESOURCES 5 1400fcf3ce44SJohn Forte 1401291a2b48SSukumar Swaminathan uint8_t wwnn[8]; 1402291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 1403fcf3ce44SJohn Forte 1404291a2b48SSukumar Swaminathan void *vlink; 1405fcf3ce44SJohn Forte 1406291a2b48SSukumar Swaminathan uint32_t vpi_max; 1407291a2b48SSukumar Swaminathan uint32_t vpi_inuse; 1408291a2b48SSukumar Swaminathan uint32_t rpi_max; 1409291a2b48SSukumar Swaminathan uint32_t rpi_inuse; 1410fcf3ce44SJohn Forte } dfc_vlinkinfo_t; 1411fcf3ce44SJohn Forte 1412fcf3ce44SJohn Forte 1413fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 1414fcf3ce44SJohn Forte 1415fcf3ce44SJohn Forte /* DHCHAP return code */ 1416fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_NOT_CONFIGURED 0x8001 1417fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTH_FAILED_NO_SA_FOUND 0x8002 1418fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTH_INIT_OK_AUTH_FAILED 0x8003 1419fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_COMPARE_FAILED 0x8004 1420fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_WWN_NOT_FOUND 0x8005 1421fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_PASSWORD_INVALID 0x8006 1422fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_INVALID_ENTITY 0x8007 1423fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_ENTITY_NOT_ACTIVE 0x8008 1424fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_INVALID_OPERATION 0x8009 1425fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_OUT_OF_RESOURCES 0x800a 1426fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTHENTICATION_GOINGON 0x800b 1427fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_INVALID_BOARD_NO 0x800c 1428fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_IO_ERROR 0x800d 1429fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_STORKEY_ERROR 0x800e 1430fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_PARMKEY_ERROR 0x800f 1431fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_AUTHKEY_ERROR 0x8010 1432291a2b48SSukumar Swaminathan #define DFC_AUTH_STATUS_LOCAL_REMOTE_PASSWORD_SAME 0x8011 1433fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_BORDKEY_ERROR 0x8020 1434fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_DRVTYPE_NOT_SUPPORTED 0x8030 1435fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTHENTICATION_NOT_SUPPORTED 0x8031 1436fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_GENERAL_ERROR 0x8032 1437fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CONFIG_NOT_FOUND 0x8034 1438fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_NOT_PRIVILEGE_USER 0x8040 1439fcf3ce44SJohn Forte 1440fcf3ce44SJohn Forte 1441291a2b48SSukumar Swaminathan typedef struct dfc_fcsp_config 1442291a2b48SSukumar Swaminathan { 1443291a2b48SSukumar Swaminathan HBA_WWN lwwpn; 1444291a2b48SSukumar Swaminathan HBA_WWN rwwpn; 1445291a2b48SSukumar Swaminathan 1446291a2b48SSukumar Swaminathan uint16_t auth_tov; /* seconds */ 1447291a2b48SSukumar Swaminathan #define DFC_AUTH_TOV_MIN 20 1448291a2b48SSukumar Swaminathan #define DFC_AUTH_TOV_MAX 1000 1449291a2b48SSukumar Swaminathan #define DFC_AUTH_TOV_DEFAULT 45 1450291a2b48SSukumar Swaminathan 1451291a2b48SSukumar Swaminathan uint8_t auth_mode; 1452291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_DISABLED 1 1453291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_ACTIVE 2 1454291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_PASSIVE 3 1455291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_DEFAULT DFC_AUTH_MODE_DISABLED 1456291a2b48SSukumar Swaminathan 1457291a2b48SSukumar Swaminathan uint8_t auth_bidir:1; 1458291a2b48SSukumar Swaminathan #define DFC_AUTH_BIDIR_DISABLED 0 1459291a2b48SSukumar Swaminathan #define DFC_AUTH_BIDIR_ENABLED 1 1460291a2b48SSukumar Swaminathan #define DFC_AUTH_BIDIR_DEFAULT DFC_AUTH_BIDIR_DISABLED 1461291a2b48SSukumar Swaminathan uint8_t reserved:7; 1462291a2b48SSukumar Swaminathan 1463291a2b48SSukumar Swaminathan uint8_t type_priority[4]; 1464291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DHCHAP 1 /* Only one currently supported */ 1465291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_FCAP 2 1466291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_FCPAP 3 1467291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_KERBEROS 4 1468291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_MAX 4 1469291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT0 DFC_AUTH_TYPE_DHCHAP 1470291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT1 0 1471291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT2 0 1472291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT3 0 1473291a2b48SSukumar Swaminathan 1474291a2b48SSukumar Swaminathan uint8_t hash_priority[4]; 1475291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_MD5 1 1476291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_SHA1 2 1477291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_MAX 2 1478291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT0 DFC_AUTH_HASH_MD5 1479291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT1 DFC_AUTH_HASH_SHA1 1480291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT2 0 1481291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT3 0 1482291a2b48SSukumar Swaminathan 1483291a2b48SSukumar Swaminathan uint8_t group_priority[8]; 1484291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_NULL 1 1485291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_1024 2 1486291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_1280 3 1487291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_1536 4 1488291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_2048 5 1489291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_MAX 5 1490291a2b48SSukumar Swaminathan 1491291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT0 DFC_AUTH_GROUP_NULL 1492291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT1 DFC_AUTH_GROUP_1024 1493291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT2 DFC_AUTH_GROUP_1280 1494291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT3 DFC_AUTH_GROUP_1536 1495291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT4 DFC_AUTH_GROUP_2048 1496291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT5 0 1497291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT6 0 1498291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT7 0 1499291a2b48SSukumar Swaminathan 1500291a2b48SSukumar Swaminathan uint32_t reauth_tov; /* minutes */ 1501291a2b48SSukumar Swaminathan #define DFC_REAUTH_TOV_MIN 0 1502291a2b48SSukumar Swaminathan #define DFC_REAUTH_TOV_MAX 7200 1503291a2b48SSukumar Swaminathan #define DFC_REAUTH_TOV_DEFAULT 1440 1504fcf3ce44SJohn Forte } dfc_fcsp_config_t; 1505fcf3ce44SJohn Forte 1506fcf3ce44SJohn Forte 1507291a2b48SSukumar Swaminathan typedef struct dfc_password 1508291a2b48SSukumar Swaminathan { 1509291a2b48SSukumar Swaminathan uint16_t length; 1510fcf3ce44SJohn Forte #define DFC_PASSWORD_LENGTH_MIN 8 1511fcf3ce44SJohn Forte #define DFC_PASSWORD_LENGTH_MAX 128 1512fcf3ce44SJohn Forte 1513291a2b48SSukumar Swaminathan uint16_t type; 1514fcf3ce44SJohn Forte #define DFC_PASSWORD_TYPE_ASCII 1 1515fcf3ce44SJohn Forte #define DFC_PASSWORD_TYPE_BINARY 2 1516fcf3ce44SJohn Forte #define DFC_PASSWORD_TYPE_IGNORE 3 1517fcf3ce44SJohn Forte 1518291a2b48SSukumar Swaminathan uint8_t password[DFC_PASSWORD_LENGTH_MAX]; 1519fcf3ce44SJohn Forte } dfc_password_t; 1520fcf3ce44SJohn Forte 1521291a2b48SSukumar Swaminathan typedef struct dfc_auth_password 1522291a2b48SSukumar Swaminathan { 1523291a2b48SSukumar Swaminathan HBA_WWN lwwpn; 1524291a2b48SSukumar Swaminathan HBA_WWN rwwpn; 1525fcf3ce44SJohn Forte 1526291a2b48SSukumar Swaminathan dfc_password_t lpw; 1527291a2b48SSukumar Swaminathan dfc_password_t rpw; 1528fcf3ce44SJohn Forte 1529291a2b48SSukumar Swaminathan dfc_password_t lpw_new; 1530291a2b48SSukumar Swaminathan dfc_password_t rpw_new; 1531fcf3ce44SJohn Forte } dfc_auth_password_t; 1532fcf3ce44SJohn Forte 1533fcf3ce44SJohn Forte 1534291a2b48SSukumar Swaminathan typedef struct dfc_auth_cfglist 1535291a2b48SSukumar Swaminathan { 1536291a2b48SSukumar Swaminathan uint32_t cnt; 1537291a2b48SSukumar Swaminathan HBA_WWN rwwpn[1]; 1538fcf3ce44SJohn Forte } dfc_auth_cfglist_t; 1539fcf3ce44SJohn Forte 1540fcf3ce44SJohn Forte 1541291a2b48SSukumar Swaminathan typedef struct dfc_auth_status 1542291a2b48SSukumar Swaminathan { 1543291a2b48SSukumar Swaminathan HBA_WWN lwwpn; 1544291a2b48SSukumar Swaminathan HBA_WWN rwwpn; 1545fcf3ce44SJohn Forte 1546291a2b48SSukumar Swaminathan uint8_t auth_state; 1547fcf3ce44SJohn Forte #define DFC_AUTH_STATE_OFF 1 1548fcf3ce44SJohn Forte #define DFC_AUTH_STATE_INP 2 1549fcf3ce44SJohn Forte #define DFC_AUTH_STATE_ON 3 1550fcf3ce44SJohn Forte #define DFC_AUTH_STATE_FAILED 4 1551fcf3ce44SJohn Forte 1552291a2b48SSukumar Swaminathan uint8_t auth_failReason; 1553fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_GENERIC 1 1554fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_ELS_TMO 2 1555fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_XACT_TMO 3 1556fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_LS_RJT 4 1557fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_BSY_LS_RJT 5 1558fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_REJECTED 6 1559fcf3ce44SJohn Forte 1560291a2b48SSukumar Swaminathan uint8_t type_priority; 1561291a2b48SSukumar Swaminathan uint8_t group_priority; 1562fcf3ce44SJohn Forte 1563291a2b48SSukumar Swaminathan uint8_t hash_priority; 1564291a2b48SSukumar Swaminathan uint8_t localAuth :1; 1565291a2b48SSukumar Swaminathan uint8_t remoteAuth :1; 1566291a2b48SSukumar Swaminathan uint8_t pad :6; 1567291a2b48SSukumar Swaminathan uint16_t reserved0; 1568fcf3ce44SJohn Forte 1569291a2b48SSukumar Swaminathan uint32_t time_from_last_auth; /* seconds */ 1570291a2b48SSukumar Swaminathan uint32_t time_until_next_auth; /* seconds */ 1571fcf3ce44SJohn Forte 1572291a2b48SSukumar Swaminathan uint32_t reserved1; 1573291a2b48SSukumar Swaminathan uint32_t reserved2; 1574fcf3ce44SJohn Forte } dfc_auth_status_t; 1575fcf3ce44SJohn Forte 1576fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 1577fcf3ce44SJohn Forte 1578fcf3ce44SJohn Forte /* 1579fcf3ce44SJohn Forte * Start of FCP specific structures 1580fcf3ce44SJohn Forte */ 1581fcf3ce44SJohn Forte 1582fcf3ce44SJohn Forte #ifndef MAX_FCP_SNS 1583291a2b48SSukumar Swaminathan typedef struct emlxs_fcp_rsp 1584291a2b48SSukumar Swaminathan { 1585291a2b48SSukumar Swaminathan uint32_t rspRsvd1; /* FC Word 0, byte 0:3 */ 1586291a2b48SSukumar Swaminathan uint32_t rspRsvd2; /* FC Word 1, byte 0:3 */ 1587291a2b48SSukumar Swaminathan 1588291a2b48SSukumar Swaminathan uint8_t rspStatus0; /* FCP_STATUS byte 0 (reserved) */ 1589291a2b48SSukumar Swaminathan uint8_t rspStatus1; /* FCP_STATUS byte 1 (reserved) */ 1590291a2b48SSukumar Swaminathan uint8_t rspStatus2; /* FCP_STATUS byte 2 field validity */ 1591291a2b48SSukumar Swaminathan #define RSP_LEN_VALID 0x01 /* bit 0 */ 1592291a2b48SSukumar Swaminathan #define SNS_LEN_VALID 0x02 /* bit 1 */ 1593291a2b48SSukumar Swaminathan #define RESID_OVER 0x04 /* bit 2 */ 1594291a2b48SSukumar Swaminathan #define RESID_UNDER 0x08 /* bit 3 */ 1595291a2b48SSukumar Swaminathan uint8_t rspStatus3; /* FCP_STATUS byte 3 SCSI status byte */ 1596fcf3ce44SJohn Forte #define SCSI_STAT_GOOD 0x00 1597fcf3ce44SJohn Forte #define SCSI_STAT_CHECK_COND 0x02 1598fcf3ce44SJohn Forte #define SCSI_STAT_COND_MET 0x04 1599fcf3ce44SJohn Forte #define SCSI_STAT_BUSY 0x08 1600fcf3ce44SJohn Forte #define SCSI_STAT_INTERMED 0x10 1601fcf3ce44SJohn Forte #define SCSI_STAT_INTERMED_CM 0x14 1602fcf3ce44SJohn Forte #define SCSI_STAT_RES_CNFLCT 0x18 1603fcf3ce44SJohn Forte #define SCSI_STAT_CMD_TERM 0x22 1604fcf3ce44SJohn Forte #define SCSI_STAT_QUE_FULL 0x28 1605fcf3ce44SJohn Forte #define SCSI_STAT_ACA_ACTIVE 0x30 1606fcf3ce44SJohn Forte #define SCSI_STAT_TASK_ABORT 0x40 1607fcf3ce44SJohn Forte 1608291a2b48SSukumar Swaminathan uint32_t rspResId; /* Residual xfer if RESID_xxxx set in */ 1609291a2b48SSukumar Swaminathan /* fcpStatus2 */ 1610291a2b48SSukumar Swaminathan /* Received in Big Endian format */ 1611291a2b48SSukumar Swaminathan uint32_t rspSnsLen; /* Length of sense data in fcpSnsInfo */ 1612291a2b48SSukumar Swaminathan /* received in Big Endian format */ 1613291a2b48SSukumar Swaminathan uint32_t rspRspLen; /* Length of FCP response data in */ 1614291a2b48SSukumar Swaminathan /* fcpRspInfo */ 1615291a2b48SSukumar Swaminathan /* Received In Big Endian format */ 1616fcf3ce44SJohn Forte 1617291a2b48SSukumar Swaminathan uint8_t rspInfo0; /* FCP_RSP_INFO byte 0 (reserved) */ 1618291a2b48SSukumar Swaminathan uint8_t rspInfo1; /* FCP_RSP_INFO byte 1 (reserved) */ 1619291a2b48SSukumar Swaminathan uint8_t rspInfo2; /* FCP_RSP_INFO byte 2 (reserved) */ 1620291a2b48SSukumar Swaminathan uint8_t rspInfo3; /* FCP_RSP_INFO RSP_CODE byte 3 */ 1621fcf3ce44SJohn Forte 1622fcf3ce44SJohn Forte #define RSP_NO_FAILURE 0x00 1623fcf3ce44SJohn Forte #define RSP_DATA_BURST_ERR 0x01 1624fcf3ce44SJohn Forte #define RSP_CMD_FIELD_ERR 0x02 1625fcf3ce44SJohn Forte #define RSP_RO_MISMATCH_ERR 0x03 1626fcf3ce44SJohn Forte #define RSP_TM_NOT_SUPPORTED 0x04 /* Task mgmt function not supported */ 1627fcf3ce44SJohn Forte #define RSP_TM_NOT_COMPLETED 0x05 /* Task mgmt function not performed */ 1628fcf3ce44SJohn Forte 1629291a2b48SSukumar Swaminathan uint32_t rspInfoRsvd; /* FCP_RSP_INFO bytes 4-7 (reserved) */ 1630fcf3ce44SJohn Forte 1631fcf3ce44SJohn Forte /* 1632291a2b48SSukumar Swaminathan * Define maximum size of SCSI Sense buffer. 1633291a2b48SSukumar Swaminathan * Seagate never issues more than 18 bytes of Sense data. 1634fcf3ce44SJohn Forte */ 1635fcf3ce44SJohn Forte #define MAX_FCP_SNS 128 1636291a2b48SSukumar Swaminathan uint8_t rspSnsInfo[MAX_FCP_SNS]; 1637fcf3ce44SJohn Forte } emlxs_fcp_rsp; 1638fcf3ce44SJohn Forte typedef emlxs_fcp_rsp FCP_RSP; 1639291a2b48SSukumar Swaminathan #endif /* MAX_FCP_SNS */ 1640fcf3ce44SJohn Forte 1641fcf3ce44SJohn Forte 1642fcf3ce44SJohn Forte #ifndef FC_LUN_SHIFT 1643291a2b48SSukumar Swaminathan typedef struct emlxs_fcp_cmd 1644291a2b48SSukumar Swaminathan { 1645291a2b48SSukumar Swaminathan uint32_t fcpLunMsl; /* most significant word (32 bits) */ 1646291a2b48SSukumar Swaminathan uint32_t fcpLunLsl; /* least significant word (32 bits) */ 1647fcf3ce44SJohn Forte 1648fcf3ce44SJohn Forte /* 1649291a2b48SSukumar Swaminathan * # of bits to shift lun id to end up in right payload word, 1650291a2b48SSukumar Swaminathan * little endian = 8, big = 16. 1651fcf3ce44SJohn Forte */ 1652fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 1653fcf3ce44SJohn Forte #define FC_LUN_SHIFT 8 1654fcf3ce44SJohn Forte #define FC_ADDR_MODE_SHIFT 0 1655fcf3ce44SJohn Forte #endif 1656fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 1657fcf3ce44SJohn Forte #define FC_LUN_SHIFT 16 1658fcf3ce44SJohn Forte #define FC_ADDR_MODE_SHIFT 24 1659fcf3ce44SJohn Forte #endif 1660fcf3ce44SJohn Forte 1661291a2b48SSukumar Swaminathan uint8_t fcpCntl0; /* FCP_CNTL byte 0 (reserved) */ 1662291a2b48SSukumar Swaminathan uint8_t fcpCntl1; /* FCP_CNTL byte 1 task codes */ 1663291a2b48SSukumar Swaminathan #define SIMPLE_Q 0x00 1664291a2b48SSukumar Swaminathan #define HEAD_OF_Q 0x01 1665291a2b48SSukumar Swaminathan #define ORDERED_Q 0x02 1666291a2b48SSukumar Swaminathan #define ACA_Q 0x04 1667291a2b48SSukumar Swaminathan #define UNTAGGED 0x05 1668291a2b48SSukumar Swaminathan 1669291a2b48SSukumar Swaminathan uint8_t fcpCntl2; /* FCP_CTL byte 2 task management */ 1670291a2b48SSukumar Swaminathan /* codes */ 1671291a2b48SSukumar Swaminathan #define ABORT_TASK_SET 0x02 /* Bit 1 */ 1672291a2b48SSukumar Swaminathan #define CLEAR_TASK_SET 0x04 /* bit 2 */ 1673291a2b48SSukumar Swaminathan #define LUN_RESET 0x10 /* bit 4 */ 1674291a2b48SSukumar Swaminathan #define TARGET_RESET 0x20 /* bit 5 */ 1675291a2b48SSukumar Swaminathan #define CLEAR_ACA 0x40 /* bit 6 */ 1676291a2b48SSukumar Swaminathan #define TERMINATE_TASK 0x80 /* bit 7 */ 1677291a2b48SSukumar Swaminathan 1678291a2b48SSukumar Swaminathan uint8_t fcpCntl3; 1679291a2b48SSukumar Swaminathan #define WRITE_DATA 0x01 /* Bit 0 */ 1680291a2b48SSukumar Swaminathan #define READ_DATA 0x02 /* Bit 1 */ 1681291a2b48SSukumar Swaminathan 1682291a2b48SSukumar Swaminathan uint8_t fcpCdb[16]; /* SRB cdb field is copied here */ 1683291a2b48SSukumar Swaminathan uint32_t fcpDl; /* Total transfer length */ 1684fcf3ce44SJohn Forte } emlxs_fcp_cmd_t; 1685fcf3ce44SJohn Forte typedef emlxs_fcp_cmd_t FCP_CMND; 1686291a2b48SSukumar Swaminathan #endif /* FC_LUN_SHIFT */ 1687fcf3ce44SJohn Forte 1688fcf3ce44SJohn Forte 1689fcf3ce44SJohn Forte /* 1690fcf3ce44SJohn Forte * Used by libdfc (SendScsiCmd, SendFcpCmd, DFC_SendScsiCmdV2, DFC_SendFcpCmdV2 1691fcf3ce44SJohn Forte * and emlxs_dfc_send_scsi_fcp functions 1692fcf3ce44SJohn Forte */ 1693291a2b48SSukumar Swaminathan typedef struct dfc_send_scsi_fcp_cmd_info 1694291a2b48SSukumar Swaminathan { 1695291a2b48SSukumar Swaminathan HBA_WWN src_wwn; 1696291a2b48SSukumar Swaminathan HBA_WWN dst_wwn; 1697291a2b48SSukumar Swaminathan uint32_t cnt1; 1698291a2b48SSukumar Swaminathan uint32_t cnt2; 1699291a2b48SSukumar Swaminathan uint32_t ver; 1700fcf3ce44SJohn Forte } dfc_send_scsi_fcp_cmd_info_t; 1701291a2b48SSukumar Swaminathan 1702291a2b48SSukumar Swaminathan #define SCSI_RSP_CNT(x) x.cnt1 1703291a2b48SSukumar Swaminathan #define SCSI_SNS_CNT(x) x.cnt2 1704291a2b48SSukumar Swaminathan #define FC_DATA_CNT(x) x.cnt1 1705291a2b48SSukumar Swaminathan #define FC_RSP_CNT(x) x.cnt2 1706291a2b48SSukumar Swaminathan #define DFC_SEND_SCSI_FCP_V1 1 1707291a2b48SSukumar Swaminathan #define DFC_SEND_SCSI_FCP_V2 2 1708fcf3ce44SJohn Forte 1709*82527734SSukumar Swaminathan typedef struct DFC_FCoEParam 1710*82527734SSukumar Swaminathan { 1711*82527734SSukumar Swaminathan uint8_t version; 1712*82527734SSukumar Swaminathan #define DFC_FCoE_PARAM_VERSION 1 1713*82527734SSukumar Swaminathan 1714*82527734SSukumar Swaminathan uint8_t Reserved[3]; 1715*82527734SSukumar Swaminathan uint8_t FCMap[3]; 1716*82527734SSukumar Swaminathan uint8_t VLanValid; 1717*82527734SSukumar Swaminathan #define VLAN_ID_INVALID 0x0 1718*82527734SSukumar Swaminathan #define VLAN_ID_VALID 0x1 1719*82527734SSukumar Swaminathan 1720*82527734SSukumar Swaminathan uint16_t VLanId; 1721*82527734SSukumar Swaminathan } DFC_FCoEParam_t; 1722*82527734SSukumar Swaminathan 1723*82527734SSukumar Swaminathan typedef struct DFC_FCoEFCFConnectEntry 1724*82527734SSukumar Swaminathan { 1725*82527734SSukumar Swaminathan uint32_t flags; 1726*82527734SSukumar Swaminathan #define FCFCNCT_RSVD 0x00000001 1727*82527734SSukumar Swaminathan #define FCFCNCT_BOOT 0x00000002 1728*82527734SSukumar Swaminathan #define FCFCNCT_PRIMARY 0x00000004 1729*82527734SSukumar Swaminathan #define FCFCNCT_FBNM_VALID 0x00000008 1730*82527734SSukumar Swaminathan #define FCFCNCT_SWNM_VALID 0x00000010 1731*82527734SSukumar Swaminathan #define FCFCNCT_VLAN_VALID 0x00000020 1732*82527734SSukumar Swaminathan #define FCFCNCT_MASK 0xFFFFFF00 1733*82527734SSukumar Swaminathan 1734*82527734SSukumar Swaminathan uint16_t vlan_id; 1735*82527734SSukumar Swaminathan uint8_t fabric_name[8]; 1736*82527734SSukumar Swaminathan uint8_t switch_name[8]; 1737*82527734SSukumar Swaminathan uint8_t reserved[2]; 1738*82527734SSukumar Swaminathan } DFC_FCoEFCFConnectEntry_t; 1739*82527734SSukumar Swaminathan 1740*82527734SSukumar Swaminathan typedef struct DFC_FCoEFCFConnectList 1741*82527734SSukumar Swaminathan { 1742*82527734SSukumar Swaminathan uint8_t version; 1743*82527734SSukumar Swaminathan #define DFC_FCoE_FCFCONNECTLIST_VERSION 1 1744*82527734SSukumar Swaminathan 1745*82527734SSukumar Swaminathan uint8_t reserved; 1746*82527734SSukumar Swaminathan uint8_t numberOfEntries; 1747*82527734SSukumar Swaminathan uint8_t maxNumOfEntries; 1748*82527734SSukumar Swaminathan DFC_FCoEFCFConnectEntry_t entries[1]; 1749*82527734SSukumar Swaminathan } DFC_FCoEFCFConnectList_t; 1750*82527734SSukumar Swaminathan 1751*82527734SSukumar Swaminathan typedef struct DFC_FCoEFCFInfo 1752*82527734SSukumar Swaminathan { 1753*82527734SSukumar Swaminathan uint8_t FabricName[8]; 1754*82527734SSukumar Swaminathan uint8_t SwitchName[8]; 1755*82527734SSukumar Swaminathan uint8_t Mac[6]; 1756*82527734SSukumar Swaminathan uint16_t State; 1757*82527734SSukumar Swaminathan #define FCF_AVAILABLE_STATE 0x1 1758*82527734SSukumar Swaminathan 1759*82527734SSukumar Swaminathan uint8_t VLanBitMap[512]; 1760*82527734SSukumar Swaminathan uint8_t FC_Map[3]; 1761*82527734SSukumar Swaminathan uint8_t reserved1; 1762*82527734SSukumar Swaminathan uint32_t LKA_Period; 1763*82527734SSukumar Swaminathan uint32_t reserved2; 1764*82527734SSukumar Swaminathan uint32_t Priority; 1765*82527734SSukumar Swaminathan } DFC_FCoEFCFInfo_t; 1766*82527734SSukumar Swaminathan 1767*82527734SSukumar Swaminathan typedef struct DFC_FCoEFCFList 1768*82527734SSukumar Swaminathan { 1769*82527734SSukumar Swaminathan uint8_t version; 1770*82527734SSukumar Swaminathan #define DFC_FCoE_FCFLIST_VERSION 1 1771*82527734SSukumar Swaminathan 1772*82527734SSukumar Swaminathan uint8_t reserved[3]; 1773*82527734SSukumar Swaminathan uint16_t numberOfEntries; 1774*82527734SSukumar Swaminathan uint16_t nActiveFCFs; 1775*82527734SSukumar Swaminathan DFC_FCoEFCFInfo_t entries[1]; 1776*82527734SSukumar Swaminathan } DFC_FCoEFCFList_t; 1777*82527734SSukumar Swaminathan 1778fcf3ce44SJohn Forte #ifdef __cplusplus 1779fcf3ce44SJohn Forte } 1780fcf3ce44SJohn Forte #endif 1781fcf3ce44SJohn Forte 1782fcf3ce44SJohn Forte #endif /* _EMLXS_DFCLIB_H */ 1783