1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_DDITYPES_H 28 #define _SYS_DDITYPES_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #include <sys/isa_defs.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 #ifndef _ASM 39 /* 40 * DMA types 41 * 42 * A DMA handle represent a "DMA object". A DMA object is an abstraction 43 * that represents the potential source or destination of DMA transfers to 44 * or from a device. The DMA object is the highest level description of 45 * the source or destination and is not suitable for the actual transfer. 46 * 47 * Note, that we avoid the specific references to "mapping". The fact that 48 * a transfer requires mapping is an artifact of the specific architectural 49 * implementation. 50 */ 51 typedef struct __ddi_dma_handle *ddi_dma_handle_t; 52 53 /* 54 * A dma window type represents a "DMA window". A DMA window is a portion 55 * of a dma object or might be the entire object. A DMA window has had system 56 * resources allocated to it and is prepared to be transferred into or 57 * out of. Examples of system resources are DVMA mapping resources and 58 * intermediate transfer buffer resources. 59 * 60 */ 61 typedef struct __ddi_dma_win *ddi_dma_win_t; 62 63 64 /* 65 * A dma segment type represents a "DMA segment". A dma segment is a 66 * contiguous portion of a DMA window which is entirely addressable by the 67 * device for a transfer operation. One example where DMA segments are 68 * required is where the system does not contain DVMA capability and 69 * the object or window may be non-contiguous. In this example the 70 * object or window will be broken into smaller contiguous segments. 71 * Another example is where a device or some intermediary bus adapter has 72 * some upper limit on its transfer size (i.e. an 8-bit address register). 73 * In this example the object or window will be broken into smaller 74 * addressable segments. 75 */ 76 typedef struct __ddi_dma_seg *ddi_dma_seg_t; 77 78 /* 79 * A DMA cookie contains DMA address information required to 80 * program a DMA engine 81 */ 82 typedef struct { 83 union { 84 uint64_t _dmac_ll; /* 64 bit DMA address */ 85 uint32_t _dmac_la[2]; /* 2 x 32 bit address */ 86 } _dmu; 87 size_t dmac_size; /* DMA cookie size */ 88 uint_t dmac_type; /* bus specific type bits */ 89 } ddi_dma_cookie_t; 90 91 #define dmac_laddress _dmu._dmac_ll 92 #ifdef _LONG_LONG_HTOL 93 #define dmac_notused _dmu._dmac_la[0] 94 #define dmac_address _dmu._dmac_la[1] 95 #else 96 #define dmac_address _dmu._dmac_la[0] 97 #define dmac_notused _dmu._dmac_la[1] 98 #endif 99 100 /* 101 * Interrupt types 102 */ 103 104 /* 105 * lock initialization type 106 */ 107 typedef struct __ddi_iblock_cookie *ddi_iblock_cookie_t; 108 typedef union { 109 struct { 110 ushort_t _idev_vector; /* vector - bus dependent */ 111 ushort_t _idev_priority; /* priority - bus dependent */ 112 } idu; 113 uint_t idev_softint; /* Soft interrupt register bit(s) */ 114 } ddi_idevice_cookie_t; 115 #define idev_vector idu._idev_vector 116 #define idev_priority idu._idev_priority 117 118 /* 119 * register specification 120 */ 121 typedef struct __ddi_regspec *ddi_regspec_t; 122 123 /* 124 * interrupt specification 125 */ 126 typedef struct __ddi_intrspec *ddi_intrspec_t; 127 128 /* 129 * soft interrupt id 130 */ 131 typedef struct __ddi_softintr *ddi_softintr_t; 132 133 /* 134 * opaque device info handle 135 */ 136 typedef struct __dev_info *dev_info_t; 137 138 /* 139 * Mapping cookie for devmap(9E) 140 */ 141 typedef struct __ddi_devmap_data *ddi_devmap_data_t; 142 143 /* 144 * Opaque Device id 145 */ 146 typedef struct __ddi_devid *ddi_devid_t; 147 148 /* 149 * Device id types 150 */ 151 #define DEVID_NONE 0 152 #define DEVID_SCSI3_WWN 1 153 #define DEVID_SCSI_SERIAL 2 154 #define DEVID_FAB 3 155 #define DEVID_ENCAP 4 156 #define DEVID_ATA_SERIAL 5 157 #define DEVID_SCSI3_VPD_T10 6 158 #define DEVID_SCSI3_VPD_EUI 7 159 #define DEVID_SCSI3_VPD_NAA 8 160 #define DEVID_MAXTYPE 8 161 162 /* 163 * Device id scsi encode versions 164 */ 165 #define DEVID_SCSI_ENCODE_VERSION1 0 166 #define DEVID_SCSI_ENCODE_VERSION2 1 167 #define DEVID_SCSI_ENCODE_VERSION_LATEST DEVID_SCSI_ENCODE_VERSION2 168 169 /* minor name values for devid lookup interfaces */ 170 #define DEVID_MINOR_NAME_ALL ((char *)0) 171 #define DEVID_MINOR_NAME_ALL_CHR ((char *)1) 172 #define DEVID_MINOR_NAME_ALL_BLK ((char *)2) 173 174 /* 175 * Define ddi_devmap_cmd types. This should probably be elsewhere. 176 */ 177 typedef enum { 178 DDI_DEVMAP_VALIDATE = 0 /* Check mapping, but do nothing */ 179 } ddi_devmap_cmd_t; 180 181 /* 182 * Definitions for node state 183 */ 184 typedef enum { 185 DS_INVAL = -1, 186 DS_PROTO = 0, 187 DS_LINKED, /* in orphan list */ 188 DS_BOUND, /* in per-driver list */ 189 DS_INITIALIZED, /* bus address assigned */ 190 DS_PROBED, /* device known to exist */ 191 DS_ATTACHED, /* driver attached */ 192 DS_READY /* post attach complete */ 193 } ddi_node_state_t; 194 195 /* 196 * NDI Event Service 197 */ 198 typedef enum {EPL_KERNEL, EPL_INTERRUPT, EPL_HIGHLEVEL} ddi_plevel_t; 199 typedef struct ddi_event_cookie *ddi_eventcookie_t; 200 typedef struct ddi_event_callbacks *ddi_callback_id_t; 201 202 #endif /* !_ASM */ 203 204 #ifdef _KERNEL 205 #ifndef _ASM 206 207 /* 208 * Device Access Attributes 209 */ 210 211 typedef struct ddi_device_acc_attr { 212 ushort_t devacc_attr_version; 213 uchar_t devacc_attr_endian_flags; 214 uchar_t devacc_attr_dataorder; 215 uchar_t devacc_attr_access; /* access error protection */ 216 } ddi_device_acc_attr_t; 217 218 #define DDI_DEVICE_ATTR_V0 0x0001 219 #define DDI_DEVICE_ATTR_V1 0x0002 220 221 /* 222 * endian-ness flags 223 */ 224 #define DDI_NEVERSWAP_ACC 0x00 225 #define DDI_STRUCTURE_LE_ACC 0x01 226 #define DDI_STRUCTURE_BE_ACC 0x02 227 228 /* 229 * Data ordering values 230 */ 231 #define DDI_STRICTORDER_ACC 0x00 232 #define DDI_UNORDERED_OK_ACC 0x01 233 #define DDI_MERGING_OK_ACC 0x02 234 #define DDI_LOADCACHING_OK_ACC 0x03 235 #define DDI_STORECACHING_OK_ACC 0x04 236 237 /* 238 * Data size 239 */ 240 #define DDI_DATA_SZ01_ACC 1 241 #define DDI_DATA_SZ02_ACC 2 242 #define DDI_DATA_SZ04_ACC 4 243 #define DDI_DATA_SZ08_ACC 8 244 245 /* 246 * Data Access Handle 247 */ 248 #define VERS_ACCHDL 0x0001 249 250 typedef struct __ddi_acc_handle *ddi_acc_handle_t; 251 252 typedef struct ddi_acc_hdl { 253 int ah_vers; /* version number */ 254 void *ah_bus_private; /* bus private pointer */ 255 void *ah_platform_private; /* platform private pointer */ 256 dev_info_t *ah_dip; /* requesting device */ 257 258 uint_t ah_rnumber; /* register number */ 259 caddr_t ah_addr; /* address of mapping */ 260 261 off_t ah_offset; /* offset of mapping */ 262 off_t ah_len; /* length of mapping */ 263 uint_t ah_hat_flags; /* hat flags used to map object */ 264 pfn_t ah_pfn; /* physical page frame number */ 265 uint_t ah_pnum; /* number of contiguous pages */ 266 ulong_t ah_xfermodes; /* data transfer modes */ 267 ddi_device_acc_attr_t ah_acc; /* device access attributes */ 268 } ddi_acc_hdl_t; 269 270 /* 271 * Used by DDI_CTLOPS_POKE and DDI_CTLOPS_PEEK for peek/poke and cautious acc 272 */ 273 typedef struct { 274 size_t size; 275 uintptr_t dev_addr; 276 uintptr_t host_addr; 277 ddi_acc_handle_t handle; 278 size_t repcount; 279 uint_t flags; 280 } peekpoke_ctlops_t; 281 282 #endif /* !_ASM */ 283 284 /* 285 * devacc_attr_access error protection types 286 */ 287 #define DDI_DEFAULT_ACC 0x01 /* take default action */ 288 #define DDI_FLAGERR_ACC 0x02 /* protected against access faults */ 289 #define DDI_CAUTIOUS_ACC 0x03 /* high protection against faults */ 290 291 #endif /* _KERNEL */ 292 293 #ifdef __cplusplus 294 } 295 #endif 296 297 #endif /* _SYS_DDITYPES_H */ 298