17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*4ab75253Smrj * Common Development and Distribution License (the "License"). 6*4ab75253Smrj * You may not use this file except in compliance with the License. 77c478bd9Sstevel@tonic-gate * 87c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 97c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 107c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 117c478bd9Sstevel@tonic-gate * and limitations under the License. 127c478bd9Sstevel@tonic-gate * 137c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 147c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 157c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 167c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 177c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 187c478bd9Sstevel@tonic-gate * 197c478bd9Sstevel@tonic-gate * CDDL HEADER END 207c478bd9Sstevel@tonic-gate */ 21*4ab75253Smrj 227c478bd9Sstevel@tonic-gate /* 237c478bd9Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 247c478bd9Sstevel@tonic-gate * Use is subject to license terms. 257c478bd9Sstevel@tonic-gate */ 267c478bd9Sstevel@tonic-gate 277c478bd9Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 287c478bd9Sstevel@tonic-gate 297c478bd9Sstevel@tonic-gate #include <sys/types.h> 307c478bd9Sstevel@tonic-gate #include <sys/sunndi.h> 317c478bd9Sstevel@tonic-gate #include <sys/ddifm_impl.h> 327c478bd9Sstevel@tonic-gate #include <sys/fm/util.h> 337c478bd9Sstevel@tonic-gate #include <sys/fm/protocol.h> 347c478bd9Sstevel@tonic-gate #include <sys/fm/io/pci.h> 357c478bd9Sstevel@tonic-gate #include <sys/fm/io/ddi.h> 367c478bd9Sstevel@tonic-gate #include <sys/pci.h> 379164eb65Stimh #include <sys/pcie.h> 387c478bd9Sstevel@tonic-gate #include <sys/pci_impl.h> 397c478bd9Sstevel@tonic-gate #include <sys/epm.h> 407c478bd9Sstevel@tonic-gate 417c478bd9Sstevel@tonic-gate 427c478bd9Sstevel@tonic-gate int 437c478bd9Sstevel@tonic-gate pci_config_setup(dev_info_t *dip, ddi_acc_handle_t *handle) 447c478bd9Sstevel@tonic-gate { 457c478bd9Sstevel@tonic-gate caddr_t cfgaddr; 467c478bd9Sstevel@tonic-gate ddi_device_acc_attr_t attr; 477c478bd9Sstevel@tonic-gate 487c478bd9Sstevel@tonic-gate attr.devacc_attr_version = DDI_DEVICE_ATTR_V0; 497c478bd9Sstevel@tonic-gate attr.devacc_attr_endian_flags = DDI_STRUCTURE_LE_ACC; 507c478bd9Sstevel@tonic-gate attr.devacc_attr_dataorder = DDI_STRICTORDER_ACC; 517c478bd9Sstevel@tonic-gate 527c478bd9Sstevel@tonic-gate /* Check for fault management capabilities */ 537c478bd9Sstevel@tonic-gate if (DDI_FM_ACC_ERR_CAP(ddi_fm_capable(dip))) 547c478bd9Sstevel@tonic-gate attr.devacc_attr_access = DDI_FLAGERR_ACC; 557c478bd9Sstevel@tonic-gate 567c478bd9Sstevel@tonic-gate return (ddi_regs_map_setup(dip, 0, &cfgaddr, 0, 0, &attr, handle)); 577c478bd9Sstevel@tonic-gate } 587c478bd9Sstevel@tonic-gate 597c478bd9Sstevel@tonic-gate void 607c478bd9Sstevel@tonic-gate pci_config_teardown(ddi_acc_handle_t *handle) 617c478bd9Sstevel@tonic-gate { 627c478bd9Sstevel@tonic-gate ddi_regs_map_free(handle); 637c478bd9Sstevel@tonic-gate } 647c478bd9Sstevel@tonic-gate 657c478bd9Sstevel@tonic-gate /* 667c478bd9Sstevel@tonic-gate * pci_ereport_setup, pci_ereport_teardown, pci_ereport_post: 677c478bd9Sstevel@tonic-gate * Interfaces to be used by ereport capable PCI device drivers to setup, 687c478bd9Sstevel@tonic-gate * teardown, and post generic PCI error reports. This is to guarantee a 697c478bd9Sstevel@tonic-gate * consistant error report model for all PCI devices. Please see 707c478bd9Sstevel@tonic-gate * PSARC/2004/391. 717c478bd9Sstevel@tonic-gate */ 727c478bd9Sstevel@tonic-gate 737c478bd9Sstevel@tonic-gate typedef struct pci_erpt { 747c478bd9Sstevel@tonic-gate caddr_t pci_cfg_addr; /* Config space address */ 757c478bd9Sstevel@tonic-gate ddi_acc_handle_t pci_cfg_hdl; /* Config space access handle */ 767c478bd9Sstevel@tonic-gate } pci_erpt_t; 777c478bd9Sstevel@tonic-gate 787c478bd9Sstevel@tonic-gate pci_fm_err_t pci_err_tbl[] = { 797c478bd9Sstevel@tonic-gate PCI_DET_PERR, PCI_STAT_PERROR, NULL, 807c478bd9Sstevel@tonic-gate PCI_MDPE, PCI_STAT_S_PERROR, PCI_TARG_MDPE, 817c478bd9Sstevel@tonic-gate PCI_SIG_SERR, PCI_STAT_S_SYSERR, NULL, 827c478bd9Sstevel@tonic-gate PCI_MA, PCI_STAT_R_MAST_AB, PCI_TARG_MA, 837c478bd9Sstevel@tonic-gate PCI_REC_TA, PCI_STAT_R_TARG_AB, PCI_TARG_REC_TA, 847c478bd9Sstevel@tonic-gate PCI_SIG_TA, PCI_STAT_S_TARG_AB, NULL, 857c478bd9Sstevel@tonic-gate NULL, NULL, 867c478bd9Sstevel@tonic-gate }; 877c478bd9Sstevel@tonic-gate 887c478bd9Sstevel@tonic-gate pci_fm_err_t pci_bdg_err_tbl[] = { 897c478bd9Sstevel@tonic-gate PCI_DET_PERR, PCI_STAT_PERROR, NULL, 907c478bd9Sstevel@tonic-gate PCI_MDPE, PCI_STAT_S_PERROR, NULL, 917c478bd9Sstevel@tonic-gate PCI_REC_SERR, PCI_STAT_S_SYSERR, NULL, 927c478bd9Sstevel@tonic-gate PCI_MA, PCI_STAT_R_MAST_AB, NULL, 937c478bd9Sstevel@tonic-gate PCI_REC_TA, PCI_STAT_R_TARG_AB, NULL, 947c478bd9Sstevel@tonic-gate PCI_SIG_TA, PCI_STAT_S_TARG_AB, NULL, 957c478bd9Sstevel@tonic-gate NULL, NULL, 967c478bd9Sstevel@tonic-gate }; 979164eb65Stimh 987c478bd9Sstevel@tonic-gate void 997c478bd9Sstevel@tonic-gate pci_ereport_setup(dev_info_t *dip) 1007c478bd9Sstevel@tonic-gate { 1017c478bd9Sstevel@tonic-gate struct dev_info *devi = DEVI(dip); 1027c478bd9Sstevel@tonic-gate struct i_ddi_fmhdl *fmhdl = devi->devi_fmhdl; 1037c478bd9Sstevel@tonic-gate pci_erpt_t *erpt_p; 1047c478bd9Sstevel@tonic-gate ddi_acc_hdl_t *hp; 1059164eb65Stimh uint16_t pci_devstat = 0; 1069164eb65Stimh uint16_t pcie_cap = 0; 1079164eb65Stimh uint8_t ecap_ptr = 0; 1089164eb65Stimh uint8_t cap_ptr = 0; 1099164eb65Stimh uint8_t cap_id = 0; 1109164eb65Stimh int have_pciex; 1117c478bd9Sstevel@tonic-gate 1127c478bd9Sstevel@tonic-gate if (!DDI_FM_EREPORT_CAP(ddi_fm_capable(dip))) { 1137c478bd9Sstevel@tonic-gate i_ddi_drv_ereport_post(dip, DVR_EFMCAP, NULL, DDI_SLEEP); 1147c478bd9Sstevel@tonic-gate return; 1157c478bd9Sstevel@tonic-gate } 1167c478bd9Sstevel@tonic-gate 1177c478bd9Sstevel@tonic-gate ASSERT(fmhdl); 1187c478bd9Sstevel@tonic-gate ASSERT(fmhdl->fh_bus_specific == NULL); 1197c478bd9Sstevel@tonic-gate 1207c478bd9Sstevel@tonic-gate if ((erpt_p = kmem_zalloc(sizeof (pci_erpt_t), KM_SLEEP)) == NULL) 1217c478bd9Sstevel@tonic-gate return; 1227c478bd9Sstevel@tonic-gate 1239164eb65Stimh /* 1249164eb65Stimh * Setup config space and store config address 1259164eb65Stimh * in pci_erpt struct. 1269164eb65Stimh */ 1277c478bd9Sstevel@tonic-gate if (pci_config_setup(dip, &erpt_p->pci_cfg_hdl) == DDI_SUCCESS) { 1287c478bd9Sstevel@tonic-gate hp = impl_acc_hdl_get(erpt_p->pci_cfg_hdl); 1297c478bd9Sstevel@tonic-gate erpt_p->pci_cfg_addr = (caddr_t)hp->ah_addr; 1307c478bd9Sstevel@tonic-gate fmhdl->fh_bus_specific = (void *)erpt_p; 1319164eb65Stimh } else { 1329164eb65Stimh return; 1339164eb65Stimh } 1349164eb65Stimh 1359164eb65Stimh /* 1369164eb65Stimh * Determine if this device supports a capabilities list. We 1379164eb65Stimh * do so by looking at a bit in the status register. If we are 1389164eb65Stimh * unable to retrieve the status register, something is horribly 1399164eb65Stimh * wrong and we should just bail. 1409164eb65Stimh */ 1419164eb65Stimh if ((pci_devstat = ddi_get16(erpt_p->pci_cfg_hdl, 1429164eb65Stimh (uint16_t *)(erpt_p->pci_cfg_addr + PCI_CONF_STAT))) == 0xff) 1439164eb65Stimh return; 1449164eb65Stimh if ((pci_devstat & PCI_STAT_CAP) == 0) 1459164eb65Stimh return; 1469164eb65Stimh 1479164eb65Stimh /* 1489164eb65Stimh * Determine if we are on a machine with pci express. We do so 1499164eb65Stimh * by looping through the capabilities of the device and looking 1509164eb65Stimh * to see if one of those capabilities is support of PCI 1519164eb65Stimh * express. 1529164eb65Stimh */ 1539164eb65Stimh have_pciex = 0; 1549164eb65Stimh if ((cap_ptr = ddi_get8(erpt_p->pci_cfg_hdl, 1559164eb65Stimh (uint8_t *)(erpt_p->pci_cfg_addr + PCI_CONF_CAP_PTR))) != 1569164eb65Stimh 0xff) { 1579164eb65Stimh while ((cap_id = ddi_get8(erpt_p->pci_cfg_hdl, 1589164eb65Stimh (uint8_t *)(erpt_p->pci_cfg_addr + cap_ptr))) != 1599164eb65Stimh 0xff) { 1609164eb65Stimh if (cap_id == PCI_CAP_ID_PCI_E) { 1619164eb65Stimh ecap_ptr = cap_ptr; 1629164eb65Stimh have_pciex = 1; 1639164eb65Stimh break; 1649164eb65Stimh } 1659164eb65Stimh if ((cap_ptr = ddi_get8(erpt_p->pci_cfg_hdl, 1669164eb65Stimh (uint8_t *)(erpt_p->pci_cfg_addr + 1679164eb65Stimh cap_ptr + 1))) == 0xff || cap_ptr == 0) 1689164eb65Stimh break; 1699164eb65Stimh } 1709164eb65Stimh } 1719164eb65Stimh 1729164eb65Stimh /* 1739164eb65Stimh * If not pci express, we're done 1749164eb65Stimh */ 1759164eb65Stimh if (have_pciex == 0) 1769164eb65Stimh return; 1779164eb65Stimh 1789164eb65Stimh /* 1799164eb65Stimh * Save and export the pci express capabilities reg. 1809164eb65Stimh */ 1819164eb65Stimh pcie_cap = ddi_get16(erpt_p->pci_cfg_hdl, 1829164eb65Stimh (uint16_t *)(erpt_p->pci_cfg_addr + ecap_ptr + PCIE_PCIECAP)); 1839164eb65Stimh (void) ndi_prop_update_int(DDI_DEV_T_NONE, 1849164eb65Stimh dip, SAVED_PCIEX_CAP_REG, pcie_cap); 1859164eb65Stimh 1869164eb65Stimh /* 1879164eb65Stimh * Find and export any slot capabilities register 1889164eb65Stimh */ 1899164eb65Stimh if (pcie_cap & PCIE_PCIECAP_SLOT_IMPL) { 1909164eb65Stimh int sltcap = ddi_get32(erpt_p->pci_cfg_hdl, 1919164eb65Stimh (uint32_t *) 1929164eb65Stimh (erpt_p->pci_cfg_addr + ecap_ptr + PCIE_SLOTCAP)); 1939164eb65Stimh (void) ndi_prop_update_int(DDI_DEV_T_NONE, 1949164eb65Stimh dip, SAVED_PCIEX_SLOTCAP_REG, sltcap); 1957c478bd9Sstevel@tonic-gate } 1967c478bd9Sstevel@tonic-gate } 1977c478bd9Sstevel@tonic-gate 1987c478bd9Sstevel@tonic-gate void 1997c478bd9Sstevel@tonic-gate pci_ereport_teardown(dev_info_t *dip) 2007c478bd9Sstevel@tonic-gate { 2017c478bd9Sstevel@tonic-gate struct i_ddi_fmhdl *fmhdl = DEVI(dip)->devi_fmhdl; 2027c478bd9Sstevel@tonic-gate pci_erpt_t *erpt_p; 2037c478bd9Sstevel@tonic-gate 2047c478bd9Sstevel@tonic-gate if (!DDI_FM_EREPORT_CAP(ddi_fm_capable(dip))) { 2057c478bd9Sstevel@tonic-gate i_ddi_drv_ereport_post(dip, DVR_EFMCAP, NULL, DDI_SLEEP); 2067c478bd9Sstevel@tonic-gate } 2077c478bd9Sstevel@tonic-gate 2087c478bd9Sstevel@tonic-gate ASSERT(fmhdl); 2097c478bd9Sstevel@tonic-gate 2107c478bd9Sstevel@tonic-gate erpt_p = (pci_erpt_t *)fmhdl->fh_bus_specific; 2117c478bd9Sstevel@tonic-gate if (erpt_p == NULL) 2127c478bd9Sstevel@tonic-gate return; 2137c478bd9Sstevel@tonic-gate 2149164eb65Stimh (void) ndi_prop_remove(DDI_DEV_T_NONE, dip, SAVED_PCIEX_CAP_REG); 2159164eb65Stimh (void) ndi_prop_remove(DDI_DEV_T_NONE, dip, SAVED_PCIEX_SLOTCAP_REG); 2167c478bd9Sstevel@tonic-gate pci_config_teardown(&erpt_p->pci_cfg_hdl); 2177c478bd9Sstevel@tonic-gate kmem_free(erpt_p, sizeof (pci_erpt_t)); 2187c478bd9Sstevel@tonic-gate fmhdl->fh_bus_specific = NULL; 2197c478bd9Sstevel@tonic-gate } 2207c478bd9Sstevel@tonic-gate 2217c478bd9Sstevel@tonic-gate void 2227c478bd9Sstevel@tonic-gate pci_ereport_post(dev_info_t *dip, ddi_fm_error_t *derr, uint16_t *status) 2237c478bd9Sstevel@tonic-gate { 2247c478bd9Sstevel@tonic-gate struct i_ddi_fmhdl *fmhdl; 2257c478bd9Sstevel@tonic-gate pci_erpt_t *erpt_p; 2267c478bd9Sstevel@tonic-gate char buf[FM_MAX_CLASS]; 2277c478bd9Sstevel@tonic-gate uint16_t cfg_comm = 0xffff; 2287c478bd9Sstevel@tonic-gate uint16_t cfg_stat = 0xffff; 2297c478bd9Sstevel@tonic-gate int i; 2307c478bd9Sstevel@tonic-gate fmhdl = DEVI(dip)->devi_fmhdl; 2317c478bd9Sstevel@tonic-gate 2327c478bd9Sstevel@tonic-gate if (!DDI_FM_EREPORT_CAP(ddi_fm_capable(dip))) { 2337c478bd9Sstevel@tonic-gate i_ddi_drv_ereport_post(dip, DVR_EFMCAP, NULL, DDI_NOSLEEP); 2347c478bd9Sstevel@tonic-gate return; 2357c478bd9Sstevel@tonic-gate } 2367c478bd9Sstevel@tonic-gate 2377c478bd9Sstevel@tonic-gate ASSERT(fmhdl); 2387c478bd9Sstevel@tonic-gate 2397c478bd9Sstevel@tonic-gate derr->fme_ena = derr->fme_ena ? derr->fme_ena : fm_ena_generate(0, 2407c478bd9Sstevel@tonic-gate FM_ENA_FMT1); 2417c478bd9Sstevel@tonic-gate 2427c478bd9Sstevel@tonic-gate erpt_p = (pci_erpt_t *)fmhdl->fh_bus_specific; 2437c478bd9Sstevel@tonic-gate if (erpt_p == NULL) { 2447c478bd9Sstevel@tonic-gate i_ddi_drv_ereport_post(dip, DVR_EFMCAP, NULL, DDI_NOSLEEP); 2457c478bd9Sstevel@tonic-gate return; 2467c478bd9Sstevel@tonic-gate } 2477c478bd9Sstevel@tonic-gate 2487c478bd9Sstevel@tonic-gate if ((cfg_stat = ddi_get16(erpt_p->pci_cfg_hdl, 2497c478bd9Sstevel@tonic-gate (uint16_t *)(erpt_p->pci_cfg_addr + PCI_CONF_STAT))) == 0xffff) { 2507c478bd9Sstevel@tonic-gate (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", 2517c478bd9Sstevel@tonic-gate PCI_ERROR_SUBCLASS, PCI_NR); 2527c478bd9Sstevel@tonic-gate ddi_fm_ereport_post(dip, buf, derr->fme_ena, DDI_NOSLEEP, 2537c478bd9Sstevel@tonic-gate FM_VERSION, DATA_TYPE_UINT8, 0, NULL); 2547c478bd9Sstevel@tonic-gate goto done; 2557c478bd9Sstevel@tonic-gate } 2567c478bd9Sstevel@tonic-gate if ((cfg_comm = ddi_get16(erpt_p->pci_cfg_hdl, 2577c478bd9Sstevel@tonic-gate (uint16_t *)(erpt_p->pci_cfg_addr + PCI_CONF_COMM))) == 0xffff) { 2587c478bd9Sstevel@tonic-gate (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", 2597c478bd9Sstevel@tonic-gate PCI_ERROR_SUBCLASS, PCI_NR); 2607c478bd9Sstevel@tonic-gate ddi_fm_ereport_post(dip, buf, derr->fme_ena, DDI_NOSLEEP, 2617c478bd9Sstevel@tonic-gate FM_VERSION, DATA_TYPE_UINT8, 0, NULL); 2627c478bd9Sstevel@tonic-gate goto done; 2637c478bd9Sstevel@tonic-gate } 2647c478bd9Sstevel@tonic-gate 2657c478bd9Sstevel@tonic-gate if (derr->fme_flag == DDI_FM_ERR_UNEXPECTED) { 2667c478bd9Sstevel@tonic-gate for (i = 0; pci_err_tbl[i].err_class != NULL; i++) { 2677c478bd9Sstevel@tonic-gate if (cfg_stat & pci_err_tbl[i].reg_bit) { 2687c478bd9Sstevel@tonic-gate 2697c478bd9Sstevel@tonic-gate /* 2707c478bd9Sstevel@tonic-gate * Generate an ereport for this error bit. 2717c478bd9Sstevel@tonic-gate */ 2727c478bd9Sstevel@tonic-gate (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", 2737c478bd9Sstevel@tonic-gate PCI_ERROR_SUBCLASS, 2747c478bd9Sstevel@tonic-gate pci_err_tbl[i].err_class); 2757c478bd9Sstevel@tonic-gate ddi_fm_ereport_post(dip, buf, derr->fme_ena, 2767c478bd9Sstevel@tonic-gate DDI_NOSLEEP, FM_VERSION, DATA_TYPE_UINT8, 0, 2777c478bd9Sstevel@tonic-gate PCI_CONFIG_STATUS, DATA_TYPE_UINT16, 2787c478bd9Sstevel@tonic-gate cfg_stat, PCI_CONFIG_COMMAND, 2797c478bd9Sstevel@tonic-gate DATA_TYPE_UINT16, cfg_comm, NULL); 2807c478bd9Sstevel@tonic-gate 2817c478bd9Sstevel@tonic-gate /* 2827c478bd9Sstevel@tonic-gate * Generate a corresponding ereport on behalf 2837c478bd9Sstevel@tonic-gate * of the target (the parent dip) of the 2847c478bd9Sstevel@tonic-gate * transaction. 2857c478bd9Sstevel@tonic-gate */ 2867c478bd9Sstevel@tonic-gate if (pci_err_tbl[i].terr_class != NULL && 2877c478bd9Sstevel@tonic-gate DDI_FM_EREPORT_CAP(ddi_fm_capable( 2887c478bd9Sstevel@tonic-gate (dev_info_t *)DEVI(dip)->devi_parent))) { 2897c478bd9Sstevel@tonic-gate (void) snprintf(buf, FM_MAX_CLASS, 2907c478bd9Sstevel@tonic-gate "%s.%s", PCI_ERROR_SUBCLASS, 2917c478bd9Sstevel@tonic-gate pci_err_tbl[i].terr_class); 2927c478bd9Sstevel@tonic-gate ddi_fm_ereport_post((dev_info_t *) 2937c478bd9Sstevel@tonic-gate DEVI(dip)->devi_parent, buf, 2947c478bd9Sstevel@tonic-gate derr->fme_ena, DDI_NOSLEEP, 2957c478bd9Sstevel@tonic-gate FM_VERSION, DATA_TYPE_UINT8, 0, 2967c478bd9Sstevel@tonic-gate NULL); 2977c478bd9Sstevel@tonic-gate } 2987c478bd9Sstevel@tonic-gate } 2997c478bd9Sstevel@tonic-gate } 3007c478bd9Sstevel@tonic-gate } 3017c478bd9Sstevel@tonic-gate 3027c478bd9Sstevel@tonic-gate /* 3037c478bd9Sstevel@tonic-gate * Clear error bits 3047c478bd9Sstevel@tonic-gate */ 3057c478bd9Sstevel@tonic-gate ddi_put16(erpt_p->pci_cfg_hdl, 3067c478bd9Sstevel@tonic-gate (uint16_t *)(erpt_p->pci_cfg_addr + PCI_CONF_STAT), 3077c478bd9Sstevel@tonic-gate (uint16_t)cfg_stat); 3087c478bd9Sstevel@tonic-gate done: 3097c478bd9Sstevel@tonic-gate if (status != NULL) 3107c478bd9Sstevel@tonic-gate *status = cfg_stat; 3117c478bd9Sstevel@tonic-gate } 3127c478bd9Sstevel@tonic-gate 3137c478bd9Sstevel@tonic-gate /* 3147c478bd9Sstevel@tonic-gate * Generic pci-pci bridge error report function 3157c478bd9Sstevel@tonic-gate */ 3167c478bd9Sstevel@tonic-gate void 3177c478bd9Sstevel@tonic-gate pci_bdg_ereport_post(dev_info_t *dip, ddi_fm_error_t *derr, uint16_t *status) 3187c478bd9Sstevel@tonic-gate { 3197c478bd9Sstevel@tonic-gate struct i_ddi_fmhdl *fmhdl; 3207c478bd9Sstevel@tonic-gate pci_erpt_t *erpt_p; 3217c478bd9Sstevel@tonic-gate char buf[FM_MAX_CLASS]; 3227c478bd9Sstevel@tonic-gate uint16_t bdg_ctrl = 0xffff; 3237c478bd9Sstevel@tonic-gate uint16_t cfg_sec_stat = 0xffff; 3247c478bd9Sstevel@tonic-gate int i; 3257c478bd9Sstevel@tonic-gate 3267c478bd9Sstevel@tonic-gate if (!DDI_FM_EREPORT_CAP(ddi_fm_capable(dip))) { 3277c478bd9Sstevel@tonic-gate i_ddi_drv_ereport_post(dip, DVR_EFMCAP, NULL, DDI_NOSLEEP); 3287c478bd9Sstevel@tonic-gate return; 3297c478bd9Sstevel@tonic-gate } 3307c478bd9Sstevel@tonic-gate 3317c478bd9Sstevel@tonic-gate fmhdl = DEVI(dip)->devi_fmhdl; 3327c478bd9Sstevel@tonic-gate 3337c478bd9Sstevel@tonic-gate ASSERT(fmhdl); 3347c478bd9Sstevel@tonic-gate 3357c478bd9Sstevel@tonic-gate derr->fme_ena = derr->fme_ena ? derr->fme_ena : fm_ena_generate(0, 3367c478bd9Sstevel@tonic-gate FM_ENA_FMT1); 3377c478bd9Sstevel@tonic-gate 3387c478bd9Sstevel@tonic-gate erpt_p = (pci_erpt_t *)fmhdl->fh_bus_specific; 3397c478bd9Sstevel@tonic-gate if (erpt_p == NULL) { 3407c478bd9Sstevel@tonic-gate i_ddi_drv_ereport_post(dip, DVR_EFMCAP, NULL, DDI_NOSLEEP); 3417c478bd9Sstevel@tonic-gate return; 3427c478bd9Sstevel@tonic-gate } 3437c478bd9Sstevel@tonic-gate 3447c478bd9Sstevel@tonic-gate if ((cfg_sec_stat = ddi_get16(erpt_p->pci_cfg_hdl, 3457c478bd9Sstevel@tonic-gate (uint16_t *)(erpt_p->pci_cfg_addr + PCI_BCNF_SEC_STATUS))) 3467c478bd9Sstevel@tonic-gate == 0xffff) { 3477c478bd9Sstevel@tonic-gate (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", PCI_ERROR_SUBCLASS, 3487c478bd9Sstevel@tonic-gate PCI_NR); 3497c478bd9Sstevel@tonic-gate ddi_fm_ereport_post(dip, buf, derr->fme_ena, DDI_NOSLEEP, 3507c478bd9Sstevel@tonic-gate FM_VERSION, DATA_TYPE_UINT8, 0, NULL); 3517c478bd9Sstevel@tonic-gate goto done; 3527c478bd9Sstevel@tonic-gate } 3537c478bd9Sstevel@tonic-gate 3547c478bd9Sstevel@tonic-gate if ((bdg_ctrl = ddi_get16(erpt_p->pci_cfg_hdl, 3557c478bd9Sstevel@tonic-gate (uint16_t *)(erpt_p->pci_cfg_addr + PCI_BCNF_BCNTRL))) == 0xffff) { 3567c478bd9Sstevel@tonic-gate (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", PCI_ERROR_SUBCLASS, 3577c478bd9Sstevel@tonic-gate PCI_NR); 3587c478bd9Sstevel@tonic-gate ddi_fm_ereport_post(dip, buf, derr->fme_ena, DDI_NOSLEEP, 3597c478bd9Sstevel@tonic-gate FM_VERSION, DATA_TYPE_UINT8, 0, NULL); 3607c478bd9Sstevel@tonic-gate goto done; 3617c478bd9Sstevel@tonic-gate } 3627c478bd9Sstevel@tonic-gate 3637c478bd9Sstevel@tonic-gate if (derr->fme_flag == DDI_FM_ERR_UNEXPECTED) { 3647c478bd9Sstevel@tonic-gate if (bdg_ctrl & PCI_BCNF_BCNTRL_DTO_STAT) { 3657c478bd9Sstevel@tonic-gate (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", 3667c478bd9Sstevel@tonic-gate PCI_ERROR_SUBCLASS, PCI_DTO); 3677c478bd9Sstevel@tonic-gate ddi_fm_ereport_post(dip, buf, derr->fme_ena, 3687c478bd9Sstevel@tonic-gate DDI_NOSLEEP, FM_VERSION, DATA_TYPE_UINT8, 0, 3697c478bd9Sstevel@tonic-gate PCI_SEC_CONFIG_STATUS, DATA_TYPE_UINT16, 3707c478bd9Sstevel@tonic-gate cfg_sec_stat, PCI_BCNTRL, DATA_TYPE_UINT16, 3717c478bd9Sstevel@tonic-gate bdg_ctrl, NULL); 3727c478bd9Sstevel@tonic-gate } 3737c478bd9Sstevel@tonic-gate 3747c478bd9Sstevel@tonic-gate for (i = 0; pci_bdg_err_tbl[i].err_class != NULL; i++) { 3757c478bd9Sstevel@tonic-gate if (cfg_sec_stat & pci_bdg_err_tbl[i].reg_bit) { 3767c478bd9Sstevel@tonic-gate (void) snprintf(buf, FM_MAX_CLASS, "%s.%s-%s", 3777c478bd9Sstevel@tonic-gate PCI_ERROR_SUBCLASS, PCI_SEC_ERROR_SUBCLASS, 3787c478bd9Sstevel@tonic-gate pci_bdg_err_tbl[i].err_class); 3797c478bd9Sstevel@tonic-gate ddi_fm_ereport_post(dip, buf, derr->fme_ena, 3807c478bd9Sstevel@tonic-gate DDI_NOSLEEP, FM_VERSION, DATA_TYPE_UINT8, 0, 3817c478bd9Sstevel@tonic-gate PCI_SEC_CONFIG_STATUS, DATA_TYPE_UINT16, 3827c478bd9Sstevel@tonic-gate cfg_sec_stat, PCI_BCNTRL, DATA_TYPE_UINT16, 3837c478bd9Sstevel@tonic-gate bdg_ctrl, NULL); 3847c478bd9Sstevel@tonic-gate } 3857c478bd9Sstevel@tonic-gate } 3867c478bd9Sstevel@tonic-gate } 3877c478bd9Sstevel@tonic-gate 3887c478bd9Sstevel@tonic-gate /* 3897c478bd9Sstevel@tonic-gate * Clear error bits 3907c478bd9Sstevel@tonic-gate */ 3917c478bd9Sstevel@tonic-gate ddi_put16(erpt_p->pci_cfg_hdl, (uint16_t *) 3927c478bd9Sstevel@tonic-gate (erpt_p->pci_cfg_addr + PCI_BCNF_SEC_STATUS), 3937c478bd9Sstevel@tonic-gate (uint16_t)cfg_sec_stat); 3947c478bd9Sstevel@tonic-gate ddi_put16(erpt_p->pci_cfg_hdl, (uint16_t *) 3957c478bd9Sstevel@tonic-gate (erpt_p->pci_cfg_addr + PCI_BCNF_BCNTRL), 3967c478bd9Sstevel@tonic-gate (uint16_t)bdg_ctrl); 3977c478bd9Sstevel@tonic-gate 3987c478bd9Sstevel@tonic-gate done: 3997c478bd9Sstevel@tonic-gate if (status != NULL) 4007c478bd9Sstevel@tonic-gate *status = cfg_sec_stat; 4017c478bd9Sstevel@tonic-gate } 4027c478bd9Sstevel@tonic-gate 4037c478bd9Sstevel@tonic-gate /* 4047c478bd9Sstevel@tonic-gate * Generic pci-pci bridge error analysis function 4057c478bd9Sstevel@tonic-gate */ 4067c478bd9Sstevel@tonic-gate int 4077c478bd9Sstevel@tonic-gate pci_bdg_check_status(dev_info_t *dip, ddi_fm_error_t *derr, 4087c478bd9Sstevel@tonic-gate uint16_t pci_cfg_stat, uint16_t pci_cfg_sec_stat) 4097c478bd9Sstevel@tonic-gate { 4107c478bd9Sstevel@tonic-gate int ret; 4117c478bd9Sstevel@tonic-gate int fatal = 0; 4127c478bd9Sstevel@tonic-gate int nonfatal = 0; 4137c478bd9Sstevel@tonic-gate int unknown = 0; 4147c478bd9Sstevel@tonic-gate 4157c478bd9Sstevel@tonic-gate if (derr->fme_flag == DDI_FM_ERR_POKE) { 4167c478bd9Sstevel@tonic-gate /* 4177c478bd9Sstevel@tonic-gate * special case for pokes - we only consider master abort 4187c478bd9Sstevel@tonic-gate * and target abort as nonfatal. Sserr with no master abort is 4197c478bd9Sstevel@tonic-gate * fatal, but master/target abort can come in on separate 4207c478bd9Sstevel@tonic-gate * instance, so return unknown and parent will determine if 4217c478bd9Sstevel@tonic-gate * nonfatal (if another child returned nonfatal - ie master 4227c478bd9Sstevel@tonic-gate * or target abort) or fatal otherwise 4237c478bd9Sstevel@tonic-gate */ 4247c478bd9Sstevel@tonic-gate if (pci_cfg_sec_stat & (PCI_STAT_R_TARG_AB | 4257c478bd9Sstevel@tonic-gate PCI_STAT_R_MAST_AB)) 4267c478bd9Sstevel@tonic-gate nonfatal++; 4277c478bd9Sstevel@tonic-gate if (pci_cfg_stat & PCI_STAT_S_SYSERR) 4287c478bd9Sstevel@tonic-gate unknown++; 4297c478bd9Sstevel@tonic-gate } else if (derr->fme_flag == DDI_FM_ERR_UNEXPECTED) { 4307c478bd9Sstevel@tonic-gate /* 4317c478bd9Sstevel@tonic-gate * Only sserr on primary bus is considered fatal. 4327c478bd9Sstevel@tonic-gate * In all other conditions, the bridge has been able to notify 4337c478bd9Sstevel@tonic-gate * the initiator of the error condition, so let the initiator 4347c478bd9Sstevel@tonic-gate * (be it the host for PIO or the leaf device for DMA) handle it 4357c478bd9Sstevel@tonic-gate */ 4367c478bd9Sstevel@tonic-gate if (pci_cfg_stat & PCI_STAT_S_SYSERR) 4377c478bd9Sstevel@tonic-gate fatal++; 4387c478bd9Sstevel@tonic-gate if (pci_cfg_stat & (PCI_STAT_PERROR | 4397c478bd9Sstevel@tonic-gate PCI_STAT_R_MAST_AB | PCI_STAT_S_PERROR | 4407c478bd9Sstevel@tonic-gate PCI_STAT_R_TARG_AB | PCI_STAT_S_TARG_AB)) 4417c478bd9Sstevel@tonic-gate nonfatal++; 4427c478bd9Sstevel@tonic-gate if (pci_cfg_sec_stat & (PCI_STAT_R_TARG_AB | 4437c478bd9Sstevel@tonic-gate PCI_STAT_S_SYSERR | PCI_STAT_R_MAST_AB | PCI_STAT_S_PERROR | 4447c478bd9Sstevel@tonic-gate PCI_STAT_PERROR | PCI_STAT_S_TARG_AB)) 4457c478bd9Sstevel@tonic-gate nonfatal++; 4467c478bd9Sstevel@tonic-gate } 4477c478bd9Sstevel@tonic-gate 4487c478bd9Sstevel@tonic-gate /* 4497c478bd9Sstevel@tonic-gate * now check children below the bridge 4507c478bd9Sstevel@tonic-gate */ 4517c478bd9Sstevel@tonic-gate ret = ndi_fm_handler_dispatch(dip, NULL, derr); 4527c478bd9Sstevel@tonic-gate if (ret == DDI_FM_FATAL) 4537c478bd9Sstevel@tonic-gate fatal++; 4547c478bd9Sstevel@tonic-gate else if (ret == DDI_FM_NONFATAL) 4557c478bd9Sstevel@tonic-gate nonfatal++; 4567c478bd9Sstevel@tonic-gate else if (ret == DDI_FM_UNKNOWN) 4577c478bd9Sstevel@tonic-gate unknown++; 4587c478bd9Sstevel@tonic-gate 4597c478bd9Sstevel@tonic-gate return (fatal ? DDI_FM_FATAL : (nonfatal ? DDI_FM_NONFATAL : 4607c478bd9Sstevel@tonic-gate (unknown ? DDI_FM_UNKNOWN : DDI_FM_OK))); 4617c478bd9Sstevel@tonic-gate } 4627c478bd9Sstevel@tonic-gate 4637c478bd9Sstevel@tonic-gate uint8_t 4647c478bd9Sstevel@tonic-gate pci_config_get8(ddi_acc_handle_t handle, off_t offset) 4657c478bd9Sstevel@tonic-gate { 4667c478bd9Sstevel@tonic-gate caddr_t cfgaddr; 4677c478bd9Sstevel@tonic-gate ddi_acc_hdl_t *hp; 4687c478bd9Sstevel@tonic-gate 4697c478bd9Sstevel@tonic-gate hp = impl_acc_hdl_get(handle); 4707c478bd9Sstevel@tonic-gate cfgaddr = hp->ah_addr + offset; 4717c478bd9Sstevel@tonic-gate return (ddi_get8(handle, (uint8_t *)cfgaddr)); 4727c478bd9Sstevel@tonic-gate } 4737c478bd9Sstevel@tonic-gate 4747c478bd9Sstevel@tonic-gate uint16_t 4757c478bd9Sstevel@tonic-gate pci_config_get16(ddi_acc_handle_t handle, off_t offset) 4767c478bd9Sstevel@tonic-gate { 4777c478bd9Sstevel@tonic-gate caddr_t cfgaddr; 4787c478bd9Sstevel@tonic-gate ddi_acc_hdl_t *hp; 4797c478bd9Sstevel@tonic-gate 4807c478bd9Sstevel@tonic-gate hp = impl_acc_hdl_get(handle); 4817c478bd9Sstevel@tonic-gate cfgaddr = hp->ah_addr + offset; 4827c478bd9Sstevel@tonic-gate return (ddi_get16(handle, (uint16_t *)cfgaddr)); 4837c478bd9Sstevel@tonic-gate } 4847c478bd9Sstevel@tonic-gate 4857c478bd9Sstevel@tonic-gate uint32_t 4867c478bd9Sstevel@tonic-gate pci_config_get32(ddi_acc_handle_t handle, off_t offset) 4877c478bd9Sstevel@tonic-gate { 4887c478bd9Sstevel@tonic-gate caddr_t cfgaddr; 4897c478bd9Sstevel@tonic-gate ddi_acc_hdl_t *hp; 4907c478bd9Sstevel@tonic-gate 4917c478bd9Sstevel@tonic-gate hp = impl_acc_hdl_get(handle); 4927c478bd9Sstevel@tonic-gate cfgaddr = hp->ah_addr + offset; 4937c478bd9Sstevel@tonic-gate return (ddi_get32(handle, (uint32_t *)cfgaddr)); 4947c478bd9Sstevel@tonic-gate } 4957c478bd9Sstevel@tonic-gate 4967c478bd9Sstevel@tonic-gate uint64_t 4977c478bd9Sstevel@tonic-gate pci_config_get64(ddi_acc_handle_t handle, off_t offset) 4987c478bd9Sstevel@tonic-gate { 4997c478bd9Sstevel@tonic-gate caddr_t cfgaddr; 5007c478bd9Sstevel@tonic-gate ddi_acc_hdl_t *hp; 5017c478bd9Sstevel@tonic-gate 5027c478bd9Sstevel@tonic-gate hp = impl_acc_hdl_get(handle); 5037c478bd9Sstevel@tonic-gate cfgaddr = hp->ah_addr + offset; 5047c478bd9Sstevel@tonic-gate return (ddi_get64(handle, (uint64_t *)cfgaddr)); 5057c478bd9Sstevel@tonic-gate } 5067c478bd9Sstevel@tonic-gate 5077c478bd9Sstevel@tonic-gate void 5087c478bd9Sstevel@tonic-gate pci_config_put8(ddi_acc_handle_t handle, off_t offset, uint8_t value) 5097c478bd9Sstevel@tonic-gate { 5107c478bd9Sstevel@tonic-gate caddr_t cfgaddr; 5117c478bd9Sstevel@tonic-gate ddi_acc_hdl_t *hp; 5127c478bd9Sstevel@tonic-gate 5137c478bd9Sstevel@tonic-gate hp = impl_acc_hdl_get(handle); 5147c478bd9Sstevel@tonic-gate cfgaddr = hp->ah_addr + offset; 5157c478bd9Sstevel@tonic-gate ddi_put8(handle, (uint8_t *)cfgaddr, value); 5167c478bd9Sstevel@tonic-gate } 5177c478bd9Sstevel@tonic-gate 5187c478bd9Sstevel@tonic-gate void 5197c478bd9Sstevel@tonic-gate pci_config_put16(ddi_acc_handle_t handle, off_t offset, uint16_t value) 5207c478bd9Sstevel@tonic-gate { 5217c478bd9Sstevel@tonic-gate caddr_t cfgaddr; 5227c478bd9Sstevel@tonic-gate ddi_acc_hdl_t *hp; 5237c478bd9Sstevel@tonic-gate 5247c478bd9Sstevel@tonic-gate hp = impl_acc_hdl_get(handle); 5257c478bd9Sstevel@tonic-gate cfgaddr = hp->ah_addr + offset; 5267c478bd9Sstevel@tonic-gate ddi_put16(handle, (uint16_t *)cfgaddr, value); 5277c478bd9Sstevel@tonic-gate } 5287c478bd9Sstevel@tonic-gate 5297c478bd9Sstevel@tonic-gate void 5307c478bd9Sstevel@tonic-gate pci_config_put32(ddi_acc_handle_t handle, off_t offset, uint32_t value) 5317c478bd9Sstevel@tonic-gate { 5327c478bd9Sstevel@tonic-gate caddr_t cfgaddr; 5337c478bd9Sstevel@tonic-gate ddi_acc_hdl_t *hp; 5347c478bd9Sstevel@tonic-gate 5357c478bd9Sstevel@tonic-gate hp = impl_acc_hdl_get(handle); 5367c478bd9Sstevel@tonic-gate cfgaddr = hp->ah_addr + offset; 5377c478bd9Sstevel@tonic-gate ddi_put32(handle, (uint32_t *)cfgaddr, value); 5387c478bd9Sstevel@tonic-gate } 5397c478bd9Sstevel@tonic-gate 5407c478bd9Sstevel@tonic-gate void 5417c478bd9Sstevel@tonic-gate pci_config_put64(ddi_acc_handle_t handle, off_t offset, uint64_t value) 542*4ab75253Smrj { 543*4ab75253Smrj caddr_t cfgaddr; 544*4ab75253Smrj ddi_acc_hdl_t *hp; 545*4ab75253Smrj 546*4ab75253Smrj hp = impl_acc_hdl_get(handle); 547*4ab75253Smrj cfgaddr = hp->ah_addr + offset; 548*4ab75253Smrj ddi_put64(handle, (uint64_t *)cfgaddr, value); 549*4ab75253Smrj } 550*4ab75253Smrj 551*4ab75253Smrj /* 552*4ab75253Smrj * We need to separate the old interfaces from the new ones and leave them 553*4ab75253Smrj * in here for a while. Previous versions of the OS defined the new interfaces 554*4ab75253Smrj * to the old interfaces. This way we can fix things up so that we can 555*4ab75253Smrj * eventually remove these interfaces. 556*4ab75253Smrj * e.g. A 3rd party module/driver using pci_config_get8 and built against S10 557*4ab75253Smrj * or earlier will actually have a reference to pci_config_getb in the binary. 558*4ab75253Smrj */ 559*4ab75253Smrj #ifdef _ILP32 560*4ab75253Smrj uint8_t 561*4ab75253Smrj pci_config_getb(ddi_acc_handle_t handle, off_t offset) 562*4ab75253Smrj { 563*4ab75253Smrj caddr_t cfgaddr; 564*4ab75253Smrj ddi_acc_hdl_t *hp; 565*4ab75253Smrj 566*4ab75253Smrj hp = impl_acc_hdl_get(handle); 567*4ab75253Smrj cfgaddr = hp->ah_addr + offset; 568*4ab75253Smrj return (ddi_get8(handle, (uint8_t *)cfgaddr)); 569*4ab75253Smrj } 570*4ab75253Smrj 571*4ab75253Smrj uint16_t 572*4ab75253Smrj pci_config_getw(ddi_acc_handle_t handle, off_t offset) 573*4ab75253Smrj { 574*4ab75253Smrj caddr_t cfgaddr; 575*4ab75253Smrj ddi_acc_hdl_t *hp; 576*4ab75253Smrj 577*4ab75253Smrj hp = impl_acc_hdl_get(handle); 578*4ab75253Smrj cfgaddr = hp->ah_addr + offset; 579*4ab75253Smrj return (ddi_get16(handle, (uint16_t *)cfgaddr)); 580*4ab75253Smrj } 581*4ab75253Smrj 582*4ab75253Smrj uint32_t 583*4ab75253Smrj pci_config_getl(ddi_acc_handle_t handle, off_t offset) 584*4ab75253Smrj { 585*4ab75253Smrj caddr_t cfgaddr; 586*4ab75253Smrj ddi_acc_hdl_t *hp; 587*4ab75253Smrj 588*4ab75253Smrj hp = impl_acc_hdl_get(handle); 589*4ab75253Smrj cfgaddr = hp->ah_addr + offset; 590*4ab75253Smrj return (ddi_get32(handle, (uint32_t *)cfgaddr)); 591*4ab75253Smrj } 592*4ab75253Smrj 593*4ab75253Smrj uint64_t 594*4ab75253Smrj pci_config_getll(ddi_acc_handle_t handle, off_t offset) 595*4ab75253Smrj { 596*4ab75253Smrj caddr_t cfgaddr; 597*4ab75253Smrj ddi_acc_hdl_t *hp; 598*4ab75253Smrj 599*4ab75253Smrj hp = impl_acc_hdl_get(handle); 600*4ab75253Smrj cfgaddr = hp->ah_addr + offset; 601*4ab75253Smrj return (ddi_get64(handle, (uint64_t *)cfgaddr)); 602*4ab75253Smrj } 603*4ab75253Smrj 604*4ab75253Smrj void 605*4ab75253Smrj pci_config_putb(ddi_acc_handle_t handle, off_t offset, uint8_t value) 606*4ab75253Smrj { 607*4ab75253Smrj caddr_t cfgaddr; 608*4ab75253Smrj ddi_acc_hdl_t *hp; 609*4ab75253Smrj 610*4ab75253Smrj hp = impl_acc_hdl_get(handle); 611*4ab75253Smrj cfgaddr = hp->ah_addr + offset; 612*4ab75253Smrj ddi_put8(handle, (uint8_t *)cfgaddr, value); 613*4ab75253Smrj } 614*4ab75253Smrj 615*4ab75253Smrj void 616*4ab75253Smrj pci_config_putw(ddi_acc_handle_t handle, off_t offset, uint16_t value) 617*4ab75253Smrj { 618*4ab75253Smrj caddr_t cfgaddr; 619*4ab75253Smrj ddi_acc_hdl_t *hp; 620*4ab75253Smrj 621*4ab75253Smrj hp = impl_acc_hdl_get(handle); 622*4ab75253Smrj cfgaddr = hp->ah_addr + offset; 623*4ab75253Smrj ddi_put16(handle, (uint16_t *)cfgaddr, value); 624*4ab75253Smrj } 625*4ab75253Smrj 626*4ab75253Smrj void 627*4ab75253Smrj pci_config_putl(ddi_acc_handle_t handle, off_t offset, uint32_t value) 628*4ab75253Smrj { 629*4ab75253Smrj caddr_t cfgaddr; 630*4ab75253Smrj ddi_acc_hdl_t *hp; 631*4ab75253Smrj 632*4ab75253Smrj hp = impl_acc_hdl_get(handle); 633*4ab75253Smrj cfgaddr = hp->ah_addr + offset; 634*4ab75253Smrj ddi_put32(handle, (uint32_t *)cfgaddr, value); 635*4ab75253Smrj } 636*4ab75253Smrj 6377c478bd9Sstevel@tonic-gate void 6387c478bd9Sstevel@tonic-gate pci_config_putll(ddi_acc_handle_t handle, off_t offset, uint64_t value) 6397c478bd9Sstevel@tonic-gate { 6407c478bd9Sstevel@tonic-gate caddr_t cfgaddr; 6417c478bd9Sstevel@tonic-gate ddi_acc_hdl_t *hp; 6427c478bd9Sstevel@tonic-gate 6437c478bd9Sstevel@tonic-gate hp = impl_acc_hdl_get(handle); 6447c478bd9Sstevel@tonic-gate cfgaddr = hp->ah_addr + offset; 6457c478bd9Sstevel@tonic-gate ddi_put64(handle, (uint64_t *)cfgaddr, value); 6467c478bd9Sstevel@tonic-gate } 647*4ab75253Smrj #endif /* _ILP32 */ 6487c478bd9Sstevel@tonic-gate 6497c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 6507c478bd9Sstevel@tonic-gate int 6517c478bd9Sstevel@tonic-gate pci_report_pmcap(dev_info_t *dip, int cap, void *arg) 6527c478bd9Sstevel@tonic-gate { 6537c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 6547c478bd9Sstevel@tonic-gate } 6557c478bd9Sstevel@tonic-gate 6567c478bd9Sstevel@tonic-gate /* 6577c478bd9Sstevel@tonic-gate * Note about saving and restoring config space. 6587c478bd9Sstevel@tonic-gate * PCI devices have only upto 256 bytes of config space while PCI Express 6597c478bd9Sstevel@tonic-gate * devices can have upto 4k config space. In case of PCI Express device, 6607c478bd9Sstevel@tonic-gate * we save all 4k config space and restore it even if it doesn't make use 6617c478bd9Sstevel@tonic-gate * of all 4k. But some devices don't respond to reads to non-existent 6627c478bd9Sstevel@tonic-gate * registers within the config space. To avoid any panics, we use ddi_peek 6637c478bd9Sstevel@tonic-gate * to do the reads. A bit mask is used to indicate which words of the 6647c478bd9Sstevel@tonic-gate * config space are accessible. While restoring the config space, only those 6657c478bd9Sstevel@tonic-gate * readable words are restored. We do all this in 32 bit size words. 6667c478bd9Sstevel@tonic-gate */ 6677c478bd9Sstevel@tonic-gate #define INDEX_SHIFT 3 6687c478bd9Sstevel@tonic-gate #define BITMASK 0x7 6697c478bd9Sstevel@tonic-gate 6707c478bd9Sstevel@tonic-gate static uint32_t pci_save_caps(ddi_acc_handle_t confhdl, uint32_t *regbuf, 6717c478bd9Sstevel@tonic-gate pci_cap_save_desc_t *cap_descp, uint32_t *ncapsp); 6727c478bd9Sstevel@tonic-gate static void pci_restore_caps(ddi_acc_handle_t confhdl, uint32_t *regbuf, 6737c478bd9Sstevel@tonic-gate pci_cap_save_desc_t *cap_descp, uint32_t elements); 6747c478bd9Sstevel@tonic-gate static uint32_t pci_generic_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, 6757c478bd9Sstevel@tonic-gate uint32_t *regbuf, uint32_t nwords); 6767c478bd9Sstevel@tonic-gate static uint32_t pci_msi_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, 6777c478bd9Sstevel@tonic-gate uint32_t *regbuf, uint32_t notused); 6787c478bd9Sstevel@tonic-gate static uint32_t pci_pcix_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, 6797c478bd9Sstevel@tonic-gate uint32_t *regbuf, uint32_t notused); 6807c478bd9Sstevel@tonic-gate static uint32_t pci_pcie_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, 6817c478bd9Sstevel@tonic-gate uint32_t *regbuf, uint32_t notused); 6827c478bd9Sstevel@tonic-gate static void pci_fill_buf(ddi_acc_handle_t confhdl, uint16_t cap_ptr, 6837c478bd9Sstevel@tonic-gate uint32_t *regbuf, uint32_t nwords); 6847c478bd9Sstevel@tonic-gate static uint32_t cap_walk_and_save(ddi_acc_handle_t confhdl, uint32_t *regbuf, 6857c478bd9Sstevel@tonic-gate pci_cap_save_desc_t *cap_descp, uint32_t *ncapsp, int xspace); 6867c478bd9Sstevel@tonic-gate static void pci_pmcap_check(ddi_acc_handle_t confhdl, uint32_t *regbuf, 6877c478bd9Sstevel@tonic-gate uint16_t pmcap_offset); 6887c478bd9Sstevel@tonic-gate 6897c478bd9Sstevel@tonic-gate /* 6907c478bd9Sstevel@tonic-gate * Table below specifies the number of registers to be saved for each PCI 6917c478bd9Sstevel@tonic-gate * capability. pci_generic_save saves the number of words specified in the 6927c478bd9Sstevel@tonic-gate * table. Any special considerations will be taken care by the capability 6937c478bd9Sstevel@tonic-gate * specific save function e.g. use pci_msi_save to save registers associated 6947c478bd9Sstevel@tonic-gate * with MSI capability. PCI_UNKNOWN_SIZE indicates that number of registers 6957c478bd9Sstevel@tonic-gate * to be saved is variable and will be determined by the specific save function. 6967c478bd9Sstevel@tonic-gate * Currently we save/restore all the registers associated with the capability 6977c478bd9Sstevel@tonic-gate * including read only registers. Regsiters are saved and restored in 32 bit 6987c478bd9Sstevel@tonic-gate * size words. 6997c478bd9Sstevel@tonic-gate */ 7007c478bd9Sstevel@tonic-gate static pci_cap_entry_t pci_cap_table[] = { 7017c478bd9Sstevel@tonic-gate {PCI_CAP_ID_PM, PCI_PMCAP_NDWORDS, pci_generic_save}, 7027c478bd9Sstevel@tonic-gate {PCI_CAP_ID_AGP, PCI_AGP_NDWORDS, pci_generic_save}, 7037c478bd9Sstevel@tonic-gate {PCI_CAP_ID_SLOT_ID, PCI_SLOTID_NDWORDS, pci_generic_save}, 7047c478bd9Sstevel@tonic-gate {PCI_CAP_ID_MSI_X, PCI_MSIX_NDWORDS, pci_generic_save}, 7057c478bd9Sstevel@tonic-gate {PCI_CAP_ID_MSI, PCI_CAP_SZUNKNOWN, pci_msi_save}, 7067c478bd9Sstevel@tonic-gate {PCI_CAP_ID_PCIX, PCI_CAP_SZUNKNOWN, pci_pcix_save}, 7077c478bd9Sstevel@tonic-gate {PCI_CAP_ID_PCI_E, PCI_CAP_SZUNKNOWN, pci_pcie_save}, 7087c478bd9Sstevel@tonic-gate /* 7097c478bd9Sstevel@tonic-gate * {PCI_CAP_ID_cPCI_CRC, 0, NULL}, 7107c478bd9Sstevel@tonic-gate * {PCI_CAP_ID_VPD, 0, NULL}, 7117c478bd9Sstevel@tonic-gate * {PCI_CAP_ID_cPCI_HS, 0, NULL}, 7127c478bd9Sstevel@tonic-gate * {PCI_CAP_ID_PCI_HOTPLUG, 0, NULL}, 7137c478bd9Sstevel@tonic-gate * {PCI_CAP_ID_AGP_8X, 0, NULL}, 7147c478bd9Sstevel@tonic-gate * {PCI_CAP_ID_SECURE_DEV, 0, NULL}, 7157c478bd9Sstevel@tonic-gate */ 7167c478bd9Sstevel@tonic-gate {PCI_CAP_NEXT_PTR_NULL, 0, NULL} 7177c478bd9Sstevel@tonic-gate }; 7187c478bd9Sstevel@tonic-gate 7197c478bd9Sstevel@tonic-gate /* 7207c478bd9Sstevel@tonic-gate * Save the configuration registers for cdip as a property 7217c478bd9Sstevel@tonic-gate * so that it persists after detach/uninitchild. 7227c478bd9Sstevel@tonic-gate */ 7237c478bd9Sstevel@tonic-gate int 7247c478bd9Sstevel@tonic-gate pci_save_config_regs(dev_info_t *dip) 7257c478bd9Sstevel@tonic-gate { 7267c478bd9Sstevel@tonic-gate ddi_acc_handle_t confhdl; 7277c478bd9Sstevel@tonic-gate pci_config_header_state_t *chsp; 7287c478bd9Sstevel@tonic-gate pci_cap_save_desc_t *pci_cap_descp; 7297c478bd9Sstevel@tonic-gate int ret; 7307c478bd9Sstevel@tonic-gate uint32_t i, ncaps, nwords; 7317c478bd9Sstevel@tonic-gate uint32_t *regbuf, *p; 7327c478bd9Sstevel@tonic-gate uint8_t *maskbuf; 7337c478bd9Sstevel@tonic-gate size_t maskbufsz, regbufsz, capbufsz; 7347c478bd9Sstevel@tonic-gate ddi_acc_hdl_t *hp; 7357c478bd9Sstevel@tonic-gate off_t offset = 0; 7367c478bd9Sstevel@tonic-gate uint8_t cap_ptr, cap_id; 7377c478bd9Sstevel@tonic-gate int pcie = 0; 7387c478bd9Sstevel@tonic-gate 7397c478bd9Sstevel@tonic-gate if (pci_config_setup(dip, &confhdl) != DDI_SUCCESS) { 7407c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d can't get config handle", 7417c478bd9Sstevel@tonic-gate ddi_driver_name(dip), ddi_get_instance(dip)); 7427c478bd9Sstevel@tonic-gate 7437c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 7447c478bd9Sstevel@tonic-gate } 7457c478bd9Sstevel@tonic-gate /* 7467c478bd9Sstevel@tonic-gate * Determine if it is a pci express device. If it is, save entire 7477c478bd9Sstevel@tonic-gate * 4k config space treating it as a array of 32 bit integers. 7487c478bd9Sstevel@tonic-gate * If it is not, do it in a usual PCI way. 7497c478bd9Sstevel@tonic-gate */ 7507c478bd9Sstevel@tonic-gate cap_ptr = pci_config_get8(confhdl, PCI_BCNF_CAP_PTR); 7517c478bd9Sstevel@tonic-gate /* 7527c478bd9Sstevel@tonic-gate * Walk the capabilities searching for pci express capability 7537c478bd9Sstevel@tonic-gate */ 7547c478bd9Sstevel@tonic-gate while (cap_ptr != PCI_CAP_NEXT_PTR_NULL) { 7557c478bd9Sstevel@tonic-gate cap_id = pci_config_get8(confhdl, 7567c478bd9Sstevel@tonic-gate cap_ptr + PCI_CAP_ID); 7577c478bd9Sstevel@tonic-gate if (cap_id == PCI_CAP_ID_PCI_E) { 7587c478bd9Sstevel@tonic-gate pcie = 1; 7597c478bd9Sstevel@tonic-gate break; 7607c478bd9Sstevel@tonic-gate } 7617c478bd9Sstevel@tonic-gate cap_ptr = pci_config_get8(confhdl, 7627c478bd9Sstevel@tonic-gate cap_ptr + PCI_CAP_NEXT_PTR); 7637c478bd9Sstevel@tonic-gate } 7647c478bd9Sstevel@tonic-gate 7657c478bd9Sstevel@tonic-gate if (pcie) { 7667c478bd9Sstevel@tonic-gate /* PCI express device. Can have data in all 4k space */ 7677c478bd9Sstevel@tonic-gate regbuf = (uint32_t *)kmem_zalloc((size_t)PCIE_CONF_HDR_SIZE, 7687c478bd9Sstevel@tonic-gate KM_SLEEP); 7697c478bd9Sstevel@tonic-gate p = regbuf; 7707c478bd9Sstevel@tonic-gate /* 7717c478bd9Sstevel@tonic-gate * Allocate space for mask. 7727c478bd9Sstevel@tonic-gate * mask size is 128 bytes (4096 / 4 / 8 ) 7737c478bd9Sstevel@tonic-gate */ 7747c478bd9Sstevel@tonic-gate maskbufsz = (size_t)((PCIE_CONF_HDR_SIZE/ sizeof (uint32_t)) >> 7757c478bd9Sstevel@tonic-gate INDEX_SHIFT); 7767c478bd9Sstevel@tonic-gate maskbuf = (uint8_t *)kmem_zalloc(maskbufsz, KM_SLEEP); 7777c478bd9Sstevel@tonic-gate hp = impl_acc_hdl_get(confhdl); 7787c478bd9Sstevel@tonic-gate for (i = 0; i < (PCIE_CONF_HDR_SIZE / sizeof (uint32_t)); i++) { 7797c478bd9Sstevel@tonic-gate if (ddi_peek32(dip, (int32_t *)(hp->ah_addr + offset), 7807c478bd9Sstevel@tonic-gate (int32_t *)p) == DDI_SUCCESS) { 7817c478bd9Sstevel@tonic-gate /* it is readable register. set the bit */ 7827c478bd9Sstevel@tonic-gate maskbuf[i >> INDEX_SHIFT] |= 7837c478bd9Sstevel@tonic-gate (uint8_t)(1 << (i & BITMASK)); 7847c478bd9Sstevel@tonic-gate } 7857c478bd9Sstevel@tonic-gate p++; 7867c478bd9Sstevel@tonic-gate offset += sizeof (uint32_t); 7877c478bd9Sstevel@tonic-gate } 7887c478bd9Sstevel@tonic-gate 7897c478bd9Sstevel@tonic-gate if ((ret = ndi_prop_update_byte_array(DDI_DEV_T_NONE, dip, 7907c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS_MASK, (uchar_t *)maskbuf, 7917c478bd9Sstevel@tonic-gate maskbufsz)) != DDI_PROP_SUCCESS) { 7927c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "couldn't create %s property while" 7937c478bd9Sstevel@tonic-gate "saving config space for %s@%d\n", 7947c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS_MASK, ddi_driver_name(dip), 7957c478bd9Sstevel@tonic-gate ddi_get_instance(dip)); 7967c478bd9Sstevel@tonic-gate } else if ((ret = ndi_prop_update_byte_array(DDI_DEV_T_NONE, 7977c478bd9Sstevel@tonic-gate dip, SAVED_CONFIG_REGS, (uchar_t *)regbuf, 7987c478bd9Sstevel@tonic-gate (size_t)PCIE_CONF_HDR_SIZE)) != DDI_PROP_SUCCESS) { 7997c478bd9Sstevel@tonic-gate (void) ddi_prop_remove(DDI_DEV_T_NONE, dip, 8007c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS_MASK); 8017c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d can't update prop %s", 8027c478bd9Sstevel@tonic-gate ddi_driver_name(dip), ddi_get_instance(dip), 8037c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS); 8047c478bd9Sstevel@tonic-gate } 8057c478bd9Sstevel@tonic-gate 8067c478bd9Sstevel@tonic-gate kmem_free(maskbuf, (size_t)maskbufsz); 8077c478bd9Sstevel@tonic-gate kmem_free(regbuf, (size_t)PCIE_CONF_HDR_SIZE); 8087c478bd9Sstevel@tonic-gate } else { 8097c478bd9Sstevel@tonic-gate regbuf = (uint32_t *)kmem_zalloc((size_t)PCI_CONF_HDR_SIZE, 8107c478bd9Sstevel@tonic-gate KM_SLEEP); 8117c478bd9Sstevel@tonic-gate chsp = (pci_config_header_state_t *)regbuf; 8127c478bd9Sstevel@tonic-gate 8137c478bd9Sstevel@tonic-gate chsp->chs_command = pci_config_get16(confhdl, PCI_CONF_COMM); 8147c478bd9Sstevel@tonic-gate chsp->chs_header_type = pci_config_get8(confhdl, 8157c478bd9Sstevel@tonic-gate PCI_CONF_HEADER); 8167c478bd9Sstevel@tonic-gate if ((chsp->chs_header_type & PCI_HEADER_TYPE_M) == 8177c478bd9Sstevel@tonic-gate PCI_HEADER_ONE) 8187c478bd9Sstevel@tonic-gate chsp->chs_bridge_control = 8197c478bd9Sstevel@tonic-gate pci_config_get16(confhdl, PCI_BCNF_BCNTRL); 8207c478bd9Sstevel@tonic-gate chsp->chs_cache_line_size = pci_config_get8(confhdl, 8217c478bd9Sstevel@tonic-gate PCI_CONF_CACHE_LINESZ); 8227c478bd9Sstevel@tonic-gate chsp->chs_latency_timer = pci_config_get8(confhdl, 8237c478bd9Sstevel@tonic-gate PCI_CONF_LATENCY_TIMER); 8247c478bd9Sstevel@tonic-gate if ((chsp->chs_header_type & PCI_HEADER_TYPE_M) == 8257c478bd9Sstevel@tonic-gate PCI_HEADER_ONE) { 8267c478bd9Sstevel@tonic-gate chsp->chs_sec_latency_timer = 8277c478bd9Sstevel@tonic-gate pci_config_get8(confhdl, PCI_BCNF_LATENCY_TIMER); 8287c478bd9Sstevel@tonic-gate } 8297c478bd9Sstevel@tonic-gate 8307c478bd9Sstevel@tonic-gate chsp->chs_base0 = pci_config_get32(confhdl, PCI_CONF_BASE0); 8317c478bd9Sstevel@tonic-gate chsp->chs_base1 = pci_config_get32(confhdl, PCI_CONF_BASE1); 8327c478bd9Sstevel@tonic-gate chsp->chs_base2 = pci_config_get32(confhdl, PCI_CONF_BASE2); 8337c478bd9Sstevel@tonic-gate chsp->chs_base3 = pci_config_get32(confhdl, PCI_CONF_BASE3); 8347c478bd9Sstevel@tonic-gate chsp->chs_base4 = pci_config_get32(confhdl, PCI_CONF_BASE4); 8357c478bd9Sstevel@tonic-gate chsp->chs_base5 = pci_config_get32(confhdl, PCI_CONF_BASE5); 8367c478bd9Sstevel@tonic-gate 8377c478bd9Sstevel@tonic-gate /* 8387c478bd9Sstevel@tonic-gate * Allocate maximum space required for capability descriptions. 8397c478bd9Sstevel@tonic-gate * The maximum number of capabilties saved is the number of 8407c478bd9Sstevel@tonic-gate * capabilities listed in the pci_cap_table. 8417c478bd9Sstevel@tonic-gate */ 8427c478bd9Sstevel@tonic-gate ncaps = (sizeof (pci_cap_table) / sizeof (pci_cap_entry_t)); 8437c478bd9Sstevel@tonic-gate capbufsz = ncaps * sizeof (pci_cap_save_desc_t); 8447c478bd9Sstevel@tonic-gate pci_cap_descp = (pci_cap_save_desc_t *)kmem_zalloc( 8457c478bd9Sstevel@tonic-gate capbufsz, KM_SLEEP); 8467c478bd9Sstevel@tonic-gate p = (uint32_t *)((caddr_t)regbuf + 8477c478bd9Sstevel@tonic-gate sizeof (pci_config_header_state_t)); 8487c478bd9Sstevel@tonic-gate nwords = pci_save_caps(confhdl, p, pci_cap_descp, &ncaps); 8497c478bd9Sstevel@tonic-gate regbufsz = sizeof (pci_config_header_state_t) + 8507c478bd9Sstevel@tonic-gate nwords * sizeof (uint32_t); 8517c478bd9Sstevel@tonic-gate 8527c478bd9Sstevel@tonic-gate if ((ret = ndi_prop_update_byte_array(DDI_DEV_T_NONE, dip, 8537c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS, (uchar_t *)regbuf, regbufsz)) != 8547c478bd9Sstevel@tonic-gate DDI_PROP_SUCCESS) { 8557c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d can't update prop %s", 8567c478bd9Sstevel@tonic-gate ddi_driver_name(dip), ddi_get_instance(dip), 8577c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS); 8587c478bd9Sstevel@tonic-gate } else if (ncaps) { 8597c478bd9Sstevel@tonic-gate ret = ndi_prop_update_byte_array(DDI_DEV_T_NONE, dip, 8607c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS_CAPINFO, (uchar_t *)pci_cap_descp, 8617c478bd9Sstevel@tonic-gate ncaps * sizeof (pci_cap_save_desc_t)); 8627c478bd9Sstevel@tonic-gate if (ret != DDI_PROP_SUCCESS) 8637c478bd9Sstevel@tonic-gate (void) ddi_prop_remove(DDI_DEV_T_NONE, dip, 8647c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS); 8657c478bd9Sstevel@tonic-gate } 8667c478bd9Sstevel@tonic-gate kmem_free(regbuf, (size_t)PCI_CONF_HDR_SIZE); 8677c478bd9Sstevel@tonic-gate kmem_free(pci_cap_descp, capbufsz); 8687c478bd9Sstevel@tonic-gate } 8697c478bd9Sstevel@tonic-gate pci_config_teardown(&confhdl); 8707c478bd9Sstevel@tonic-gate 8717c478bd9Sstevel@tonic-gate if (ret != DDI_PROP_SUCCESS) 8727c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 8737c478bd9Sstevel@tonic-gate 8747c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 8757c478bd9Sstevel@tonic-gate } 8767c478bd9Sstevel@tonic-gate 8777c478bd9Sstevel@tonic-gate /* 8787c478bd9Sstevel@tonic-gate * Saves registers associated with PCI capabilities. 8797c478bd9Sstevel@tonic-gate * Returns number of 32 bit words saved. 8807c478bd9Sstevel@tonic-gate * Number of capabilities saved is returned in ncapsp. 8817c478bd9Sstevel@tonic-gate */ 8827c478bd9Sstevel@tonic-gate static uint32_t 8837c478bd9Sstevel@tonic-gate pci_save_caps(ddi_acc_handle_t confhdl, uint32_t *regbuf, 8847c478bd9Sstevel@tonic-gate pci_cap_save_desc_t *cap_descp, uint32_t *ncapsp) 8857c478bd9Sstevel@tonic-gate { 8867c478bd9Sstevel@tonic-gate return (cap_walk_and_save(confhdl, regbuf, cap_descp, ncapsp, 0)); 8877c478bd9Sstevel@tonic-gate } 8887c478bd9Sstevel@tonic-gate 8897c478bd9Sstevel@tonic-gate static uint32_t 8907c478bd9Sstevel@tonic-gate cap_walk_and_save(ddi_acc_handle_t confhdl, uint32_t *regbuf, 8917c478bd9Sstevel@tonic-gate pci_cap_save_desc_t *cap_descp, uint32_t *ncapsp, int xspace) 8927c478bd9Sstevel@tonic-gate { 8937c478bd9Sstevel@tonic-gate pci_cap_entry_t *pci_cap_entp; 8947c478bd9Sstevel@tonic-gate uint16_t cap_id, offset; 8957c478bd9Sstevel@tonic-gate uint32_t words_saved = 0, nwords = 0; 8967c478bd9Sstevel@tonic-gate uint16_t cap_ptr = PCI_CAP_NEXT_PTR_NULL; 8977c478bd9Sstevel@tonic-gate 8987c478bd9Sstevel@tonic-gate *ncapsp = 0; 8997c478bd9Sstevel@tonic-gate if (!xspace) 9007c478bd9Sstevel@tonic-gate cap_ptr = pci_config_get8(confhdl, PCI_BCNF_CAP_PTR); 9017c478bd9Sstevel@tonic-gate /* 9027c478bd9Sstevel@tonic-gate * Walk the capabilities 9037c478bd9Sstevel@tonic-gate */ 9047c478bd9Sstevel@tonic-gate while (cap_ptr != PCI_CAP_NEXT_PTR_NULL) { 9057c478bd9Sstevel@tonic-gate cap_id = CAP_ID(confhdl, cap_ptr, xspace); 9067c478bd9Sstevel@tonic-gate /* Search for this cap id in our table */ 9077c478bd9Sstevel@tonic-gate if (!xspace) 9087c478bd9Sstevel@tonic-gate pci_cap_entp = pci_cap_table; 9097c478bd9Sstevel@tonic-gate while (pci_cap_entp->cap_id != PCI_CAP_NEXT_PTR_NULL && 9107c478bd9Sstevel@tonic-gate pci_cap_entp->cap_id != cap_id) 9117c478bd9Sstevel@tonic-gate pci_cap_entp++; 9127c478bd9Sstevel@tonic-gate 9137c478bd9Sstevel@tonic-gate offset = cap_ptr; 9147c478bd9Sstevel@tonic-gate cap_ptr = NEXT_CAP(confhdl, cap_ptr, xspace); 9157c478bd9Sstevel@tonic-gate /* 9167c478bd9Sstevel@tonic-gate * If this cap id is not found in the table, there is nothing 9177c478bd9Sstevel@tonic-gate * to save. 9187c478bd9Sstevel@tonic-gate */ 9197c478bd9Sstevel@tonic-gate if (pci_cap_entp->cap_id == PCI_CAP_NEXT_PTR_NULL) 9207c478bd9Sstevel@tonic-gate continue; 9217c478bd9Sstevel@tonic-gate if (pci_cap_entp->cap_save_func) { 9227c478bd9Sstevel@tonic-gate if ((nwords = pci_cap_entp->cap_save_func(confhdl, 9237c478bd9Sstevel@tonic-gate offset, regbuf, pci_cap_entp->cap_ndwords))) { 9247c478bd9Sstevel@tonic-gate cap_descp->cap_nregs = nwords; 9257c478bd9Sstevel@tonic-gate cap_descp->cap_offset = offset; 9267c478bd9Sstevel@tonic-gate cap_descp->cap_id = cap_id; 9277c478bd9Sstevel@tonic-gate regbuf += nwords; 9287c478bd9Sstevel@tonic-gate cap_descp++; 9297c478bd9Sstevel@tonic-gate words_saved += nwords; 9307c478bd9Sstevel@tonic-gate (*ncapsp)++; 9317c478bd9Sstevel@tonic-gate } 9327c478bd9Sstevel@tonic-gate } 9337c478bd9Sstevel@tonic-gate 9347c478bd9Sstevel@tonic-gate } 9357c478bd9Sstevel@tonic-gate return (words_saved); 9367c478bd9Sstevel@tonic-gate } 9377c478bd9Sstevel@tonic-gate 9387c478bd9Sstevel@tonic-gate static void 9397c478bd9Sstevel@tonic-gate pci_fill_buf(ddi_acc_handle_t confhdl, uint16_t cap_ptr, 9407c478bd9Sstevel@tonic-gate uint32_t *regbuf, uint32_t nwords) 9417c478bd9Sstevel@tonic-gate { 9427c478bd9Sstevel@tonic-gate int i; 9437c478bd9Sstevel@tonic-gate 9447c478bd9Sstevel@tonic-gate for (i = 0; i < nwords; i++) { 9457c478bd9Sstevel@tonic-gate *regbuf = pci_config_get32(confhdl, cap_ptr); 9467c478bd9Sstevel@tonic-gate regbuf++; 9477c478bd9Sstevel@tonic-gate cap_ptr += 4; 9487c478bd9Sstevel@tonic-gate } 9497c478bd9Sstevel@tonic-gate } 9507c478bd9Sstevel@tonic-gate 9517c478bd9Sstevel@tonic-gate static uint32_t 9527c478bd9Sstevel@tonic-gate pci_generic_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, uint32_t *regbuf, 9537c478bd9Sstevel@tonic-gate uint32_t nwords) 9547c478bd9Sstevel@tonic-gate { 9557c478bd9Sstevel@tonic-gate pci_fill_buf(confhdl, cap_ptr, regbuf, nwords); 9567c478bd9Sstevel@tonic-gate return (nwords); 9577c478bd9Sstevel@tonic-gate } 9587c478bd9Sstevel@tonic-gate 9597c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 9607c478bd9Sstevel@tonic-gate static uint32_t 9617c478bd9Sstevel@tonic-gate pci_msi_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, uint32_t *regbuf, 9627c478bd9Sstevel@tonic-gate uint32_t notused) 9637c478bd9Sstevel@tonic-gate { 9647c478bd9Sstevel@tonic-gate uint32_t nwords = PCI_MSI_MIN_WORDS; 9657c478bd9Sstevel@tonic-gate uint16_t msi_ctrl; 9667c478bd9Sstevel@tonic-gate 9677c478bd9Sstevel@tonic-gate /* Figure out how many registers to be saved */ 9687c478bd9Sstevel@tonic-gate msi_ctrl = pci_config_get16(confhdl, cap_ptr + PCI_MSI_CTRL); 9697c478bd9Sstevel@tonic-gate /* If 64 bit address capable add one word */ 9707c478bd9Sstevel@tonic-gate if (msi_ctrl & PCI_MSI_64BIT_MASK) 9717c478bd9Sstevel@tonic-gate nwords++; 9727c478bd9Sstevel@tonic-gate /* If per vector masking capable, add two more words */ 9737c478bd9Sstevel@tonic-gate if (msi_ctrl & PCI_MSI_PVM_MASK) 9747c478bd9Sstevel@tonic-gate nwords += 2; 9757c478bd9Sstevel@tonic-gate pci_fill_buf(confhdl, cap_ptr, regbuf, nwords); 9767c478bd9Sstevel@tonic-gate 9777c478bd9Sstevel@tonic-gate return (nwords); 9787c478bd9Sstevel@tonic-gate } 9797c478bd9Sstevel@tonic-gate 9807c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 9817c478bd9Sstevel@tonic-gate static uint32_t 9827c478bd9Sstevel@tonic-gate pci_pcix_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, uint32_t *regbuf, 9837c478bd9Sstevel@tonic-gate uint32_t notused) 9847c478bd9Sstevel@tonic-gate { 9857c478bd9Sstevel@tonic-gate uint32_t nwords = PCI_PCIX_MIN_WORDS; 9867c478bd9Sstevel@tonic-gate uint16_t pcix_command; 9877c478bd9Sstevel@tonic-gate 9887c478bd9Sstevel@tonic-gate /* Figure out how many registers to be saved */ 9897c478bd9Sstevel@tonic-gate pcix_command = pci_config_get16(confhdl, cap_ptr + PCI_PCIX_COMMAND); 9907c478bd9Sstevel@tonic-gate /* If it is version 1 or version 2, add 4 words */ 9917c478bd9Sstevel@tonic-gate if (((pcix_command & PCI_PCIX_VER_MASK) == PCI_PCIX_VER_1) || 9927c478bd9Sstevel@tonic-gate ((pcix_command & PCI_PCIX_VER_MASK) == PCI_PCIX_VER_2)) 9937c478bd9Sstevel@tonic-gate nwords += 4; 9947c478bd9Sstevel@tonic-gate pci_fill_buf(confhdl, cap_ptr, regbuf, nwords); 9957c478bd9Sstevel@tonic-gate 9967c478bd9Sstevel@tonic-gate return (nwords); 9977c478bd9Sstevel@tonic-gate } 9987c478bd9Sstevel@tonic-gate 9997c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 10007c478bd9Sstevel@tonic-gate static uint32_t 10017c478bd9Sstevel@tonic-gate pci_pcie_save(ddi_acc_handle_t confhdl, uint16_t cap_ptr, uint32_t *regbuf, 10027c478bd9Sstevel@tonic-gate uint32_t notused) 10037c478bd9Sstevel@tonic-gate { 10047c478bd9Sstevel@tonic-gate return (0); 10057c478bd9Sstevel@tonic-gate } 10067c478bd9Sstevel@tonic-gate 10077c478bd9Sstevel@tonic-gate static void 10087c478bd9Sstevel@tonic-gate pci_pmcap_check(ddi_acc_handle_t confhdl, uint32_t *regbuf, 10097c478bd9Sstevel@tonic-gate uint16_t pmcap_offset) 10107c478bd9Sstevel@tonic-gate { 10117c478bd9Sstevel@tonic-gate uint16_t pmcsr; 10127c478bd9Sstevel@tonic-gate uint16_t pmcsr_offset = pmcap_offset + PCI_PMCSR; 10137c478bd9Sstevel@tonic-gate uint32_t *saved_pmcsrp = (uint32_t *)((caddr_t)regbuf + PCI_PMCSR); 10147c478bd9Sstevel@tonic-gate 10157c478bd9Sstevel@tonic-gate /* 10167c478bd9Sstevel@tonic-gate * Copy the power state bits from the PMCSR to our saved copy. 10177c478bd9Sstevel@tonic-gate * This is to make sure that we don't change the D state when 10187c478bd9Sstevel@tonic-gate * we restore config space of the device. 10197c478bd9Sstevel@tonic-gate */ 10207c478bd9Sstevel@tonic-gate pmcsr = pci_config_get16(confhdl, pmcsr_offset); 10217c478bd9Sstevel@tonic-gate (*saved_pmcsrp) &= ~PCI_PMCSR_STATE_MASK; 10227c478bd9Sstevel@tonic-gate (*saved_pmcsrp) |= (pmcsr & PCI_PMCSR_STATE_MASK); 10237c478bd9Sstevel@tonic-gate } 10247c478bd9Sstevel@tonic-gate 10257c478bd9Sstevel@tonic-gate static void 10267c478bd9Sstevel@tonic-gate pci_restore_caps(ddi_acc_handle_t confhdl, uint32_t *regbuf, 10277c478bd9Sstevel@tonic-gate pci_cap_save_desc_t *cap_descp, uint32_t elements) 10287c478bd9Sstevel@tonic-gate { 10297c478bd9Sstevel@tonic-gate int i, j; 10307c478bd9Sstevel@tonic-gate uint16_t offset; 10317c478bd9Sstevel@tonic-gate 10327c478bd9Sstevel@tonic-gate for (i = 0; i < (elements / sizeof (pci_cap_save_desc_t)); i++) { 10337c478bd9Sstevel@tonic-gate offset = cap_descp->cap_offset; 10347c478bd9Sstevel@tonic-gate if (cap_descp->cap_id == PCI_CAP_ID_PM) 10357c478bd9Sstevel@tonic-gate pci_pmcap_check(confhdl, regbuf, offset); 10367c478bd9Sstevel@tonic-gate for (j = 0; j < cap_descp->cap_nregs; j++) { 10377c478bd9Sstevel@tonic-gate pci_config_put32(confhdl, offset, *regbuf); 10387c478bd9Sstevel@tonic-gate regbuf++; 10397c478bd9Sstevel@tonic-gate offset += 4; 10407c478bd9Sstevel@tonic-gate } 10417c478bd9Sstevel@tonic-gate cap_descp++; 10427c478bd9Sstevel@tonic-gate } 10437c478bd9Sstevel@tonic-gate } 10447c478bd9Sstevel@tonic-gate 10457c478bd9Sstevel@tonic-gate /* 10467c478bd9Sstevel@tonic-gate * Restore config_regs from a single devinfo node. 10477c478bd9Sstevel@tonic-gate */ 10487c478bd9Sstevel@tonic-gate int 10497c478bd9Sstevel@tonic-gate pci_restore_config_regs(dev_info_t *dip) 10507c478bd9Sstevel@tonic-gate { 10517c478bd9Sstevel@tonic-gate ddi_acc_handle_t confhdl; 10527c478bd9Sstevel@tonic-gate pci_config_header_state_t *chs_p; 10537c478bd9Sstevel@tonic-gate pci_cap_save_desc_t *cap_descp; 10547c478bd9Sstevel@tonic-gate uint32_t elements, i; 10557c478bd9Sstevel@tonic-gate uint8_t *maskbuf; 10567c478bd9Sstevel@tonic-gate uint32_t *regbuf, *p; 10577c478bd9Sstevel@tonic-gate off_t offset = 0; 10587c478bd9Sstevel@tonic-gate 10597c478bd9Sstevel@tonic-gate if (pci_config_setup(dip, &confhdl) != DDI_SUCCESS) { 10607c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d can't get config handle", 10617c478bd9Sstevel@tonic-gate ddi_driver_name(dip), ddi_get_instance(dip)); 10627c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 10637c478bd9Sstevel@tonic-gate } 10647c478bd9Sstevel@tonic-gate 10657c478bd9Sstevel@tonic-gate if (ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, dip, 10667c478bd9Sstevel@tonic-gate DDI_PROP_DONTPASS | DDI_PROP_NOTPROM, SAVED_CONFIG_REGS_MASK, 10677c478bd9Sstevel@tonic-gate (uchar_t **)&maskbuf, &elements) == DDI_PROP_SUCCESS) { 10687c478bd9Sstevel@tonic-gate 10697c478bd9Sstevel@tonic-gate if (ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, dip, 10707c478bd9Sstevel@tonic-gate DDI_PROP_DONTPASS | DDI_PROP_NOTPROM, SAVED_CONFIG_REGS, 10717c478bd9Sstevel@tonic-gate (uchar_t **)®buf, &elements) != DDI_PROP_SUCCESS) { 10727c478bd9Sstevel@tonic-gate goto restoreconfig_err; 10737c478bd9Sstevel@tonic-gate } 10747c478bd9Sstevel@tonic-gate ASSERT(elements == PCIE_CONF_HDR_SIZE); 10757c478bd9Sstevel@tonic-gate /* pcie device and has 4k config space saved */ 10767c478bd9Sstevel@tonic-gate p = regbuf; 10777c478bd9Sstevel@tonic-gate for (i = 0; i < PCIE_CONF_HDR_SIZE / sizeof (uint32_t); i++) { 10787c478bd9Sstevel@tonic-gate /* If the word is readable then restore it */ 10797c478bd9Sstevel@tonic-gate if (maskbuf[i >> INDEX_SHIFT] & 10807c478bd9Sstevel@tonic-gate (uint8_t)(1 << (i & BITMASK))) 10817c478bd9Sstevel@tonic-gate pci_config_put32(confhdl, offset, *p); 10827c478bd9Sstevel@tonic-gate p++; 10837c478bd9Sstevel@tonic-gate offset += sizeof (uint32_t); 10847c478bd9Sstevel@tonic-gate } 10857c478bd9Sstevel@tonic-gate ddi_prop_free(regbuf); 10867c478bd9Sstevel@tonic-gate ddi_prop_free(maskbuf); 10877c478bd9Sstevel@tonic-gate if (ndi_prop_remove(DDI_DEV_T_NONE, dip, 10887c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS_MASK) != DDI_PROP_SUCCESS) { 10897c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d can't remove prop %s", 10907c478bd9Sstevel@tonic-gate ddi_driver_name(dip), ddi_get_instance(dip), 10917c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS_MASK); 10927c478bd9Sstevel@tonic-gate } 10937c478bd9Sstevel@tonic-gate } else { 10947c478bd9Sstevel@tonic-gate if (ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, dip, 10957c478bd9Sstevel@tonic-gate DDI_PROP_DONTPASS | DDI_PROP_NOTPROM, SAVED_CONFIG_REGS, 10967c478bd9Sstevel@tonic-gate (uchar_t **)®buf, &elements) != DDI_PROP_SUCCESS) { 10977c478bd9Sstevel@tonic-gate 10987c478bd9Sstevel@tonic-gate pci_config_teardown(&confhdl); 10997c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 11007c478bd9Sstevel@tonic-gate } 11017c478bd9Sstevel@tonic-gate 11027c478bd9Sstevel@tonic-gate chs_p = (pci_config_header_state_t *)regbuf; 11037c478bd9Sstevel@tonic-gate pci_config_put16(confhdl, PCI_CONF_COMM, 11047c478bd9Sstevel@tonic-gate chs_p->chs_command); 11057c478bd9Sstevel@tonic-gate if ((chs_p->chs_header_type & PCI_HEADER_TYPE_M) == 11067c478bd9Sstevel@tonic-gate PCI_HEADER_ONE) { 11077c478bd9Sstevel@tonic-gate pci_config_put16(confhdl, PCI_BCNF_BCNTRL, 11087c478bd9Sstevel@tonic-gate chs_p->chs_bridge_control); 11097c478bd9Sstevel@tonic-gate } 11107c478bd9Sstevel@tonic-gate pci_config_put8(confhdl, PCI_CONF_CACHE_LINESZ, 11117c478bd9Sstevel@tonic-gate chs_p->chs_cache_line_size); 11127c478bd9Sstevel@tonic-gate pci_config_put8(confhdl, PCI_CONF_LATENCY_TIMER, 11137c478bd9Sstevel@tonic-gate chs_p->chs_latency_timer); 11147c478bd9Sstevel@tonic-gate if ((chs_p->chs_header_type & PCI_HEADER_TYPE_M) == 11157c478bd9Sstevel@tonic-gate PCI_HEADER_ONE) 11167c478bd9Sstevel@tonic-gate pci_config_put8(confhdl, PCI_BCNF_LATENCY_TIMER, 11177c478bd9Sstevel@tonic-gate chs_p->chs_sec_latency_timer); 11187c478bd9Sstevel@tonic-gate 11197c478bd9Sstevel@tonic-gate pci_config_put32(confhdl, PCI_CONF_BASE0, chs_p->chs_base0); 11207c478bd9Sstevel@tonic-gate pci_config_put32(confhdl, PCI_CONF_BASE1, chs_p->chs_base1); 11217c478bd9Sstevel@tonic-gate pci_config_put32(confhdl, PCI_CONF_BASE2, chs_p->chs_base2); 11227c478bd9Sstevel@tonic-gate pci_config_put32(confhdl, PCI_CONF_BASE3, chs_p->chs_base3); 11237c478bd9Sstevel@tonic-gate pci_config_put32(confhdl, PCI_CONF_BASE4, chs_p->chs_base4); 11247c478bd9Sstevel@tonic-gate pci_config_put32(confhdl, PCI_CONF_BASE5, chs_p->chs_base5); 11257c478bd9Sstevel@tonic-gate 11267c478bd9Sstevel@tonic-gate if (ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, dip, 11277c478bd9Sstevel@tonic-gate DDI_PROP_DONTPASS | DDI_PROP_NOTPROM, 11287c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS_CAPINFO, 11297c478bd9Sstevel@tonic-gate (uchar_t **)&cap_descp, &elements) == DDI_PROP_SUCCESS) { 11307c478bd9Sstevel@tonic-gate /* 11317c478bd9Sstevel@tonic-gate * PCI capability related regsiters are saved. 11327c478bd9Sstevel@tonic-gate * Restore them based on the description. 11337c478bd9Sstevel@tonic-gate */ 11347c478bd9Sstevel@tonic-gate p = (uint32_t *)((caddr_t)regbuf + 11357c478bd9Sstevel@tonic-gate sizeof (pci_config_header_state_t)); 11367c478bd9Sstevel@tonic-gate pci_restore_caps(confhdl, p, cap_descp, elements); 11377c478bd9Sstevel@tonic-gate ddi_prop_free(cap_descp); 11387c478bd9Sstevel@tonic-gate } 11397c478bd9Sstevel@tonic-gate 11407c478bd9Sstevel@tonic-gate ddi_prop_free(regbuf); 11417c478bd9Sstevel@tonic-gate } 11427c478bd9Sstevel@tonic-gate 11437c478bd9Sstevel@tonic-gate /* 11447c478bd9Sstevel@tonic-gate * Make sure registers are flushed 11457c478bd9Sstevel@tonic-gate */ 11467c478bd9Sstevel@tonic-gate (void) pci_config_get32(confhdl, PCI_CONF_BASE5); 11477c478bd9Sstevel@tonic-gate 11487c478bd9Sstevel@tonic-gate 11497c478bd9Sstevel@tonic-gate if (ndi_prop_remove(DDI_DEV_T_NONE, dip, SAVED_CONFIG_REGS) != 11507c478bd9Sstevel@tonic-gate DDI_PROP_SUCCESS) { 11517c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d can't remove prop %s", 11527c478bd9Sstevel@tonic-gate ddi_driver_name(dip), ddi_get_instance(dip), 11537c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS); 11547c478bd9Sstevel@tonic-gate } 11557c478bd9Sstevel@tonic-gate 11567c478bd9Sstevel@tonic-gate pci_config_teardown(&confhdl); 11577c478bd9Sstevel@tonic-gate 11587c478bd9Sstevel@tonic-gate return (DDI_SUCCESS); 11597c478bd9Sstevel@tonic-gate 11607c478bd9Sstevel@tonic-gate restoreconfig_err: 11617c478bd9Sstevel@tonic-gate ddi_prop_free(maskbuf); 11627c478bd9Sstevel@tonic-gate if (ndi_prop_remove(DDI_DEV_T_NONE, dip, SAVED_CONFIG_REGS_MASK) != 11637c478bd9Sstevel@tonic-gate DDI_PROP_SUCCESS) { 11647c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d can't remove prop %s", 11657c478bd9Sstevel@tonic-gate ddi_driver_name(dip), ddi_get_instance(dip), 11667c478bd9Sstevel@tonic-gate SAVED_CONFIG_REGS_MASK); 11677c478bd9Sstevel@tonic-gate } 11687c478bd9Sstevel@tonic-gate pci_config_teardown(&confhdl); 11697c478bd9Sstevel@tonic-gate return (DDI_FAILURE); 11707c478bd9Sstevel@tonic-gate } 1171