1*49ef7e06SGarrett D'Amore /*
2*49ef7e06SGarrett D'Amore * Copyright (c) 2009-2015 Solarflare Communications Inc.
3*49ef7e06SGarrett D'Amore * All rights reserved.
4*49ef7e06SGarrett D'Amore *
5*49ef7e06SGarrett D'Amore * Redistribution and use in source and binary forms, with or without
6*49ef7e06SGarrett D'Amore * modification, are permitted provided that the following conditions are met:
7*49ef7e06SGarrett D'Amore *
8*49ef7e06SGarrett D'Amore * 1. Redistributions of source code must retain the above copyright notice,
9*49ef7e06SGarrett D'Amore * this list of conditions and the following disclaimer.
10*49ef7e06SGarrett D'Amore * 2. Redistributions in binary form must reproduce the above copyright notice,
11*49ef7e06SGarrett D'Amore * this list of conditions and the following disclaimer in the documentation
12*49ef7e06SGarrett D'Amore * and/or other materials provided with the distribution.
13*49ef7e06SGarrett D'Amore *
14*49ef7e06SGarrett D'Amore * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15*49ef7e06SGarrett D'Amore * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16*49ef7e06SGarrett D'Amore * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17*49ef7e06SGarrett D'Amore * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18*49ef7e06SGarrett D'Amore * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19*49ef7e06SGarrett D'Amore * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20*49ef7e06SGarrett D'Amore * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21*49ef7e06SGarrett D'Amore * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22*49ef7e06SGarrett D'Amore * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23*49ef7e06SGarrett D'Amore * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24*49ef7e06SGarrett D'Amore * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25*49ef7e06SGarrett D'Amore *
26*49ef7e06SGarrett D'Amore * The views and conclusions contained in the software and documentation are
27*49ef7e06SGarrett D'Amore * those of the authors and should not be interpreted as representing official
28*49ef7e06SGarrett D'Amore * policies, either expressed or implied, of the FreeBSD Project.
29*49ef7e06SGarrett D'Amore */
30*49ef7e06SGarrett D'Amore
31*49ef7e06SGarrett D'Amore #include "efx.h"
32*49ef7e06SGarrett D'Amore #include "efx_impl.h"
33*49ef7e06SGarrett D'Amore
34*49ef7e06SGarrett D'Amore #if EFSYS_OPT_SIENA
35*49ef7e06SGarrett D'Amore
36*49ef7e06SGarrett D'Amore #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM
37*49ef7e06SGarrett D'Amore
38*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
siena_nvram_partn_size(__in efx_nic_t * enp,__in uint32_t partn,__out size_t * sizep)39*49ef7e06SGarrett D'Amore siena_nvram_partn_size(
40*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
41*49ef7e06SGarrett D'Amore __in uint32_t partn,
42*49ef7e06SGarrett D'Amore __out size_t *sizep)
43*49ef7e06SGarrett D'Amore {
44*49ef7e06SGarrett D'Amore efx_rc_t rc;
45*49ef7e06SGarrett D'Amore
46*49ef7e06SGarrett D'Amore if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
47*49ef7e06SGarrett D'Amore rc = ENOTSUP;
48*49ef7e06SGarrett D'Amore goto fail1;
49*49ef7e06SGarrett D'Amore }
50*49ef7e06SGarrett D'Amore
51*49ef7e06SGarrett D'Amore if ((rc = efx_mcdi_nvram_info(enp, partn, sizep,
52*49ef7e06SGarrett D'Amore NULL, NULL, NULL)) != 0) {
53*49ef7e06SGarrett D'Amore goto fail2;
54*49ef7e06SGarrett D'Amore }
55*49ef7e06SGarrett D'Amore
56*49ef7e06SGarrett D'Amore return (0);
57*49ef7e06SGarrett D'Amore
58*49ef7e06SGarrett D'Amore fail2:
59*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail2);
60*49ef7e06SGarrett D'Amore fail1:
61*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
62*49ef7e06SGarrett D'Amore
63*49ef7e06SGarrett D'Amore return (rc);
64*49ef7e06SGarrett D'Amore }
65*49ef7e06SGarrett D'Amore
66*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
siena_nvram_partn_lock(__in efx_nic_t * enp,__in uint32_t partn)67*49ef7e06SGarrett D'Amore siena_nvram_partn_lock(
68*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
69*49ef7e06SGarrett D'Amore __in uint32_t partn)
70*49ef7e06SGarrett D'Amore {
71*49ef7e06SGarrett D'Amore efx_rc_t rc;
72*49ef7e06SGarrett D'Amore
73*49ef7e06SGarrett D'Amore if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) {
74*49ef7e06SGarrett D'Amore goto fail1;
75*49ef7e06SGarrett D'Amore }
76*49ef7e06SGarrett D'Amore
77*49ef7e06SGarrett D'Amore return (0);
78*49ef7e06SGarrett D'Amore
79*49ef7e06SGarrett D'Amore fail1:
80*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
81*49ef7e06SGarrett D'Amore
82*49ef7e06SGarrett D'Amore return (rc);
83*49ef7e06SGarrett D'Amore }
84*49ef7e06SGarrett D'Amore
85*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
siena_nvram_partn_read(__in efx_nic_t * enp,__in uint32_t partn,__in unsigned int offset,__out_bcount (size)caddr_t data,__in size_t size)86*49ef7e06SGarrett D'Amore siena_nvram_partn_read(
87*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
88*49ef7e06SGarrett D'Amore __in uint32_t partn,
89*49ef7e06SGarrett D'Amore __in unsigned int offset,
90*49ef7e06SGarrett D'Amore __out_bcount(size) caddr_t data,
91*49ef7e06SGarrett D'Amore __in size_t size)
92*49ef7e06SGarrett D'Amore {
93*49ef7e06SGarrett D'Amore size_t chunk;
94*49ef7e06SGarrett D'Amore efx_rc_t rc;
95*49ef7e06SGarrett D'Amore
96*49ef7e06SGarrett D'Amore while (size > 0) {
97*49ef7e06SGarrett D'Amore chunk = MIN(size, SIENA_NVRAM_CHUNK);
98*49ef7e06SGarrett D'Amore
99*49ef7e06SGarrett D'Amore if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk,
100*49ef7e06SGarrett D'Amore MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) {
101*49ef7e06SGarrett D'Amore goto fail1;
102*49ef7e06SGarrett D'Amore }
103*49ef7e06SGarrett D'Amore
104*49ef7e06SGarrett D'Amore size -= chunk;
105*49ef7e06SGarrett D'Amore data += chunk;
106*49ef7e06SGarrett D'Amore offset += chunk;
107*49ef7e06SGarrett D'Amore }
108*49ef7e06SGarrett D'Amore
109*49ef7e06SGarrett D'Amore return (0);
110*49ef7e06SGarrett D'Amore
111*49ef7e06SGarrett D'Amore fail1:
112*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
113*49ef7e06SGarrett D'Amore
114*49ef7e06SGarrett D'Amore return (rc);
115*49ef7e06SGarrett D'Amore }
116*49ef7e06SGarrett D'Amore
117*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
siena_nvram_partn_erase(__in efx_nic_t * enp,__in uint32_t partn,__in unsigned int offset,__in size_t size)118*49ef7e06SGarrett D'Amore siena_nvram_partn_erase(
119*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
120*49ef7e06SGarrett D'Amore __in uint32_t partn,
121*49ef7e06SGarrett D'Amore __in unsigned int offset,
122*49ef7e06SGarrett D'Amore __in size_t size)
123*49ef7e06SGarrett D'Amore {
124*49ef7e06SGarrett D'Amore efx_rc_t rc;
125*49ef7e06SGarrett D'Amore
126*49ef7e06SGarrett D'Amore if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) {
127*49ef7e06SGarrett D'Amore goto fail1;
128*49ef7e06SGarrett D'Amore }
129*49ef7e06SGarrett D'Amore
130*49ef7e06SGarrett D'Amore return (0);
131*49ef7e06SGarrett D'Amore
132*49ef7e06SGarrett D'Amore fail1:
133*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
134*49ef7e06SGarrett D'Amore
135*49ef7e06SGarrett D'Amore return (rc);
136*49ef7e06SGarrett D'Amore }
137*49ef7e06SGarrett D'Amore
138*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
siena_nvram_partn_write(__in efx_nic_t * enp,__in uint32_t partn,__in unsigned int offset,__out_bcount (size)caddr_t data,__in size_t size)139*49ef7e06SGarrett D'Amore siena_nvram_partn_write(
140*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
141*49ef7e06SGarrett D'Amore __in uint32_t partn,
142*49ef7e06SGarrett D'Amore __in unsigned int offset,
143*49ef7e06SGarrett D'Amore __out_bcount(size) caddr_t data,
144*49ef7e06SGarrett D'Amore __in size_t size)
145*49ef7e06SGarrett D'Amore {
146*49ef7e06SGarrett D'Amore size_t chunk;
147*49ef7e06SGarrett D'Amore efx_rc_t rc;
148*49ef7e06SGarrett D'Amore
149*49ef7e06SGarrett D'Amore while (size > 0) {
150*49ef7e06SGarrett D'Amore chunk = MIN(size, SIENA_NVRAM_CHUNK);
151*49ef7e06SGarrett D'Amore
152*49ef7e06SGarrett D'Amore if ((rc = efx_mcdi_nvram_write(enp, partn, offset,
153*49ef7e06SGarrett D'Amore data, chunk)) != 0) {
154*49ef7e06SGarrett D'Amore goto fail1;
155*49ef7e06SGarrett D'Amore }
156*49ef7e06SGarrett D'Amore
157*49ef7e06SGarrett D'Amore size -= chunk;
158*49ef7e06SGarrett D'Amore data += chunk;
159*49ef7e06SGarrett D'Amore offset += chunk;
160*49ef7e06SGarrett D'Amore }
161*49ef7e06SGarrett D'Amore
162*49ef7e06SGarrett D'Amore return (0);
163*49ef7e06SGarrett D'Amore
164*49ef7e06SGarrett D'Amore fail1:
165*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
166*49ef7e06SGarrett D'Amore
167*49ef7e06SGarrett D'Amore return (rc);
168*49ef7e06SGarrett D'Amore }
169*49ef7e06SGarrett D'Amore
170*49ef7e06SGarrett D'Amore void
siena_nvram_partn_unlock(__in efx_nic_t * enp,__in uint32_t partn)171*49ef7e06SGarrett D'Amore siena_nvram_partn_unlock(
172*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
173*49ef7e06SGarrett D'Amore __in uint32_t partn)
174*49ef7e06SGarrett D'Amore {
175*49ef7e06SGarrett D'Amore boolean_t reboot;
176*49ef7e06SGarrett D'Amore efx_rc_t rc;
177*49ef7e06SGarrett D'Amore
178*49ef7e06SGarrett D'Amore /*
179*49ef7e06SGarrett D'Amore * Reboot into the new image only for PHYs. The driver has to
180*49ef7e06SGarrett D'Amore * explicitly cope with an MC reboot after a firmware update.
181*49ef7e06SGarrett D'Amore */
182*49ef7e06SGarrett D'Amore reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 ||
183*49ef7e06SGarrett D'Amore partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 ||
184*49ef7e06SGarrett D'Amore partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO);
185*49ef7e06SGarrett D'Amore
186*49ef7e06SGarrett D'Amore if ((rc = efx_mcdi_nvram_update_finish(enp, partn, reboot)) != 0) {
187*49ef7e06SGarrett D'Amore goto fail1;
188*49ef7e06SGarrett D'Amore }
189*49ef7e06SGarrett D'Amore
190*49ef7e06SGarrett D'Amore return;
191*49ef7e06SGarrett D'Amore
192*49ef7e06SGarrett D'Amore fail1:
193*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
194*49ef7e06SGarrett D'Amore }
195*49ef7e06SGarrett D'Amore
196*49ef7e06SGarrett D'Amore #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
197*49ef7e06SGarrett D'Amore
198*49ef7e06SGarrett D'Amore #if EFSYS_OPT_NVRAM
199*49ef7e06SGarrett D'Amore
200*49ef7e06SGarrett D'Amore typedef struct siena_parttbl_entry_s {
201*49ef7e06SGarrett D'Amore unsigned int partn;
202*49ef7e06SGarrett D'Amore unsigned int port;
203*49ef7e06SGarrett D'Amore efx_nvram_type_t nvtype;
204*49ef7e06SGarrett D'Amore } siena_parttbl_entry_t;
205*49ef7e06SGarrett D'Amore
206*49ef7e06SGarrett D'Amore static siena_parttbl_entry_t siena_parttbl[] = {
207*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 1, EFX_NVRAM_NULLPHY},
208*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 2, EFX_NVRAM_NULLPHY},
209*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_MC_FW, 1, EFX_NVRAM_MC_FIRMWARE},
210*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_MC_FW, 2, EFX_NVRAM_MC_FIRMWARE},
211*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 1, EFX_NVRAM_MC_GOLDEN},
212*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 2, EFX_NVRAM_MC_GOLDEN},
213*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_EXP_ROM, 1, EFX_NVRAM_BOOTROM},
214*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_EXP_ROM, 2, EFX_NVRAM_BOOTROM},
215*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0, 1, EFX_NVRAM_BOOTROM_CFG},
216*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1, 2, EFX_NVRAM_BOOTROM_CFG},
217*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_PHY_PORT0, 1, EFX_NVRAM_PHY},
218*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_PHY_PORT1, 2, EFX_NVRAM_PHY},
219*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_FPGA, 1, EFX_NVRAM_FPGA},
220*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_FPGA, 2, EFX_NVRAM_FPGA},
221*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 1, EFX_NVRAM_FPGA_BACKUP},
222*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 2, EFX_NVRAM_FPGA_BACKUP},
223*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_FC_FW, 1, EFX_NVRAM_FCFW},
224*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_FC_FW, 2, EFX_NVRAM_FCFW},
225*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_CPLD, 1, EFX_NVRAM_CPLD},
226*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_CPLD, 2, EFX_NVRAM_CPLD},
227*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_LICENSE, 1, EFX_NVRAM_LICENSE},
228*49ef7e06SGarrett D'Amore {MC_CMD_NVRAM_TYPE_LICENSE, 2, EFX_NVRAM_LICENSE}
229*49ef7e06SGarrett D'Amore };
230*49ef7e06SGarrett D'Amore
231*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
siena_nvram_type_to_partn(__in efx_nic_t * enp,__in efx_nvram_type_t type,__out uint32_t * partnp)232*49ef7e06SGarrett D'Amore siena_nvram_type_to_partn(
233*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
234*49ef7e06SGarrett D'Amore __in efx_nvram_type_t type,
235*49ef7e06SGarrett D'Amore __out uint32_t *partnp)
236*49ef7e06SGarrett D'Amore {
237*49ef7e06SGarrett D'Amore efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
238*49ef7e06SGarrett D'Amore unsigned int i;
239*49ef7e06SGarrett D'Amore
240*49ef7e06SGarrett D'Amore EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
241*49ef7e06SGarrett D'Amore EFSYS_ASSERT(partnp != NULL);
242*49ef7e06SGarrett D'Amore
243*49ef7e06SGarrett D'Amore for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
244*49ef7e06SGarrett D'Amore siena_parttbl_entry_t *entry = &siena_parttbl[i];
245*49ef7e06SGarrett D'Amore
246*49ef7e06SGarrett D'Amore if (entry->port == emip->emi_port && entry->nvtype == type) {
247*49ef7e06SGarrett D'Amore *partnp = entry->partn;
248*49ef7e06SGarrett D'Amore return (0);
249*49ef7e06SGarrett D'Amore }
250*49ef7e06SGarrett D'Amore }
251*49ef7e06SGarrett D'Amore
252*49ef7e06SGarrett D'Amore return (ENOTSUP);
253*49ef7e06SGarrett D'Amore }
254*49ef7e06SGarrett D'Amore
255*49ef7e06SGarrett D'Amore
256*49ef7e06SGarrett D'Amore #if EFSYS_OPT_DIAG
257*49ef7e06SGarrett D'Amore
258*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
siena_nvram_test(__in efx_nic_t * enp)259*49ef7e06SGarrett D'Amore siena_nvram_test(
260*49ef7e06SGarrett D'Amore __in efx_nic_t *enp)
261*49ef7e06SGarrett D'Amore {
262*49ef7e06SGarrett D'Amore efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
263*49ef7e06SGarrett D'Amore siena_parttbl_entry_t *entry;
264*49ef7e06SGarrett D'Amore unsigned int i;
265*49ef7e06SGarrett D'Amore efx_rc_t rc;
266*49ef7e06SGarrett D'Amore
267*49ef7e06SGarrett D'Amore /*
268*49ef7e06SGarrett D'Amore * Iterate over the list of supported partition types
269*49ef7e06SGarrett D'Amore * applicable to *this* port
270*49ef7e06SGarrett D'Amore */
271*49ef7e06SGarrett D'Amore for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
272*49ef7e06SGarrett D'Amore entry = &siena_parttbl[i];
273*49ef7e06SGarrett D'Amore
274*49ef7e06SGarrett D'Amore if (entry->port != emip->emi_port ||
275*49ef7e06SGarrett D'Amore !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn)))
276*49ef7e06SGarrett D'Amore continue;
277*49ef7e06SGarrett D'Amore
278*49ef7e06SGarrett D'Amore if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) {
279*49ef7e06SGarrett D'Amore goto fail1;
280*49ef7e06SGarrett D'Amore }
281*49ef7e06SGarrett D'Amore }
282*49ef7e06SGarrett D'Amore
283*49ef7e06SGarrett D'Amore return (0);
284*49ef7e06SGarrett D'Amore
285*49ef7e06SGarrett D'Amore fail1:
286*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
287*49ef7e06SGarrett D'Amore
288*49ef7e06SGarrett D'Amore return (rc);
289*49ef7e06SGarrett D'Amore }
290*49ef7e06SGarrett D'Amore
291*49ef7e06SGarrett D'Amore #endif /* EFSYS_OPT_DIAG */
292*49ef7e06SGarrett D'Amore
293*49ef7e06SGarrett D'Amore
294*49ef7e06SGarrett D'Amore #define SIENA_DYNAMIC_CFG_SIZE(_nitems) \
295*49ef7e06SGarrett D'Amore (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) * \
296*49ef7e06SGarrett D'Amore sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0])))
297*49ef7e06SGarrett D'Amore
298*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
siena_nvram_get_dynamic_cfg(__in efx_nic_t * enp,__in uint32_t partn,__in boolean_t vpd,__out siena_mc_dynamic_config_hdr_t ** dcfgp,__out size_t * sizep)299*49ef7e06SGarrett D'Amore siena_nvram_get_dynamic_cfg(
300*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
301*49ef7e06SGarrett D'Amore __in uint32_t partn,
302*49ef7e06SGarrett D'Amore __in boolean_t vpd,
303*49ef7e06SGarrett D'Amore __out siena_mc_dynamic_config_hdr_t **dcfgp,
304*49ef7e06SGarrett D'Amore __out size_t *sizep)
305*49ef7e06SGarrett D'Amore {
306*49ef7e06SGarrett D'Amore siena_mc_dynamic_config_hdr_t *dcfg = NULL;
307*49ef7e06SGarrett D'Amore size_t size;
308*49ef7e06SGarrett D'Amore uint8_t cksum;
309*49ef7e06SGarrett D'Amore unsigned int vpd_offset;
310*49ef7e06SGarrett D'Amore unsigned int vpd_length;
311*49ef7e06SGarrett D'Amore unsigned int hdr_length;
312*49ef7e06SGarrett D'Amore unsigned int nversions;
313*49ef7e06SGarrett D'Amore unsigned int pos;
314*49ef7e06SGarrett D'Amore unsigned int region;
315*49ef7e06SGarrett D'Amore efx_rc_t rc;
316*49ef7e06SGarrett D'Amore
317*49ef7e06SGarrett D'Amore EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 ||
318*49ef7e06SGarrett D'Amore partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1);
319*49ef7e06SGarrett D'Amore
320*49ef7e06SGarrett D'Amore /*
321*49ef7e06SGarrett D'Amore * Allocate sufficient memory for the entire dynamiccfg area, even
322*49ef7e06SGarrett D'Amore * if we're not actually going to read in the VPD.
323*49ef7e06SGarrett D'Amore */
324*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0)
325*49ef7e06SGarrett D'Amore goto fail1;
326*49ef7e06SGarrett D'Amore
327*49ef7e06SGarrett D'Amore EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg);
328*49ef7e06SGarrett D'Amore if (dcfg == NULL) {
329*49ef7e06SGarrett D'Amore rc = ENOMEM;
330*49ef7e06SGarrett D'Amore goto fail2;
331*49ef7e06SGarrett D'Amore }
332*49ef7e06SGarrett D'Amore
333*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_partn_read(enp, partn, 0,
334*49ef7e06SGarrett D'Amore (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0)
335*49ef7e06SGarrett D'Amore goto fail3;
336*49ef7e06SGarrett D'Amore
337*49ef7e06SGarrett D'Amore /* Verify the magic */
338*49ef7e06SGarrett D'Amore if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0)
339*49ef7e06SGarrett D'Amore != SIENA_MC_DYNAMIC_CONFIG_MAGIC)
340*49ef7e06SGarrett D'Amore goto invalid1;
341*49ef7e06SGarrett D'Amore
342*49ef7e06SGarrett D'Amore /* All future versions of the structure must be backwards compatable */
343*49ef7e06SGarrett D'Amore EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0);
344*49ef7e06SGarrett D'Amore
345*49ef7e06SGarrett D'Amore hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
346*49ef7e06SGarrett D'Amore nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
347*49ef7e06SGarrett D'Amore vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
348*49ef7e06SGarrett D'Amore vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
349*49ef7e06SGarrett D'Amore
350*49ef7e06SGarrett D'Amore /* Verify the hdr doesn't overflow the partn size */
351*49ef7e06SGarrett D'Amore if (hdr_length > size || vpd_offset > size || vpd_length > size ||
352*49ef7e06SGarrett D'Amore vpd_length + vpd_offset > size)
353*49ef7e06SGarrett D'Amore goto invalid2;
354*49ef7e06SGarrett D'Amore
355*49ef7e06SGarrett D'Amore /* Verify the header has room for all it's versions */
356*49ef7e06SGarrett D'Amore if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) ||
357*49ef7e06SGarrett D'Amore hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions))
358*49ef7e06SGarrett D'Amore goto invalid3;
359*49ef7e06SGarrett D'Amore
360*49ef7e06SGarrett D'Amore /*
361*49ef7e06SGarrett D'Amore * Read the remaining portion of the dcfg, either including
362*49ef7e06SGarrett D'Amore * the whole of VPD (there is no vpd length in this structure,
363*49ef7e06SGarrett D'Amore * so we have to parse each tag), or just the dcfg header itself
364*49ef7e06SGarrett D'Amore */
365*49ef7e06SGarrett D'Amore region = vpd ? vpd_offset + vpd_length : hdr_length;
366*49ef7e06SGarrett D'Amore if (region > SIENA_NVRAM_CHUNK) {
367*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK,
368*49ef7e06SGarrett D'Amore (caddr_t)dcfg + SIENA_NVRAM_CHUNK,
369*49ef7e06SGarrett D'Amore region - SIENA_NVRAM_CHUNK)) != 0)
370*49ef7e06SGarrett D'Amore goto fail4;
371*49ef7e06SGarrett D'Amore }
372*49ef7e06SGarrett D'Amore
373*49ef7e06SGarrett D'Amore /* Verify checksum */
374*49ef7e06SGarrett D'Amore cksum = 0;
375*49ef7e06SGarrett D'Amore for (pos = 0; pos < hdr_length; pos++)
376*49ef7e06SGarrett D'Amore cksum += ((uint8_t *)dcfg)[pos];
377*49ef7e06SGarrett D'Amore if (cksum != 0)
378*49ef7e06SGarrett D'Amore goto invalid4;
379*49ef7e06SGarrett D'Amore
380*49ef7e06SGarrett D'Amore goto done;
381*49ef7e06SGarrett D'Amore
382*49ef7e06SGarrett D'Amore invalid4:
383*49ef7e06SGarrett D'Amore EFSYS_PROBE(invalid4);
384*49ef7e06SGarrett D'Amore invalid3:
385*49ef7e06SGarrett D'Amore EFSYS_PROBE(invalid3);
386*49ef7e06SGarrett D'Amore invalid2:
387*49ef7e06SGarrett D'Amore EFSYS_PROBE(invalid2);
388*49ef7e06SGarrett D'Amore invalid1:
389*49ef7e06SGarrett D'Amore EFSYS_PROBE(invalid1);
390*49ef7e06SGarrett D'Amore
391*49ef7e06SGarrett D'Amore /*
392*49ef7e06SGarrett D'Amore * Construct a new "null" dcfg, with an empty version vector,
393*49ef7e06SGarrett D'Amore * and an empty VPD chunk trailing. This has the neat side effect
394*49ef7e06SGarrett D'Amore * of testing the exception paths in the write path.
395*49ef7e06SGarrett D'Amore */
396*49ef7e06SGarrett D'Amore EFX_POPULATE_DWORD_1(dcfg->magic,
397*49ef7e06SGarrett D'Amore EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC);
398*49ef7e06SGarrett D'Amore EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg));
399*49ef7e06SGarrett D'Amore EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0,
400*49ef7e06SGarrett D'Amore SIENA_MC_DYNAMIC_CONFIG_VERSION);
401*49ef7e06SGarrett D'Amore EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
402*49ef7e06SGarrett D'Amore EFX_DWORD_0, sizeof (*dcfg));
403*49ef7e06SGarrett D'Amore EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0);
404*49ef7e06SGarrett D'Amore EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0);
405*49ef7e06SGarrett D'Amore
406*49ef7e06SGarrett D'Amore done:
407*49ef7e06SGarrett D'Amore *dcfgp = dcfg;
408*49ef7e06SGarrett D'Amore *sizep = size;
409*49ef7e06SGarrett D'Amore
410*49ef7e06SGarrett D'Amore return (0);
411*49ef7e06SGarrett D'Amore
412*49ef7e06SGarrett D'Amore fail4:
413*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail4);
414*49ef7e06SGarrett D'Amore fail3:
415*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail3);
416*49ef7e06SGarrett D'Amore
417*49ef7e06SGarrett D'Amore EFSYS_KMEM_FREE(enp->en_esip, size, dcfg);
418*49ef7e06SGarrett D'Amore
419*49ef7e06SGarrett D'Amore fail2:
420*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail2);
421*49ef7e06SGarrett D'Amore fail1:
422*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
423*49ef7e06SGarrett D'Amore
424*49ef7e06SGarrett D'Amore return (rc);
425*49ef7e06SGarrett D'Amore }
426*49ef7e06SGarrett D'Amore
427*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
siena_nvram_get_subtype(__in efx_nic_t * enp,__in uint32_t partn,__out uint32_t * subtypep)428*49ef7e06SGarrett D'Amore siena_nvram_get_subtype(
429*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
430*49ef7e06SGarrett D'Amore __in uint32_t partn,
431*49ef7e06SGarrett D'Amore __out uint32_t *subtypep)
432*49ef7e06SGarrett D'Amore {
433*49ef7e06SGarrett D'Amore efx_mcdi_req_t req;
434*49ef7e06SGarrett D'Amore uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN,
435*49ef7e06SGarrett D'Amore MC_CMD_GET_BOARD_CFG_OUT_LENMAX)];
436*49ef7e06SGarrett D'Amore efx_word_t *fw_list;
437*49ef7e06SGarrett D'Amore efx_rc_t rc;
438*49ef7e06SGarrett D'Amore
439*49ef7e06SGarrett D'Amore (void) memset(payload, 0, sizeof (payload));
440*49ef7e06SGarrett D'Amore req.emr_cmd = MC_CMD_GET_BOARD_CFG;
441*49ef7e06SGarrett D'Amore req.emr_in_buf = payload;
442*49ef7e06SGarrett D'Amore req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
443*49ef7e06SGarrett D'Amore req.emr_out_buf = payload;
444*49ef7e06SGarrett D'Amore req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX;
445*49ef7e06SGarrett D'Amore
446*49ef7e06SGarrett D'Amore efx_mcdi_execute(enp, &req);
447*49ef7e06SGarrett D'Amore
448*49ef7e06SGarrett D'Amore if (req.emr_rc != 0) {
449*49ef7e06SGarrett D'Amore rc = req.emr_rc;
450*49ef7e06SGarrett D'Amore goto fail1;
451*49ef7e06SGarrett D'Amore }
452*49ef7e06SGarrett D'Amore
453*49ef7e06SGarrett D'Amore if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
454*49ef7e06SGarrett D'Amore rc = EMSGSIZE;
455*49ef7e06SGarrett D'Amore goto fail2;
456*49ef7e06SGarrett D'Amore }
457*49ef7e06SGarrett D'Amore
458*49ef7e06SGarrett D'Amore if (req.emr_out_length_used <
459*49ef7e06SGarrett D'Amore MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST +
460*49ef7e06SGarrett D'Amore (partn + 1) * sizeof (efx_word_t)) {
461*49ef7e06SGarrett D'Amore rc = ENOENT;
462*49ef7e06SGarrett D'Amore goto fail3;
463*49ef7e06SGarrett D'Amore }
464*49ef7e06SGarrett D'Amore
465*49ef7e06SGarrett D'Amore fw_list = MCDI_OUT2(req, efx_word_t,
466*49ef7e06SGarrett D'Amore GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
467*49ef7e06SGarrett D'Amore *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0);
468*49ef7e06SGarrett D'Amore
469*49ef7e06SGarrett D'Amore return (0);
470*49ef7e06SGarrett D'Amore
471*49ef7e06SGarrett D'Amore fail3:
472*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail3);
473*49ef7e06SGarrett D'Amore fail2:
474*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail2);
475*49ef7e06SGarrett D'Amore fail1:
476*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
477*49ef7e06SGarrett D'Amore
478*49ef7e06SGarrett D'Amore return (rc);
479*49ef7e06SGarrett D'Amore }
480*49ef7e06SGarrett D'Amore
481*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
482*49ef7e06SGarrett D'Amore siena_nvram_partn_get_version(
483*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
484*49ef7e06SGarrett D'Amore __in uint32_t partn,
485*49ef7e06SGarrett D'Amore __out uint32_t *subtypep,
486*49ef7e06SGarrett D'Amore __out_ecount(4) uint16_t version[4])
487*49ef7e06SGarrett D'Amore {
488*49ef7e06SGarrett D'Amore siena_mc_dynamic_config_hdr_t *dcfg;
489*49ef7e06SGarrett D'Amore siena_parttbl_entry_t *entry;
490*49ef7e06SGarrett D'Amore uint32_t dcfg_partn;
491*49ef7e06SGarrett D'Amore unsigned int i;
492*49ef7e06SGarrett D'Amore efx_rc_t rc;
493*49ef7e06SGarrett D'Amore
494*49ef7e06SGarrett D'Amore if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
495*49ef7e06SGarrett D'Amore rc = ENOTSUP;
496*49ef7e06SGarrett D'Amore goto fail1;
497*49ef7e06SGarrett D'Amore }
498*49ef7e06SGarrett D'Amore
499*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0)
500*49ef7e06SGarrett D'Amore goto fail2;
501*49ef7e06SGarrett D'Amore
502*49ef7e06SGarrett D'Amore /*
503*49ef7e06SGarrett D'Amore * Some partitions are accessible from both ports (for instance BOOTROM)
504*49ef7e06SGarrett D'Amore * Find the highest version reported by all dcfg structures on ports
505*49ef7e06SGarrett D'Amore * that have access to this partition.
506*49ef7e06SGarrett D'Amore */
507*49ef7e06SGarrett D'Amore version[0] = version[1] = version[2] = version[3] = 0;
508*49ef7e06SGarrett D'Amore for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
509*49ef7e06SGarrett D'Amore siena_mc_fw_version_t *verp;
510*49ef7e06SGarrett D'Amore unsigned int nitems;
511*49ef7e06SGarrett D'Amore uint16_t temp[4];
512*49ef7e06SGarrett D'Amore size_t length;
513*49ef7e06SGarrett D'Amore
514*49ef7e06SGarrett D'Amore entry = &siena_parttbl[i];
515*49ef7e06SGarrett D'Amore if (entry->partn != partn)
516*49ef7e06SGarrett D'Amore continue;
517*49ef7e06SGarrett D'Amore
518*49ef7e06SGarrett D'Amore dcfg_partn = (entry->port == 1)
519*49ef7e06SGarrett D'Amore ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
520*49ef7e06SGarrett D'Amore : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
521*49ef7e06SGarrett D'Amore /*
522*49ef7e06SGarrett D'Amore * Ingore missing partitions on port 2, assuming they're due
523*49ef7e06SGarrett D'Amore * to to running on a single port part.
524*49ef7e06SGarrett D'Amore */
525*49ef7e06SGarrett D'Amore if ((1 << dcfg_partn) & ~enp->en_u.siena.enu_partn_mask) {
526*49ef7e06SGarrett D'Amore if (entry->port == 2)
527*49ef7e06SGarrett D'Amore continue;
528*49ef7e06SGarrett D'Amore }
529*49ef7e06SGarrett D'Amore
530*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
531*49ef7e06SGarrett D'Amore B_FALSE, &dcfg, &length)) != 0)
532*49ef7e06SGarrett D'Amore goto fail3;
533*49ef7e06SGarrett D'Amore
534*49ef7e06SGarrett D'Amore nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items,
535*49ef7e06SGarrett D'Amore EFX_DWORD_0);
536*49ef7e06SGarrett D'Amore if (nitems < entry->partn)
537*49ef7e06SGarrett D'Amore goto done;
538*49ef7e06SGarrett D'Amore
539*49ef7e06SGarrett D'Amore verp = &dcfg->fw_version[partn];
540*49ef7e06SGarrett D'Amore temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0);
541*49ef7e06SGarrett D'Amore temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0);
542*49ef7e06SGarrett D'Amore temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0);
543*49ef7e06SGarrett D'Amore temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0);
544*49ef7e06SGarrett D'Amore if (memcmp(version, temp, sizeof (temp)) < 0)
545*49ef7e06SGarrett D'Amore (void) memcpy(version, temp, sizeof (temp));
546*49ef7e06SGarrett D'Amore
547*49ef7e06SGarrett D'Amore done:
548*49ef7e06SGarrett D'Amore EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
549*49ef7e06SGarrett D'Amore }
550*49ef7e06SGarrett D'Amore
551*49ef7e06SGarrett D'Amore return (0);
552*49ef7e06SGarrett D'Amore
553*49ef7e06SGarrett D'Amore fail3:
554*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail3);
555*49ef7e06SGarrett D'Amore fail2:
556*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail2);
557*49ef7e06SGarrett D'Amore fail1:
558*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
559*49ef7e06SGarrett D'Amore
560*49ef7e06SGarrett D'Amore return (rc);
561*49ef7e06SGarrett D'Amore }
562*49ef7e06SGarrett D'Amore
563*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
siena_nvram_partn_rw_start(__in efx_nic_t * enp,__in uint32_t partn,__out size_t * chunk_sizep)564*49ef7e06SGarrett D'Amore siena_nvram_partn_rw_start(
565*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
566*49ef7e06SGarrett D'Amore __in uint32_t partn,
567*49ef7e06SGarrett D'Amore __out size_t *chunk_sizep)
568*49ef7e06SGarrett D'Amore {
569*49ef7e06SGarrett D'Amore efx_rc_t rc;
570*49ef7e06SGarrett D'Amore
571*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_partn_lock(enp, partn)) != 0)
572*49ef7e06SGarrett D'Amore goto fail1;
573*49ef7e06SGarrett D'Amore
574*49ef7e06SGarrett D'Amore if (chunk_sizep != NULL)
575*49ef7e06SGarrett D'Amore *chunk_sizep = SIENA_NVRAM_CHUNK;
576*49ef7e06SGarrett D'Amore
577*49ef7e06SGarrett D'Amore return (0);
578*49ef7e06SGarrett D'Amore
579*49ef7e06SGarrett D'Amore fail1:
580*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
581*49ef7e06SGarrett D'Amore
582*49ef7e06SGarrett D'Amore return (rc);
583*49ef7e06SGarrett D'Amore }
584*49ef7e06SGarrett D'Amore
585*49ef7e06SGarrett D'Amore void
siena_nvram_partn_rw_finish(__in efx_nic_t * enp,__in uint32_t partn)586*49ef7e06SGarrett D'Amore siena_nvram_partn_rw_finish(
587*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
588*49ef7e06SGarrett D'Amore __in uint32_t partn)
589*49ef7e06SGarrett D'Amore {
590*49ef7e06SGarrett D'Amore siena_nvram_partn_unlock(enp, partn);
591*49ef7e06SGarrett D'Amore }
592*49ef7e06SGarrett D'Amore
593*49ef7e06SGarrett D'Amore __checkReturn efx_rc_t
594*49ef7e06SGarrett D'Amore siena_nvram_partn_set_version(
595*49ef7e06SGarrett D'Amore __in efx_nic_t *enp,
596*49ef7e06SGarrett D'Amore __in uint32_t partn,
597*49ef7e06SGarrett D'Amore __in_ecount(4) uint16_t version[4])
598*49ef7e06SGarrett D'Amore {
599*49ef7e06SGarrett D'Amore efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
600*49ef7e06SGarrett D'Amore siena_mc_dynamic_config_hdr_t *dcfg = NULL;
601*49ef7e06SGarrett D'Amore siena_mc_fw_version_t *fwverp;
602*49ef7e06SGarrett D'Amore uint32_t dcfg_partn;
603*49ef7e06SGarrett D'Amore size_t dcfg_size;
604*49ef7e06SGarrett D'Amore unsigned int hdr_length;
605*49ef7e06SGarrett D'Amore unsigned int vpd_length;
606*49ef7e06SGarrett D'Amore unsigned int vpd_offset;
607*49ef7e06SGarrett D'Amore unsigned int nitems;
608*49ef7e06SGarrett D'Amore unsigned int required_hdr_length;
609*49ef7e06SGarrett D'Amore unsigned int pos;
610*49ef7e06SGarrett D'Amore uint8_t cksum;
611*49ef7e06SGarrett D'Amore uint32_t subtype;
612*49ef7e06SGarrett D'Amore size_t length;
613*49ef7e06SGarrett D'Amore efx_rc_t rc;
614*49ef7e06SGarrett D'Amore
615*49ef7e06SGarrett D'Amore dcfg_partn = (emip->emi_port == 1)
616*49ef7e06SGarrett D'Amore ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
617*49ef7e06SGarrett D'Amore : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
618*49ef7e06SGarrett D'Amore
619*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0)
620*49ef7e06SGarrett D'Amore goto fail1;
621*49ef7e06SGarrett D'Amore
622*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0)
623*49ef7e06SGarrett D'Amore goto fail2;
624*49ef7e06SGarrett D'Amore
625*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
626*49ef7e06SGarrett D'Amore B_TRUE, &dcfg, &length)) != 0)
627*49ef7e06SGarrett D'Amore goto fail3;
628*49ef7e06SGarrett D'Amore
629*49ef7e06SGarrett D'Amore hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
630*49ef7e06SGarrett D'Amore nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
631*49ef7e06SGarrett D'Amore vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
632*49ef7e06SGarrett D'Amore vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
633*49ef7e06SGarrett D'Amore
634*49ef7e06SGarrett D'Amore /*
635*49ef7e06SGarrett D'Amore * NOTE: This function will blatt any fields trailing the version
636*49ef7e06SGarrett D'Amore * vector, or the VPD chunk.
637*49ef7e06SGarrett D'Amore */
638*49ef7e06SGarrett D'Amore required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1);
639*49ef7e06SGarrett D'Amore if (required_hdr_length + vpd_length > length) {
640*49ef7e06SGarrett D'Amore rc = ENOSPC;
641*49ef7e06SGarrett D'Amore goto fail4;
642*49ef7e06SGarrett D'Amore }
643*49ef7e06SGarrett D'Amore
644*49ef7e06SGarrett D'Amore if (vpd_offset < required_hdr_length) {
645*49ef7e06SGarrett D'Amore (void) memmove((caddr_t)dcfg + required_hdr_length,
646*49ef7e06SGarrett D'Amore (caddr_t)dcfg + vpd_offset, vpd_length);
647*49ef7e06SGarrett D'Amore vpd_offset = required_hdr_length;
648*49ef7e06SGarrett D'Amore EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
649*49ef7e06SGarrett D'Amore EFX_DWORD_0, vpd_offset);
650*49ef7e06SGarrett D'Amore }
651*49ef7e06SGarrett D'Amore
652*49ef7e06SGarrett D'Amore if (hdr_length < required_hdr_length) {
653*49ef7e06SGarrett D'Amore (void) memset((caddr_t)dcfg + hdr_length, 0,
654*49ef7e06SGarrett D'Amore required_hdr_length - hdr_length);
655*49ef7e06SGarrett D'Amore hdr_length = required_hdr_length;
656*49ef7e06SGarrett D'Amore EFX_POPULATE_WORD_1(dcfg->length,
657*49ef7e06SGarrett D'Amore EFX_WORD_0, hdr_length);
658*49ef7e06SGarrett D'Amore }
659*49ef7e06SGarrett D'Amore
660*49ef7e06SGarrett D'Amore /* Get the subtype to insert into the fw_subtype array */
661*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0)
662*49ef7e06SGarrett D'Amore goto fail5;
663*49ef7e06SGarrett D'Amore
664*49ef7e06SGarrett D'Amore /* Fill out the new version */
665*49ef7e06SGarrett D'Amore fwverp = &dcfg->fw_version[partn];
666*49ef7e06SGarrett D'Amore EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype);
667*49ef7e06SGarrett D'Amore EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]);
668*49ef7e06SGarrett D'Amore EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]);
669*49ef7e06SGarrett D'Amore EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]);
670*49ef7e06SGarrett D'Amore EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]);
671*49ef7e06SGarrett D'Amore
672*49ef7e06SGarrett D'Amore /* Update the version count */
673*49ef7e06SGarrett D'Amore if (nitems < partn + 1) {
674*49ef7e06SGarrett D'Amore nitems = partn + 1;
675*49ef7e06SGarrett D'Amore EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items,
676*49ef7e06SGarrett D'Amore EFX_DWORD_0, nitems);
677*49ef7e06SGarrett D'Amore }
678*49ef7e06SGarrett D'Amore
679*49ef7e06SGarrett D'Amore /* Update the checksum */
680*49ef7e06SGarrett D'Amore cksum = 0;
681*49ef7e06SGarrett D'Amore for (pos = 0; pos < hdr_length; pos++)
682*49ef7e06SGarrett D'Amore cksum += ((uint8_t *)dcfg)[pos];
683*49ef7e06SGarrett D'Amore dcfg->csum.eb_u8[0] -= cksum;
684*49ef7e06SGarrett D'Amore
685*49ef7e06SGarrett D'Amore /* Erase and write the new partition */
686*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0)
687*49ef7e06SGarrett D'Amore goto fail6;
688*49ef7e06SGarrett D'Amore
689*49ef7e06SGarrett D'Amore /* Write out the new structure to nvram */
690*49ef7e06SGarrett D'Amore if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0,
691*49ef7e06SGarrett D'Amore (caddr_t)dcfg, vpd_offset + vpd_length)) != 0)
692*49ef7e06SGarrett D'Amore goto fail7;
693*49ef7e06SGarrett D'Amore
694*49ef7e06SGarrett D'Amore EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
695*49ef7e06SGarrett D'Amore
696*49ef7e06SGarrett D'Amore siena_nvram_partn_unlock(enp, dcfg_partn);
697*49ef7e06SGarrett D'Amore
698*49ef7e06SGarrett D'Amore return (0);
699*49ef7e06SGarrett D'Amore
700*49ef7e06SGarrett D'Amore fail7:
701*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail7);
702*49ef7e06SGarrett D'Amore fail6:
703*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail6);
704*49ef7e06SGarrett D'Amore fail5:
705*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail5);
706*49ef7e06SGarrett D'Amore fail4:
707*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail4);
708*49ef7e06SGarrett D'Amore
709*49ef7e06SGarrett D'Amore EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
710*49ef7e06SGarrett D'Amore fail3:
711*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail3);
712*49ef7e06SGarrett D'Amore fail2:
713*49ef7e06SGarrett D'Amore EFSYS_PROBE(fail2);
714*49ef7e06SGarrett D'Amore fail1:
715*49ef7e06SGarrett D'Amore EFSYS_PROBE1(fail1, efx_rc_t, rc);
716*49ef7e06SGarrett D'Amore
717*49ef7e06SGarrett D'Amore return (rc);
718*49ef7e06SGarrett D'Amore }
719*49ef7e06SGarrett D'Amore
720*49ef7e06SGarrett D'Amore #endif /* EFSYS_OPT_NVRAM */
721*49ef7e06SGarrett D'Amore
722*49ef7e06SGarrett D'Amore #endif /* EFSYS_OPT_SIENA */
723