xref: /illumos-gate/usr/src/uts/common/io/rge/rge_rxtx.c (revision 75d94465)
1c7fd2ed0Sgs /*
2c7fd2ed0Sgs  * CDDL HEADER START
3c7fd2ed0Sgs  *
4c7fd2ed0Sgs  * The contents of this file are subject to the terms of the
5ba2e4443Sseb  * Common Development and Distribution License (the "License").
6ba2e4443Sseb  * You may not use this file except in compliance with the License.
7c7fd2ed0Sgs  *
8c7fd2ed0Sgs  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9c7fd2ed0Sgs  * or http://www.opensolaris.org/os/licensing.
10c7fd2ed0Sgs  * See the License for the specific language governing permissions
11c7fd2ed0Sgs  * and limitations under the License.
12c7fd2ed0Sgs  *
13c7fd2ed0Sgs  * When distributing Covered Code, include this CDDL HEADER in each
14c7fd2ed0Sgs  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15c7fd2ed0Sgs  * If applicable, add the following below this CDDL HEADER, with the
16c7fd2ed0Sgs  * fields enclosed by brackets "[]" replaced with your own identifying
17c7fd2ed0Sgs  * information: Portions Copyright [yyyy] [name of copyright owner]
18c7fd2ed0Sgs  *
19c7fd2ed0Sgs  * CDDL HEADER END
20c7fd2ed0Sgs  */
21c7fd2ed0Sgs /*
227b114c4bSWinson Wang - Sun Microsystems - Beijing China  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
23c7fd2ed0Sgs  * Use is subject to license terms.
24c7fd2ed0Sgs  */
25c7fd2ed0Sgs 
26c7fd2ed0Sgs #include "rge.h"
27c7fd2ed0Sgs 
28c7fd2ed0Sgs #define	U32TOPTR(x)	((void *)(uintptr_t)(uint32_t)(x))
29c7fd2ed0Sgs #define	PTRTOU32(x)	((uint32_t)(uintptr_t)(void *)(x))
30c7fd2ed0Sgs 
31c7fd2ed0Sgs /*
32c7fd2ed0Sgs  * ========== RX side routines ==========
33c7fd2ed0Sgs  */
34c7fd2ed0Sgs 
35c7fd2ed0Sgs #define	RGE_DBG		RGE_DBG_RECV	/* debug flag for this code	*/
36c7fd2ed0Sgs 
37c7fd2ed0Sgs static uint32_t rge_atomic_reserve(uint32_t *count_p, uint32_t n);
38c7fd2ed0Sgs #pragma	inline(rge_atomic_reserve)
39c7fd2ed0Sgs 
40c7fd2ed0Sgs static uint32_t
rge_atomic_reserve(uint32_t * count_p,uint32_t n)41c7fd2ed0Sgs rge_atomic_reserve(uint32_t *count_p, uint32_t n)
42c7fd2ed0Sgs {
43c7fd2ed0Sgs 	uint32_t oldval;
44c7fd2ed0Sgs 	uint32_t newval;
45c7fd2ed0Sgs 
46c7fd2ed0Sgs 	/* ATOMICALLY */
47c7fd2ed0Sgs 	do {
48c7fd2ed0Sgs 		oldval = *count_p;
49c7fd2ed0Sgs 		newval = oldval - n;
50c7fd2ed0Sgs 		if (oldval <= n)
51c7fd2ed0Sgs 			return (0);		/* no resources left	*/
52*75d94465SJosef 'Jeff' Sipek 	} while (atomic_cas_32(count_p, oldval, newval) != oldval);
53c7fd2ed0Sgs 
54c7fd2ed0Sgs 	return (newval);
55c7fd2ed0Sgs }
56c7fd2ed0Sgs 
57c7fd2ed0Sgs /*
58c7fd2ed0Sgs  * Atomically increment a counter
59c7fd2ed0Sgs  */
60c7fd2ed0Sgs static void rge_atomic_renounce(uint32_t *count_p, uint32_t n);
61c7fd2ed0Sgs #pragma	inline(rge_atomic_renounce)
62c7fd2ed0Sgs 
63c7fd2ed0Sgs static void
rge_atomic_renounce(uint32_t * count_p,uint32_t n)64c7fd2ed0Sgs rge_atomic_renounce(uint32_t *count_p, uint32_t n)
65c7fd2ed0Sgs {
66c7fd2ed0Sgs 	uint32_t oldval;
67c7fd2ed0Sgs 	uint32_t newval;
68c7fd2ed0Sgs 
69c7fd2ed0Sgs 	/* ATOMICALLY */
70c7fd2ed0Sgs 	do {
71c7fd2ed0Sgs 		oldval = *count_p;
72c7fd2ed0Sgs 		newval = oldval + n;
73*75d94465SJosef 'Jeff' Sipek 	} while (atomic_cas_32(count_p, oldval, newval) != oldval);
74c7fd2ed0Sgs }
75c7fd2ed0Sgs 
76c7fd2ed0Sgs /*
77c7fd2ed0Sgs  * Callback code invoked from STREAMs when the recv data buffer is free
78c7fd2ed0Sgs  * for recycling.
79c7fd2ed0Sgs  */
80c7fd2ed0Sgs void
rge_rx_recycle(caddr_t arg)81c7fd2ed0Sgs rge_rx_recycle(caddr_t arg)
82c7fd2ed0Sgs {
83c7fd2ed0Sgs 	rge_t *rgep;
84c7fd2ed0Sgs 	dma_buf_t *rx_buf;
85aa817493Sgs 	sw_rbd_t *free_srbdp;
86c7fd2ed0Sgs 	uint32_t slot_recy;
87c7fd2ed0Sgs 
88c7fd2ed0Sgs 	rx_buf = (dma_buf_t *)arg;
89c7fd2ed0Sgs 	rgep = (rge_t *)rx_buf->private;
90c7fd2ed0Sgs 
91c7fd2ed0Sgs 	/*
92aa817493Sgs 	 * In rge_unattach() and rge_attach(), this callback function will
93aa817493Sgs 	 * also be called to free mp in rge_fini_rings() and rge_init_rings().
94aa817493Sgs 	 * In such situation, we shouldn't do below desballoc(), otherwise,
95c7fd2ed0Sgs 	 * there'll be memory leak.
96c7fd2ed0Sgs 	 */
97aa817493Sgs 	if (rgep->rge_mac_state == RGE_MAC_UNATTACH ||
98aa817493Sgs 	    rgep->rge_mac_state == RGE_MAC_ATTACH)
99c7fd2ed0Sgs 		return;
100c7fd2ed0Sgs 
101c7fd2ed0Sgs 	/*
102c7fd2ed0Sgs 	 * Recycle the data buffer again
103c7fd2ed0Sgs 	 * and fill them in free ring
104c7fd2ed0Sgs 	 */
105c7fd2ed0Sgs 	rx_buf->mp = desballoc(DMA_VPTR(rx_buf->pbuf),
106c7fd2ed0Sgs 	    rgep->rxbuf_size, 0, &rx_buf->rx_recycle);
107c7fd2ed0Sgs 	if (rx_buf->mp == NULL) {
108c7fd2ed0Sgs 		rge_problem(rgep, "rge_rx_recycle: desballoc() failed");
109c7fd2ed0Sgs 		return;
110c7fd2ed0Sgs 	}
111c7fd2ed0Sgs 	mutex_enter(rgep->rc_lock);
112c7fd2ed0Sgs 	slot_recy = rgep->rc_next;
113aa817493Sgs 	free_srbdp = &rgep->free_srbds[slot_recy];
114aa817493Sgs 
115aa817493Sgs 	ASSERT(free_srbdp->rx_buf == NULL);
116aa817493Sgs 	free_srbdp->rx_buf = rx_buf;
117aa817493Sgs 	rgep->rc_next = NEXT(slot_recy, RGE_BUF_SLOTS);
118aa817493Sgs 	rge_atomic_renounce(&rgep->rx_free, 1);
119aa817493Sgs 	if (rgep->rx_bcopy && rgep->rx_free == RGE_BUF_SLOTS)
120aa817493Sgs 		rgep->rx_bcopy = B_FALSE;
121aa817493Sgs 	ASSERT(rgep->rx_free <= RGE_BUF_SLOTS);
122aa817493Sgs 
123c7fd2ed0Sgs 	mutex_exit(rgep->rc_lock);
124c7fd2ed0Sgs }
125c7fd2ed0Sgs 
126c7fd2ed0Sgs static int rge_rx_refill(rge_t *rgep, uint32_t slot);
127c7fd2ed0Sgs #pragma	inline(rge_rx_refill)
128c7fd2ed0Sgs 
129c7fd2ed0Sgs static int
rge_rx_refill(rge_t * rgep,uint32_t slot)130c7fd2ed0Sgs rge_rx_refill(rge_t *rgep, uint32_t slot)
131c7fd2ed0Sgs {
132c7fd2ed0Sgs 	dma_buf_t *free_buf;
133c7fd2ed0Sgs 	rge_bd_t *hw_rbd_p;
134c7fd2ed0Sgs 	sw_rbd_t *srbdp;
135c7fd2ed0Sgs 	uint32_t free_slot;
136c7fd2ed0Sgs 
137c7fd2ed0Sgs 	srbdp = &rgep->sw_rbds[slot];
138c7fd2ed0Sgs 	hw_rbd_p = &rgep->rx_ring[slot];
139c7fd2ed0Sgs 	free_slot = rgep->rf_next;
140aa817493Sgs 	free_buf = rgep->free_srbds[free_slot].rx_buf;
141c7fd2ed0Sgs 	if (free_buf != NULL) {
142c7fd2ed0Sgs 		srbdp->rx_buf = free_buf;
143aa817493Sgs 		rgep->free_srbds[free_slot].rx_buf = NULL;
144aa817493Sgs 		hw_rbd_p->host_buf_addr = RGE_BSWAP_32(rgep->head_room +
145c7fd2ed0Sgs 		    + free_buf->pbuf.cookie.dmac_laddress);
146c7fd2ed0Sgs 		hw_rbd_p->host_buf_addr_hi =
147c7fd2ed0Sgs 		    RGE_BSWAP_32(free_buf->pbuf.cookie.dmac_laddress >> 32);
148c7fd2ed0Sgs 		rgep->rf_next = NEXT(free_slot, RGE_BUF_SLOTS);
149c7fd2ed0Sgs 		return (1);
150c7fd2ed0Sgs 	} else {
151c7fd2ed0Sgs 		/*
152c7fd2ed0Sgs 		 * This situation shouldn't happen
153c7fd2ed0Sgs 		 */
154c7fd2ed0Sgs 		rge_problem(rgep, "rge_rx_refill: free buffer %d is NULL",
155c7fd2ed0Sgs 		    free_slot);
156c7fd2ed0Sgs 		rgep->rx_bcopy = B_TRUE;
157c7fd2ed0Sgs 		return (0);
158c7fd2ed0Sgs 	}
159c7fd2ed0Sgs }
160c7fd2ed0Sgs 
161c7fd2ed0Sgs static mblk_t *rge_receive_packet(rge_t *rgep, uint32_t slot);
162c7fd2ed0Sgs #pragma	inline(rge_receive_packet)
163c7fd2ed0Sgs 
164c7fd2ed0Sgs static mblk_t *
rge_receive_packet(rge_t * rgep,uint32_t slot)165c7fd2ed0Sgs rge_receive_packet(rge_t *rgep, uint32_t slot)
166c7fd2ed0Sgs {
167c7fd2ed0Sgs 	rge_bd_t *hw_rbd_p;
168c7fd2ed0Sgs 	sw_rbd_t *srbdp;
169c7fd2ed0Sgs 	uchar_t *dp;
170c7fd2ed0Sgs 	mblk_t *mp;
171c7fd2ed0Sgs 	uint8_t *rx_ptr;
172c7fd2ed0Sgs 	uint32_t rx_status;
173c7fd2ed0Sgs 	uint_t packet_len;
174c7fd2ed0Sgs 	uint_t minsize;
175c7fd2ed0Sgs 	uint_t maxsize;
176c7fd2ed0Sgs 	uint32_t proto;
177c7fd2ed0Sgs 	uint32_t pflags;
178c7fd2ed0Sgs 	struct ether_vlan_header *ehp;
179c7fd2ed0Sgs 	uint16_t vtag = 0;
180c7fd2ed0Sgs 
181c7fd2ed0Sgs 	hw_rbd_p = &rgep->rx_ring[slot];
182c7fd2ed0Sgs 	srbdp = &rgep->sw_rbds[slot];
183c7fd2ed0Sgs 
184c7fd2ed0Sgs 	/*
185c7fd2ed0Sgs 	 * Read receive status
186c7fd2ed0Sgs 	 */
187c7fd2ed0Sgs 	rx_status = RGE_BSWAP_32(hw_rbd_p->flags_len) & RBD_FLAGS_MASK;
188c7fd2ed0Sgs 
189c7fd2ed0Sgs 	/*
190c7fd2ed0Sgs 	 * Handle error packet
191c7fd2ed0Sgs 	 */
192c7fd2ed0Sgs 	if (!(rx_status & BD_FLAG_PKT_END)) {
193c7fd2ed0Sgs 		RGE_DEBUG(("rge_receive_packet: not a complete packat"));
194c7fd2ed0Sgs 		return (NULL);
195c7fd2ed0Sgs 	}
196c7fd2ed0Sgs 	if (rx_status & RBD_FLAG_ERROR) {
197c7fd2ed0Sgs 		if (rx_status & RBD_FLAG_CRC_ERR)
198c7fd2ed0Sgs 			rgep->stats.crc_err++;
199c7fd2ed0Sgs 		if (rx_status & RBD_FLAG_RUNT)
200c7fd2ed0Sgs 			rgep->stats.in_short++;
201c7fd2ed0Sgs 		/*
202c7fd2ed0Sgs 		 * Set chip_error flag to reset chip:
203c7fd2ed0Sgs 		 * (suggested in Realtek programming guide.)
204c7fd2ed0Sgs 		 */
205c7fd2ed0Sgs 		RGE_DEBUG(("rge_receive_packet: error packet, status = %x",
206c7fd2ed0Sgs 		    rx_status));
207c7fd2ed0Sgs 		mutex_enter(rgep->genlock);
208c7fd2ed0Sgs 		rgep->rge_chip_state = RGE_CHIP_ERROR;
209c7fd2ed0Sgs 		mutex_exit(rgep->genlock);
210c7fd2ed0Sgs 		return (NULL);
211c7fd2ed0Sgs 	}
212c7fd2ed0Sgs 
213c7fd2ed0Sgs 	/*
214c7fd2ed0Sgs 	 * Handle size error packet
215c7fd2ed0Sgs 	 */
216aa817493Sgs 	packet_len = RGE_BSWAP_32(hw_rbd_p->flags_len) & RBD_LEN_MASK;
217aa817493Sgs 	packet_len -= ETHERFCSL;
218aa817493Sgs 	minsize = ETHERMIN;
219aa817493Sgs 	pflags = RGE_BSWAP_32(hw_rbd_p->vlan_tag);
220aa817493Sgs 	if (pflags & RBD_VLAN_PKT)
221aa817493Sgs 		minsize -= VLAN_TAGSZ;
222aa817493Sgs 	maxsize = rgep->ethmax_size;
223c7fd2ed0Sgs 	if (packet_len < minsize || packet_len > maxsize) {
224c7fd2ed0Sgs 		RGE_DEBUG(("rge_receive_packet: len err = %d", packet_len));
225c7fd2ed0Sgs 		return (NULL);
226c7fd2ed0Sgs 	}
227c7fd2ed0Sgs 
228c7fd2ed0Sgs 	DMA_SYNC(srbdp->rx_buf->pbuf, DDI_DMA_SYNC_FORKERNEL);
229aa817493Sgs 	if (rgep->rx_bcopy || packet_len <= RGE_RECV_COPY_SIZE ||
230c7fd2ed0Sgs 	    !rge_atomic_reserve(&rgep->rx_free, 1)) {
231c7fd2ed0Sgs 		/*
232c7fd2ed0Sgs 		 * Allocate buffer to receive this good packet
233c7fd2ed0Sgs 		 */
234c7fd2ed0Sgs 		mp = allocb(packet_len + RGE_HEADROOM, 0);
235c7fd2ed0Sgs 		if (mp == NULL) {
236c7fd2ed0Sgs 			RGE_DEBUG(("rge_receive_packet: allocate buffer fail"));
237c7fd2ed0Sgs 			rgep->stats.no_rcvbuf++;
238c7fd2ed0Sgs 			return (NULL);
239c7fd2ed0Sgs 		}
240c7fd2ed0Sgs 
241c7fd2ed0Sgs 		/*
242c7fd2ed0Sgs 		 * Copy the data found into the new cluster
243c7fd2ed0Sgs 		 */
244c7fd2ed0Sgs 		rx_ptr = DMA_VPTR(srbdp->rx_buf->pbuf);
245c7fd2ed0Sgs 		mp->b_rptr = dp = mp->b_rptr + RGE_HEADROOM;
246aa817493Sgs 		bcopy(rx_ptr + rgep->head_room, dp, packet_len);
247aa817493Sgs 		mp->b_wptr = dp + packet_len;
248c7fd2ed0Sgs 	} else {
249c7fd2ed0Sgs 		mp = srbdp->rx_buf->mp;
250aa817493Sgs 		mp->b_rptr += rgep->head_room;
251aa817493Sgs 		mp->b_wptr = mp->b_rptr + packet_len;
252c7fd2ed0Sgs 		mp->b_next = mp->b_cont = NULL;
253c7fd2ed0Sgs 		/*
254c7fd2ed0Sgs 		 * Refill the current receive bd buffer
255c7fd2ed0Sgs 		 *   if fails, will just keep the mp.
256c7fd2ed0Sgs 		 */
257c7fd2ed0Sgs 		if (!rge_rx_refill(rgep, slot))
258c7fd2ed0Sgs 			return (NULL);
259c7fd2ed0Sgs 	}
260c7fd2ed0Sgs 	rgep->stats.rbytes += packet_len;
26122dc2133Smx 	rgep->stats.rpackets ++;
262c7fd2ed0Sgs 
263c7fd2ed0Sgs 	/*
264c7fd2ed0Sgs 	 * VLAN packet ?
265c7fd2ed0Sgs 	 */
266c7fd2ed0Sgs 	if (pflags & RBD_VLAN_PKT)
267c7fd2ed0Sgs 		vtag = pflags & RBD_VLAN_TAG;
268c7fd2ed0Sgs 	if (vtag) {
269c7fd2ed0Sgs 		vtag = TCI_CHIP2OS(vtag);
270c7fd2ed0Sgs 		/*
271c7fd2ed0Sgs 		 * As h/w strips the VLAN tag from incoming packet, we need
272c7fd2ed0Sgs 		 * insert VLAN tag into this packet before send up here.
273c7fd2ed0Sgs 		 */
274c7fd2ed0Sgs 		(void) memmove(mp->b_rptr - VLAN_TAGSZ, mp->b_rptr,
275c7fd2ed0Sgs 		    2 * ETHERADDRL);
276c7fd2ed0Sgs 		mp->b_rptr -= VLAN_TAGSZ;
277c7fd2ed0Sgs 		ehp = (struct ether_vlan_header *)mp->b_rptr;
278605445d5Sdg 		ehp->ether_tpid = htons(ETHERTYPE_VLAN);
279c7fd2ed0Sgs 		ehp->ether_tci = htons(vtag);
280aa817493Sgs 		rgep->stats.rbytes += VLAN_TAGSZ;
281c7fd2ed0Sgs 	}
282c7fd2ed0Sgs 
283c7fd2ed0Sgs 	/*
284c7fd2ed0Sgs 	 * Check h/w checksum offload status
285c7fd2ed0Sgs 	 */
286c7fd2ed0Sgs 	pflags = 0;
287c7fd2ed0Sgs 	proto = rx_status & RBD_FLAG_PROTOCOL;
288c7fd2ed0Sgs 	if ((proto == RBD_FLAG_TCP && !(rx_status & RBD_TCP_CKSUM_ERR)) ||
289c7fd2ed0Sgs 	    (proto == RBD_FLAG_UDP && !(rx_status & RBD_UDP_CKSUM_ERR)))
2900dc2366fSVenugopal Iyer 		pflags |= HCK_FULLCKSUM_OK;
291c7fd2ed0Sgs 	if (proto != RBD_FLAG_NONE_IP && !(rx_status & RBD_IP_CKSUM_ERR))
2920dc2366fSVenugopal Iyer 		pflags |= HCK_IPV4_HDRCKSUM_OK;
293c7fd2ed0Sgs 	if (pflags != 0)  {
2940dc2366fSVenugopal Iyer 		mac_hcksum_set(mp, 0, 0, 0, 0, pflags);
295c7fd2ed0Sgs 	}
296c7fd2ed0Sgs 
297c7fd2ed0Sgs 	return (mp);
298c7fd2ed0Sgs }
299c7fd2ed0Sgs 
300c7fd2ed0Sgs /*
301c7fd2ed0Sgs  * Accept the packets received in rx ring.
302c7fd2ed0Sgs  *
303c7fd2ed0Sgs  * Returns a chain of mblks containing the received data, to be
304c7fd2ed0Sgs  * passed up to mac_rx().
305c7fd2ed0Sgs  * The routine returns only when a complete scan has been performed
306c7fd2ed0Sgs  * without finding any packets to receive.
307c7fd2ed0Sgs  * This function must SET the OWN bit of BD to indicate the packets
308c7fd2ed0Sgs  * it has accepted from the ring.
309c7fd2ed0Sgs  */
310c7fd2ed0Sgs static mblk_t *rge_receive_ring(rge_t *rgep);
311c7fd2ed0Sgs #pragma	inline(rge_receive_ring)
312c7fd2ed0Sgs 
313c7fd2ed0Sgs static mblk_t *
rge_receive_ring(rge_t * rgep)314c7fd2ed0Sgs rge_receive_ring(rge_t *rgep)
315c7fd2ed0Sgs {
316c7fd2ed0Sgs 	rge_bd_t *hw_rbd_p;
317c7fd2ed0Sgs 	mblk_t *head;
318c7fd2ed0Sgs 	mblk_t **tail;
319c7fd2ed0Sgs 	mblk_t *mp;
320c7fd2ed0Sgs 	uint32_t slot;
321c7fd2ed0Sgs 
322c7fd2ed0Sgs 	ASSERT(mutex_owned(rgep->rx_lock));
323c7fd2ed0Sgs 
324c7fd2ed0Sgs 	/*
325c7fd2ed0Sgs 	 * Sync (all) the receive ring descriptors
326c7fd2ed0Sgs 	 * before accepting the packets they describe
327c7fd2ed0Sgs 	 */
328c7fd2ed0Sgs 	DMA_SYNC(rgep->rx_desc, DDI_DMA_SYNC_FORKERNEL);
329c7fd2ed0Sgs 	slot = rgep->rx_next;
330c7fd2ed0Sgs 	hw_rbd_p = &rgep->rx_ring[slot];
331c7fd2ed0Sgs 	head = NULL;
332c7fd2ed0Sgs 	tail = &head;
333c7fd2ed0Sgs 
334c7fd2ed0Sgs 	while (!(hw_rbd_p->flags_len & RGE_BSWAP_32(BD_FLAG_HW_OWN))) {
335c7fd2ed0Sgs 		if ((mp = rge_receive_packet(rgep, slot)) != NULL) {
336c7fd2ed0Sgs 			*tail = mp;
337c7fd2ed0Sgs 			tail = &mp->b_next;
338c7fd2ed0Sgs 		}
339c7fd2ed0Sgs 
340c7fd2ed0Sgs 		/*
341c7fd2ed0Sgs 		 * Clear RBD flags
342c7fd2ed0Sgs 		 */
343c7fd2ed0Sgs 		hw_rbd_p->flags_len =
344aa817493Sgs 		    RGE_BSWAP_32(rgep->rxbuf_size - rgep->head_room);
345c7fd2ed0Sgs 		HW_RBD_INIT(hw_rbd_p, slot);
346c7fd2ed0Sgs 		slot = NEXT(slot, RGE_RECV_SLOTS);
347c7fd2ed0Sgs 		hw_rbd_p = &rgep->rx_ring[slot];
348c7fd2ed0Sgs 	}
349c7fd2ed0Sgs 
350c7fd2ed0Sgs 	rgep->rx_next = slot;
351c7fd2ed0Sgs 	return (head);
352c7fd2ed0Sgs }
353c7fd2ed0Sgs 
354c7fd2ed0Sgs /*
355c7fd2ed0Sgs  * Receive all ready packets.
356c7fd2ed0Sgs  */
357c7fd2ed0Sgs void rge_receive(rge_t *rgep);
358c7fd2ed0Sgs #pragma	no_inline(rge_receive)
359c7fd2ed0Sgs 
360c7fd2ed0Sgs void
rge_receive(rge_t * rgep)361c7fd2ed0Sgs rge_receive(rge_t *rgep)
362c7fd2ed0Sgs {
363c7fd2ed0Sgs 	mblk_t *mp;
364c7fd2ed0Sgs 
365c7fd2ed0Sgs 	mutex_enter(rgep->rx_lock);
366c7fd2ed0Sgs 	mp = rge_receive_ring(rgep);
367c7fd2ed0Sgs 	mutex_exit(rgep->rx_lock);
368c7fd2ed0Sgs 
369c7fd2ed0Sgs 	if (mp != NULL)
370da14cebeSEric Cheng 		mac_rx(rgep->mh, NULL, mp);
371c7fd2ed0Sgs }
372c7fd2ed0Sgs 
373c7fd2ed0Sgs 
374c7fd2ed0Sgs #undef	RGE_DBG
375c7fd2ed0Sgs #define	RGE_DBG		RGE_DBG_SEND	/* debug flag for this code	*/
376c7fd2ed0Sgs 
377c7fd2ed0Sgs 
378c7fd2ed0Sgs /*
379c7fd2ed0Sgs  * ========== Send-side recycle routines ==========
380c7fd2ed0Sgs  */
381c7fd2ed0Sgs static uint32_t rge_send_claim(rge_t *rgep);
382c7fd2ed0Sgs #pragma	inline(rge_send_claim)
383c7fd2ed0Sgs 
384c7fd2ed0Sgs static uint32_t
rge_send_claim(rge_t * rgep)385c7fd2ed0Sgs rge_send_claim(rge_t *rgep)
386c7fd2ed0Sgs {
387c7fd2ed0Sgs 	uint32_t slot;
388c7fd2ed0Sgs 	uint32_t next;
389c7fd2ed0Sgs 
390c7fd2ed0Sgs 	mutex_enter(rgep->tx_lock);
391c7fd2ed0Sgs 	slot = rgep->tx_next;
392c7fd2ed0Sgs 	next = NEXT(slot, RGE_SEND_SLOTS);
393c7fd2ed0Sgs 	rgep->tx_next = next;
394c7fd2ed0Sgs 	rgep->tx_flow++;
395c7fd2ed0Sgs 	mutex_exit(rgep->tx_lock);
396c7fd2ed0Sgs 
397c7fd2ed0Sgs 	/*
398c7fd2ed0Sgs 	 * We check that our invariants still hold:
399c7fd2ed0Sgs 	 * +	the slot and next indexes are in range
400c7fd2ed0Sgs 	 * +	the slot must not be the last one (i.e. the *next*
401c7fd2ed0Sgs 	 *	index must not match the next-recycle index), 'cos
402c7fd2ed0Sgs 	 *	there must always be at least one free slot in a ring
403c7fd2ed0Sgs 	 */
404c7fd2ed0Sgs 	ASSERT(slot < RGE_SEND_SLOTS);
405c7fd2ed0Sgs 	ASSERT(next < RGE_SEND_SLOTS);
406c7fd2ed0Sgs 	ASSERT(next != rgep->tc_next);
407c7fd2ed0Sgs 
408c7fd2ed0Sgs 	return (slot);
409c7fd2ed0Sgs }
410c7fd2ed0Sgs 
411c7fd2ed0Sgs /*
412c7fd2ed0Sgs  * We don't want to call this function every time after a successful
413c7fd2ed0Sgs  * h/w transmit done in ISR.  Instead, we call this function in the
414c7fd2ed0Sgs  * rge_send() when there're few or no free tx BDs remained.
415c7fd2ed0Sgs  */
4169e1a9180SLi-Zhen You void rge_send_recycle(rge_t *rgep);
417c7fd2ed0Sgs #pragma	inline(rge_send_recycle)
418c7fd2ed0Sgs 
4199e1a9180SLi-Zhen You void
rge_send_recycle(rge_t * rgep)420c7fd2ed0Sgs rge_send_recycle(rge_t *rgep)
421c7fd2ed0Sgs {
422c7fd2ed0Sgs 	rge_bd_t *hw_sbd_p;
423c7fd2ed0Sgs 	uint32_t tc_tail;
424c7fd2ed0Sgs 	uint32_t tc_head;
425c7fd2ed0Sgs 	uint32_t n;
426c7fd2ed0Sgs 
427c7fd2ed0Sgs 	mutex_enter(rgep->tc_lock);
428c7fd2ed0Sgs 	tc_head = rgep->tc_next;
429c7fd2ed0Sgs 	tc_tail = rgep->tc_tail;
430aa817493Sgs 	if (tc_head == tc_tail)
431aa817493Sgs 		goto resched;
432c7fd2ed0Sgs 
433c7fd2ed0Sgs 	do {
434c7fd2ed0Sgs 		tc_tail = LAST(tc_tail, RGE_SEND_SLOTS);
435c7fd2ed0Sgs 		hw_sbd_p = &rgep->tx_ring[tc_tail];
436c7fd2ed0Sgs 		if (tc_tail == tc_head) {
437c7fd2ed0Sgs 			if (hw_sbd_p->flags_len &
438c7fd2ed0Sgs 			    RGE_BSWAP_32(BD_FLAG_HW_OWN)) {
439c7fd2ed0Sgs 				/*
440aa817493Sgs 				 * Recyled nothing: bump the watchdog counter,
441aa817493Sgs 				 * thus guaranteeing that it's nonzero
442aa817493Sgs 				 * (watchdog activated).
443c7fd2ed0Sgs 				 */
4449e1a9180SLi-Zhen You 				if (rgep->watchdog == 0)
4459e1a9180SLi-Zhen You 					rgep->watchdog = 1;
446c7fd2ed0Sgs 				mutex_exit(rgep->tc_lock);
447c7fd2ed0Sgs 				return;
448c7fd2ed0Sgs 			}
449c7fd2ed0Sgs 			break;
450c7fd2ed0Sgs 		}
451c7fd2ed0Sgs 	} while (hw_sbd_p->flags_len & RGE_BSWAP_32(BD_FLAG_HW_OWN));
452c7fd2ed0Sgs 
453aa817493Sgs 	/*
454aa817493Sgs 	 * Recyled something :-)
455aa817493Sgs 	 */
456c7fd2ed0Sgs 	rgep->tc_next = NEXT(tc_tail, RGE_SEND_SLOTS);
457c7fd2ed0Sgs 	n = rgep->tc_next - tc_head;
458c7fd2ed0Sgs 	if (rgep->tc_next < tc_head)
459c7fd2ed0Sgs 		n += RGE_SEND_SLOTS;
460c7fd2ed0Sgs 	rge_atomic_renounce(&rgep->tx_free, n);
461c7fd2ed0Sgs 	rgep->watchdog = 0;
462aa817493Sgs 	ASSERT(rgep->tx_free <= RGE_SEND_SLOTS);
463c7fd2ed0Sgs 
464aa817493Sgs resched:
465aa817493Sgs 	mutex_exit(rgep->tc_lock);
466aa817493Sgs 	if (rgep->resched_needed &&
467aa817493Sgs 	    rgep->rge_mac_state == RGE_MAC_STARTED) {
468aa817493Sgs 		rgep->resched_needed = B_FALSE;
469aa817493Sgs 		mac_tx_update(rgep->mh);
470c7fd2ed0Sgs 	}
471c7fd2ed0Sgs }
472c7fd2ed0Sgs 
473c7fd2ed0Sgs /*
474c7fd2ed0Sgs  * Send a message by copying it into a preallocated (and premapped) buffer
475c7fd2ed0Sgs  */
476aa817493Sgs static void rge_send_copy(rge_t *rgep, mblk_t *mp, uint16_t tci);
477c7fd2ed0Sgs #pragma	inline(rge_send_copy)
478c7fd2ed0Sgs 
479c7fd2ed0Sgs static void
rge_send_copy(rge_t * rgep,mblk_t * mp,uint16_t tci)480aa817493Sgs rge_send_copy(rge_t *rgep, mblk_t *mp, uint16_t tci)
481c7fd2ed0Sgs {
482c7fd2ed0Sgs 	rge_bd_t *hw_sbd_p;
483c7fd2ed0Sgs 	sw_sbd_t *ssbdp;
484c7fd2ed0Sgs 	mblk_t *bp;
485c7fd2ed0Sgs 	char *txb;
486c7fd2ed0Sgs 	uint32_t slot;
487c7fd2ed0Sgs 	size_t totlen;
488c7fd2ed0Sgs 	size_t mblen;
489c7fd2ed0Sgs 	uint32_t pflags;
490aa817493Sgs 	struct ether_header *ethhdr;
491aa817493Sgs 	struct ip *ip_hdr;
492c7fd2ed0Sgs 
493c7fd2ed0Sgs 	/*
494c7fd2ed0Sgs 	 * IMPORTANT:
495c7fd2ed0Sgs 	 *	Up to the point where it claims a place, a send_msg()
496c7fd2ed0Sgs 	 *	routine can indicate failure by returning B_FALSE.  Once it's
497c7fd2ed0Sgs 	 *	claimed a place, it mustn't fail.
498c7fd2ed0Sgs 	 *
499c7fd2ed0Sgs 	 * In this version, there's no setup to be done here, and there's
500c7fd2ed0Sgs 	 * nothing that can fail, so we can go straight to claiming our
501c7fd2ed0Sgs 	 * already-reserved place on the train.
502c7fd2ed0Sgs 	 *
503c7fd2ed0Sgs 	 * This is the point of no return!
504c7fd2ed0Sgs 	 */
505c7fd2ed0Sgs 	slot = rge_send_claim(rgep);
506c7fd2ed0Sgs 	ssbdp = &rgep->sw_sbds[slot];
507c7fd2ed0Sgs 
508c7fd2ed0Sgs 	/*
509c7fd2ed0Sgs 	 * Copy the data into a pre-mapped buffer, which avoids the
510c7fd2ed0Sgs 	 * overhead (and complication) of mapping/unmapping STREAMS
511c7fd2ed0Sgs 	 * buffers and keeping hold of them until the DMA has completed.
512c7fd2ed0Sgs 	 *
513c7fd2ed0Sgs 	 * Because all buffers are the same size, and larger than the
514c7fd2ed0Sgs 	 * longest single valid message, we don't have to bother about
515c7fd2ed0Sgs 	 * splitting the message across multiple buffers either.
516c7fd2ed0Sgs 	 */
517c7fd2ed0Sgs 	txb = DMA_VPTR(ssbdp->pbuf);
518aa817493Sgs 	totlen = 0;
519aa817493Sgs 	bp = mp;
520aa817493Sgs 	if (tci != 0) {
521aa817493Sgs 		/*
522aa817493Sgs 		 * Do not copy the vlan tag
523aa817493Sgs 		 */
524aa817493Sgs 		bcopy(bp->b_rptr, txb, 2 * ETHERADDRL);
525aa817493Sgs 		txb += 2 * ETHERADDRL;
526aa817493Sgs 		totlen += 2 * ETHERADDRL;
52722eb7cb5Sgd 		mblen = MBLKL(bp);
528aa817493Sgs 		ASSERT(mblen >= 2 * ETHERADDRL + VLAN_TAGSZ);
529aa817493Sgs 		mblen -= 2 * ETHERADDRL + VLAN_TAGSZ;
530aa817493Sgs 		if ((totlen += mblen) <= rgep->ethmax_size) {
531aa817493Sgs 			bcopy(bp->b_rptr + 2 * ETHERADDRL + VLAN_TAGSZ,
532aa817493Sgs 			    txb, mblen);
533aa817493Sgs 			txb += mblen;
534aa817493Sgs 		}
535aa817493Sgs 		bp = bp->b_cont;
536aa817493Sgs 		rgep->stats.obytes += VLAN_TAGSZ;
537aa817493Sgs 	}
538aa817493Sgs 	for (; bp != NULL; bp = bp->b_cont) {
53922eb7cb5Sgd 		mblen = MBLKL(bp);
540c7fd2ed0Sgs 		if ((totlen += mblen) <= rgep->ethmax_size) {
541c7fd2ed0Sgs 			bcopy(bp->b_rptr, txb, mblen);
542c7fd2ed0Sgs 			txb += mblen;
543c7fd2ed0Sgs 		}
544c7fd2ed0Sgs 	}
545aa817493Sgs 	rgep->stats.obytes += totlen;
54622dc2133Smx 	rgep->stats.tx_pre_ismax = rgep->stats.tx_cur_ismax;
54722dc2133Smx 	if (totlen == rgep->ethmax_size)
54822dc2133Smx 		rgep->stats.tx_cur_ismax = B_TRUE;
54922dc2133Smx 	else
55022dc2133Smx 		rgep->stats.tx_cur_ismax = B_FALSE;
551c7fd2ed0Sgs 
552c7fd2ed0Sgs 	/*
553c7fd2ed0Sgs 	 * We'e reached the end of the chain; and we should have
554c7fd2ed0Sgs 	 * collected no more than ETHERMAX bytes into our buffer.
555c7fd2ed0Sgs 	 */
556c7fd2ed0Sgs 	ASSERT(bp == NULL);
557c7fd2ed0Sgs 	ASSERT(totlen <= rgep->ethmax_size);
558c7fd2ed0Sgs 	DMA_SYNC(ssbdp->pbuf, DDI_DMA_SYNC_FORDEV);
559c7fd2ed0Sgs 
560c7fd2ed0Sgs 	/*
561aa817493Sgs 	 * Update the hardware send buffer descriptor flags
562c7fd2ed0Sgs 	 */
563c7fd2ed0Sgs 	hw_sbd_p = &rgep->tx_ring[slot];
564aa817493Sgs 	ASSERT(hw_sbd_p == ssbdp->desc.mem_va);
565c7fd2ed0Sgs 	hw_sbd_p->flags_len = RGE_BSWAP_32(totlen & SBD_LEN_MASK);
566c7fd2ed0Sgs 	if (tci != 0) {
567c7fd2ed0Sgs 		tci = TCI_OS2CHIP(tci);
568c7fd2ed0Sgs 		hw_sbd_p->vlan_tag = RGE_BSWAP_32(tci);
569c7fd2ed0Sgs 		hw_sbd_p->vlan_tag |= RGE_BSWAP_32(SBD_VLAN_PKT);
570c7fd2ed0Sgs 	} else {
571c7fd2ed0Sgs 		hw_sbd_p->vlan_tag = 0;
572c7fd2ed0Sgs 	}
573c7fd2ed0Sgs 
574aa817493Sgs 	/*
575aa817493Sgs 	 * h/w checksum offload flags
576aa817493Sgs 	 */
5770dc2366fSVenugopal Iyer 	mac_hcksum_get(mp, NULL, NULL, NULL, NULL, &pflags);
578c7fd2ed0Sgs 	if (pflags & HCK_FULLCKSUM) {
579aa817493Sgs 		ASSERT(totlen >= sizeof (struct ether_header) +
580aa817493Sgs 		    sizeof (struct ip));
581aa817493Sgs 		ethhdr = (struct ether_header *)(DMA_VPTR(ssbdp->pbuf));
582aa817493Sgs 		/*
583aa817493Sgs 		 * Is the packet an IP(v4) packet?
584aa817493Sgs 		 */
585aa817493Sgs 		if (ntohs(ethhdr->ether_type) == ETHERTYPE_IP) {
586aa817493Sgs 			ip_hdr = (struct ip *)
587aa817493Sgs 			    ((uint8_t *)DMA_VPTR(ssbdp->pbuf) +
588aa817493Sgs 			    sizeof (struct ether_header));
589aa817493Sgs 			if (ip_hdr->ip_p == IPPROTO_TCP)
590aa817493Sgs 				hw_sbd_p->flags_len |=
591aa817493Sgs 				    RGE_BSWAP_32(SBD_FLAG_TCP_CKSUM);
592aa817493Sgs 			else if (ip_hdr->ip_p == IPPROTO_UDP)
593aa817493Sgs 				hw_sbd_p->flags_len |=
594aa817493Sgs 				    RGE_BSWAP_32(SBD_FLAG_UDP_CKSUM);
595c7fd2ed0Sgs 		}
596c7fd2ed0Sgs 	}
597aa817493Sgs 	if (pflags & HCK_IPV4_HDRCKSUM)
598c7fd2ed0Sgs 		hw_sbd_p->flags_len |= RGE_BSWAP_32(SBD_FLAG_IP_CKSUM);
599c7fd2ed0Sgs 
600c7fd2ed0Sgs 	HW_SBD_SET(hw_sbd_p, slot);
601aa817493Sgs 
602aa817493Sgs 	/*
603aa817493Sgs 	 * We're done.
604aa817493Sgs 	 * The message can be freed right away, as we've already
605aa817493Sgs 	 * copied the contents ...
606aa817493Sgs 	 */
607aa817493Sgs 	freemsg(mp);
608c7fd2ed0Sgs }
609c7fd2ed0Sgs 
610c7fd2ed0Sgs static boolean_t
rge_send(rge_t * rgep,mblk_t * mp)611c7fd2ed0Sgs rge_send(rge_t *rgep, mblk_t *mp)
612c7fd2ed0Sgs {
613c7fd2ed0Sgs 	struct ether_vlan_header *ehp;
614aa817493Sgs 	uint16_t tci;
615c7fd2ed0Sgs 
616c7fd2ed0Sgs 	ASSERT(mp->b_next == NULL);
617c7fd2ed0Sgs 
618c7fd2ed0Sgs 	/*
619c7fd2ed0Sgs 	 * Try to reserve a place in the transmit ring.
620c7fd2ed0Sgs 	 */
621c7fd2ed0Sgs 	if (!rge_atomic_reserve(&rgep->tx_free, 1)) {
622c7fd2ed0Sgs 		RGE_DEBUG(("rge_send: no free slots"));
623c7fd2ed0Sgs 		rgep->stats.defer++;
624c7fd2ed0Sgs 		rgep->resched_needed = B_TRUE;
625c7fd2ed0Sgs 		return (B_FALSE);
626c7fd2ed0Sgs 	}
627c7fd2ed0Sgs 
628aa817493Sgs 	/*
629aa817493Sgs 	 * Determine if the packet is VLAN tagged.
630aa817493Sgs 	 */
631aa817493Sgs 	ASSERT(MBLKL(mp) >= sizeof (struct ether_header));
632aa817493Sgs 	tci = 0;
633aa817493Sgs 	ehp = (struct ether_vlan_header *)mp->b_rptr;
634605445d5Sdg 	if (ehp->ether_tpid == htons(ETHERTYPE_VLAN))
635aa817493Sgs 		tci = ntohs(ehp->ether_tci);
636aa817493Sgs 
637c7fd2ed0Sgs 	/*
638c7fd2ed0Sgs 	 * We've reserved a place :-)
639c7fd2ed0Sgs 	 * These ASSERTions check that our invariants still hold:
640c7fd2ed0Sgs 	 *	there must still be at least one free place
641c7fd2ed0Sgs 	 *	there must be at least one place NOT free (ours!)
642c7fd2ed0Sgs 	 */
643c7fd2ed0Sgs 	ASSERT(rgep->tx_free < RGE_SEND_SLOTS);
644aa817493Sgs 	rge_send_copy(rgep, mp, tci);
645c7fd2ed0Sgs 
646c7fd2ed0Sgs 	/*
647c7fd2ed0Sgs 	 * Trigger chip h/w transmit ...
648c7fd2ed0Sgs 	 */
649c7fd2ed0Sgs 	mutex_enter(rgep->tx_lock);
650c7fd2ed0Sgs 	if (--rgep->tx_flow == 0) {
651c7fd2ed0Sgs 		DMA_SYNC(rgep->tx_desc, DDI_DMA_SYNC_FORDEV);
652c7fd2ed0Sgs 		rgep->tc_tail = rgep->tx_next;
653c7fd2ed0Sgs 	}
6543a84c50fSWinson Wang - Sun Microsystems - Beijing China 	rgep->stats.opackets++;
655c7fd2ed0Sgs 	mutex_exit(rgep->tx_lock);
656c7fd2ed0Sgs 
657c7fd2ed0Sgs 	return (B_TRUE);
658c7fd2ed0Sgs }
659c7fd2ed0Sgs 
660c7fd2ed0Sgs uint_t
rge_reschedule(caddr_t arg1,caddr_t arg2)661aa817493Sgs rge_reschedule(caddr_t arg1, caddr_t arg2)
662c7fd2ed0Sgs {
663c7fd2ed0Sgs 	rge_t *rgep;
664c7fd2ed0Sgs 
665aa817493Sgs 	rgep = (rge_t *)arg1;
666aa817493Sgs 	_NOTE(ARGUNUSED(arg2))
667c7fd2ed0Sgs 
668aa817493Sgs 	rge_send_recycle(rgep);
669c7fd2ed0Sgs 
6703a84c50fSWinson Wang - Sun Microsystems - Beijing China 	if (rgep->chipid.is_pcie && rgep->tx_free != RGE_SEND_SLOTS) {
6713a84c50fSWinson Wang - Sun Microsystems - Beijing China 		/*
6723a84c50fSWinson Wang - Sun Microsystems - Beijing China 		 * It's observed that in current Realtek PCI-E chips, tx
6733a84c50fSWinson Wang - Sun Microsystems - Beijing China 		 * request of the second fragment for upper layer packets
6743a84c50fSWinson Wang - Sun Microsystems - Beijing China 		 * will be ignored if the hardware transmission is in
6753a84c50fSWinson Wang - Sun Microsystems - Beijing China 		 * progress and will not be processed when the tx engine
6763a84c50fSWinson Wang - Sun Microsystems - Beijing China 		 * is idle. So one solution is to re-issue the requests
6773a84c50fSWinson Wang - Sun Microsystems - Beijing China 		 * if there are untransmitted packets after tx interrupts
6783a84c50fSWinson Wang - Sun Microsystems - Beijing China 		 * occur.
6793a84c50fSWinson Wang - Sun Microsystems - Beijing China 		 */
6803a84c50fSWinson Wang - Sun Microsystems - Beijing China 		rge_tx_trigger(rgep);
6813a84c50fSWinson Wang - Sun Microsystems - Beijing China 	}
6823a84c50fSWinson Wang - Sun Microsystems - Beijing China 
683aa817493Sgs 	return (DDI_INTR_CLAIMED);
684c7fd2ed0Sgs }
685c7fd2ed0Sgs 
686c7fd2ed0Sgs /*
687c7fd2ed0Sgs  * rge_m_tx() - send a chain of packets
688c7fd2ed0Sgs  */
689c7fd2ed0Sgs mblk_t *
rge_m_tx(void * arg,mblk_t * mp)690c7fd2ed0Sgs rge_m_tx(void *arg, mblk_t *mp)
691c7fd2ed0Sgs {
692c7fd2ed0Sgs 	rge_t *rgep = arg;		/* private device info	*/
693c7fd2ed0Sgs 	mblk_t *next;
6943a84c50fSWinson Wang - Sun Microsystems - Beijing China 	mblk_t *mp_org = mp;
695c7fd2ed0Sgs 
696c7fd2ed0Sgs 	ASSERT(mp != NULL);
697c7fd2ed0Sgs 
698343c2616Smx 	rw_enter(rgep->errlock, RW_READER);
699343c2616Smx 	if ((rgep->rge_mac_state != RGE_MAC_STARTED) ||
7007b114c4bSWinson Wang - Sun Microsystems - Beijing China 	    (rgep->rge_chip_state != RGE_CHIP_RUNNING) ||
7017b114c4bSWinson Wang - Sun Microsystems - Beijing China 	    (rgep->param_link_up != LINK_STATE_UP)) {
702343c2616Smx 		rw_exit(rgep->errlock);
7037b114c4bSWinson Wang - Sun Microsystems - Beijing China 		RGE_DEBUG(("rge_m_tx: tx doesn't work"));
7047b114c4bSWinson Wang - Sun Microsystems - Beijing China 		freemsgchain(mp);
7057b114c4bSWinson Wang - Sun Microsystems - Beijing China 		return (NULL);
706c7fd2ed0Sgs 	}
707c7fd2ed0Sgs 
708c7fd2ed0Sgs 	while (mp != NULL) {
709c7fd2ed0Sgs 		next = mp->b_next;
710c7fd2ed0Sgs 		mp->b_next = NULL;
711c7fd2ed0Sgs 
712c7fd2ed0Sgs 		if (!rge_send(rgep, mp)) {
713c7fd2ed0Sgs 			mp->b_next = next;
714c7fd2ed0Sgs 			break;
715c7fd2ed0Sgs 		}
716c7fd2ed0Sgs 
717c7fd2ed0Sgs 		mp = next;
718c7fd2ed0Sgs 	}
7193a84c50fSWinson Wang - Sun Microsystems - Beijing China 	if (mp != mp_org) {
7203a84c50fSWinson Wang - Sun Microsystems - Beijing China 		rge_tx_trigger(rgep);
7213a84c50fSWinson Wang - Sun Microsystems - Beijing China 	}
722c7fd2ed0Sgs 	rw_exit(rgep->errlock);
723c7fd2ed0Sgs 
724c7fd2ed0Sgs 	return (mp);
725c7fd2ed0Sgs }
726