1*14b24e2bSVaishali Kulkarni# 2*14b24e2bSVaishali Kulkarni# CDDL HEADER START 3*14b24e2bSVaishali Kulkarni# 4*14b24e2bSVaishali Kulkarni# The contents of this file are subject to the terms of the 5*14b24e2bSVaishali Kulkarni# Common Development and Distribution License, v.1, (the "License"). 6*14b24e2bSVaishali Kulkarni# You may not use this file except in compliance with the License. 7*14b24e2bSVaishali Kulkarni# 8*14b24e2bSVaishali Kulkarni# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*14b24e2bSVaishali Kulkarni# or http://opensource.org/licenses/CDDL-1.0. 10*14b24e2bSVaishali Kulkarni# See the License for the specific language governing permissions 11*14b24e2bSVaishali Kulkarni# and limitations under the License. 12*14b24e2bSVaishali Kulkarni# 13*14b24e2bSVaishali Kulkarni# When distributing Covered Code, include this CDDL HEADER in each 14*14b24e2bSVaishali Kulkarni# file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*14b24e2bSVaishali Kulkarni# If applicable, add the following below this CDDL HEADER, with the 16*14b24e2bSVaishali Kulkarni# fields enclosed by brackets "[]" replaced with your own identifying 17*14b24e2bSVaishali Kulkarni# information: Portions Copyright [yyyy] [name of copyright owner] 18*14b24e2bSVaishali Kulkarni# 19*14b24e2bSVaishali Kulkarni# CDDL HEADER END 20*14b24e2bSVaishali Kulkarni# 21*14b24e2bSVaishali Kulkarni 22*14b24e2bSVaishali Kulkarni# 23*14b24e2bSVaishali Kulkarni# Copyright 2014-2017 Cavium, Inc. 24*14b24e2bSVaishali Kulkarni# The contents of this file are subject to the terms of the Common Development 25*14b24e2bSVaishali Kulkarni# and Distribution License, v.1, (the "License"). 26*14b24e2bSVaishali Kulkarni# 27*14b24e2bSVaishali Kulkarni# You may not use this file except in compliance with the License. 28*14b24e2bSVaishali Kulkarni# 29*14b24e2bSVaishali Kulkarni# You can obtain a copy of the License at available 30*14b24e2bSVaishali Kulkarni# at http://opensource.org/licenses/CDDL-1.0 31*14b24e2bSVaishali Kulkarni# 32*14b24e2bSVaishali Kulkarni# See the License for the specific language governing permissions and 33*14b24e2bSVaishali Kulkarni# limitations under the License. 34*14b24e2bSVaishali Kulkarni# 35*14b24e2bSVaishali Kulkarni 36*14b24e2bSVaishali Kulkarni# 37*14b24e2bSVaishali Kulkarni# 38*14b24e2bSVaishali Kulkarni# checksum - configures checksum offloading capability 39*14b24e2bSVaishali Kulkarni# - default is TCP/UDP/IPv4 checksum offload for rx/tx 40*14b24e2bSVaishali Kulkarni# - 0 = no checksum offload 41*14b24e2bSVaishali Kulkarni# - 1 = IPv4 checksum offload for rx/tx 42*14b24e2bSVaishali Kulkarni# default_checksum=1; 43*14b24e2bSVaishali Kulkarni# 44*14b24e2bSVaishali Kulkarni# 45*14b24e2bSVaishali Kulkarni# rx_ring_size-configures the number of RX packet descriptors to allocate per ring 46*14b24e2bSVaishali Kulkarni# - valid range is 1024 to 8192 47*14b24e2bSVaishali Kulkarni# - default is 8192 48*14b24e2bSVaishali Kulkarni# default_rx_ring_size=8192; 49*14b24e2bSVaishali Kulkarni# 50*14b24e2bSVaishali Kulkarni# tx_ring_size-configures the number of RX packet descriptors to allocate per ring 51*14b24e2bSVaishali Kulkarni# - valid range is 1024 to 8192 52*14b24e2bSVaishali Kulkarni# - default is 8192 53*14b24e2bSVaishali Kulkarni# default_tx_ring_size=8192; 54*14b24e2bSVaishali Kulkarni# 55*14b24e2bSVaishali Kulkarni# lso_enable - enable TCP Large Segment Offload (LSO) 56*14b24e2bSVaishali Kulkarni# - default enabled 57*14b24e2bSVaishali Kulkarni# - 0 = disabled / 1 = enabled 58*14b24e2bSVaishali Kulkarni# default_lso_enable=1; 59*14b24e2bSVaishali Kulkarni#qede0_lso_enable=0; 60*14b24e2bSVaishali Kulkarni#qede1_lso_enable=0; 61*14b24e2bSVaishali Kulkarni#qede2_lso_enable=0; 62*14b24e2bSVaishali Kulkarni#qede3_lso_enable=0; 63*14b24e2bSVaishali Kulkarni# 64*14b24e2bSVaishali Kulkarni# lro_enable - enable TCP Large Receive Offload (LRO) 65*14b24e2bSVaishali Kulkarni# - default enabled 66*14b24e2bSVaishali Kulkarni# - 0 = disabled / 1 = enabled 67*14b24e2bSVaishali Kulkarni# default_lro_enable=1; 68*14b24e2bSVaishali Kulkarni#qede0_lro_enable=0; 69*14b24e2bSVaishali Kulkarni#qede1_lro_enable=0; 70*14b24e2bSVaishali Kulkarni#qede2_lro_enable=0; 71*14b24e2bSVaishali Kulkarni#qede3_lro_enable=0; 72*14b24e2bSVaishali Kulkarni# 73*14b24e2bSVaishali Kulkarni# num_fp - configures the number of rings to allocate 74*14b24e2bSVaishali Kulkarni# - valid values are 1,2,3,4,5,6 75*14b24e2bSVaishali Kulkarni# - default is 4 which implies: 76*14b24e2bSVaishali Kulkarni# - 4 rings for single function mode 77*14b24e2bSVaishali Kulkarni#default_num_fp=4; 78*14b24e2bSVaishali Kulkarni# 79*14b24e2bSVaishali Kulkarni# mtu - hardware MTU size 80*14b24e2bSVaishali Kulkarni# - valid values are 1500, 9000 81*14b24e2bSVaishali Kulkarni# - default is 1500 82*14b24e2bSVaishali Kulkarni# default_mtu=1500; 83*14b24e2bSVaishali Kulkarni#qede0_mtu=9000; 84*14b24e2bSVaishali Kulkarni#qede1_mtu=9000; 85*14b24e2bSVaishali Kulkarni#qede2_mtu=9000; 86*14b24e2bSVaishali Kulkarni#qede3_mtu=9000; 87*14b24e2bSVaishali Kulkarni# 88