1*14b24e2bSVaishali Kulkarni /* 2*14b24e2bSVaishali Kulkarni * CDDL HEADER START 3*14b24e2bSVaishali Kulkarni * 4*14b24e2bSVaishali Kulkarni * The contents of this file are subject to the terms of the 5*14b24e2bSVaishali Kulkarni * Common Development and Distribution License, v.1, (the "License"). 6*14b24e2bSVaishali Kulkarni * You may not use this file except in compliance with the License. 7*14b24e2bSVaishali Kulkarni * 8*14b24e2bSVaishali Kulkarni * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*14b24e2bSVaishali Kulkarni * or http://opensource.org/licenses/CDDL-1.0. 10*14b24e2bSVaishali Kulkarni * See the License for the specific language governing permissions 11*14b24e2bSVaishali Kulkarni * and limitations under the License. 12*14b24e2bSVaishali Kulkarni * 13*14b24e2bSVaishali Kulkarni * When distributing Covered Code, include this CDDL HEADER in each 14*14b24e2bSVaishali Kulkarni * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*14b24e2bSVaishali Kulkarni * If applicable, add the following below this CDDL HEADER, with the 16*14b24e2bSVaishali Kulkarni * fields enclosed by brackets "[]" replaced with your own identifying 17*14b24e2bSVaishali Kulkarni * information: Portions Copyright [yyyy] [name of copyright owner] 18*14b24e2bSVaishali Kulkarni * 19*14b24e2bSVaishali Kulkarni * CDDL HEADER END 20*14b24e2bSVaishali Kulkarni */ 21*14b24e2bSVaishali Kulkarni 22*14b24e2bSVaishali Kulkarni /* 23*14b24e2bSVaishali Kulkarni * Copyright 2014-2017 Cavium, Inc. 24*14b24e2bSVaishali Kulkarni * The contents of this file are subject to the terms of the Common Development 25*14b24e2bSVaishali Kulkarni * and Distribution License, v.1, (the "License"). 26*14b24e2bSVaishali Kulkarni 27*14b24e2bSVaishali Kulkarni * You may not use this file except in compliance with the License. 28*14b24e2bSVaishali Kulkarni 29*14b24e2bSVaishali Kulkarni * You can obtain a copy of the License at available 30*14b24e2bSVaishali Kulkarni * at http://opensource.org/licenses/CDDL-1.0 31*14b24e2bSVaishali Kulkarni 32*14b24e2bSVaishali Kulkarni * See the License for the specific language governing permissions and 33*14b24e2bSVaishali Kulkarni * limitations under the License. 34*14b24e2bSVaishali Kulkarni */ 35*14b24e2bSVaishali Kulkarni 36*14b24e2bSVaishali Kulkarni #ifndef __ECORE_HSI_IWARP__ 37*14b24e2bSVaishali Kulkarni #define __ECORE_HSI_IWARP__ 38*14b24e2bSVaishali Kulkarni /************************************************************************/ 39*14b24e2bSVaishali Kulkarni /* Add include to ecore hsi rdma target for both roce and iwarp ecore driver */ 40*14b24e2bSVaishali Kulkarni /************************************************************************/ 41*14b24e2bSVaishali Kulkarni #include "ecore_hsi_rdma.h" 42*14b24e2bSVaishali Kulkarni /************************************************************************/ 43*14b24e2bSVaishali Kulkarni /* Add include to common TCP target */ 44*14b24e2bSVaishali Kulkarni /************************************************************************/ 45*14b24e2bSVaishali Kulkarni #include "tcp_common.h" 46*14b24e2bSVaishali Kulkarni 47*14b24e2bSVaishali Kulkarni /************************************************************************/ 48*14b24e2bSVaishali Kulkarni /* Add include to common iwarp target for both eCore and protocol iwarp driver */ 49*14b24e2bSVaishali Kulkarni /************************************************************************/ 50*14b24e2bSVaishali Kulkarni #include "iwarp_common.h" 51*14b24e2bSVaishali Kulkarni 52*14b24e2bSVaishali Kulkarni /* 53*14b24e2bSVaishali Kulkarni * The iwarp storm context of Ystorm 54*14b24e2bSVaishali Kulkarni */ 55*14b24e2bSVaishali Kulkarni struct ystorm_iwarp_conn_st_ctx 56*14b24e2bSVaishali Kulkarni { 57*14b24e2bSVaishali Kulkarni __le32 reserved[4]; 58*14b24e2bSVaishali Kulkarni }; 59*14b24e2bSVaishali Kulkarni 60*14b24e2bSVaishali Kulkarni /* 61*14b24e2bSVaishali Kulkarni * The iwarp storm context of Pstorm 62*14b24e2bSVaishali Kulkarni */ 63*14b24e2bSVaishali Kulkarni struct pstorm_iwarp_conn_st_ctx 64*14b24e2bSVaishali Kulkarni { 65*14b24e2bSVaishali Kulkarni __le32 reserved[36]; 66*14b24e2bSVaishali Kulkarni }; 67*14b24e2bSVaishali Kulkarni 68*14b24e2bSVaishali Kulkarni /* 69*14b24e2bSVaishali Kulkarni * The iwarp storm context of Xstorm 70*14b24e2bSVaishali Kulkarni */ 71*14b24e2bSVaishali Kulkarni struct xstorm_iwarp_conn_st_ctx 72*14b24e2bSVaishali Kulkarni { 73*14b24e2bSVaishali Kulkarni __le32 reserved[44]; 74*14b24e2bSVaishali Kulkarni }; 75*14b24e2bSVaishali Kulkarni 76*14b24e2bSVaishali Kulkarni struct e4_xstorm_iwarp_conn_ag_ctx 77*14b24e2bSVaishali Kulkarni { 78*14b24e2bSVaishali Kulkarni u8 reserved0 /* cdu_validation */; 79*14b24e2bSVaishali Kulkarni u8 state /* state */; 80*14b24e2bSVaishali Kulkarni u8 flags0; 81*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */ 82*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT 0 83*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM1_MASK 0x1 /* exist_in_qm1 */ 84*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM1_SHIFT 1 85*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM2_MASK 0x1 /* exist_in_qm2 */ 86*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM2_SHIFT 2 87*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM3_MASK 0x1 /* exist_in_qm3 */ 88*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM3_SHIFT 3 89*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT4_MASK 0x1 /* bit4 */ 90*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT4_SHIFT 4 91*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RESERVED2_MASK 0x1 /* cf_array_active */ 92*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RESERVED2_SHIFT 5 93*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT6_MASK 0x1 /* bit6 */ 94*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT6_SHIFT 6 95*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT7_MASK 0x1 /* bit7 */ 96*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT7_SHIFT 7 97*14b24e2bSVaishali Kulkarni u8 flags1; 98*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT8_MASK 0x1 /* bit8 */ 99*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT8_SHIFT 0 100*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT9_MASK 0x1 /* bit9 */ 101*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT9_SHIFT 1 102*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT10_MASK 0x1 /* bit10 */ 103*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT10_SHIFT 2 104*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT11_MASK 0x1 /* bit11 */ 105*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT11_SHIFT 3 106*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT12_MASK 0x1 /* bit12 */ 107*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT12_SHIFT 4 108*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT13_MASK 0x1 /* bit13 */ 109*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT13_SHIFT 5 110*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT14_MASK 0x1 /* bit14 */ 111*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT14_SHIFT 6 112*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_YSTORM_FLUSH_OR_REWIND_SND_MAX_MASK 0x1 /* bit15 */ 113*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_YSTORM_FLUSH_OR_REWIND_SND_MAX_SHIFT 7 114*14b24e2bSVaishali Kulkarni u8 flags2; 115*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF0_MASK 0x3 /* timer0cf */ 116*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF0_SHIFT 0 117*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF1_MASK 0x3 /* timer1cf */ 118*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF1_SHIFT 2 119*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF2_MASK 0x3 /* timer2cf */ 120*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF2_SHIFT 4 121*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_MASK 0x3 /* timer_stop_all */ 122*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_SHIFT 6 123*14b24e2bSVaishali Kulkarni u8 flags3; 124*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF4_MASK 0x3 /* cf4 */ 125*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF4_SHIFT 0 126*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF5_MASK 0x3 /* cf5 */ 127*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF5_SHIFT 2 128*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF6_MASK 0x3 /* cf6 */ 129*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF6_SHIFT 4 130*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF7_MASK 0x3 /* cf7 */ 131*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF7_SHIFT 6 132*14b24e2bSVaishali Kulkarni u8 flags4; 133*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF8_MASK 0x3 /* cf8 */ 134*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF8_SHIFT 0 135*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF9_MASK 0x3 /* cf9 */ 136*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF9_SHIFT 2 137*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF10_MASK 0x3 /* cf10 */ 138*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF10_SHIFT 4 139*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF11_MASK 0x3 /* cf11 */ 140*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF11_SHIFT 6 141*14b24e2bSVaishali Kulkarni u8 flags5; 142*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF12_MASK 0x3 /* cf12 */ 143*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF12_SHIFT 0 144*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF13_MASK 0x3 /* cf13 */ 145*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF13_SHIFT 2 146*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_MASK 0x3 /* cf14 */ 147*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_SHIFT 4 148*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF15_MASK 0x3 /* cf15 */ 149*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF15_SHIFT 6 150*14b24e2bSVaishali Kulkarni u8 flags6; 151*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_MASK 0x3 /* cf16 */ 152*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_SHIFT 0 153*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF17_MASK 0x3 /* cf_array_cf */ 154*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF17_SHIFT 2 155*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF18_MASK 0x3 /* cf18 */ 156*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF18_SHIFT 4 157*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_MASK 0x3 /* cf19 */ 158*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_SHIFT 6 159*14b24e2bSVaishali Kulkarni u8 flags7; 160*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_MASK 0x3 /* cf20 */ 161*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_SHIFT 0 162*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_MASK 0x3 /* cf21 */ 163*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_SHIFT 2 164*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_MASK 0x3 /* cf22 */ 165*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_SHIFT 4 166*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF0EN_MASK 0x1 /* cf0en */ 167*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT 6 168*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF1EN_MASK 0x1 /* cf1en */ 169*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT 7 170*14b24e2bSVaishali Kulkarni u8 flags8; 171*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF2EN_MASK 0x1 /* cf2en */ 172*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT 0 173*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_MASK 0x1 /* cf3en */ 174*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_SHIFT 1 175*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF4EN_MASK 0x1 /* cf4en */ 176*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF4EN_SHIFT 2 177*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF5EN_MASK 0x1 /* cf5en */ 178*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF5EN_SHIFT 3 179*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF6EN_MASK 0x1 /* cf6en */ 180*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF6EN_SHIFT 4 181*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF7EN_MASK 0x1 /* cf7en */ 182*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF7EN_SHIFT 5 183*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF8EN_MASK 0x1 /* cf8en */ 184*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF8EN_SHIFT 6 185*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF9EN_MASK 0x1 /* cf9en */ 186*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF9EN_SHIFT 7 187*14b24e2bSVaishali Kulkarni u8 flags9; 188*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF10EN_MASK 0x1 /* cf10en */ 189*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF10EN_SHIFT 0 190*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF11EN_MASK 0x1 /* cf11en */ 191*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF11EN_SHIFT 1 192*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF12EN_MASK 0x1 /* cf12en */ 193*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF12EN_SHIFT 2 194*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF13EN_MASK 0x1 /* cf13en */ 195*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF13EN_SHIFT 3 196*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_EN_MASK 0x1 /* cf14en */ 197*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_EN_SHIFT 4 198*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF15EN_MASK 0x1 /* cf15en */ 199*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF15EN_SHIFT 5 200*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_EN_MASK 0x1 /* cf16en */ 201*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_EN_SHIFT 6 202*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF17EN_MASK 0x1 /* cf_array_cf_en */ 203*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF17EN_SHIFT 7 204*14b24e2bSVaishali Kulkarni u8 flags10; 205*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF18EN_MASK 0x1 /* cf18en */ 206*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF18EN_SHIFT 0 207*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_EN_MASK 0x1 /* cf19en */ 208*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_EN_SHIFT 1 209*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_EN_MASK 0x1 /* cf20en */ 210*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_EN_SHIFT 2 211*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_EN_MASK 0x1 /* cf21en */ 212*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_EN_SHIFT 3 213*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_EN_MASK 0x1 /* cf22en */ 214*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_EN_SHIFT 4 215*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF23EN_MASK 0x1 /* cf23en */ 216*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF23EN_SHIFT 5 217*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */ 218*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT 6 219*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_MORE_TO_SEND_RULE_EN_MASK 0x1 /* rule1en */ 220*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_MORE_TO_SEND_RULE_EN_SHIFT 7 221*14b24e2bSVaishali Kulkarni u8 flags11; 222*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_TX_BLOCKED_EN_MASK 0x1 /* rule2en */ 223*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_TX_BLOCKED_EN_SHIFT 0 224*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */ 225*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT 1 226*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RESERVED3_MASK 0x1 /* rule4en */ 227*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RESERVED3_SHIFT 2 228*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */ 229*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE5EN_SHIFT 3 230*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE6EN_MASK 0x1 /* rule6en */ 231*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE6EN_SHIFT 4 232*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE7EN_MASK 0x1 /* rule7en */ 233*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE7EN_SHIFT 5 234*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED1_MASK 0x1 /* rule8en */ 235*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED1_SHIFT 6 236*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE9EN_MASK 0x1 /* rule9en */ 237*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE9EN_SHIFT 7 238*14b24e2bSVaishali Kulkarni u8 flags12; 239*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SQ_NOT_EMPTY_RULE_EN_MASK 0x1 /* rule10en */ 240*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SQ_NOT_EMPTY_RULE_EN_SHIFT 0 241*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE11EN_MASK 0x1 /* rule11en */ 242*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE11EN_SHIFT 1 243*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED2_MASK 0x1 /* rule12en */ 244*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED2_SHIFT 2 245*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED3_MASK 0x1 /* rule13en */ 246*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED3_SHIFT 3 247*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FENCE_RULE_EN_MASK 0x1 /* rule14en */ 248*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_SQ_FENCE_RULE_EN_SHIFT 4 249*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE15EN_MASK 0x1 /* rule15en */ 250*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE15EN_SHIFT 5 251*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE16EN_MASK 0x1 /* rule16en */ 252*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE16EN_SHIFT 6 253*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE17EN_MASK 0x1 /* rule17en */ 254*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE17EN_SHIFT 7 255*14b24e2bSVaishali Kulkarni u8 flags13; 256*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_IRQ_NOT_EMPTY_RULE_EN_MASK 0x1 /* rule18en */ 257*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_IRQ_NOT_EMPTY_RULE_EN_SHIFT 0 258*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_HQ_NOT_FULL_RULE_EN_MASK 0x1 /* rule19en */ 259*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_HQ_NOT_FULL_RULE_EN_SHIFT 1 260*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_ORQ_RD_FENCE_RULE_EN_MASK 0x1 /* rule20en */ 261*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_ORQ_RD_FENCE_RULE_EN_SHIFT 2 262*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE21EN_MASK 0x1 /* rule21en */ 263*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_RULE21EN_SHIFT 3 264*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED6_MASK 0x1 /* rule22en */ 265*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED6_SHIFT 4 266*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_ORQ_NOT_FULL_RULE_EN_MASK 0x1 /* rule23en */ 267*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_ORQ_NOT_FULL_RULE_EN_SHIFT 5 268*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED8_MASK 0x1 /* rule24en */ 269*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED8_SHIFT 6 270*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED9_MASK 0x1 /* rule25en */ 271*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED9_SHIFT 7 272*14b24e2bSVaishali Kulkarni u8 flags14; 273*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT16_MASK 0x1 /* bit16 */ 274*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT16_SHIFT 0 275*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT17_MASK 0x1 /* bit17 */ 276*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT17_SHIFT 1 277*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT18_MASK 0x1 /* bit18 */ 278*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_BIT18_SHIFT 2 279*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED1_MASK 0x1 /* bit19 */ 280*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED1_SHIFT 3 281*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED2_MASK 0x1 /* bit20 */ 282*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED2_SHIFT 4 283*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED3_MASK 0x1 /* bit21 */ 284*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_E5_RESERVED3_SHIFT 5 285*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF23_MASK 0x3 /* cf23 */ 286*14b24e2bSVaishali Kulkarni #define E4_XSTORM_IWARP_CONN_AG_CTX_CF23_SHIFT 6 287*14b24e2bSVaishali Kulkarni u8 byte2 /* byte2 */; 288*14b24e2bSVaishali Kulkarni __le16 physical_q0 /* physical_q0 */; 289*14b24e2bSVaishali Kulkarni __le16 physical_q1 /* physical_q1 */; 290*14b24e2bSVaishali Kulkarni __le16 sq_comp_cons /* physical_q2 */; 291*14b24e2bSVaishali Kulkarni __le16 sq_tx_cons /* word3 */; 292*14b24e2bSVaishali Kulkarni __le16 sq_prod /* word4 */; 293*14b24e2bSVaishali Kulkarni __le16 word5 /* word5 */; 294*14b24e2bSVaishali Kulkarni __le16 conn_dpi /* conn_dpi */; 295*14b24e2bSVaishali Kulkarni u8 byte3 /* byte3 */; 296*14b24e2bSVaishali Kulkarni u8 byte4 /* byte4 */; 297*14b24e2bSVaishali Kulkarni u8 byte5 /* byte5 */; 298*14b24e2bSVaishali Kulkarni u8 byte6 /* byte6 */; 299*14b24e2bSVaishali Kulkarni __le32 reg0 /* reg0 */; 300*14b24e2bSVaishali Kulkarni __le32 reg1 /* reg1 */; 301*14b24e2bSVaishali Kulkarni __le32 reg2 /* reg2 */; 302*14b24e2bSVaishali Kulkarni __le32 more_to_send_seq /* reg3 */; 303*14b24e2bSVaishali Kulkarni __le32 reg4 /* reg4 */; 304*14b24e2bSVaishali Kulkarni __le32 rewinded_snd_max /* cf_array0 */; 305*14b24e2bSVaishali Kulkarni __le32 rd_msn /* cf_array1 */; 306*14b24e2bSVaishali Kulkarni __le16 irq_prod_via_msdm /* word7 */; 307*14b24e2bSVaishali Kulkarni __le16 irq_cons /* word8 */; 308*14b24e2bSVaishali Kulkarni __le16 hq_cons_th_or_mpa_data /* word9 */; 309*14b24e2bSVaishali Kulkarni __le16 hq_cons /* word10 */; 310*14b24e2bSVaishali Kulkarni __le32 atom_msn /* reg7 */; 311*14b24e2bSVaishali Kulkarni __le32 orq_cons /* reg8 */; 312*14b24e2bSVaishali Kulkarni __le32 orq_cons_th /* reg9 */; 313*14b24e2bSVaishali Kulkarni u8 byte7 /* byte7 */; 314*14b24e2bSVaishali Kulkarni u8 max_ord /* byte8 */; 315*14b24e2bSVaishali Kulkarni u8 wqe_data_pad_bytes /* byte9 */; 316*14b24e2bSVaishali Kulkarni u8 former_hq_prod /* byte10 */; 317*14b24e2bSVaishali Kulkarni u8 irq_prod_via_msem /* byte11 */; 318*14b24e2bSVaishali Kulkarni u8 byte12 /* byte12 */; 319*14b24e2bSVaishali Kulkarni u8 max_pkt_pdu_size_lo /* byte13 */; 320*14b24e2bSVaishali Kulkarni u8 max_pkt_pdu_size_hi /* byte14 */; 321*14b24e2bSVaishali Kulkarni u8 byte15 /* byte15 */; 322*14b24e2bSVaishali Kulkarni u8 e5_reserved /* e5_reserved */; 323*14b24e2bSVaishali Kulkarni __le16 e5_reserved4 /* word11 */; 324*14b24e2bSVaishali Kulkarni __le32 reg10 /* reg10 */; 325*14b24e2bSVaishali Kulkarni __le32 reg11 /* reg11 */; 326*14b24e2bSVaishali Kulkarni __le32 shared_queue_page_addr_lo /* reg12 */; 327*14b24e2bSVaishali Kulkarni __le32 shared_queue_page_addr_hi /* reg13 */; 328*14b24e2bSVaishali Kulkarni __le32 reg14 /* reg14 */; 329*14b24e2bSVaishali Kulkarni __le32 reg15 /* reg15 */; 330*14b24e2bSVaishali Kulkarni __le32 reg16 /* reg16 */; 331*14b24e2bSVaishali Kulkarni __le32 reg17 /* reg17 */; 332*14b24e2bSVaishali Kulkarni }; 333*14b24e2bSVaishali Kulkarni 334*14b24e2bSVaishali Kulkarni struct e4_tstorm_iwarp_conn_ag_ctx 335*14b24e2bSVaishali Kulkarni { 336*14b24e2bSVaishali Kulkarni u8 reserved0 /* cdu_validation */; 337*14b24e2bSVaishali Kulkarni u8 state /* state */; 338*14b24e2bSVaishali Kulkarni u8 flags0; 339*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */ 340*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT 0 341*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */ 342*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT 1 343*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_BIT2_MASK 0x1 /* bit2 */ 344*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_BIT2_SHIFT 2 345*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_MSTORM_FLUSH_MASK 0x1 /* bit3 */ 346*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_MSTORM_FLUSH_SHIFT 3 347*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_BIT4_MASK 0x1 /* bit4 */ 348*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_BIT4_SHIFT 4 349*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CACHED_ORQ_MASK 0x1 /* bit5 */ 350*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CACHED_ORQ_SHIFT 5 351*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF0_MASK 0x3 /* timer0cf */ 352*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF0_SHIFT 6 353*14b24e2bSVaishali Kulkarni u8 flags1; 354*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_MASK 0x3 /* timer1cf */ 355*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_SHIFT 0 356*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_MPA_TIMEOUT_CF_MASK 0x3 /* timer2cf */ 357*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_MPA_TIMEOUT_CF_SHIFT 2 358*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_MASK 0x3 /* timer_stop_all */ 359*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_SHIFT 4 360*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF4_MASK 0x3 /* cf4 */ 361*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF4_SHIFT 6 362*14b24e2bSVaishali Kulkarni u8 flags2; 363*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF5_MASK 0x3 /* cf5 */ 364*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF5_SHIFT 0 365*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF6_MASK 0x3 /* cf6 */ 366*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF6_SHIFT 2 367*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF7_MASK 0x3 /* cf7 */ 368*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF7_SHIFT 4 369*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF8_MASK 0x3 /* cf8 */ 370*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF8_SHIFT 6 371*14b24e2bSVaishali Kulkarni u8 flags3; 372*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_MASK 0x3 /* cf9 */ 373*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_SHIFT 0 374*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_MASK 0x3 /* cf10 */ 375*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_SHIFT 2 376*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF0EN_MASK 0x1 /* cf0en */ 377*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT 4 378*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_EN_MASK 0x1 /* cf1en */ 379*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_EN_SHIFT 5 380*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_MPA_TIMEOUT_CF_EN_MASK 0x1 /* cf2en */ 381*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_MPA_TIMEOUT_CF_EN_SHIFT 6 382*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_MASK 0x1 /* cf3en */ 383*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_SHIFT 7 384*14b24e2bSVaishali Kulkarni u8 flags4; 385*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF4EN_MASK 0x1 /* cf4en */ 386*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF4EN_SHIFT 0 387*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF5EN_MASK 0x1 /* cf5en */ 388*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF5EN_SHIFT 1 389*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF6EN_MASK 0x1 /* cf6en */ 390*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF6EN_SHIFT 2 391*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF7EN_MASK 0x1 /* cf7en */ 392*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF7EN_SHIFT 3 393*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF8EN_MASK 0x1 /* cf8en */ 394*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_CF8EN_SHIFT 4 395*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_EN_MASK 0x1 /* cf9en */ 396*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_EN_SHIFT 5 397*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_EN_MASK 0x1 /* cf10en */ 398*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_EN_SHIFT 6 399*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */ 400*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT 7 401*14b24e2bSVaishali Kulkarni u8 flags5; 402*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */ 403*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE1EN_SHIFT 0 404*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */ 405*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT 1 406*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */ 407*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT 2 408*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */ 409*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT 3 410*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */ 411*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE5EN_SHIFT 4 412*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_SND_SQ_CONS_RULE_MASK 0x1 /* rule6en */ 413*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_SND_SQ_CONS_RULE_SHIFT 5 414*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE7EN_MASK 0x1 /* rule7en */ 415*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE7EN_SHIFT 6 416*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE8EN_MASK 0x1 /* rule8en */ 417*14b24e2bSVaishali Kulkarni #define E4_TSTORM_IWARP_CONN_AG_CTX_RULE8EN_SHIFT 7 418*14b24e2bSVaishali Kulkarni __le32 reg0 /* reg0 */; 419*14b24e2bSVaishali Kulkarni __le32 reg1 /* reg1 */; 420*14b24e2bSVaishali Kulkarni __le32 unaligned_nxt_seq /* reg2 */; 421*14b24e2bSVaishali Kulkarni __le32 reg3 /* reg3 */; 422*14b24e2bSVaishali Kulkarni __le32 reg4 /* reg4 */; 423*14b24e2bSVaishali Kulkarni __le32 reg5 /* reg5 */; 424*14b24e2bSVaishali Kulkarni __le32 reg6 /* reg6 */; 425*14b24e2bSVaishali Kulkarni __le32 reg7 /* reg7 */; 426*14b24e2bSVaishali Kulkarni __le32 reg8 /* reg8 */; 427*14b24e2bSVaishali Kulkarni u8 orq_cache_idx /* byte2 */; 428*14b24e2bSVaishali Kulkarni u8 hq_prod /* byte3 */; 429*14b24e2bSVaishali Kulkarni __le16 sq_tx_cons_th /* word0 */; 430*14b24e2bSVaishali Kulkarni u8 orq_prod /* byte4 */; 431*14b24e2bSVaishali Kulkarni u8 irq_cons /* byte5 */; 432*14b24e2bSVaishali Kulkarni __le16 sq_tx_cons /* word1 */; 433*14b24e2bSVaishali Kulkarni __le16 conn_dpi /* conn_dpi */; 434*14b24e2bSVaishali Kulkarni __le16 rq_prod /* word3 */; 435*14b24e2bSVaishali Kulkarni __le32 snd_seq /* reg9 */; 436*14b24e2bSVaishali Kulkarni __le32 last_hq_sequence /* reg10 */; 437*14b24e2bSVaishali Kulkarni }; 438*14b24e2bSVaishali Kulkarni 439*14b24e2bSVaishali Kulkarni /* 440*14b24e2bSVaishali Kulkarni * The iwarp storm context of Tstorm 441*14b24e2bSVaishali Kulkarni */ 442*14b24e2bSVaishali Kulkarni struct tstorm_iwarp_conn_st_ctx 443*14b24e2bSVaishali Kulkarni { 444*14b24e2bSVaishali Kulkarni __le32 reserved[60]; 445*14b24e2bSVaishali Kulkarni }; 446*14b24e2bSVaishali Kulkarni 447*14b24e2bSVaishali Kulkarni /* 448*14b24e2bSVaishali Kulkarni * The iwarp storm context of Mstorm 449*14b24e2bSVaishali Kulkarni */ 450*14b24e2bSVaishali Kulkarni struct mstorm_iwarp_conn_st_ctx 451*14b24e2bSVaishali Kulkarni { 452*14b24e2bSVaishali Kulkarni __le32 reserved[32]; 453*14b24e2bSVaishali Kulkarni }; 454*14b24e2bSVaishali Kulkarni 455*14b24e2bSVaishali Kulkarni /* 456*14b24e2bSVaishali Kulkarni * The iwarp storm context of Ustorm 457*14b24e2bSVaishali Kulkarni */ 458*14b24e2bSVaishali Kulkarni struct ustorm_iwarp_conn_st_ctx 459*14b24e2bSVaishali Kulkarni { 460*14b24e2bSVaishali Kulkarni __le32 reserved[24]; 461*14b24e2bSVaishali Kulkarni }; 462*14b24e2bSVaishali Kulkarni 463*14b24e2bSVaishali Kulkarni /* 464*14b24e2bSVaishali Kulkarni * iwarp connection context 465*14b24e2bSVaishali Kulkarni */ 466*14b24e2bSVaishali Kulkarni struct iwarp_conn_context 467*14b24e2bSVaishali Kulkarni { 468*14b24e2bSVaishali Kulkarni struct ystorm_iwarp_conn_st_ctx ystorm_st_context /* ystorm storm context */; 469*14b24e2bSVaishali Kulkarni struct regpair ystorm_st_padding[2] /* padding */; 470*14b24e2bSVaishali Kulkarni struct pstorm_iwarp_conn_st_ctx pstorm_st_context /* pstorm storm context */; 471*14b24e2bSVaishali Kulkarni struct regpair pstorm_st_padding[2] /* padding */; 472*14b24e2bSVaishali Kulkarni struct xstorm_iwarp_conn_st_ctx xstorm_st_context /* xstorm storm context */; 473*14b24e2bSVaishali Kulkarni struct regpair xstorm_st_padding[2] /* padding */; 474*14b24e2bSVaishali Kulkarni struct e4_xstorm_iwarp_conn_ag_ctx xstorm_ag_context /* xstorm aggregative context */; 475*14b24e2bSVaishali Kulkarni struct e4_tstorm_iwarp_conn_ag_ctx tstorm_ag_context /* tstorm aggregative context */; 476*14b24e2bSVaishali Kulkarni struct timers_context timer_context /* timer context */; 477*14b24e2bSVaishali Kulkarni struct e4_ustorm_rdma_conn_ag_ctx ustorm_ag_context /* ustorm aggregative context */; 478*14b24e2bSVaishali Kulkarni struct tstorm_iwarp_conn_st_ctx tstorm_st_context /* tstorm storm context */; 479*14b24e2bSVaishali Kulkarni struct regpair tstorm_st_padding[2] /* padding */; 480*14b24e2bSVaishali Kulkarni struct mstorm_iwarp_conn_st_ctx mstorm_st_context /* mstorm storm context */; 481*14b24e2bSVaishali Kulkarni struct ustorm_iwarp_conn_st_ctx ustorm_st_context /* ustorm storm context */; 482*14b24e2bSVaishali Kulkarni }; 483*14b24e2bSVaishali Kulkarni 484*14b24e2bSVaishali Kulkarni 485*14b24e2bSVaishali Kulkarni /* 486*14b24e2bSVaishali Kulkarni * iWARP create QP params passed by driver to FW in CreateQP Request Ramrod 487*14b24e2bSVaishali Kulkarni */ 488*14b24e2bSVaishali Kulkarni struct iwarp_create_qp_ramrod_data 489*14b24e2bSVaishali Kulkarni { 490*14b24e2bSVaishali Kulkarni u8 flags; 491*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_FMR_AND_RESERVED_EN_MASK 0x1 492*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_FMR_AND_RESERVED_EN_SHIFT 0 493*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_SIGNALED_COMP_MASK 0x1 494*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_SIGNALED_COMP_SHIFT 1 495*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_RDMA_RD_EN_MASK 0x1 496*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_RDMA_RD_EN_SHIFT 2 497*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_RDMA_WR_EN_MASK 0x1 498*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_RDMA_WR_EN_SHIFT 3 499*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_ATOMIC_EN_MASK 0x1 500*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_ATOMIC_EN_SHIFT 4 501*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_SRQ_FLG_MASK 0x1 502*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_SRQ_FLG_SHIFT 5 503*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_RESERVED0_MASK 0x3 504*14b24e2bSVaishali Kulkarni #define IWARP_CREATE_QP_RAMROD_DATA_RESERVED0_SHIFT 6 505*14b24e2bSVaishali Kulkarni u8 reserved1 /* Basic/Enhanced */; 506*14b24e2bSVaishali Kulkarni __le16 pd; 507*14b24e2bSVaishali Kulkarni __le16 sq_num_pages; 508*14b24e2bSVaishali Kulkarni __le16 rq_num_pages; 509*14b24e2bSVaishali Kulkarni __le32 reserved3[2]; 510*14b24e2bSVaishali Kulkarni struct regpair qp_handle_for_cqe /* For use in CQEs */; 511*14b24e2bSVaishali Kulkarni struct rdma_srq_id srq_id; 512*14b24e2bSVaishali Kulkarni __le32 cq_cid_for_sq /* Cid of the CQ that will be posted from SQ */; 513*14b24e2bSVaishali Kulkarni __le32 cq_cid_for_rq /* Cid of the CQ that will be posted from RQ */; 514*14b24e2bSVaishali Kulkarni __le16 dpi; 515*14b24e2bSVaishali Kulkarni __le16 physical_q0 /* Physical QM queue to be tied to logical Q0 */; 516*14b24e2bSVaishali Kulkarni __le16 physical_q1 /* Physical QM queue to be tied to logical Q1 */; 517*14b24e2bSVaishali Kulkarni u8 reserved2[6]; 518*14b24e2bSVaishali Kulkarni }; 519*14b24e2bSVaishali Kulkarni 520*14b24e2bSVaishali Kulkarni 521*14b24e2bSVaishali Kulkarni /* 522*14b24e2bSVaishali Kulkarni * iWARP completion queue types 523*14b24e2bSVaishali Kulkarni */ 524*14b24e2bSVaishali Kulkarni enum iwarp_eqe_async_opcode 525*14b24e2bSVaishali Kulkarni { 526*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_ASYNC_CONNECT_COMPLETE /* Async completion oafter TCP 3-way handshake */, 527*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_ASYNC_ENHANCED_MPA_REPLY_ARRIVED /* Enhanced MPA reply arrived. Driver should either send RTR or reject */, 528*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_ASYNC_MPA_HANDSHAKE_COMPLETE /* MPA Negotiations completed */, 529*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_ASYNC_CID_CLEANED /* Async completion that indicates to the driver that the CID can be re-used. */, 530*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_ASYNC_EXCEPTION_DETECTED /* Async EQE indicating detection of an error/exception on a QP at Firmware */, 531*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_ASYNC_QP_IN_ERROR_STATE /* Async EQE indicating QP is in Error state. */, 532*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_ASYNC_CQ_OVERFLOW /* Async EQE indicating CQ, whose handle is sent with this event, has overflowed */, 533*14b24e2bSVaishali Kulkarni MAX_IWARP_EQE_ASYNC_OPCODE 534*14b24e2bSVaishali Kulkarni }; 535*14b24e2bSVaishali Kulkarni 536*14b24e2bSVaishali Kulkarni 537*14b24e2bSVaishali Kulkarni struct iwarp_eqe_data_mpa_async_completion 538*14b24e2bSVaishali Kulkarni { 539*14b24e2bSVaishali Kulkarni __le16 ulp_data_len /* On active side, length of ULP Data, from peers MPA Connect Response */; 540*14b24e2bSVaishali Kulkarni u8 reserved[6]; 541*14b24e2bSVaishali Kulkarni }; 542*14b24e2bSVaishali Kulkarni 543*14b24e2bSVaishali Kulkarni 544*14b24e2bSVaishali Kulkarni struct iwarp_eqe_data_tcp_async_completion 545*14b24e2bSVaishali Kulkarni { 546*14b24e2bSVaishali Kulkarni __le16 ulp_data_len /* On passive side, length of ULP Data, from peers active MPA Connect Request */; 547*14b24e2bSVaishali Kulkarni u8 mpa_handshake_mode /* Negotiation type Basic/Enhanced */; 548*14b24e2bSVaishali Kulkarni u8 reserved[5]; 549*14b24e2bSVaishali Kulkarni }; 550*14b24e2bSVaishali Kulkarni 551*14b24e2bSVaishali Kulkarni 552*14b24e2bSVaishali Kulkarni /* 553*14b24e2bSVaishali Kulkarni * iWARP completion queue types 554*14b24e2bSVaishali Kulkarni */ 555*14b24e2bSVaishali Kulkarni enum iwarp_eqe_sync_opcode 556*14b24e2bSVaishali Kulkarni { 557*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_TCP_OFFLOAD=11 /* iWARP event queue response after option 2 offload Ramrod */, 558*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_TCP_ABORT, 559*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_MPA_OFFLOAD /* Synchronous completion for MPA offload Request */, 560*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_MPA_OFFLOAD_SEND_RTR, 561*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_CREATE_QP, 562*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_QUERY_QP, 563*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_MODIFY_QP, 564*14b24e2bSVaishali Kulkarni IWARP_EVENT_TYPE_DESTROY_QP, 565*14b24e2bSVaishali Kulkarni MAX_IWARP_EQE_SYNC_OPCODE 566*14b24e2bSVaishali Kulkarni }; 567*14b24e2bSVaishali Kulkarni 568*14b24e2bSVaishali Kulkarni 569*14b24e2bSVaishali Kulkarni /* 570*14b24e2bSVaishali Kulkarni * iWARP EQE completion status 571*14b24e2bSVaishali Kulkarni */ 572*14b24e2bSVaishali Kulkarni enum iwarp_fw_return_code 573*14b24e2bSVaishali Kulkarni { 574*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_TCP_CONNECT_INVALID_PACKET=5 /* Got invalid packet SYN/SYN-ACK */, 575*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_TCP_CONNECTION_RST /* Got RST during offload TCP connection */, 576*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_TCP_CONNECT_TIMEOUT /* TCP connection setup timed out */, 577*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_MPA_ERROR_REJECT /* Got Reject in MPA reply. */, 578*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_MPA_NOT_SUPPORTED_VER /* Got MPA request with higher version that we support. */, 579*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_MPA_RST /* Got RST during MPA negotiation */, 580*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_MPA_FIN /* Got FIN during MPA negotiation */, 581*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_MPA_RTR_MISMATCH /* RTR mismatch detected when MPA reply arrived. */, 582*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_MPA_INSUF_IRD /* Insufficient IRD on the MPA reply that arrived. */, 583*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_MPA_INVALID_PACKET /* Incoming MPAp acket failed on FW verifications */, 584*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_MPA_LOCAL_ERROR /* Detected an internal error during MPA negotiation. */, 585*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_MPA_TIMEOUT /* MPA negotiation timed out. */, 586*14b24e2bSVaishali Kulkarni IWARP_CONN_ERROR_MPA_TERMINATE /* Got Terminate during MPA negotiation. */, 587*14b24e2bSVaishali Kulkarni IWARP_QP_IN_ERROR_GOOD_CLOSE /* LLP connection was closed gracefully - Used for async IWARP_EVENT_TYPE_ASYNC_QP_IN_ERROR_STATE */, 588*14b24e2bSVaishali Kulkarni IWARP_QP_IN_ERROR_BAD_CLOSE /* LLP Connection was closed abortively - Used for async IWARP_EVENT_TYPE_ASYNC_QP_IN_ERROR_STATE */, 589*14b24e2bSVaishali Kulkarni IWARP_EXCEPTION_DETECTED_LLP_CLOSED /* LLP has been disociated from the QP, although the TCP connection may not be closed yet - Used for async IWARP_EVENT_TYPE_ASYNC_EXCEPTION_DETECTED */, 590*14b24e2bSVaishali Kulkarni IWARP_EXCEPTION_DETECTED_LLP_RESET /* LLP has Reset (either because of an RST, or a bad-close condition) - Used for async IWARP_EVENT_TYPE_ASYNC_EXCEPTION_DETECTED */, 591*14b24e2bSVaishali Kulkarni IWARP_EXCEPTION_DETECTED_IRQ_FULL /* Peer sent more outstanding Read Requests than IRD - Used for async IWARP_EVENT_TYPE_ASYNC_EXCEPTION_DETECTED */, 592*14b24e2bSVaishali Kulkarni IWARP_EXCEPTION_DETECTED_RQ_EMPTY /* SEND request received with RQ empty - Used for async IWARP_EVENT_TYPE_ASYNC_EXCEPTION_DETECTED */, 593*14b24e2bSVaishali Kulkarni IWARP_EXCEPTION_DETECTED_LLP_TIMEOUT /* TCP Retransmissions timed out - Used for async IWARP_EVENT_TYPE_ASYNC_EXCEPTION_DETECTED */, 594*14b24e2bSVaishali Kulkarni IWARP_EXCEPTION_DETECTED_REMOTE_PROTECTION_ERROR /* Peers Remote Access caused error */, 595*14b24e2bSVaishali Kulkarni IWARP_EXCEPTION_DETECTED_CQ_OVERFLOW /* CQ overflow detected */, 596*14b24e2bSVaishali Kulkarni IWARP_EXCEPTION_DETECTED_LOCAL_CATASTROPHIC /* Local catastrophic error detected - Used for async IWARP_EVENT_TYPE_ASYNC_EXCEPTION_DETECTED */, 597*14b24e2bSVaishali Kulkarni IWARP_EXCEPTION_DETECTED_LOCAL_ACCESS_ERROR /* Local Access error detected while responding - Used for async IWARP_EVENT_TYPE_ASYNC_EXCEPTION_DETECTED */, 598*14b24e2bSVaishali Kulkarni IWARP_EXCEPTION_DETECTED_REMOTE_OPERATION_ERROR /* An operation/protocol error caused by Remote Consumer */, 599*14b24e2bSVaishali Kulkarni IWARP_EXCEPTION_DETECTED_TERMINATE_RECEIVED /* Peer sent a TERMINATE message */, 600*14b24e2bSVaishali Kulkarni MAX_IWARP_FW_RETURN_CODE 601*14b24e2bSVaishali Kulkarni }; 602*14b24e2bSVaishali Kulkarni 603*14b24e2bSVaishali Kulkarni 604*14b24e2bSVaishali Kulkarni /* 605*14b24e2bSVaishali Kulkarni * unaligned opaque data received from LL2 606*14b24e2bSVaishali Kulkarni */ 607*14b24e2bSVaishali Kulkarni struct iwarp_init_func_params 608*14b24e2bSVaishali Kulkarni { 609*14b24e2bSVaishali Kulkarni u8 ll2_ooo_q_index /* LL2 OOO queue id. The unaligned queue id will be + 1 */; 610*14b24e2bSVaishali Kulkarni u8 reserved1[7]; 611*14b24e2bSVaishali Kulkarni }; 612*14b24e2bSVaishali Kulkarni 613*14b24e2bSVaishali Kulkarni 614*14b24e2bSVaishali Kulkarni /* 615*14b24e2bSVaishali Kulkarni * iwarp func init ramrod data 616*14b24e2bSVaishali Kulkarni */ 617*14b24e2bSVaishali Kulkarni struct iwarp_init_func_ramrod_data 618*14b24e2bSVaishali Kulkarni { 619*14b24e2bSVaishali Kulkarni struct rdma_init_func_ramrod_data rdma; 620*14b24e2bSVaishali Kulkarni struct tcp_init_params tcp; 621*14b24e2bSVaishali Kulkarni struct iwarp_init_func_params iwarp; 622*14b24e2bSVaishali Kulkarni }; 623*14b24e2bSVaishali Kulkarni 624*14b24e2bSVaishali Kulkarni 625*14b24e2bSVaishali Kulkarni /* 626*14b24e2bSVaishali Kulkarni * iWARP QP - possible states to transition to 627*14b24e2bSVaishali Kulkarni */ 628*14b24e2bSVaishali Kulkarni enum iwarp_modify_qp_new_state_type 629*14b24e2bSVaishali Kulkarni { 630*14b24e2bSVaishali Kulkarni IWARP_MODIFY_QP_STATE_CLOSING=1 /* graceful close */, 631*14b24e2bSVaishali Kulkarni IWARP_MODIFY_QP_STATE_ERROR=2 /* abortive close, if LLP connection still exists */, 632*14b24e2bSVaishali Kulkarni MAX_IWARP_MODIFY_QP_NEW_STATE_TYPE 633*14b24e2bSVaishali Kulkarni }; 634*14b24e2bSVaishali Kulkarni 635*14b24e2bSVaishali Kulkarni 636*14b24e2bSVaishali Kulkarni /* 637*14b24e2bSVaishali Kulkarni * iwarp modify qp responder ramrod data 638*14b24e2bSVaishali Kulkarni */ 639*14b24e2bSVaishali Kulkarni struct iwarp_modify_qp_ramrod_data 640*14b24e2bSVaishali Kulkarni { 641*14b24e2bSVaishali Kulkarni __le16 transition_to_state; 642*14b24e2bSVaishali Kulkarni __le16 flags; 643*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_RDMA_RD_EN_MASK 0x1 644*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_RDMA_RD_EN_SHIFT 0 645*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_RDMA_WR_EN_MASK 0x1 646*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_RDMA_WR_EN_SHIFT 1 647*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_ATOMIC_EN_MASK 0x1 648*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_ATOMIC_EN_SHIFT 2 649*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_STATE_TRANS_EN_MASK 0x1 /* change QP state as per transition_to_state field */ 650*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_STATE_TRANS_EN_SHIFT 3 651*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_RDMA_OPS_EN_FLG_MASK 0x1 /* If set, the rdma_rd/wr/atomic_en should be updated */ 652*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_RDMA_OPS_EN_FLG_SHIFT 4 653*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_RESERVED_MASK 0x7FF 654*14b24e2bSVaishali Kulkarni #define IWARP_MODIFY_QP_RAMROD_DATA_RESERVED_SHIFT 5 655*14b24e2bSVaishali Kulkarni __le32 reserved3[3]; 656*14b24e2bSVaishali Kulkarni __le32 reserved4[8]; 657*14b24e2bSVaishali Kulkarni }; 658*14b24e2bSVaishali Kulkarni 659*14b24e2bSVaishali Kulkarni 660*14b24e2bSVaishali Kulkarni /* 661*14b24e2bSVaishali Kulkarni * MPA params for Enhanced mode 662*14b24e2bSVaishali Kulkarni */ 663*14b24e2bSVaishali Kulkarni struct mpa_rq_params 664*14b24e2bSVaishali Kulkarni { 665*14b24e2bSVaishali Kulkarni __le32 ird; 666*14b24e2bSVaishali Kulkarni __le32 ord; 667*14b24e2bSVaishali Kulkarni }; 668*14b24e2bSVaishali Kulkarni 669*14b24e2bSVaishali Kulkarni /* 670*14b24e2bSVaishali Kulkarni * MPA host Address-Len for private data 671*14b24e2bSVaishali Kulkarni */ 672*14b24e2bSVaishali Kulkarni struct mpa_ulp_buffer 673*14b24e2bSVaishali Kulkarni { 674*14b24e2bSVaishali Kulkarni struct regpair addr; 675*14b24e2bSVaishali Kulkarni __le16 len; 676*14b24e2bSVaishali Kulkarni __le16 reserved[3]; 677*14b24e2bSVaishali Kulkarni }; 678*14b24e2bSVaishali Kulkarni 679*14b24e2bSVaishali Kulkarni /* 680*14b24e2bSVaishali Kulkarni * iWARP MPA offload params common to Basic and Enhanced modes 681*14b24e2bSVaishali Kulkarni */ 682*14b24e2bSVaishali Kulkarni struct mpa_outgoing_params 683*14b24e2bSVaishali Kulkarni { 684*14b24e2bSVaishali Kulkarni u8 crc_needed; 685*14b24e2bSVaishali Kulkarni u8 reject /* Valid only for passive side. */; 686*14b24e2bSVaishali Kulkarni u8 reserved[6]; 687*14b24e2bSVaishali Kulkarni struct mpa_rq_params out_rq; 688*14b24e2bSVaishali Kulkarni struct mpa_ulp_buffer outgoing_ulp_buffer /* ULP buffer populated by the host */; 689*14b24e2bSVaishali Kulkarni }; 690*14b24e2bSVaishali Kulkarni 691*14b24e2bSVaishali Kulkarni /* 692*14b24e2bSVaishali Kulkarni * iWARP MPA offload params passed by driver to FW in MPA Offload Request Ramrod 693*14b24e2bSVaishali Kulkarni */ 694*14b24e2bSVaishali Kulkarni struct iwarp_mpa_offload_ramrod_data 695*14b24e2bSVaishali Kulkarni { 696*14b24e2bSVaishali Kulkarni struct mpa_outgoing_params common; 697*14b24e2bSVaishali Kulkarni __le32 tcp_cid; 698*14b24e2bSVaishali Kulkarni u8 mode /* Basic/Enhanced */; 699*14b24e2bSVaishali Kulkarni u8 tcp_connect_side /* Passive/Active. use enum tcp_connect_mode */; 700*14b24e2bSVaishali Kulkarni u8 rtr_pref; 701*14b24e2bSVaishali Kulkarni #define IWARP_MPA_OFFLOAD_RAMROD_DATA_RTR_SUPPORTED_MASK 0x7 /* (use enum mpa_rtr_type) */ 702*14b24e2bSVaishali Kulkarni #define IWARP_MPA_OFFLOAD_RAMROD_DATA_RTR_SUPPORTED_SHIFT 0 703*14b24e2bSVaishali Kulkarni #define IWARP_MPA_OFFLOAD_RAMROD_DATA_RESERVED1_MASK 0x1F 704*14b24e2bSVaishali Kulkarni #define IWARP_MPA_OFFLOAD_RAMROD_DATA_RESERVED1_SHIFT 3 705*14b24e2bSVaishali Kulkarni u8 reserved2; 706*14b24e2bSVaishali Kulkarni struct mpa_ulp_buffer incoming_ulp_buffer /* host buffer for placing the incoming MPA reply */; 707*14b24e2bSVaishali Kulkarni struct regpair async_eqe_output_buf /* host buffer for async tcp/mpa completion information - must have space for at least 8 bytes */; 708*14b24e2bSVaishali Kulkarni struct regpair handle_for_async /* a host cookie that will be echoed back with in every qp-specific async EQE */; 709*14b24e2bSVaishali Kulkarni struct regpair shared_queue_addr /* Address of shared queue adress that consist of SQ/RQ and FW internal queues (IRQ/ORQ/HQ) */; 710*14b24e2bSVaishali Kulkarni u8 stats_counter_id /* Statistics counter ID to use */; 711*14b24e2bSVaishali Kulkarni u8 reserved3[15]; 712*14b24e2bSVaishali Kulkarni }; 713*14b24e2bSVaishali Kulkarni 714*14b24e2bSVaishali Kulkarni 715*14b24e2bSVaishali Kulkarni /* 716*14b24e2bSVaishali Kulkarni * iWARP TCP connection offload params passed by driver to FW 717*14b24e2bSVaishali Kulkarni */ 718*14b24e2bSVaishali Kulkarni struct iwarp_offload_params 719*14b24e2bSVaishali Kulkarni { 720*14b24e2bSVaishali Kulkarni struct mpa_ulp_buffer incoming_ulp_buffer /* host buffer for placing the incoming MPA request */; 721*14b24e2bSVaishali Kulkarni struct regpair async_eqe_output_buf /* host buffer for async tcp/mpa completion information - must have space for at least 8 bytes */; 722*14b24e2bSVaishali Kulkarni struct regpair handle_for_async /* host handle that will be echoed back with in every qp-specific async EQE */; 723*14b24e2bSVaishali Kulkarni __le16 physical_q0 /* Physical QM queue to be tied to logical Q0 */; 724*14b24e2bSVaishali Kulkarni __le16 physical_q1 /* Physical QM queue to be tied to logical Q1 */; 725*14b24e2bSVaishali Kulkarni u8 stats_counter_id /* Statistics counter ID to use */; 726*14b24e2bSVaishali Kulkarni u8 mpa_mode /* Basic/Enahnced. Used for a verification for incoming MPA request */; 727*14b24e2bSVaishali Kulkarni u8 reserved[10]; 728*14b24e2bSVaishali Kulkarni }; 729*14b24e2bSVaishali Kulkarni 730*14b24e2bSVaishali Kulkarni 731*14b24e2bSVaishali Kulkarni /* 732*14b24e2bSVaishali Kulkarni * iWARP query QP output params 733*14b24e2bSVaishali Kulkarni */ 734*14b24e2bSVaishali Kulkarni struct iwarp_query_qp_output_params 735*14b24e2bSVaishali Kulkarni { 736*14b24e2bSVaishali Kulkarni __le32 flags; 737*14b24e2bSVaishali Kulkarni #define IWARP_QUERY_QP_OUTPUT_PARAMS_ERROR_FLG_MASK 0x1 738*14b24e2bSVaishali Kulkarni #define IWARP_QUERY_QP_OUTPUT_PARAMS_ERROR_FLG_SHIFT 0 739*14b24e2bSVaishali Kulkarni #define IWARP_QUERY_QP_OUTPUT_PARAMS_RESERVED0_MASK 0x7FFFFFFF 740*14b24e2bSVaishali Kulkarni #define IWARP_QUERY_QP_OUTPUT_PARAMS_RESERVED0_SHIFT 1 741*14b24e2bSVaishali Kulkarni u8 reserved1[4] /* 64 bit alignment */; 742*14b24e2bSVaishali Kulkarni }; 743*14b24e2bSVaishali Kulkarni 744*14b24e2bSVaishali Kulkarni 745*14b24e2bSVaishali Kulkarni /* 746*14b24e2bSVaishali Kulkarni * iWARP query QP ramrod data 747*14b24e2bSVaishali Kulkarni */ 748*14b24e2bSVaishali Kulkarni struct iwarp_query_qp_ramrod_data 749*14b24e2bSVaishali Kulkarni { 750*14b24e2bSVaishali Kulkarni struct regpair output_params_addr; 751*14b24e2bSVaishali Kulkarni }; 752*14b24e2bSVaishali Kulkarni 753*14b24e2bSVaishali Kulkarni 754*14b24e2bSVaishali Kulkarni /* 755*14b24e2bSVaishali Kulkarni * iWARP Ramrod Command IDs 756*14b24e2bSVaishali Kulkarni */ 757*14b24e2bSVaishali Kulkarni enum iwarp_ramrod_cmd_id 758*14b24e2bSVaishali Kulkarni { 759*14b24e2bSVaishali Kulkarni IWARP_RAMROD_CMD_ID_TCP_OFFLOAD=11 /* iWARP TCP connection offload ramrod */, 760*14b24e2bSVaishali Kulkarni IWARP_RAMROD_CMD_ID_TCP_ABORT /* Abort TCP connection without changing the QP state. */, 761*14b24e2bSVaishali Kulkarni IWARP_RAMROD_CMD_ID_MPA_OFFLOAD /* iWARP MPA offload ramrod */, 762*14b24e2bSVaishali Kulkarni IWARP_RAMROD_CMD_ID_MPA_OFFLOAD_SEND_RTR, 763*14b24e2bSVaishali Kulkarni IWARP_RAMROD_CMD_ID_CREATE_QP, 764*14b24e2bSVaishali Kulkarni IWARP_RAMROD_CMD_ID_QUERY_QP, 765*14b24e2bSVaishali Kulkarni IWARP_RAMROD_CMD_ID_MODIFY_QP, 766*14b24e2bSVaishali Kulkarni IWARP_RAMROD_CMD_ID_DESTROY_QP, 767*14b24e2bSVaishali Kulkarni MAX_IWARP_RAMROD_CMD_ID 768*14b24e2bSVaishali Kulkarni }; 769*14b24e2bSVaishali Kulkarni 770*14b24e2bSVaishali Kulkarni 771*14b24e2bSVaishali Kulkarni /* 772*14b24e2bSVaishali Kulkarni * Per PF iWARP retransmit path statistics 773*14b24e2bSVaishali Kulkarni */ 774*14b24e2bSVaishali Kulkarni struct iwarp_rxmit_stats_drv 775*14b24e2bSVaishali Kulkarni { 776*14b24e2bSVaishali Kulkarni struct regpair tx_go_to_slow_start_event_cnt /* Number of times slow start event occurred */; 777*14b24e2bSVaishali Kulkarni struct regpair tx_fast_retransmit_event_cnt /* Number of times fast retransmit event occurred */; 778*14b24e2bSVaishali Kulkarni }; 779*14b24e2bSVaishali Kulkarni 780*14b24e2bSVaishali Kulkarni 781*14b24e2bSVaishali Kulkarni /* 782*14b24e2bSVaishali Kulkarni * iWARP and TCP connection offload params passed by driver to FW in iWARP offload ramrod 783*14b24e2bSVaishali Kulkarni */ 784*14b24e2bSVaishali Kulkarni struct iwarp_tcp_offload_ramrod_data 785*14b24e2bSVaishali Kulkarni { 786*14b24e2bSVaishali Kulkarni struct iwarp_offload_params iwarp /* iWARP connection offload params */; 787*14b24e2bSVaishali Kulkarni struct tcp_offload_params_opt2 tcp /* tcp offload params */; 788*14b24e2bSVaishali Kulkarni }; 789*14b24e2bSVaishali Kulkarni 790*14b24e2bSVaishali Kulkarni 791*14b24e2bSVaishali Kulkarni /* 792*14b24e2bSVaishali Kulkarni * iWARP MPA negotiation types 793*14b24e2bSVaishali Kulkarni */ 794*14b24e2bSVaishali Kulkarni enum mpa_negotiation_mode 795*14b24e2bSVaishali Kulkarni { 796*14b24e2bSVaishali Kulkarni MPA_NEGOTIATION_TYPE_BASIC=1, 797*14b24e2bSVaishali Kulkarni MPA_NEGOTIATION_TYPE_ENHANCED=2, 798*14b24e2bSVaishali Kulkarni MAX_MPA_NEGOTIATION_MODE 799*14b24e2bSVaishali Kulkarni }; 800*14b24e2bSVaishali Kulkarni 801*14b24e2bSVaishali Kulkarni 802*14b24e2bSVaishali Kulkarni 803*14b24e2bSVaishali Kulkarni 804*14b24e2bSVaishali Kulkarni /* 805*14b24e2bSVaishali Kulkarni * iWARP MPA Enhanced mode RTR types 806*14b24e2bSVaishali Kulkarni */ 807*14b24e2bSVaishali Kulkarni enum mpa_rtr_type 808*14b24e2bSVaishali Kulkarni { 809*14b24e2bSVaishali Kulkarni MPA_RTR_TYPE_NONE=0 /* No RTR type */, 810*14b24e2bSVaishali Kulkarni MPA_RTR_TYPE_ZERO_SEND=1, 811*14b24e2bSVaishali Kulkarni MPA_RTR_TYPE_ZERO_WRITE=2, 812*14b24e2bSVaishali Kulkarni MPA_RTR_TYPE_ZERO_SEND_AND_WRITE=3, 813*14b24e2bSVaishali Kulkarni MPA_RTR_TYPE_ZERO_READ=4, 814*14b24e2bSVaishali Kulkarni MPA_RTR_TYPE_ZERO_SEND_AND_READ=5, 815*14b24e2bSVaishali Kulkarni MPA_RTR_TYPE_ZERO_WRITE_AND_READ=6, 816*14b24e2bSVaishali Kulkarni MPA_RTR_TYPE_ZERO_SEND_AND_WRITE_AND_READ=7, 817*14b24e2bSVaishali Kulkarni MAX_MPA_RTR_TYPE 818*14b24e2bSVaishali Kulkarni }; 819*14b24e2bSVaishali Kulkarni 820*14b24e2bSVaishali Kulkarni 821*14b24e2bSVaishali Kulkarni 822*14b24e2bSVaishali Kulkarni 823*14b24e2bSVaishali Kulkarni 824*14b24e2bSVaishali Kulkarni 825*14b24e2bSVaishali Kulkarni /* 826*14b24e2bSVaishali Kulkarni * unaligned opaque data received from LL2 827*14b24e2bSVaishali Kulkarni */ 828*14b24e2bSVaishali Kulkarni struct unaligned_opaque_data 829*14b24e2bSVaishali Kulkarni { 830*14b24e2bSVaishali Kulkarni __le16 first_mpa_offset /* offset of first MPA byte that should be processed */; 831*14b24e2bSVaishali Kulkarni u8 tcp_payload_offset /* offset of first the byte that comes after the last byte of the TCP Hdr */; 832*14b24e2bSVaishali Kulkarni u8 flags; 833*14b24e2bSVaishali Kulkarni #define UNALIGNED_OPAQUE_DATA_PKT_REACHED_WIN_RIGHT_EDGE_MASK 0x1 /* packet reached window right edge */ 834*14b24e2bSVaishali Kulkarni #define UNALIGNED_OPAQUE_DATA_PKT_REACHED_WIN_RIGHT_EDGE_SHIFT 0 835*14b24e2bSVaishali Kulkarni #define UNALIGNED_OPAQUE_DATA_CONNECTION_CLOSED_MASK 0x1 /* Indication that the connection is closed. Clean all connecitons database. */ 836*14b24e2bSVaishali Kulkarni #define UNALIGNED_OPAQUE_DATA_CONNECTION_CLOSED_SHIFT 1 837*14b24e2bSVaishali Kulkarni #define UNALIGNED_OPAQUE_DATA_RESERVED_MASK 0x3F 838*14b24e2bSVaishali Kulkarni #define UNALIGNED_OPAQUE_DATA_RESERVED_SHIFT 2 839*14b24e2bSVaishali Kulkarni __le32 cid; 840*14b24e2bSVaishali Kulkarni }; 841*14b24e2bSVaishali Kulkarni 842*14b24e2bSVaishali Kulkarni 843*14b24e2bSVaishali Kulkarni 844*14b24e2bSVaishali Kulkarni 845*14b24e2bSVaishali Kulkarni 846*14b24e2bSVaishali Kulkarni struct e4_mstorm_iwarp_conn_ag_ctx 847*14b24e2bSVaishali Kulkarni { 848*14b24e2bSVaishali Kulkarni u8 reserved /* cdu_validation */; 849*14b24e2bSVaishali Kulkarni u8 state /* state */; 850*14b24e2bSVaishali Kulkarni u8 flags0; 851*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */ 852*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT 0 853*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */ 854*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT 1 855*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_MASK 0x3 /* cf0 */ 856*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_SHIFT 2 857*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_CF1_MASK 0x3 /* cf1 */ 858*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_CF1_SHIFT 4 859*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_CF2_MASK 0x3 /* cf2 */ 860*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_CF2_SHIFT 6 861*14b24e2bSVaishali Kulkarni u8 flags1; 862*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_EN_MASK 0x1 /* cf0en */ 863*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_EN_SHIFT 0 864*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_CF1EN_MASK 0x1 /* cf1en */ 865*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT 1 866*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_CF2EN_MASK 0x1 /* cf2en */ 867*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT 2 868*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */ 869*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT 3 870*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */ 871*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_RULE1EN_SHIFT 4 872*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */ 873*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT 5 874*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_RCQ_CONS_EN_MASK 0x1 /* rule3en */ 875*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_RCQ_CONS_EN_SHIFT 6 876*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */ 877*14b24e2bSVaishali Kulkarni #define E4_MSTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT 7 878*14b24e2bSVaishali Kulkarni __le16 rcq_cons /* word0 */; 879*14b24e2bSVaishali Kulkarni __le16 rcq_cons_th /* word1 */; 880*14b24e2bSVaishali Kulkarni __le32 reg0 /* reg0 */; 881*14b24e2bSVaishali Kulkarni __le32 reg1 /* reg1 */; 882*14b24e2bSVaishali Kulkarni }; 883*14b24e2bSVaishali Kulkarni 884*14b24e2bSVaishali Kulkarni 885*14b24e2bSVaishali Kulkarni 886*14b24e2bSVaishali Kulkarni struct e4_ustorm_iwarp_conn_ag_ctx 887*14b24e2bSVaishali Kulkarni { 888*14b24e2bSVaishali Kulkarni u8 reserved /* cdu_validation */; 889*14b24e2bSVaishali Kulkarni u8 byte1 /* state */; 890*14b24e2bSVaishali Kulkarni u8 flags0; 891*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */ 892*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT 0 893*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */ 894*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT 1 895*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF0_MASK 0x3 /* timer0cf */ 896*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF0_SHIFT 2 897*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF1_MASK 0x3 /* timer1cf */ 898*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF1_SHIFT 4 899*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF2_MASK 0x3 /* timer2cf */ 900*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF2_SHIFT 6 901*14b24e2bSVaishali Kulkarni u8 flags1; 902*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF3_MASK 0x3 /* timer_stop_all */ 903*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF3_SHIFT 0 904*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_MASK 0x3 /* cf4 */ 905*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_SHIFT 2 906*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_MASK 0x3 /* cf5 */ 907*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_SHIFT 4 908*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF6_MASK 0x3 /* cf6 */ 909*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF6_SHIFT 6 910*14b24e2bSVaishali Kulkarni u8 flags2; 911*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF0EN_MASK 0x1 /* cf0en */ 912*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT 0 913*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF1EN_MASK 0x1 /* cf1en */ 914*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT 1 915*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF2EN_MASK 0x1 /* cf2en */ 916*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT 2 917*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF3EN_MASK 0x1 /* cf3en */ 918*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF3EN_SHIFT 3 919*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_EN_MASK 0x1 /* cf4en */ 920*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_EN_SHIFT 4 921*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_EN_MASK 0x1 /* cf5en */ 922*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_EN_SHIFT 5 923*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF6EN_MASK 0x1 /* cf6en */ 924*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CF6EN_SHIFT 6 925*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_SE_EN_MASK 0x1 /* rule0en */ 926*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_SE_EN_SHIFT 7 927*14b24e2bSVaishali Kulkarni u8 flags3; 928*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_EN_MASK 0x1 /* rule1en */ 929*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_CQ_EN_SHIFT 0 930*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */ 931*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT 1 932*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */ 933*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT 2 934*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */ 935*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT 3 936*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */ 937*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE5EN_SHIFT 4 938*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE6EN_MASK 0x1 /* rule6en */ 939*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE6EN_SHIFT 5 940*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE7EN_MASK 0x1 /* rule7en */ 941*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE7EN_SHIFT 6 942*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE8EN_MASK 0x1 /* rule8en */ 943*14b24e2bSVaishali Kulkarni #define E4_USTORM_IWARP_CONN_AG_CTX_RULE8EN_SHIFT 7 944*14b24e2bSVaishali Kulkarni u8 byte2 /* byte2 */; 945*14b24e2bSVaishali Kulkarni u8 byte3 /* byte3 */; 946*14b24e2bSVaishali Kulkarni __le16 word0 /* conn_dpi */; 947*14b24e2bSVaishali Kulkarni __le16 word1 /* word1 */; 948*14b24e2bSVaishali Kulkarni __le32 cq_cons /* reg0 */; 949*14b24e2bSVaishali Kulkarni __le32 cq_se_prod /* reg1 */; 950*14b24e2bSVaishali Kulkarni __le32 cq_prod /* reg2 */; 951*14b24e2bSVaishali Kulkarni __le32 reg3 /* reg3 */; 952*14b24e2bSVaishali Kulkarni __le16 word2 /* word2 */; 953*14b24e2bSVaishali Kulkarni __le16 word3 /* word3 */; 954*14b24e2bSVaishali Kulkarni }; 955*14b24e2bSVaishali Kulkarni 956*14b24e2bSVaishali Kulkarni 957*14b24e2bSVaishali Kulkarni 958*14b24e2bSVaishali Kulkarni struct e4_ystorm_iwarp_conn_ag_ctx 959*14b24e2bSVaishali Kulkarni { 960*14b24e2bSVaishali Kulkarni u8 byte0 /* cdu_validation */; 961*14b24e2bSVaishali Kulkarni u8 byte1 /* state */; 962*14b24e2bSVaishali Kulkarni u8 flags0; 963*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_BIT0_MASK 0x1 /* exist_in_qm0 */ 964*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_BIT0_SHIFT 0 965*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */ 966*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT 1 967*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF0_MASK 0x3 /* cf0 */ 968*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF0_SHIFT 2 969*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF1_MASK 0x3 /* cf1 */ 970*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF1_SHIFT 4 971*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF2_MASK 0x3 /* cf2 */ 972*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF2_SHIFT 6 973*14b24e2bSVaishali Kulkarni u8 flags1; 974*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF0EN_MASK 0x1 /* cf0en */ 975*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT 0 976*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF1EN_MASK 0x1 /* cf1en */ 977*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT 1 978*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF2EN_MASK 0x1 /* cf2en */ 979*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT 2 980*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */ 981*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT 3 982*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */ 983*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_RULE1EN_SHIFT 4 984*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */ 985*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT 5 986*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */ 987*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT 6 988*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */ 989*14b24e2bSVaishali Kulkarni #define E4_YSTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT 7 990*14b24e2bSVaishali Kulkarni u8 byte2 /* byte2 */; 991*14b24e2bSVaishali Kulkarni u8 byte3 /* byte3 */; 992*14b24e2bSVaishali Kulkarni __le16 word0 /* word0 */; 993*14b24e2bSVaishali Kulkarni __le32 reg0 /* reg0 */; 994*14b24e2bSVaishali Kulkarni __le32 reg1 /* reg1 */; 995*14b24e2bSVaishali Kulkarni __le16 word1 /* word1 */; 996*14b24e2bSVaishali Kulkarni __le16 word2 /* word2 */; 997*14b24e2bSVaishali Kulkarni __le16 word3 /* word3 */; 998*14b24e2bSVaishali Kulkarni __le16 word4 /* word4 */; 999*14b24e2bSVaishali Kulkarni __le32 reg2 /* reg2 */; 1000*14b24e2bSVaishali Kulkarni __le32 reg3 /* reg3 */; 1001*14b24e2bSVaishali Kulkarni }; 1002*14b24e2bSVaishali Kulkarni 1003*14b24e2bSVaishali Kulkarni 1004*14b24e2bSVaishali Kulkarni struct e5_mstorm_iwarp_conn_ag_ctx 1005*14b24e2bSVaishali Kulkarni { 1006*14b24e2bSVaishali Kulkarni u8 reserved /* cdu_validation */; 1007*14b24e2bSVaishali Kulkarni u8 state_and_core_id /* state_and_core_id */; 1008*14b24e2bSVaishali Kulkarni u8 flags0; 1009*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */ 1010*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT 0 1011*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */ 1012*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT 1 1013*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_MASK 0x3 /* cf0 */ 1014*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_SHIFT 2 1015*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_CF1_MASK 0x3 /* cf1 */ 1016*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_CF1_SHIFT 4 1017*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_CF2_MASK 0x3 /* cf2 */ 1018*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_CF2_SHIFT 6 1019*14b24e2bSVaishali Kulkarni u8 flags1; 1020*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_EN_MASK 0x1 /* cf0en */ 1021*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_INV_STAG_DONE_CF_EN_SHIFT 0 1022*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_CF1EN_MASK 0x1 /* cf1en */ 1023*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT 1 1024*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_CF2EN_MASK 0x1 /* cf2en */ 1025*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT 2 1026*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */ 1027*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT 3 1028*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */ 1029*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_RULE1EN_SHIFT 4 1030*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */ 1031*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT 5 1032*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_RCQ_CONS_EN_MASK 0x1 /* rule3en */ 1033*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_RCQ_CONS_EN_SHIFT 6 1034*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */ 1035*14b24e2bSVaishali Kulkarni #define E5_MSTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT 7 1036*14b24e2bSVaishali Kulkarni __le16 rcq_cons /* word0 */; 1037*14b24e2bSVaishali Kulkarni __le16 rcq_cons_th /* word1 */; 1038*14b24e2bSVaishali Kulkarni __le32 reg0 /* reg0 */; 1039*14b24e2bSVaishali Kulkarni __le32 reg1 /* reg1 */; 1040*14b24e2bSVaishali Kulkarni }; 1041*14b24e2bSVaishali Kulkarni 1042*14b24e2bSVaishali Kulkarni 1043*14b24e2bSVaishali Kulkarni struct e5_tstorm_iwarp_conn_ag_ctx 1044*14b24e2bSVaishali Kulkarni { 1045*14b24e2bSVaishali Kulkarni u8 reserved0 /* cdu_validation */; 1046*14b24e2bSVaishali Kulkarni u8 state_and_core_id /* state_and_core_id */; 1047*14b24e2bSVaishali Kulkarni u8 flags0; 1048*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */ 1049*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT 0 1050*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */ 1051*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT 1 1052*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_BIT2_MASK 0x1 /* bit2 */ 1053*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_BIT2_SHIFT 2 1054*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_MSTORM_FLUSH_MASK 0x1 /* bit3 */ 1055*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_MSTORM_FLUSH_SHIFT 3 1056*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_BIT4_MASK 0x1 /* bit4 */ 1057*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_BIT4_SHIFT 4 1058*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CACHED_ORQ_MASK 0x1 /* bit5 */ 1059*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CACHED_ORQ_SHIFT 5 1060*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF0_MASK 0x3 /* timer0cf */ 1061*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF0_SHIFT 6 1062*14b24e2bSVaishali Kulkarni u8 flags1; 1063*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_MASK 0x3 /* timer1cf */ 1064*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_SHIFT 0 1065*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_MASK 0x3 /* timer2cf */ 1066*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_SHIFT 2 1067*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_MASK 0x3 /* timer_stop_all */ 1068*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_SHIFT 4 1069*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF4_MASK 0x3 /* cf4 */ 1070*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF4_SHIFT 6 1071*14b24e2bSVaishali Kulkarni u8 flags2; 1072*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF5_MASK 0x3 /* cf5 */ 1073*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF5_SHIFT 0 1074*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF6_MASK 0x3 /* cf6 */ 1075*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF6_SHIFT 2 1076*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF7_MASK 0x3 /* cf7 */ 1077*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF7_SHIFT 4 1078*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF8_MASK 0x3 /* cf8 */ 1079*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF8_SHIFT 6 1080*14b24e2bSVaishali Kulkarni u8 flags3; 1081*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_MASK 0x3 /* cf9 */ 1082*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_SHIFT 0 1083*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF10_MASK 0x3 /* cf10 */ 1084*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF10_SHIFT 2 1085*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF0EN_MASK 0x1 /* cf0en */ 1086*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT 4 1087*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_EN_MASK 0x1 /* cf1en */ 1088*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RQ_POST_CF_EN_SHIFT 5 1089*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_EN_MASK 0x1 /* cf2en */ 1090*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_FLUSH_OR_ERROR_DETECTED_EN_SHIFT 6 1091*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_MASK 0x1 /* cf3en */ 1092*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_SHIFT 7 1093*14b24e2bSVaishali Kulkarni u8 flags4; 1094*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF4EN_MASK 0x1 /* cf4en */ 1095*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF4EN_SHIFT 0 1096*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF5EN_MASK 0x1 /* cf5en */ 1097*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF5EN_SHIFT 1 1098*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF6EN_MASK 0x1 /* cf6en */ 1099*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF6EN_SHIFT 2 1100*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF7EN_MASK 0x1 /* cf7en */ 1101*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF7EN_SHIFT 3 1102*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF8EN_MASK 0x1 /* cf8en */ 1103*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF8EN_SHIFT 4 1104*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_EN_MASK 0x1 /* cf9en */ 1105*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_EN_SHIFT 5 1106*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF10EN_MASK 0x1 /* cf10en */ 1107*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_CF10EN_SHIFT 6 1108*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */ 1109*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT 7 1110*14b24e2bSVaishali Kulkarni u8 flags5; 1111*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */ 1112*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE1EN_SHIFT 0 1113*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */ 1114*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT 1 1115*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */ 1116*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT 2 1117*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */ 1118*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT 3 1119*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */ 1120*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE5EN_SHIFT 4 1121*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_SND_SQ_CONS_RULE_MASK 0x1 /* rule6en */ 1122*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_SND_SQ_CONS_RULE_SHIFT 5 1123*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE7EN_MASK 0x1 /* rule7en */ 1124*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE7EN_SHIFT 6 1125*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE8EN_MASK 0x1 /* rule8en */ 1126*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_RULE8EN_SHIFT 7 1127*14b24e2bSVaishali Kulkarni u8 flags6; 1128*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED1_MASK 0x1 /* bit6 */ 1129*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED1_SHIFT 0 1130*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED2_MASK 0x1 /* bit7 */ 1131*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED2_SHIFT 1 1132*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED3_MASK 0x1 /* bit8 */ 1133*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED3_SHIFT 2 1134*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED4_MASK 0x3 /* cf11 */ 1135*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED4_SHIFT 3 1136*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED5_MASK 0x1 /* cf11en */ 1137*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED5_SHIFT 5 1138*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED6_MASK 0x1 /* rule9en */ 1139*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED6_SHIFT 6 1140*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED7_MASK 0x1 /* rule10en */ 1141*14b24e2bSVaishali Kulkarni #define E5_TSTORM_IWARP_CONN_AG_CTX_E4_RESERVED7_SHIFT 7 1142*14b24e2bSVaishali Kulkarni u8 orq_cache_idx /* byte2 */; 1143*14b24e2bSVaishali Kulkarni __le16 sq_tx_cons_th /* word0 */; 1144*14b24e2bSVaishali Kulkarni __le32 reg0 /* reg0 */; 1145*14b24e2bSVaishali Kulkarni __le32 reg1 /* reg1 */; 1146*14b24e2bSVaishali Kulkarni __le32 unaligned_nxt_seq /* reg2 */; 1147*14b24e2bSVaishali Kulkarni __le32 reg3 /* reg3 */; 1148*14b24e2bSVaishali Kulkarni __le32 reg4 /* reg4 */; 1149*14b24e2bSVaishali Kulkarni __le32 reg5 /* reg5 */; 1150*14b24e2bSVaishali Kulkarni __le32 reg6 /* reg6 */; 1151*14b24e2bSVaishali Kulkarni __le32 reg7 /* reg7 */; 1152*14b24e2bSVaishali Kulkarni __le32 reg8 /* reg8 */; 1153*14b24e2bSVaishali Kulkarni u8 hq_prod /* byte3 */; 1154*14b24e2bSVaishali Kulkarni u8 orq_prod /* byte4 */; 1155*14b24e2bSVaishali Kulkarni u8 irq_cons /* byte5 */; 1156*14b24e2bSVaishali Kulkarni u8 e4_reserved8 /* byte6 */; 1157*14b24e2bSVaishali Kulkarni __le16 sq_tx_cons /* word1 */; 1158*14b24e2bSVaishali Kulkarni __le16 conn_dpi /* conn_dpi */; 1159*14b24e2bSVaishali Kulkarni __le32 snd_seq /* reg9 */; 1160*14b24e2bSVaishali Kulkarni __le16 rq_prod /* word3 */; 1161*14b24e2bSVaishali Kulkarni __le16 e4_reserved9 /* word4 */; 1162*14b24e2bSVaishali Kulkarni }; 1163*14b24e2bSVaishali Kulkarni 1164*14b24e2bSVaishali Kulkarni 1165*14b24e2bSVaishali Kulkarni struct e5_ustorm_iwarp_conn_ag_ctx 1166*14b24e2bSVaishali Kulkarni { 1167*14b24e2bSVaishali Kulkarni u8 reserved /* cdu_validation */; 1168*14b24e2bSVaishali Kulkarni u8 byte1 /* state_and_core_id */; 1169*14b24e2bSVaishali Kulkarni u8 flags0; 1170*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */ 1171*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT 0 1172*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */ 1173*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT 1 1174*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF0_MASK 0x3 /* timer0cf */ 1175*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF0_SHIFT 2 1176*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF1_MASK 0x3 /* timer1cf */ 1177*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF1_SHIFT 4 1178*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF2_MASK 0x3 /* timer2cf */ 1179*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF2_SHIFT 6 1180*14b24e2bSVaishali Kulkarni u8 flags1; 1181*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF3_MASK 0x3 /* timer_stop_all */ 1182*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF3_SHIFT 0 1183*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_MASK 0x3 /* cf4 */ 1184*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_SHIFT 2 1185*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_MASK 0x3 /* cf5 */ 1186*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_SHIFT 4 1187*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF6_MASK 0x3 /* cf6 */ 1188*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF6_SHIFT 6 1189*14b24e2bSVaishali Kulkarni u8 flags2; 1190*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF0EN_MASK 0x1 /* cf0en */ 1191*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT 0 1192*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF1EN_MASK 0x1 /* cf1en */ 1193*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT 1 1194*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF2EN_MASK 0x1 /* cf2en */ 1195*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT 2 1196*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF3EN_MASK 0x1 /* cf3en */ 1197*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF3EN_SHIFT 3 1198*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_EN_MASK 0x1 /* cf4en */ 1199*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_SE_CF_EN_SHIFT 4 1200*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_EN_MASK 0x1 /* cf5en */ 1201*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_ARM_CF_EN_SHIFT 5 1202*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF6EN_MASK 0x1 /* cf6en */ 1203*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CF6EN_SHIFT 6 1204*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_SE_EN_MASK 0x1 /* rule0en */ 1205*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_SE_EN_SHIFT 7 1206*14b24e2bSVaishali Kulkarni u8 flags3; 1207*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_EN_MASK 0x1 /* rule1en */ 1208*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_CQ_EN_SHIFT 0 1209*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */ 1210*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT 1 1211*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */ 1212*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT 2 1213*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */ 1214*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT 3 1215*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */ 1216*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE5EN_SHIFT 4 1217*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE6EN_MASK 0x1 /* rule6en */ 1218*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE6EN_SHIFT 5 1219*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE7EN_MASK 0x1 /* rule7en */ 1220*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE7EN_SHIFT 6 1221*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE8EN_MASK 0x1 /* rule8en */ 1222*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_RULE8EN_SHIFT 7 1223*14b24e2bSVaishali Kulkarni u8 flags4; 1224*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED1_MASK 0x1 /* bit2 */ 1225*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED1_SHIFT 0 1226*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED2_MASK 0x1 /* bit3 */ 1227*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED2_SHIFT 1 1228*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED3_MASK 0x3 /* cf7 */ 1229*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED3_SHIFT 2 1230*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED4_MASK 0x3 /* cf8 */ 1231*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED4_SHIFT 4 1232*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED5_MASK 0x1 /* cf7en */ 1233*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED5_SHIFT 6 1234*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED6_MASK 0x1 /* cf8en */ 1235*14b24e2bSVaishali Kulkarni #define E5_USTORM_IWARP_CONN_AG_CTX_E4_RESERVED6_SHIFT 7 1236*14b24e2bSVaishali Kulkarni u8 byte2 /* byte2 */; 1237*14b24e2bSVaishali Kulkarni __le16 word0 /* conn_dpi */; 1238*14b24e2bSVaishali Kulkarni __le16 word1 /* word1 */; 1239*14b24e2bSVaishali Kulkarni __le32 cq_cons /* reg0 */; 1240*14b24e2bSVaishali Kulkarni __le32 cq_se_prod /* reg1 */; 1241*14b24e2bSVaishali Kulkarni __le32 cq_prod /* reg2 */; 1242*14b24e2bSVaishali Kulkarni __le32 reg3 /* reg3 */; 1243*14b24e2bSVaishali Kulkarni __le16 word2 /* word2 */; 1244*14b24e2bSVaishali Kulkarni __le16 word3 /* word3 */; 1245*14b24e2bSVaishali Kulkarni }; 1246*14b24e2bSVaishali Kulkarni 1247*14b24e2bSVaishali Kulkarni 1248*14b24e2bSVaishali Kulkarni struct e5_xstorm_iwarp_conn_ag_ctx 1249*14b24e2bSVaishali Kulkarni { 1250*14b24e2bSVaishali Kulkarni u8 reserved0 /* cdu_validation */; 1251*14b24e2bSVaishali Kulkarni u8 state_and_core_id /* state_and_core_id */; 1252*14b24e2bSVaishali Kulkarni u8 flags0; 1253*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_MASK 0x1 /* exist_in_qm0 */ 1254*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM0_SHIFT 0 1255*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM1_MASK 0x1 /* exist_in_qm1 */ 1256*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM1_SHIFT 1 1257*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RESERVED1_MASK 0x1 /* exist_in_qm2 */ 1258*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RESERVED1_SHIFT 2 1259*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM3_MASK 0x1 /* exist_in_qm3 */ 1260*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_EXIST_IN_QM3_SHIFT 3 1261*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT4_MASK 0x1 /* bit4 */ 1262*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT4_SHIFT 4 1263*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RESERVED2_MASK 0x1 /* cf_array_active */ 1264*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RESERVED2_SHIFT 5 1265*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT6_MASK 0x1 /* bit6 */ 1266*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT6_SHIFT 6 1267*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT7_MASK 0x1 /* bit7 */ 1268*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT7_SHIFT 7 1269*14b24e2bSVaishali Kulkarni u8 flags1; 1270*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT8_MASK 0x1 /* bit8 */ 1271*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT8_SHIFT 0 1272*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT9_MASK 0x1 /* bit9 */ 1273*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT9_SHIFT 1 1274*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT10_MASK 0x1 /* bit10 */ 1275*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT10_SHIFT 2 1276*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT11_MASK 0x1 /* bit11 */ 1277*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT11_SHIFT 3 1278*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT12_MASK 0x1 /* bit12 */ 1279*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT12_SHIFT 4 1280*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT13_MASK 0x1 /* bit13 */ 1281*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT13_SHIFT 5 1282*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT14_MASK 0x1 /* bit14 */ 1283*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT14_SHIFT 6 1284*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_YSTORM_FLUSH_OR_REWIND_SND_MAX_MASK 0x1 /* bit15 */ 1285*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_YSTORM_FLUSH_OR_REWIND_SND_MAX_SHIFT 7 1286*14b24e2bSVaishali Kulkarni u8 flags2; 1287*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF0_MASK 0x3 /* timer0cf */ 1288*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF0_SHIFT 0 1289*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF1_MASK 0x3 /* timer1cf */ 1290*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF1_SHIFT 2 1291*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF2_MASK 0x3 /* timer2cf */ 1292*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF2_SHIFT 4 1293*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_MASK 0x3 /* timer_stop_all */ 1294*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_SHIFT 6 1295*14b24e2bSVaishali Kulkarni u8 flags3; 1296*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF4_MASK 0x3 /* cf4 */ 1297*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF4_SHIFT 0 1298*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF5_MASK 0x3 /* cf5 */ 1299*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF5_SHIFT 2 1300*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF6_MASK 0x3 /* cf6 */ 1301*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF6_SHIFT 4 1302*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF7_MASK 0x3 /* cf7 */ 1303*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF7_SHIFT 6 1304*14b24e2bSVaishali Kulkarni u8 flags4; 1305*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF8_MASK 0x3 /* cf8 */ 1306*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF8_SHIFT 0 1307*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF9_MASK 0x3 /* cf9 */ 1308*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF9_SHIFT 2 1309*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF10_MASK 0x3 /* cf10 */ 1310*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF10_SHIFT 4 1311*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF11_MASK 0x3 /* cf11 */ 1312*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF11_SHIFT 6 1313*14b24e2bSVaishali Kulkarni u8 flags5; 1314*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF12_MASK 0x3 /* cf12 */ 1315*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF12_SHIFT 0 1316*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF13_MASK 0x3 /* cf13 */ 1317*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF13_SHIFT 2 1318*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_MASK 0x3 /* cf14 */ 1319*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_SHIFT 4 1320*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF15_MASK 0x3 /* cf15 */ 1321*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF15_SHIFT 6 1322*14b24e2bSVaishali Kulkarni u8 flags6; 1323*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_MASK 0x3 /* cf16 */ 1324*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_SHIFT 0 1325*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF17_MASK 0x3 /* cf_array_cf */ 1326*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF17_SHIFT 2 1327*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF18_MASK 0x3 /* cf18 */ 1328*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF18_SHIFT 4 1329*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_MASK 0x3 /* cf19 */ 1330*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_SHIFT 6 1331*14b24e2bSVaishali Kulkarni u8 flags7; 1332*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_MASK 0x3 /* cf20 */ 1333*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_SHIFT 0 1334*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_MASK 0x3 /* cf21 */ 1335*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_SHIFT 2 1336*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_MASK 0x3 /* cf22 */ 1337*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_SHIFT 4 1338*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF0EN_MASK 0x1 /* cf0en */ 1339*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT 6 1340*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF1EN_MASK 0x1 /* cf1en */ 1341*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT 7 1342*14b24e2bSVaishali Kulkarni u8 flags8; 1343*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF2EN_MASK 0x1 /* cf2en */ 1344*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT 0 1345*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_MASK 0x1 /* cf3en */ 1346*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_TIMER_STOP_ALL_EN_SHIFT 1 1347*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF4EN_MASK 0x1 /* cf4en */ 1348*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF4EN_SHIFT 2 1349*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF5EN_MASK 0x1 /* cf5en */ 1350*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF5EN_SHIFT 3 1351*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF6EN_MASK 0x1 /* cf6en */ 1352*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF6EN_SHIFT 4 1353*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF7EN_MASK 0x1 /* cf7en */ 1354*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF7EN_SHIFT 5 1355*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF8EN_MASK 0x1 /* cf8en */ 1356*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF8EN_SHIFT 6 1357*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF9EN_MASK 0x1 /* cf9en */ 1358*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF9EN_SHIFT 7 1359*14b24e2bSVaishali Kulkarni u8 flags9; 1360*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF10EN_MASK 0x1 /* cf10en */ 1361*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF10EN_SHIFT 0 1362*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF11EN_MASK 0x1 /* cf11en */ 1363*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF11EN_SHIFT 1 1364*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF12EN_MASK 0x1 /* cf12en */ 1365*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF12EN_SHIFT 2 1366*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF13EN_MASK 0x1 /* cf13en */ 1367*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF13EN_SHIFT 3 1368*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_EN_MASK 0x1 /* cf14en */ 1369*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SQ_FLUSH_CF_EN_SHIFT 4 1370*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF15EN_MASK 0x1 /* cf15en */ 1371*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF15EN_SHIFT 5 1372*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_EN_MASK 0x1 /* cf16en */ 1373*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_MPA_OR_ERROR_WAKEUP_TRIGGER_CF_EN_SHIFT 6 1374*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF17EN_MASK 0x1 /* cf_array_cf_en */ 1375*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF17EN_SHIFT 7 1376*14b24e2bSVaishali Kulkarni u8 flags10; 1377*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF18EN_MASK 0x1 /* cf18en */ 1378*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF18EN_SHIFT 0 1379*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_EN_MASK 0x1 /* cf19en */ 1380*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_DQ_FLUSH_EN_SHIFT 1 1381*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_EN_MASK 0x1 /* cf20en */ 1382*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q0_EN_SHIFT 2 1383*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_EN_MASK 0x1 /* cf21en */ 1384*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_FLUSH_Q1_EN_SHIFT 3 1385*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_EN_MASK 0x1 /* cf22en */ 1386*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SLOW_PATH_EN_SHIFT 4 1387*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF23EN_MASK 0x1 /* cf23en */ 1388*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF23EN_SHIFT 5 1389*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */ 1390*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT 6 1391*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_MORE_TO_SEND_RULE_EN_MASK 0x1 /* rule1en */ 1392*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_MORE_TO_SEND_RULE_EN_SHIFT 7 1393*14b24e2bSVaishali Kulkarni u8 flags11; 1394*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_TX_BLOCKED_EN_MASK 0x1 /* rule2en */ 1395*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_TX_BLOCKED_EN_SHIFT 0 1396*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */ 1397*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT 1 1398*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RESERVED3_MASK 0x1 /* rule4en */ 1399*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RESERVED3_SHIFT 2 1400*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE5EN_MASK 0x1 /* rule5en */ 1401*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE5EN_SHIFT 3 1402*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE6EN_MASK 0x1 /* rule6en */ 1403*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE6EN_SHIFT 4 1404*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE7EN_MASK 0x1 /* rule7en */ 1405*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE7EN_SHIFT 5 1406*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED1_MASK 0x1 /* rule8en */ 1407*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED1_SHIFT 6 1408*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE9EN_MASK 0x1 /* rule9en */ 1409*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE9EN_SHIFT 7 1410*14b24e2bSVaishali Kulkarni u8 flags12; 1411*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SQ_NOT_EMPTY_RULE_EN_MASK 0x1 /* rule10en */ 1412*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SQ_NOT_EMPTY_RULE_EN_SHIFT 0 1413*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE11EN_MASK 0x1 /* rule11en */ 1414*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE11EN_SHIFT 1 1415*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED2_MASK 0x1 /* rule12en */ 1416*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED2_SHIFT 2 1417*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED3_MASK 0x1 /* rule13en */ 1418*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED3_SHIFT 3 1419*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SQ_FENCE_RULE_EN_MASK 0x1 /* rule14en */ 1420*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_SQ_FENCE_RULE_EN_SHIFT 4 1421*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE15EN_MASK 0x1 /* rule15en */ 1422*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE15EN_SHIFT 5 1423*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE16EN_MASK 0x1 /* rule16en */ 1424*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE16EN_SHIFT 6 1425*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE17EN_MASK 0x1 /* rule17en */ 1426*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE17EN_SHIFT 7 1427*14b24e2bSVaishali Kulkarni u8 flags13; 1428*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_IRQ_NOT_EMPTY_RULE_EN_MASK 0x1 /* rule18en */ 1429*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_IRQ_NOT_EMPTY_RULE_EN_SHIFT 0 1430*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_HQ_NOT_FULL_RULE_EN_MASK 0x1 /* rule19en */ 1431*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_HQ_NOT_FULL_RULE_EN_SHIFT 1 1432*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_ORQ_RD_FENCE_RULE_EN_MASK 0x1 /* rule20en */ 1433*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_ORQ_RD_FENCE_RULE_EN_SHIFT 2 1434*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE21EN_MASK 0x1 /* rule21en */ 1435*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RULE21EN_SHIFT 3 1436*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED6_MASK 0x1 /* rule22en */ 1437*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED6_SHIFT 4 1438*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_ORQ_NOT_FULL_RULE_EN_MASK 0x1 /* rule23en */ 1439*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_ORQ_NOT_FULL_RULE_EN_SHIFT 5 1440*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED8_MASK 0x1 /* rule24en */ 1441*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED8_SHIFT 6 1442*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED9_MASK 0x1 /* rule25en */ 1443*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_A0_RESERVED9_SHIFT 7 1444*14b24e2bSVaishali Kulkarni u8 flags14; 1445*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT16_MASK 0x1 /* bit16 */ 1446*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT16_SHIFT 0 1447*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT17_MASK 0x1 /* bit17 */ 1448*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT17_SHIFT 1 1449*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_DPM_PORT_NUM_MASK 0x3 /* bit18 */ 1450*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_DPM_PORT_NUM_SHIFT 2 1451*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT20_MASK 0x1 /* bit20 */ 1452*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_BIT20_SHIFT 4 1453*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RDMA_EDPM_ENABLE_MASK 0x1 /* bit21 */ 1454*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_RDMA_EDPM_ENABLE_SHIFT 5 1455*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF23_MASK 0x3 /* cf23 */ 1456*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_CF23_SHIFT 6 1457*14b24e2bSVaishali Kulkarni u8 byte2 /* byte2 */; 1458*14b24e2bSVaishali Kulkarni __le16 physical_q0 /* physical_q0 */; 1459*14b24e2bSVaishali Kulkarni __le16 physical_q1 /* physical_q1 */; 1460*14b24e2bSVaishali Kulkarni __le16 sq_comp_cons /* physical_q2 */; 1461*14b24e2bSVaishali Kulkarni __le16 sq_tx_cons /* word3 */; 1462*14b24e2bSVaishali Kulkarni __le16 sq_prod /* word4 */; 1463*14b24e2bSVaishali Kulkarni __le16 word5 /* word5 */; 1464*14b24e2bSVaishali Kulkarni __le16 conn_dpi /* conn_dpi */; 1465*14b24e2bSVaishali Kulkarni u8 byte3 /* byte3 */; 1466*14b24e2bSVaishali Kulkarni u8 byte4 /* byte4 */; 1467*14b24e2bSVaishali Kulkarni u8 byte5 /* byte5 */; 1468*14b24e2bSVaishali Kulkarni u8 byte6 /* byte6 */; 1469*14b24e2bSVaishali Kulkarni __le32 reg0 /* reg0 */; 1470*14b24e2bSVaishali Kulkarni __le32 reg1 /* reg1 */; 1471*14b24e2bSVaishali Kulkarni __le32 reg2 /* reg2 */; 1472*14b24e2bSVaishali Kulkarni __le32 more_to_send_seq /* reg3 */; 1473*14b24e2bSVaishali Kulkarni __le32 reg4 /* reg4 */; 1474*14b24e2bSVaishali Kulkarni __le32 rewinded_snd_max /* cf_array0 */; 1475*14b24e2bSVaishali Kulkarni __le32 rd_msn /* cf_array1 */; 1476*14b24e2bSVaishali Kulkarni u8 flags15; 1477*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED1_MASK 0x1 /* bit22 */ 1478*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED1_SHIFT 0 1479*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED2_MASK 0x1 /* bit23 */ 1480*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED2_SHIFT 1 1481*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED3_MASK 0x1 /* bit24 */ 1482*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED3_SHIFT 2 1483*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED4_MASK 0x3 /* cf24 */ 1484*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED4_SHIFT 3 1485*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED5_MASK 0x1 /* cf24en */ 1486*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED5_SHIFT 5 1487*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED6_MASK 0x1 /* rule26en */ 1488*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED6_SHIFT 6 1489*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED7_MASK 0x1 /* rule27en */ 1490*14b24e2bSVaishali Kulkarni #define E5_XSTORM_IWARP_CONN_AG_CTX_E4_RESERVED7_SHIFT 7 1491*14b24e2bSVaishali Kulkarni u8 byte7 /* byte7 */; 1492*14b24e2bSVaishali Kulkarni __le16 irq_prod_via_msdm /* word7 */; 1493*14b24e2bSVaishali Kulkarni __le16 irq_cons /* word8 */; 1494*14b24e2bSVaishali Kulkarni __le16 hq_cons_th_or_mpa_data /* word9 */; 1495*14b24e2bSVaishali Kulkarni __le16 hq_cons /* word10 */; 1496*14b24e2bSVaishali Kulkarni __le16 tx_rdma_edpm_usg_cnt /* word11 */; 1497*14b24e2bSVaishali Kulkarni __le32 atom_msn /* reg7 */; 1498*14b24e2bSVaishali Kulkarni __le32 orq_cons /* reg8 */; 1499*14b24e2bSVaishali Kulkarni __le32 orq_cons_th /* reg9 */; 1500*14b24e2bSVaishali Kulkarni u8 max_ord /* byte8 */; 1501*14b24e2bSVaishali Kulkarni u8 wqe_data_pad_bytes /* byte9 */; 1502*14b24e2bSVaishali Kulkarni u8 former_hq_prod /* byte10 */; 1503*14b24e2bSVaishali Kulkarni u8 irq_prod_via_msem /* byte11 */; 1504*14b24e2bSVaishali Kulkarni u8 byte12 /* byte12 */; 1505*14b24e2bSVaishali Kulkarni u8 max_pkt_pdu_size_lo /* byte13 */; 1506*14b24e2bSVaishali Kulkarni u8 max_pkt_pdu_size_hi /* byte14 */; 1507*14b24e2bSVaishali Kulkarni u8 byte15 /* byte15 */; 1508*14b24e2bSVaishali Kulkarni __le32 reg10 /* reg10 */; 1509*14b24e2bSVaishali Kulkarni __le32 reg11 /* reg11 */; 1510*14b24e2bSVaishali Kulkarni __le32 reg12 /* reg12 */; 1511*14b24e2bSVaishali Kulkarni __le32 shared_queue_page_addr_lo /* reg13 */; 1512*14b24e2bSVaishali Kulkarni __le32 shared_queue_page_addr_hi /* reg14 */; 1513*14b24e2bSVaishali Kulkarni __le32 reg15 /* reg15 */; 1514*14b24e2bSVaishali Kulkarni __le32 reg16 /* reg16 */; 1515*14b24e2bSVaishali Kulkarni __le32 reg17 /* reg17 */; 1516*14b24e2bSVaishali Kulkarni }; 1517*14b24e2bSVaishali Kulkarni 1518*14b24e2bSVaishali Kulkarni 1519*14b24e2bSVaishali Kulkarni struct e5_ystorm_iwarp_conn_ag_ctx 1520*14b24e2bSVaishali Kulkarni { 1521*14b24e2bSVaishali Kulkarni u8 byte0 /* cdu_validation */; 1522*14b24e2bSVaishali Kulkarni u8 byte1 /* state_and_core_id */; 1523*14b24e2bSVaishali Kulkarni u8 flags0; 1524*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_BIT0_MASK 0x1 /* exist_in_qm0 */ 1525*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_BIT0_SHIFT 0 1526*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_BIT1_MASK 0x1 /* exist_in_qm1 */ 1527*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_BIT1_SHIFT 1 1528*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF0_MASK 0x3 /* cf0 */ 1529*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF0_SHIFT 2 1530*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF1_MASK 0x3 /* cf1 */ 1531*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF1_SHIFT 4 1532*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF2_MASK 0x3 /* cf2 */ 1533*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF2_SHIFT 6 1534*14b24e2bSVaishali Kulkarni u8 flags1; 1535*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF0EN_MASK 0x1 /* cf0en */ 1536*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF0EN_SHIFT 0 1537*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF1EN_MASK 0x1 /* cf1en */ 1538*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF1EN_SHIFT 1 1539*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF2EN_MASK 0x1 /* cf2en */ 1540*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_CF2EN_SHIFT 2 1541*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_RULE0EN_MASK 0x1 /* rule0en */ 1542*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_RULE0EN_SHIFT 3 1543*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_RULE1EN_MASK 0x1 /* rule1en */ 1544*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_RULE1EN_SHIFT 4 1545*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_RULE2EN_MASK 0x1 /* rule2en */ 1546*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_RULE2EN_SHIFT 5 1547*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_RULE3EN_MASK 0x1 /* rule3en */ 1548*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_RULE3EN_SHIFT 6 1549*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_RULE4EN_MASK 0x1 /* rule4en */ 1550*14b24e2bSVaishali Kulkarni #define E5_YSTORM_IWARP_CONN_AG_CTX_RULE4EN_SHIFT 7 1551*14b24e2bSVaishali Kulkarni u8 byte2 /* byte2 */; 1552*14b24e2bSVaishali Kulkarni u8 byte3 /* byte3 */; 1553*14b24e2bSVaishali Kulkarni __le16 word0 /* word0 */; 1554*14b24e2bSVaishali Kulkarni __le32 reg0 /* reg0 */; 1555*14b24e2bSVaishali Kulkarni __le32 reg1 /* reg1 */; 1556*14b24e2bSVaishali Kulkarni __le16 word1 /* word1 */; 1557*14b24e2bSVaishali Kulkarni __le16 word2 /* word2 */; 1558*14b24e2bSVaishali Kulkarni __le16 word3 /* word3 */; 1559*14b24e2bSVaishali Kulkarni __le16 word4 /* word4 */; 1560*14b24e2bSVaishali Kulkarni __le32 reg2 /* reg2 */; 1561*14b24e2bSVaishali Kulkarni __le32 reg3 /* reg3 */; 1562*14b24e2bSVaishali Kulkarni }; 1563*14b24e2bSVaishali Kulkarni 1564*14b24e2bSVaishali Kulkarni #endif /* __ECORE_HSI_IWARP__ */ 1565