1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 #include <sys/nxge/nxge_impl.h> 29 #include <sys/nxge/nxge_hio.h> 30 #include <npi_tx_wr64.h> 31 32 /* Software LSO required header files */ 33 #include <netinet/tcp.h> 34 #include <inet/ip_impl.h> 35 #include <inet/tcp.h> 36 37 static mblk_t *nxge_lso_eliminate(mblk_t *); 38 static mblk_t *nxge_do_softlso(mblk_t *mp, uint32_t mss); 39 static void nxge_lso_info_get(mblk_t *, uint32_t *, uint32_t *); 40 static void nxge_hcksum_retrieve(mblk_t *, 41 uint32_t *, uint32_t *, uint32_t *, 42 uint32_t *, uint32_t *); 43 static uint32_t nxge_csgen(uint16_t *, int); 44 45 extern uint32_t nxge_reclaim_pending; 46 extern uint32_t nxge_bcopy_thresh; 47 extern uint32_t nxge_dvma_thresh; 48 extern uint32_t nxge_dma_stream_thresh; 49 extern uint32_t nxge_tx_minfree; 50 extern uint32_t nxge_tx_intr_thres; 51 extern uint32_t nxge_tx_max_gathers; 52 extern uint32_t nxge_tx_tiny_pack; 53 extern uint32_t nxge_tx_use_bcopy; 54 extern uint32_t nxge_tx_lb_policy; 55 extern uint32_t nxge_no_tx_lb; 56 extern nxge_tx_mode_t nxge_tx_scheme; 57 uint32_t nxge_lso_kick_cnt = 2; 58 59 typedef struct _mac_tx_hint { 60 uint16_t sap; 61 uint16_t vid; 62 void *hash; 63 } mac_tx_hint_t, *p_mac_tx_hint_t; 64 65 int nxge_tx_lb_ring_1(p_mblk_t, uint32_t, p_mac_tx_hint_t); 66 67 int 68 nxge_start(p_nxge_t nxgep, p_tx_ring_t tx_ring_p, p_mblk_t mp) 69 { 70 int status = 0; 71 p_tx_desc_t tx_desc_ring_vp; 72 npi_handle_t npi_desc_handle; 73 nxge_os_dma_handle_t tx_desc_dma_handle; 74 p_tx_desc_t tx_desc_p; 75 p_tx_msg_t tx_msg_ring; 76 p_tx_msg_t tx_msg_p; 77 tx_desc_t tx_desc, *tmp_desc_p; 78 tx_desc_t sop_tx_desc, *sop_tx_desc_p; 79 p_tx_pkt_header_t hdrp; 80 tx_pkt_header_t tmp_hdrp; 81 p_tx_pkt_hdr_all_t pkthdrp; 82 uint8_t npads = 0; 83 uint64_t dma_ioaddr; 84 uint32_t dma_flags; 85 int last_bidx; 86 uint8_t *b_rptr; 87 caddr_t kaddr; 88 uint32_t nmblks; 89 uint32_t ngathers; 90 uint32_t clen; 91 int len; 92 uint32_t pkt_len, pack_len, min_len; 93 uint32_t bcopy_thresh; 94 int i, cur_index, sop_index; 95 uint16_t tail_index; 96 boolean_t tail_wrap = B_FALSE; 97 nxge_dma_common_t desc_area; 98 nxge_os_dma_handle_t dma_handle; 99 ddi_dma_cookie_t dma_cookie; 100 npi_handle_t npi_handle; 101 p_mblk_t nmp; 102 p_mblk_t t_mp; 103 uint32_t ncookies; 104 boolean_t good_packet; 105 boolean_t mark_mode = B_FALSE; 106 p_nxge_stats_t statsp; 107 p_nxge_tx_ring_stats_t tdc_stats; 108 t_uscalar_t start_offset = 0; 109 t_uscalar_t stuff_offset = 0; 110 t_uscalar_t end_offset = 0; 111 t_uscalar_t value = 0; 112 t_uscalar_t cksum_flags = 0; 113 boolean_t cksum_on = B_FALSE; 114 uint32_t boff = 0; 115 uint64_t tot_xfer_len = 0; 116 boolean_t header_set = B_FALSE; 117 #ifdef NXGE_DEBUG 118 p_tx_desc_t tx_desc_ring_pp; 119 p_tx_desc_t tx_desc_pp; 120 tx_desc_t *save_desc_p; 121 int dump_len; 122 int sad_len; 123 uint64_t sad; 124 int xfer_len; 125 uint32_t msgsize; 126 #endif 127 p_mblk_t mp_chain = NULL; 128 boolean_t is_lso = B_FALSE; 129 boolean_t lso_again; 130 int cur_index_lso; 131 p_mblk_t nmp_lso_save; 132 uint32_t lso_ngathers; 133 boolean_t lso_tail_wrap = B_FALSE; 134 135 NXGE_DEBUG_MSG((nxgep, TX_CTL, 136 "==> nxge_start: tx dma channel %d", tx_ring_p->tdc)); 137 NXGE_DEBUG_MSG((nxgep, TX_CTL, 138 "==> nxge_start: Starting tdc %d desc pending %d", 139 tx_ring_p->tdc, tx_ring_p->descs_pending)); 140 141 statsp = nxgep->statsp; 142 143 if (!isLDOMguest(nxgep)) { 144 switch (nxgep->mac.portmode) { 145 default: 146 if (nxgep->statsp->port_stats.lb_mode == 147 nxge_lb_normal) { 148 if (!statsp->mac_stats.link_up) { 149 freemsg(mp); 150 NXGE_DEBUG_MSG((nxgep, TX_CTL, 151 "==> nxge_start: " 152 "link not up")); 153 goto nxge_start_fail1; 154 } 155 } 156 break; 157 case PORT_10G_FIBER: 158 /* 159 * For the following modes, check the link status 160 * before sending the packet out: 161 * nxge_lb_normal, nxge_lb_ext10g, nxge_lb_phy10g 162 */ 163 if (nxgep->statsp->port_stats.lb_mode < 164 nxge_lb_serdes10g) { 165 if (!statsp->mac_stats.link_up) { 166 freemsg(mp); 167 NXGE_DEBUG_MSG((nxgep, TX_CTL, 168 "==> nxge_start: " 169 "link not up")); 170 goto nxge_start_fail1; 171 } 172 } 173 break; 174 } 175 } 176 177 if ((!(nxgep->drv_state & STATE_HW_INITIALIZED)) || 178 (nxgep->nxge_mac_state != NXGE_MAC_STARTED)) { 179 NXGE_DEBUG_MSG((nxgep, TX_CTL, 180 "==> nxge_start: hardware not initialized or stopped")); 181 freemsg(mp); 182 goto nxge_start_fail1; 183 } 184 185 if (nxgep->soft_lso_enable) { 186 mp_chain = nxge_lso_eliminate(mp); 187 NXGE_DEBUG_MSG((nxgep, TX_CTL, 188 "==> nxge_start(0): LSO mp $%p mp_chain $%p", 189 mp, mp_chain)); 190 if (mp_chain == NULL) { 191 NXGE_ERROR_MSG((nxgep, TX_CTL, 192 "==> nxge_send(0): NULL mp_chain $%p != mp $%p", 193 mp_chain, mp)); 194 goto nxge_start_fail1; 195 } 196 if (mp_chain != mp) { 197 NXGE_DEBUG_MSG((nxgep, TX_CTL, 198 "==> nxge_send(1): IS LSO mp_chain $%p != mp $%p", 199 mp_chain, mp)); 200 is_lso = B_TRUE; 201 mp = mp_chain; 202 mp_chain = mp_chain->b_next; 203 mp->b_next = NULL; 204 } 205 } 206 207 hcksum_retrieve(mp, NULL, NULL, &start_offset, 208 &stuff_offset, &end_offset, &value, &cksum_flags); 209 if (!NXGE_IS_VLAN_PACKET(mp->b_rptr)) { 210 start_offset += sizeof (ether_header_t); 211 stuff_offset += sizeof (ether_header_t); 212 } else { 213 start_offset += sizeof (struct ether_vlan_header); 214 stuff_offset += sizeof (struct ether_vlan_header); 215 } 216 217 if (cksum_flags & HCK_PARTIALCKSUM) { 218 NXGE_DEBUG_MSG((nxgep, TX_CTL, 219 "==> nxge_start: mp $%p len %d " 220 "cksum_flags 0x%x (partial checksum) ", 221 mp, MBLKL(mp), cksum_flags)); 222 cksum_on = B_TRUE; 223 } 224 225 pkthdrp = (p_tx_pkt_hdr_all_t)&tmp_hdrp; 226 pkthdrp->reserved = 0; 227 tmp_hdrp.value = 0; 228 nxge_fill_tx_hdr(mp, B_FALSE, cksum_on, 229 0, 0, pkthdrp, 230 start_offset, stuff_offset); 231 232 lso_again = B_FALSE; 233 lso_ngathers = 0; 234 235 MUTEX_ENTER(&tx_ring_p->lock); 236 237 if (isLDOMservice(nxgep)) { 238 tx_ring_p->tx_ring_busy = B_TRUE; 239 if (tx_ring_p->tx_ring_offline) { 240 freemsg(mp); 241 tx_ring_p->tx_ring_busy = B_FALSE; 242 (void) atomic_swap_32(&tx_ring_p->tx_ring_offline, 243 NXGE_TX_RING_OFFLINED); 244 MUTEX_EXIT(&tx_ring_p->lock); 245 return (status); 246 } 247 } 248 249 cur_index_lso = tx_ring_p->wr_index; 250 lso_tail_wrap = tx_ring_p->wr_index_wrap; 251 start_again: 252 ngathers = 0; 253 sop_index = tx_ring_p->wr_index; 254 #ifdef NXGE_DEBUG 255 if (tx_ring_p->descs_pending) { 256 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: " 257 "desc pending %d ", tx_ring_p->descs_pending)); 258 } 259 260 dump_len = (int)(MBLKL(mp)); 261 dump_len = (dump_len > 128) ? 128: dump_len; 262 263 NXGE_DEBUG_MSG((nxgep, TX_CTL, 264 "==> nxge_start: tdc %d: dumping ...: b_rptr $%p " 265 "(Before header reserve: ORIGINAL LEN %d)", 266 tx_ring_p->tdc, 267 mp->b_rptr, 268 dump_len)); 269 270 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: dump packets " 271 "(IP ORIGINAL b_rptr $%p): %s", mp->b_rptr, 272 nxge_dump_packet((char *)mp->b_rptr, dump_len))); 273 #endif 274 275 tdc_stats = tx_ring_p->tdc_stats; 276 mark_mode = (tx_ring_p->descs_pending && 277 ((tx_ring_p->tx_ring_size - tx_ring_p->descs_pending) 278 < nxge_tx_minfree)); 279 280 NXGE_DEBUG_MSG((nxgep, TX_CTL, 281 "TX Descriptor ring is channel %d mark mode %d", 282 tx_ring_p->tdc, mark_mode)); 283 284 if (!nxge_txdma_reclaim(nxgep, tx_ring_p, nxge_tx_minfree)) { 285 NXGE_DEBUG_MSG((nxgep, TX_CTL, 286 "TX Descriptor ring is full: channel %d", 287 tx_ring_p->tdc)); 288 NXGE_DEBUG_MSG((nxgep, TX_CTL, 289 "TX Descriptor ring is full: channel %d", 290 tx_ring_p->tdc)); 291 if (is_lso) { 292 /* free the current mp and mp_chain if not FULL */ 293 tdc_stats->tx_no_desc++; 294 NXGE_DEBUG_MSG((nxgep, TX_CTL, 295 "LSO packet: TX Descriptor ring is full: " 296 "channel %d", 297 tx_ring_p->tdc)); 298 goto nxge_start_fail_lso; 299 } else { 300 boolean_t skip_sched = B_FALSE; 301 302 cas32((uint32_t *)&tx_ring_p->queueing, 0, 1); 303 tdc_stats->tx_no_desc++; 304 305 if (isLDOMservice(nxgep)) { 306 tx_ring_p->tx_ring_busy = B_FALSE; 307 if (tx_ring_p->tx_ring_offline) { 308 (void) atomic_swap_32( 309 &tx_ring_p->tx_ring_offline, 310 NXGE_TX_RING_OFFLINED); 311 skip_sched = B_TRUE; 312 } 313 } 314 315 MUTEX_EXIT(&tx_ring_p->lock); 316 if (nxgep->resched_needed && 317 !nxgep->resched_running && !skip_sched) { 318 nxgep->resched_running = B_TRUE; 319 ddi_trigger_softintr(nxgep->resched_id); 320 } 321 status = 1; 322 goto nxge_start_fail1; 323 } 324 } 325 326 nmp = mp; 327 i = sop_index = tx_ring_p->wr_index; 328 nmblks = 0; 329 ngathers = 0; 330 pkt_len = 0; 331 pack_len = 0; 332 clen = 0; 333 last_bidx = -1; 334 good_packet = B_TRUE; 335 336 desc_area = tx_ring_p->tdc_desc; 337 npi_handle = desc_area.npi_handle; 338 npi_desc_handle.regh = (nxge_os_acc_handle_t) 339 DMA_COMMON_ACC_HANDLE(desc_area); 340 tx_desc_ring_vp = (p_tx_desc_t)DMA_COMMON_VPTR(desc_area); 341 tx_desc_dma_handle = (nxge_os_dma_handle_t) 342 DMA_COMMON_HANDLE(desc_area); 343 tx_msg_ring = tx_ring_p->tx_msg_ring; 344 345 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: wr_index %d i %d", 346 sop_index, i)); 347 348 #ifdef NXGE_DEBUG 349 msgsize = msgdsize(nmp); 350 NXGE_DEBUG_MSG((nxgep, TX_CTL, 351 "==> nxge_start(1): wr_index %d i %d msgdsize %d", 352 sop_index, i, msgsize)); 353 #endif 354 /* 355 * The first 16 bytes of the premapped buffer are reserved 356 * for header. No padding will be used. 357 */ 358 pkt_len = pack_len = boff = TX_PKT_HEADER_SIZE; 359 if (nxge_tx_use_bcopy && (nxgep->niu_type != N2_NIU)) { 360 bcopy_thresh = (nxge_bcopy_thresh - TX_PKT_HEADER_SIZE); 361 } else { 362 bcopy_thresh = (TX_BCOPY_SIZE - TX_PKT_HEADER_SIZE); 363 } 364 while (nmp) { 365 good_packet = B_TRUE; 366 b_rptr = nmp->b_rptr; 367 len = MBLKL(nmp); 368 if (len <= 0) { 369 nmp = nmp->b_cont; 370 continue; 371 } 372 nmblks++; 373 374 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(1): nmblks %d " 375 "len %d pkt_len %d pack_len %d", 376 nmblks, len, pkt_len, pack_len)); 377 /* 378 * Hardware limits the transfer length to 4K for NIU and 379 * 4076 (TX_MAX_TRANSFER_LENGTH) for Neptune. But we just 380 * use TX_MAX_TRANSFER_LENGTH as the limit for both. 381 * If len is longer than the limit, then we break nmp into 382 * two chunks: Make the first chunk equal to the limit and 383 * the second chunk for the remaining data. If the second 384 * chunk is still larger than the limit, then it will be 385 * broken into two in the next pass. 386 */ 387 if (len > TX_MAX_TRANSFER_LENGTH - TX_PKT_HEADER_SIZE) { 388 if ((t_mp = dupb(nmp)) != NULL) { 389 nmp->b_wptr = nmp->b_rptr + 390 (TX_MAX_TRANSFER_LENGTH 391 - TX_PKT_HEADER_SIZE); 392 t_mp->b_rptr = nmp->b_wptr; 393 t_mp->b_cont = nmp->b_cont; 394 nmp->b_cont = t_mp; 395 len = MBLKL(nmp); 396 } else { 397 if (is_lso) { 398 NXGE_DEBUG_MSG((nxgep, TX_CTL, 399 "LSO packet: dupb failed: " 400 "channel %d", 401 tx_ring_p->tdc)); 402 mp = nmp; 403 goto nxge_start_fail_lso; 404 } else { 405 good_packet = B_FALSE; 406 goto nxge_start_fail2; 407 } 408 } 409 } 410 tx_desc.value = 0; 411 tx_desc_p = &tx_desc_ring_vp[i]; 412 #ifdef NXGE_DEBUG 413 tx_desc_pp = &tx_desc_ring_pp[i]; 414 #endif 415 tx_msg_p = &tx_msg_ring[i]; 416 #if defined(__i386) 417 npi_desc_handle.regp = (uint32_t)tx_desc_p; 418 #else 419 npi_desc_handle.regp = (uint64_t)tx_desc_p; 420 #endif 421 if (!header_set && 422 ((!nxge_tx_use_bcopy && (len > TX_BCOPY_SIZE)) || 423 (len >= bcopy_thresh))) { 424 header_set = B_TRUE; 425 bcopy_thresh += TX_PKT_HEADER_SIZE; 426 boff = 0; 427 pack_len = 0; 428 kaddr = (caddr_t)DMA_COMMON_VPTR(tx_msg_p->buf_dma); 429 hdrp = (p_tx_pkt_header_t)kaddr; 430 clen = pkt_len; 431 dma_handle = tx_msg_p->buf_dma_handle; 432 dma_ioaddr = DMA_COMMON_IOADDR(tx_msg_p->buf_dma); 433 (void) ddi_dma_sync(dma_handle, 434 i * nxge_bcopy_thresh, nxge_bcopy_thresh, 435 DDI_DMA_SYNC_FORDEV); 436 437 tx_msg_p->flags.dma_type = USE_BCOPY; 438 goto nxge_start_control_header_only; 439 } 440 441 pkt_len += len; 442 pack_len += len; 443 444 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(3): " 445 "desc entry %d " 446 "DESC IOADDR $%p " 447 "desc_vp $%p tx_desc_p $%p " 448 "desc_pp $%p tx_desc_pp $%p " 449 "len %d pkt_len %d pack_len %d", 450 i, 451 DMA_COMMON_IOADDR(desc_area), 452 tx_desc_ring_vp, tx_desc_p, 453 tx_desc_ring_pp, tx_desc_pp, 454 len, pkt_len, pack_len)); 455 456 if (len < bcopy_thresh) { 457 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(4): " 458 "USE BCOPY: ")); 459 if (nxge_tx_tiny_pack) { 460 uint32_t blst = 461 TXDMA_DESC_NEXT_INDEX(i, -1, 462 tx_ring_p->tx_wrap_mask); 463 NXGE_DEBUG_MSG((nxgep, TX_CTL, 464 "==> nxge_start(5): pack")); 465 if ((pack_len <= bcopy_thresh) && 466 (last_bidx == blst)) { 467 NXGE_DEBUG_MSG((nxgep, TX_CTL, 468 "==> nxge_start: pack(6) " 469 "(pkt_len %d pack_len %d)", 470 pkt_len, pack_len)); 471 i = blst; 472 tx_desc_p = &tx_desc_ring_vp[i]; 473 #ifdef NXGE_DEBUG 474 tx_desc_pp = &tx_desc_ring_pp[i]; 475 #endif 476 tx_msg_p = &tx_msg_ring[i]; 477 boff = pack_len - len; 478 ngathers--; 479 } else if (pack_len > bcopy_thresh && 480 header_set) { 481 pack_len = len; 482 boff = 0; 483 bcopy_thresh = nxge_bcopy_thresh; 484 NXGE_DEBUG_MSG((nxgep, TX_CTL, 485 "==> nxge_start(7): > max NEW " 486 "bcopy thresh %d " 487 "pkt_len %d pack_len %d(next)", 488 bcopy_thresh, 489 pkt_len, pack_len)); 490 } 491 last_bidx = i; 492 } 493 kaddr = (caddr_t)DMA_COMMON_VPTR(tx_msg_p->buf_dma); 494 if ((boff == TX_PKT_HEADER_SIZE) && (nmblks == 1)) { 495 hdrp = (p_tx_pkt_header_t)kaddr; 496 header_set = B_TRUE; 497 NXGE_DEBUG_MSG((nxgep, TX_CTL, 498 "==> nxge_start(7_x2): " 499 "pkt_len %d pack_len %d (new hdrp $%p)", 500 pkt_len, pack_len, hdrp)); 501 } 502 tx_msg_p->flags.dma_type = USE_BCOPY; 503 kaddr += boff; 504 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(8): " 505 "USE BCOPY: before bcopy " 506 "DESC IOADDR $%p entry %d " 507 "bcopy packets %d " 508 "bcopy kaddr $%p " 509 "bcopy ioaddr (SAD) $%p " 510 "bcopy clen %d " 511 "bcopy boff %d", 512 DMA_COMMON_IOADDR(desc_area), i, 513 tdc_stats->tx_hdr_pkts, 514 kaddr, 515 dma_ioaddr, 516 clen, 517 boff)); 518 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: " 519 "1USE BCOPY: ")); 520 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: " 521 "2USE BCOPY: ")); 522 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: " 523 "last USE BCOPY: copy from b_rptr $%p " 524 "to KADDR $%p (len %d offset %d", 525 b_rptr, kaddr, len, boff)); 526 527 bcopy(b_rptr, kaddr, len); 528 529 #ifdef NXGE_DEBUG 530 dump_len = (len > 128) ? 128: len; 531 NXGE_DEBUG_MSG((nxgep, TX_CTL, 532 "==> nxge_start: dump packets " 533 "(After BCOPY len %d)" 534 "(b_rptr $%p): %s", len, nmp->b_rptr, 535 nxge_dump_packet((char *)nmp->b_rptr, 536 dump_len))); 537 #endif 538 539 dma_handle = tx_msg_p->buf_dma_handle; 540 dma_ioaddr = DMA_COMMON_IOADDR(tx_msg_p->buf_dma); 541 (void) ddi_dma_sync(dma_handle, 542 i * nxge_bcopy_thresh, nxge_bcopy_thresh, 543 DDI_DMA_SYNC_FORDEV); 544 clen = len + boff; 545 tdc_stats->tx_hdr_pkts++; 546 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(9): " 547 "USE BCOPY: " 548 "DESC IOADDR $%p entry %d " 549 "bcopy packets %d " 550 "bcopy kaddr $%p " 551 "bcopy ioaddr (SAD) $%p " 552 "bcopy clen %d " 553 "bcopy boff %d", 554 DMA_COMMON_IOADDR(desc_area), 555 i, 556 tdc_stats->tx_hdr_pkts, 557 kaddr, 558 dma_ioaddr, 559 clen, 560 boff)); 561 } else { 562 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(12): " 563 "USE DVMA: len %d", len)); 564 tx_msg_p->flags.dma_type = USE_DMA; 565 dma_flags = DDI_DMA_WRITE; 566 if (len < nxge_dma_stream_thresh) { 567 dma_flags |= DDI_DMA_CONSISTENT; 568 } else { 569 dma_flags |= DDI_DMA_STREAMING; 570 } 571 572 dma_handle = tx_msg_p->dma_handle; 573 status = ddi_dma_addr_bind_handle(dma_handle, NULL, 574 (caddr_t)b_rptr, len, dma_flags, 575 DDI_DMA_DONTWAIT, NULL, 576 &dma_cookie, &ncookies); 577 if (status == DDI_DMA_MAPPED) { 578 dma_ioaddr = dma_cookie.dmac_laddress; 579 len = (int)dma_cookie.dmac_size; 580 clen = (uint32_t)dma_cookie.dmac_size; 581 NXGE_DEBUG_MSG((nxgep, TX_CTL, 582 "==> nxge_start(12_1): " 583 "USE DVMA: len %d clen %d " 584 "ngathers %d", 585 len, clen, 586 ngathers)); 587 #if defined(__i386) 588 npi_desc_handle.regp = (uint32_t)tx_desc_p; 589 #else 590 npi_desc_handle.regp = (uint64_t)tx_desc_p; 591 #endif 592 while (ncookies > 1) { 593 ngathers++; 594 /* 595 * this is the fix for multiple 596 * cookies, which are basically 597 * a descriptor entry, we don't set 598 * SOP bit as well as related fields 599 */ 600 601 (void) npi_txdma_desc_gather_set( 602 npi_desc_handle, 603 &tx_desc, 604 (ngathers -1), 605 mark_mode, 606 ngathers, 607 dma_ioaddr, 608 clen); 609 610 tx_msg_p->tx_msg_size = clen; 611 NXGE_DEBUG_MSG((nxgep, TX_CTL, 612 "==> nxge_start: DMA " 613 "ncookie %d " 614 "ngathers %d " 615 "dma_ioaddr $%p len %d" 616 "desc $%p descp $%p (%d)", 617 ncookies, 618 ngathers, 619 dma_ioaddr, clen, 620 *tx_desc_p, tx_desc_p, i)); 621 622 ddi_dma_nextcookie(dma_handle, 623 &dma_cookie); 624 dma_ioaddr = 625 dma_cookie.dmac_laddress; 626 627 len = (int)dma_cookie.dmac_size; 628 clen = (uint32_t)dma_cookie.dmac_size; 629 NXGE_DEBUG_MSG((nxgep, TX_CTL, 630 "==> nxge_start(12_2): " 631 "USE DVMA: len %d clen %d ", 632 len, clen)); 633 634 i = TXDMA_DESC_NEXT_INDEX(i, 1, 635 tx_ring_p->tx_wrap_mask); 636 tx_desc_p = &tx_desc_ring_vp[i]; 637 638 npi_desc_handle.regp = 639 #if defined(__i386) 640 (uint32_t)tx_desc_p; 641 #else 642 (uint64_t)tx_desc_p; 643 #endif 644 tx_msg_p = &tx_msg_ring[i]; 645 tx_msg_p->flags.dma_type = USE_NONE; 646 tx_desc.value = 0; 647 648 ncookies--; 649 } 650 tdc_stats->tx_ddi_pkts++; 651 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start:" 652 "DMA: ddi packets %d", 653 tdc_stats->tx_ddi_pkts)); 654 } else { 655 NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 656 "dma mapping failed for %d " 657 "bytes addr $%p flags %x (%d)", 658 len, b_rptr, status, status)); 659 good_packet = B_FALSE; 660 tdc_stats->tx_dma_bind_fail++; 661 tx_msg_p->flags.dma_type = USE_NONE; 662 if (is_lso) { 663 mp = nmp; 664 goto nxge_start_fail_lso; 665 } else { 666 goto nxge_start_fail2; 667 } 668 } 669 } /* ddi dvma */ 670 671 if (is_lso) { 672 nmp_lso_save = nmp; 673 } 674 nmp = nmp->b_cont; 675 nxge_start_control_header_only: 676 #if defined(__i386) 677 npi_desc_handle.regp = (uint32_t)tx_desc_p; 678 #else 679 npi_desc_handle.regp = (uint64_t)tx_desc_p; 680 #endif 681 ngathers++; 682 683 if (ngathers == 1) { 684 #ifdef NXGE_DEBUG 685 save_desc_p = &sop_tx_desc; 686 #endif 687 sop_tx_desc_p = &sop_tx_desc; 688 sop_tx_desc_p->value = 0; 689 sop_tx_desc_p->bits.hdw.tr_len = clen; 690 sop_tx_desc_p->bits.hdw.sad = dma_ioaddr >> 32; 691 sop_tx_desc_p->bits.ldw.sad = dma_ioaddr & 0xffffffff; 692 } else { 693 #ifdef NXGE_DEBUG 694 save_desc_p = &tx_desc; 695 #endif 696 tmp_desc_p = &tx_desc; 697 tmp_desc_p->value = 0; 698 tmp_desc_p->bits.hdw.tr_len = clen; 699 tmp_desc_p->bits.hdw.sad = dma_ioaddr >> 32; 700 tmp_desc_p->bits.ldw.sad = dma_ioaddr & 0xffffffff; 701 702 tx_desc_p->value = tmp_desc_p->value; 703 } 704 705 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(13): " 706 "Desc_entry %d ngathers %d " 707 "desc_vp $%p tx_desc_p $%p " 708 "len %d clen %d pkt_len %d pack_len %d nmblks %d " 709 "dma_ioaddr (SAD) $%p mark %d", 710 i, ngathers, 711 tx_desc_ring_vp, tx_desc_p, 712 len, clen, pkt_len, pack_len, nmblks, 713 dma_ioaddr, mark_mode)); 714 715 #ifdef NXGE_DEBUG 716 npi_desc_handle.nxgep = nxgep; 717 npi_desc_handle.function.function = nxgep->function_num; 718 npi_desc_handle.function.instance = nxgep->instance; 719 sad = (save_desc_p->value & TX_PKT_DESC_SAD_MASK); 720 xfer_len = ((save_desc_p->value & TX_PKT_DESC_TR_LEN_MASK) >> 721 TX_PKT_DESC_TR_LEN_SHIFT); 722 723 724 NXGE_DEBUG_MSG((nxgep, TX_CTL, "\n\t: value 0x%llx\n" 725 "\t\tsad $%p\ttr_len %d len %d\tnptrs %d\t" 726 "mark %d sop %d\n", 727 save_desc_p->value, 728 sad, 729 save_desc_p->bits.hdw.tr_len, 730 xfer_len, 731 save_desc_p->bits.hdw.num_ptr, 732 save_desc_p->bits.hdw.mark, 733 save_desc_p->bits.hdw.sop)); 734 735 npi_txdma_dump_desc_one(npi_desc_handle, NULL, i); 736 #endif 737 738 tx_msg_p->tx_msg_size = clen; 739 i = TXDMA_DESC_NEXT_INDEX(i, 1, tx_ring_p->tx_wrap_mask); 740 if (ngathers > nxge_tx_max_gathers) { 741 good_packet = B_FALSE; 742 hcksum_retrieve(mp, NULL, NULL, &start_offset, 743 &stuff_offset, &end_offset, &value, 744 &cksum_flags); 745 746 NXGE_DEBUG_MSG((NULL, TX_CTL, 747 "==> nxge_start(14): pull msg - " 748 "len %d pkt_len %d ngathers %d", 749 len, pkt_len, ngathers)); 750 /* Pull all message blocks from b_cont */ 751 if (is_lso) { 752 mp = nmp_lso_save; 753 goto nxge_start_fail_lso; 754 } 755 if ((msgpullup(mp, -1)) == NULL) { 756 goto nxge_start_fail2; 757 } 758 goto nxge_start_fail2; 759 } 760 } /* while (nmp) */ 761 762 tx_msg_p->tx_message = mp; 763 tx_desc_p = &tx_desc_ring_vp[sop_index]; 764 #if defined(__i386) 765 npi_desc_handle.regp = (uint32_t)tx_desc_p; 766 #else 767 npi_desc_handle.regp = (uint64_t)tx_desc_p; 768 #endif 769 770 pkthdrp = (p_tx_pkt_hdr_all_t)hdrp; 771 pkthdrp->reserved = 0; 772 hdrp->value = 0; 773 bcopy(&tmp_hdrp, hdrp, sizeof (tx_pkt_header_t)); 774 775 if (pkt_len > NXGE_MTU_DEFAULT_MAX) { 776 tdc_stats->tx_jumbo_pkts++; 777 } 778 779 min_len = (ETHERMIN + TX_PKT_HEADER_SIZE + (npads * 2)); 780 if (pkt_len < min_len) { 781 /* Assume we use bcopy to premapped buffers */ 782 kaddr = (caddr_t)DMA_COMMON_VPTR(tx_msg_p->buf_dma); 783 NXGE_DEBUG_MSG((NULL, TX_CTL, 784 "==> nxge_start(14-1): < (msg_min + 16)" 785 "len %d pkt_len %d min_len %d bzero %d ngathers %d", 786 len, pkt_len, min_len, (min_len - pkt_len), ngathers)); 787 bzero((kaddr + pkt_len), (min_len - pkt_len)); 788 pkt_len = tx_msg_p->tx_msg_size = min_len; 789 790 sop_tx_desc_p->bits.hdw.tr_len = min_len; 791 792 NXGE_MEM_PIO_WRITE64(npi_desc_handle, sop_tx_desc_p->value); 793 tx_desc_p->value = sop_tx_desc_p->value; 794 795 NXGE_DEBUG_MSG((NULL, TX_CTL, 796 "==> nxge_start(14-2): < msg_min - " 797 "len %d pkt_len %d min_len %d ngathers %d", 798 len, pkt_len, min_len, ngathers)); 799 } 800 801 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: cksum_flags 0x%x ", 802 cksum_flags)); 803 { 804 uint64_t tmp_len; 805 806 /* pkt_len already includes 16 + paddings!! */ 807 /* Update the control header length */ 808 tot_xfer_len = (pkt_len - TX_PKT_HEADER_SIZE); 809 tmp_len = hdrp->value | 810 (tot_xfer_len << TX_PKT_HEADER_TOT_XFER_LEN_SHIFT); 811 812 NXGE_DEBUG_MSG((nxgep, TX_CTL, 813 "==> nxge_start(15_x1): setting SOP " 814 "tot_xfer_len 0x%llx (%d) pkt_len %d tmp_len " 815 "0x%llx hdrp->value 0x%llx", 816 tot_xfer_len, tot_xfer_len, pkt_len, 817 tmp_len, hdrp->value)); 818 #if defined(_BIG_ENDIAN) 819 hdrp->value = ddi_swap64(tmp_len); 820 #else 821 hdrp->value = tmp_len; 822 #endif 823 NXGE_DEBUG_MSG((nxgep, 824 TX_CTL, "==> nxge_start(15_x2): setting SOP " 825 "after SWAP: tot_xfer_len 0x%llx pkt_len %d " 826 "tmp_len 0x%llx hdrp->value 0x%llx", 827 tot_xfer_len, pkt_len, 828 tmp_len, hdrp->value)); 829 } 830 831 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(15): setting SOP " 832 "wr_index %d " 833 "tot_xfer_len (%d) pkt_len %d npads %d", 834 sop_index, 835 tot_xfer_len, pkt_len, 836 npads)); 837 838 sop_tx_desc_p->bits.hdw.sop = 1; 839 sop_tx_desc_p->bits.hdw.mark = mark_mode; 840 sop_tx_desc_p->bits.hdw.num_ptr = ngathers; 841 842 NXGE_MEM_PIO_WRITE64(npi_desc_handle, sop_tx_desc_p->value); 843 844 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start(16): set SOP done")); 845 846 #ifdef NXGE_DEBUG 847 npi_desc_handle.nxgep = nxgep; 848 npi_desc_handle.function.function = nxgep->function_num; 849 npi_desc_handle.function.instance = nxgep->instance; 850 851 NXGE_DEBUG_MSG((nxgep, TX_CTL, "\n\t: value 0x%llx\n" 852 "\t\tsad $%p\ttr_len %d len %d\tnptrs %d\tmark %d sop %d\n", 853 save_desc_p->value, 854 sad, 855 save_desc_p->bits.hdw.tr_len, 856 xfer_len, 857 save_desc_p->bits.hdw.num_ptr, 858 save_desc_p->bits.hdw.mark, 859 save_desc_p->bits.hdw.sop)); 860 (void) npi_txdma_dump_desc_one(npi_desc_handle, NULL, sop_index); 861 862 dump_len = (pkt_len > 128) ? 128: pkt_len; 863 NXGE_DEBUG_MSG((nxgep, TX_CTL, 864 "==> nxge_start: dump packets(17) (after sop set, len " 865 " (len/dump_len/pkt_len/tot_xfer_len) %d/%d/%d/%d):\n" 866 "ptr $%p: %s", len, dump_len, pkt_len, tot_xfer_len, 867 (char *)hdrp, 868 nxge_dump_packet((char *)hdrp, dump_len))); 869 NXGE_DEBUG_MSG((nxgep, TX_CTL, 870 "==> nxge_start(18): TX desc sync: sop_index %d", 871 sop_index)); 872 #endif 873 874 if ((ngathers == 1) || tx_ring_p->wr_index < i) { 875 (void) ddi_dma_sync(tx_desc_dma_handle, 876 sop_index * sizeof (tx_desc_t), 877 ngathers * sizeof (tx_desc_t), 878 DDI_DMA_SYNC_FORDEV); 879 880 NXGE_DEBUG_MSG((nxgep, TX_CTL, "nxge_start(19): sync 1 " 881 "cs_off = 0x%02X cs_s_off = 0x%02X " 882 "pkt_len %d ngathers %d sop_index %d\n", 883 stuff_offset, start_offset, 884 pkt_len, ngathers, sop_index)); 885 } else { /* more than one descriptor and wrap around */ 886 uint32_t nsdescs = tx_ring_p->tx_ring_size - sop_index; 887 (void) ddi_dma_sync(tx_desc_dma_handle, 888 sop_index * sizeof (tx_desc_t), 889 nsdescs * sizeof (tx_desc_t), 890 DDI_DMA_SYNC_FORDEV); 891 NXGE_DEBUG_MSG((nxgep, TX_CTL, "nxge_start(20): sync 1 " 892 "cs_off = 0x%02X cs_s_off = 0x%02X " 893 "pkt_len %d ngathers %d sop_index %d\n", 894 stuff_offset, start_offset, 895 pkt_len, ngathers, sop_index)); 896 897 (void) ddi_dma_sync(tx_desc_dma_handle, 898 0, 899 (ngathers - nsdescs) * sizeof (tx_desc_t), 900 DDI_DMA_SYNC_FORDEV); 901 NXGE_DEBUG_MSG((nxgep, TX_CTL, "nxge_start(21): sync 2 " 902 "cs_off = 0x%02X cs_s_off = 0x%02X " 903 "pkt_len %d ngathers %d sop_index %d\n", 904 stuff_offset, start_offset, 905 pkt_len, ngathers, sop_index)); 906 } 907 908 tail_index = tx_ring_p->wr_index; 909 tail_wrap = tx_ring_p->wr_index_wrap; 910 911 tx_ring_p->wr_index = i; 912 if (tx_ring_p->wr_index <= tail_index) { 913 tx_ring_p->wr_index_wrap = ((tail_wrap == B_TRUE) ? 914 B_FALSE : B_TRUE); 915 } 916 917 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: TX kick: " 918 "channel %d wr_index %d wrap %d ngathers %d desc_pend %d", 919 tx_ring_p->tdc, 920 tx_ring_p->wr_index, 921 tx_ring_p->wr_index_wrap, 922 ngathers, 923 tx_ring_p->descs_pending)); 924 925 if (is_lso) { 926 lso_ngathers += ngathers; 927 if (mp_chain != NULL) { 928 mp = mp_chain; 929 mp_chain = mp_chain->b_next; 930 mp->b_next = NULL; 931 if (nxge_lso_kick_cnt == lso_ngathers) { 932 tx_ring_p->descs_pending += lso_ngathers; 933 { 934 tx_ring_kick_t kick; 935 936 kick.value = 0; 937 kick.bits.ldw.wrap = 938 tx_ring_p->wr_index_wrap; 939 kick.bits.ldw.tail = 940 (uint16_t)tx_ring_p->wr_index; 941 942 /* Kick the Transmit kick register */ 943 TXDMA_REG_WRITE64( 944 NXGE_DEV_NPI_HANDLE(nxgep), 945 TX_RING_KICK_REG, 946 (uint8_t)tx_ring_p->tdc, 947 kick.value); 948 tdc_stats->tx_starts++; 949 950 NXGE_DEBUG_MSG((nxgep, TX_CTL, 951 "==> nxge_start: more LSO: " 952 "LSO_CNT %d", 953 lso_ngathers)); 954 } 955 lso_ngathers = 0; 956 ngathers = 0; 957 cur_index_lso = sop_index = tx_ring_p->wr_index; 958 lso_tail_wrap = tx_ring_p->wr_index_wrap; 959 } 960 NXGE_DEBUG_MSG((nxgep, TX_CTL, 961 "==> nxge_start: lso again: " 962 "lso_gathers %d ngathers %d cur_index_lso %d " 963 "wr_index %d sop_index %d", 964 lso_ngathers, ngathers, cur_index_lso, 965 tx_ring_p->wr_index, sop_index)); 966 967 NXGE_DEBUG_MSG((nxgep, TX_CTL, 968 "==> nxge_start: next : count %d", 969 lso_ngathers)); 970 lso_again = B_TRUE; 971 goto start_again; 972 } 973 ngathers = lso_ngathers; 974 } 975 976 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: TX KICKING: ")); 977 978 { 979 tx_ring_kick_t kick; 980 981 kick.value = 0; 982 kick.bits.ldw.wrap = tx_ring_p->wr_index_wrap; 983 kick.bits.ldw.tail = (uint16_t)tx_ring_p->wr_index; 984 985 /* Kick start the Transmit kick register */ 986 TXDMA_REG_WRITE64(NXGE_DEV_NPI_HANDLE(nxgep), 987 TX_RING_KICK_REG, 988 (uint8_t)tx_ring_p->tdc, 989 kick.value); 990 } 991 992 tx_ring_p->descs_pending += ngathers; 993 tdc_stats->tx_starts++; 994 995 if (isLDOMservice(nxgep)) { 996 tx_ring_p->tx_ring_busy = B_FALSE; 997 if (tx_ring_p->tx_ring_offline) { 998 (void) atomic_swap_32(&tx_ring_p->tx_ring_offline, 999 NXGE_TX_RING_OFFLINED); 1000 } 1001 } 1002 1003 MUTEX_EXIT(&tx_ring_p->lock); 1004 1005 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_start")); 1006 1007 return (status); 1008 1009 nxge_start_fail_lso: 1010 status = 0; 1011 good_packet = B_FALSE; 1012 if (mp != NULL) { 1013 freemsg(mp); 1014 } 1015 if (mp_chain != NULL) { 1016 freemsg(mp_chain); 1017 } 1018 if (!lso_again && !ngathers) { 1019 if (isLDOMservice(nxgep)) { 1020 tx_ring_p->tx_ring_busy = B_FALSE; 1021 if (tx_ring_p->tx_ring_offline) { 1022 (void) atomic_swap_32( 1023 &tx_ring_p->tx_ring_offline, 1024 NXGE_TX_RING_OFFLINED); 1025 } 1026 } 1027 1028 MUTEX_EXIT(&tx_ring_p->lock); 1029 NXGE_DEBUG_MSG((nxgep, TX_CTL, 1030 "==> nxge_start: lso exit (nothing changed)")); 1031 goto nxge_start_fail1; 1032 } 1033 1034 NXGE_DEBUG_MSG((nxgep, TX_CTL, 1035 "==> nxge_start (channel %d): before lso " 1036 "lso_gathers %d ngathers %d cur_index_lso %d " 1037 "wr_index %d sop_index %d lso_again %d", 1038 tx_ring_p->tdc, 1039 lso_ngathers, ngathers, cur_index_lso, 1040 tx_ring_p->wr_index, sop_index, lso_again)); 1041 1042 if (lso_again) { 1043 lso_ngathers += ngathers; 1044 ngathers = lso_ngathers; 1045 sop_index = cur_index_lso; 1046 tx_ring_p->wr_index = sop_index; 1047 tx_ring_p->wr_index_wrap = lso_tail_wrap; 1048 } 1049 1050 NXGE_DEBUG_MSG((nxgep, TX_CTL, 1051 "==> nxge_start (channel %d): after lso " 1052 "lso_gathers %d ngathers %d cur_index_lso %d " 1053 "wr_index %d sop_index %d lso_again %d", 1054 tx_ring_p->tdc, 1055 lso_ngathers, ngathers, cur_index_lso, 1056 tx_ring_p->wr_index, sop_index, lso_again)); 1057 1058 nxge_start_fail2: 1059 if (good_packet == B_FALSE) { 1060 cur_index = sop_index; 1061 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: clean up")); 1062 for (i = 0; i < ngathers; i++) { 1063 tx_desc_p = &tx_desc_ring_vp[cur_index]; 1064 #if defined(__i386) 1065 npi_handle.regp = (uint32_t)tx_desc_p; 1066 #else 1067 npi_handle.regp = (uint64_t)tx_desc_p; 1068 #endif 1069 tx_msg_p = &tx_msg_ring[cur_index]; 1070 (void) npi_txdma_desc_set_zero(npi_handle, 1); 1071 if (tx_msg_p->flags.dma_type == USE_DVMA) { 1072 NXGE_DEBUG_MSG((nxgep, TX_CTL, 1073 "tx_desc_p = %X index = %d", 1074 tx_desc_p, tx_ring_p->rd_index)); 1075 (void) dvma_unload(tx_msg_p->dvma_handle, 1076 0, -1); 1077 tx_msg_p->dvma_handle = NULL; 1078 if (tx_ring_p->dvma_wr_index == 1079 tx_ring_p->dvma_wrap_mask) 1080 tx_ring_p->dvma_wr_index = 0; 1081 else 1082 tx_ring_p->dvma_wr_index++; 1083 tx_ring_p->dvma_pending--; 1084 } else if (tx_msg_p->flags.dma_type == USE_DMA) { 1085 if (ddi_dma_unbind_handle( 1086 tx_msg_p->dma_handle)) { 1087 cmn_err(CE_WARN, "!nxge_start: " 1088 "ddi_dma_unbind_handle failed"); 1089 } 1090 } 1091 tx_msg_p->flags.dma_type = USE_NONE; 1092 cur_index = TXDMA_DESC_NEXT_INDEX(cur_index, 1, 1093 tx_ring_p->tx_wrap_mask); 1094 1095 } 1096 1097 nxgep->resched_needed = B_TRUE; 1098 } 1099 1100 if (isLDOMservice(nxgep)) { 1101 tx_ring_p->tx_ring_busy = B_FALSE; 1102 if (tx_ring_p->tx_ring_offline) { 1103 (void) atomic_swap_32(&tx_ring_p->tx_ring_offline, 1104 NXGE_TX_RING_OFFLINED); 1105 } 1106 } 1107 1108 MUTEX_EXIT(&tx_ring_p->lock); 1109 1110 nxge_start_fail1: 1111 /* Add FMA to check the access handle nxge_hregh */ 1112 1113 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_start")); 1114 1115 return (status); 1116 } 1117 1118 int 1119 nxge_serial_tx(mblk_t *mp, void *arg) 1120 { 1121 p_tx_ring_t tx_ring_p = (p_tx_ring_t)arg; 1122 p_nxge_t nxgep = tx_ring_p->nxgep; 1123 int status = 0; 1124 1125 if (isLDOMservice(nxgep)) { 1126 if (tx_ring_p->tx_ring_offline) { 1127 freemsg(mp); 1128 return (status); 1129 } 1130 } 1131 1132 status = nxge_start(nxgep, tx_ring_p, mp); 1133 return (status); 1134 } 1135 1136 boolean_t 1137 nxge_send(p_nxge_t nxgep, mblk_t *mp, p_mac_tx_hint_t hp) 1138 { 1139 p_tx_ring_t *tx_rings; 1140 uint8_t ring_index; 1141 p_tx_ring_t tx_ring_p; 1142 nxge_grp_t *group; 1143 1144 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_send")); 1145 1146 ASSERT(mp->b_next == NULL); 1147 1148 group = nxgep->tx_set.group[0]; /* The default group */ 1149 ring_index = nxge_tx_lb_ring_1(mp, group->count, hp); 1150 1151 tx_rings = nxgep->tx_rings->rings; 1152 tx_ring_p = tx_rings[group->legend[ring_index]]; 1153 1154 if (isLDOMservice(nxgep)) { 1155 if (tx_ring_p->tx_ring_offline) { 1156 /* 1157 * OFFLINE means that it is in the process of being 1158 * shared - that is, it has been claimed by the HIO 1159 * code, but hasn't been unlinked from <group> yet. 1160 * So in this case use the first TDC, which always 1161 * belongs to the service domain and can't be shared. 1162 */ 1163 ring_index = 0; 1164 tx_ring_p = tx_rings[group->legend[ring_index]]; 1165 } 1166 } 1167 1168 NXGE_DEBUG_MSG((nxgep, TX_CTL, "count %d, tx_rings[%d] = %p", 1169 (int)group->count, group->legend[ring_index], tx_ring_p)); 1170 1171 switch (nxge_tx_scheme) { 1172 case NXGE_USE_START: 1173 if (nxge_start(nxgep, tx_ring_p, mp)) { 1174 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_send: failed " 1175 "ring index %d", ring_index)); 1176 return (B_FALSE); 1177 } 1178 break; 1179 1180 case NXGE_USE_SERIAL: 1181 default: 1182 nxge_serialize_enter(tx_ring_p->serial, mp); 1183 break; 1184 } 1185 1186 NXGE_DEBUG_MSG((nxgep, TX_CTL, "<== nxge_send: ring index %d", 1187 ring_index)); 1188 1189 return (B_TRUE); 1190 } 1191 1192 /* 1193 * nxge_m_tx() - send a chain of packets 1194 */ 1195 mblk_t * 1196 nxge_m_tx(void *arg, mblk_t *mp) 1197 { 1198 p_nxge_t nxgep = (p_nxge_t)arg; 1199 mblk_t *next; 1200 mac_tx_hint_t hint; 1201 1202 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_m_tx")); 1203 1204 if ((!(nxgep->drv_state & STATE_HW_INITIALIZED)) || 1205 (nxgep->nxge_mac_state != NXGE_MAC_STARTED)) { 1206 NXGE_DEBUG_MSG((nxgep, DDI_CTL, 1207 "==> nxge_m_tx: hardware not initialized")); 1208 NXGE_DEBUG_MSG((nxgep, DDI_CTL, 1209 "<== nxge_m_tx")); 1210 freemsgchain(mp); 1211 mp = NULL; 1212 return (mp); 1213 } 1214 1215 hint.hash = NULL; 1216 hint.vid = 0; 1217 hint.sap = 0; 1218 1219 while (mp != NULL) { 1220 next = mp->b_next; 1221 mp->b_next = NULL; 1222 1223 /* 1224 * Until Nemo tx resource works, the mac driver 1225 * does the load balancing based on TCP port, 1226 * or CPU. For debugging, we use a system 1227 * configurable parameter. 1228 */ 1229 if (!nxge_send(nxgep, mp, &hint)) { 1230 mp->b_next = next; 1231 break; 1232 } 1233 1234 mp = next; 1235 1236 NXGE_DEBUG_MSG((NULL, TX_CTL, 1237 "==> nxge_m_tx: (go back to loop) mp $%p next $%p", 1238 mp, next)); 1239 } 1240 1241 NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_m_tx")); 1242 return (mp); 1243 } 1244 1245 int 1246 nxge_tx_lb_ring_1(p_mblk_t mp, uint32_t maxtdcs, p_mac_tx_hint_t hp) 1247 { 1248 uint8_t ring_index = 0; 1249 uint8_t *tcp_port; 1250 p_mblk_t nmp; 1251 size_t mblk_len; 1252 size_t iph_len; 1253 size_t hdrs_size; 1254 uint8_t hdrs_buf[sizeof (struct ether_header) + 1255 IP_MAX_HDR_LENGTH + sizeof (uint32_t)]; 1256 /* 1257 * allocate space big enough to cover 1258 * the max ip header length and the first 1259 * 4 bytes of the TCP/IP header. 1260 */ 1261 1262 boolean_t qos = B_FALSE; 1263 1264 NXGE_DEBUG_MSG((NULL, TX_CTL, "==> nxge_tx_lb_ring")); 1265 1266 if (hp->vid) { 1267 qos = B_TRUE; 1268 } 1269 switch (nxge_tx_lb_policy) { 1270 case NXGE_TX_LB_TCPUDP: /* default IPv4 TCP/UDP */ 1271 default: 1272 tcp_port = mp->b_rptr; 1273 if (!nxge_no_tx_lb && !qos && 1274 (ntohs(((p_ether_header_t)tcp_port)->ether_type) 1275 == ETHERTYPE_IP)) { 1276 nmp = mp; 1277 mblk_len = MBLKL(nmp); 1278 tcp_port = NULL; 1279 if (mblk_len > sizeof (struct ether_header) + 1280 sizeof (uint8_t)) { 1281 tcp_port = nmp->b_rptr + 1282 sizeof (struct ether_header); 1283 mblk_len -= sizeof (struct ether_header); 1284 iph_len = ((*tcp_port) & 0x0f) << 2; 1285 if (mblk_len > (iph_len + sizeof (uint32_t))) { 1286 tcp_port = nmp->b_rptr; 1287 } else { 1288 tcp_port = NULL; 1289 } 1290 } 1291 if (tcp_port == NULL) { 1292 hdrs_size = 0; 1293 ((p_ether_header_t)hdrs_buf)->ether_type = 0; 1294 while ((nmp) && (hdrs_size < 1295 sizeof (hdrs_buf))) { 1296 mblk_len = MBLKL(nmp); 1297 if (mblk_len >= 1298 (sizeof (hdrs_buf) - hdrs_size)) 1299 mblk_len = sizeof (hdrs_buf) - 1300 hdrs_size; 1301 bcopy(nmp->b_rptr, 1302 &hdrs_buf[hdrs_size], mblk_len); 1303 hdrs_size += mblk_len; 1304 nmp = nmp->b_cont; 1305 } 1306 tcp_port = hdrs_buf; 1307 } 1308 tcp_port += sizeof (ether_header_t); 1309 if (!(tcp_port[6] & 0x3f) && !(tcp_port[7] & 0xff)) { 1310 switch (tcp_port[9]) { 1311 case IPPROTO_TCP: 1312 case IPPROTO_UDP: 1313 case IPPROTO_ESP: 1314 tcp_port += ((*tcp_port) & 0x0f) << 2; 1315 ring_index = 1316 ((tcp_port[0] ^ 1317 tcp_port[1] ^ 1318 tcp_port[2] ^ 1319 tcp_port[3]) % maxtdcs); 1320 break; 1321 1322 case IPPROTO_AH: 1323 /* SPI starts at the 4th byte */ 1324 tcp_port += ((*tcp_port) & 0x0f) << 2; 1325 ring_index = 1326 ((tcp_port[4] ^ 1327 tcp_port[5] ^ 1328 tcp_port[6] ^ 1329 tcp_port[7]) % maxtdcs); 1330 break; 1331 1332 default: 1333 ring_index = tcp_port[19] % maxtdcs; 1334 break; 1335 } 1336 } else { /* fragmented packet */ 1337 ring_index = tcp_port[19] % maxtdcs; 1338 } 1339 } else { 1340 ring_index = mp->b_band % maxtdcs; 1341 } 1342 break; 1343 1344 case NXGE_TX_LB_HASH: 1345 if (hp->hash) { 1346 #if defined(__i386) 1347 ring_index = ((uint32_t)(hp->hash) % maxtdcs); 1348 #else 1349 ring_index = ((uint64_t)(hp->hash) % maxtdcs); 1350 #endif 1351 } else { 1352 ring_index = mp->b_band % maxtdcs; 1353 } 1354 break; 1355 1356 case NXGE_TX_LB_DEST_MAC: /* Use destination MAC address */ 1357 tcp_port = mp->b_rptr; 1358 ring_index = tcp_port[5] % maxtdcs; 1359 break; 1360 } 1361 1362 NXGE_DEBUG_MSG((NULL, TX_CTL, "<== nxge_tx_lb_ring")); 1363 1364 return (ring_index); 1365 } 1366 1367 uint_t 1368 nxge_reschedule(caddr_t arg) 1369 { 1370 p_nxge_t nxgep; 1371 1372 nxgep = (p_nxge_t)arg; 1373 1374 NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_reschedule")); 1375 1376 if (nxgep->nxge_mac_state == NXGE_MAC_STARTED && 1377 nxgep->resched_needed) { 1378 if (!isLDOMguest(nxgep)) 1379 mac_tx_update(nxgep->mach); 1380 #if defined(sun4v) 1381 else { /* isLDOMguest(nxgep) */ 1382 nxge_hio_data_t *nhd = (nxge_hio_data_t *) 1383 nxgep->nxge_hw_p->hio; 1384 nx_vio_fp_t *vio = &nhd->hio.vio; 1385 1386 /* Call back vnet. */ 1387 if (vio->cb.vio_net_tx_update) { 1388 (*vio->cb.vio_net_tx_update) 1389 (nxgep->hio_vr->vhp); 1390 } 1391 } 1392 #endif 1393 nxgep->resched_needed = B_FALSE; 1394 nxgep->resched_running = B_FALSE; 1395 } 1396 1397 NXGE_DEBUG_MSG((NULL, TX_CTL, "<== nxge_reschedule")); 1398 return (DDI_INTR_CLAIMED); 1399 } 1400 1401 1402 /* Software LSO starts here */ 1403 static void 1404 nxge_hcksum_retrieve(mblk_t *mp, 1405 uint32_t *start, uint32_t *stuff, uint32_t *end, 1406 uint32_t *value, uint32_t *flags) 1407 { 1408 if (mp->b_datap->db_type == M_DATA) { 1409 if (flags != NULL) { 1410 *flags = DB_CKSUMFLAGS(mp) & (HCK_IPV4_HDRCKSUM | 1411 HCK_PARTIALCKSUM | HCK_FULLCKSUM | 1412 HCK_FULLCKSUM_OK); 1413 if ((*flags & (HCK_PARTIALCKSUM | 1414 HCK_FULLCKSUM)) != 0) { 1415 if (value != NULL) 1416 *value = (uint32_t)DB_CKSUM16(mp); 1417 if ((*flags & HCK_PARTIALCKSUM) != 0) { 1418 if (start != NULL) 1419 *start = 1420 (uint32_t)DB_CKSUMSTART(mp); 1421 if (stuff != NULL) 1422 *stuff = 1423 (uint32_t)DB_CKSUMSTUFF(mp); 1424 if (end != NULL) 1425 *end = 1426 (uint32_t)DB_CKSUMEND(mp); 1427 } 1428 } 1429 } 1430 } 1431 } 1432 1433 static void 1434 nxge_lso_info_get(mblk_t *mp, uint32_t *mss, uint32_t *flags) 1435 { 1436 ASSERT(DB_TYPE(mp) == M_DATA); 1437 1438 *mss = 0; 1439 if (flags != NULL) { 1440 *flags = DB_CKSUMFLAGS(mp) & HW_LSO; 1441 if ((*flags != 0) && (mss != NULL)) { 1442 *mss = (uint32_t)DB_LSOMSS(mp); 1443 } 1444 NXGE_DEBUG_MSG((NULL, TX_CTL, 1445 "==> nxge_lso_info_get(flag !=NULL): mss %d *flags 0x%x", 1446 *mss, *flags)); 1447 } 1448 1449 NXGE_DEBUG_MSG((NULL, TX_CTL, 1450 "<== nxge_lso_info_get: mss %d", *mss)); 1451 } 1452 1453 /* 1454 * Do Soft LSO on the oversized packet. 1455 * 1456 * 1. Create a chain of message for headers. 1457 * 2. Fill up header messages with proper information. 1458 * 3. Copy Eithernet, IP, and TCP headers from the original message to 1459 * each new message with necessary adjustments. 1460 * * Unchange the ethernet header for DIX frames. (by default) 1461 * * IP Total Length field is updated to MSS or less(only for the last one). 1462 * * IP Identification value is incremented by one for each packet. 1463 * * TCP sequence Number is recalculated according to the payload length. 1464 * * Set FIN and/or PSH flags for the *last* packet if applied. 1465 * * TCP partial Checksum 1466 * 4. Update LSO information in the first message header. 1467 * 5. Release the original message header. 1468 */ 1469 static mblk_t * 1470 nxge_do_softlso(mblk_t *mp, uint32_t mss) 1471 { 1472 uint32_t hckflags; 1473 int pktlen; 1474 int hdrlen; 1475 int segnum; 1476 int i; 1477 struct ether_vlan_header *evh; 1478 int ehlen, iphlen, tcphlen; 1479 struct ip *oiph, *niph; 1480 struct tcphdr *otcph, *ntcph; 1481 int available, len, left; 1482 uint16_t ip_id; 1483 uint32_t tcp_seq; 1484 #ifdef __sparc 1485 uint32_t tcp_seq_tmp; 1486 #endif 1487 mblk_t *datamp; 1488 uchar_t *rptr; 1489 mblk_t *nmp; 1490 mblk_t *cmp; 1491 mblk_t *mp_chain; 1492 boolean_t do_cleanup = B_FALSE; 1493 t_uscalar_t start_offset = 0; 1494 t_uscalar_t stuff_offset = 0; 1495 t_uscalar_t value = 0; 1496 uint16_t l4_len; 1497 ipaddr_t src, dst; 1498 uint32_t cksum, sum, l4cksum; 1499 1500 NXGE_DEBUG_MSG((NULL, TX_CTL, 1501 "==> nxge_do_softlso")); 1502 /* 1503 * check the length of LSO packet payload and calculate the number of 1504 * segments to be generated. 1505 */ 1506 pktlen = msgsize(mp); 1507 evh = (struct ether_vlan_header *)mp->b_rptr; 1508 1509 /* VLAN? */ 1510 if (evh->ether_tpid == htons(ETHERTYPE_VLAN)) 1511 ehlen = sizeof (struct ether_vlan_header); 1512 else 1513 ehlen = sizeof (struct ether_header); 1514 oiph = (struct ip *)(mp->b_rptr + ehlen); 1515 iphlen = oiph->ip_hl * 4; 1516 otcph = (struct tcphdr *)(mp->b_rptr + ehlen + iphlen); 1517 tcphlen = otcph->th_off * 4; 1518 1519 l4_len = pktlen - ehlen - iphlen; 1520 1521 NXGE_DEBUG_MSG((NULL, TX_CTL, 1522 "==> nxge_do_softlso: mss %d oiph $%p " 1523 "original ip_sum oiph->ip_sum 0x%x " 1524 "original tcp_sum otcph->th_sum 0x%x " 1525 "oiph->ip_len %d pktlen %d ehlen %d " 1526 "l4_len %d (0x%x) ip_len - iphlen %d ", 1527 mss, 1528 oiph, 1529 oiph->ip_sum, 1530 otcph->th_sum, 1531 ntohs(oiph->ip_len), pktlen, 1532 ehlen, 1533 l4_len, 1534 l4_len, 1535 ntohs(oiph->ip_len) - iphlen)); 1536 1537 /* IPv4 + TCP */ 1538 if (!(oiph->ip_v == IPV4_VERSION)) { 1539 NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL, 1540 "<== nxge_do_softlso: not IPV4 " 1541 "oiph->ip_len %d pktlen %d ehlen %d tcphlen %d", 1542 ntohs(oiph->ip_len), pktlen, ehlen, 1543 tcphlen)); 1544 freemsg(mp); 1545 return (NULL); 1546 } 1547 1548 if (!(oiph->ip_p == IPPROTO_TCP)) { 1549 NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL, 1550 "<== nxge_do_softlso: not TCP " 1551 "oiph->ip_len %d pktlen %d ehlen %d tcphlen %d", 1552 ntohs(oiph->ip_len), pktlen, ehlen, 1553 tcphlen)); 1554 freemsg(mp); 1555 return (NULL); 1556 } 1557 1558 if (!(ntohs(oiph->ip_len) == pktlen - ehlen)) { 1559 NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL, 1560 "<== nxge_do_softlso: len not matched " 1561 "oiph->ip_len %d pktlen %d ehlen %d tcphlen %d", 1562 ntohs(oiph->ip_len), pktlen, ehlen, 1563 tcphlen)); 1564 freemsg(mp); 1565 return (NULL); 1566 } 1567 1568 otcph = (struct tcphdr *)(mp->b_rptr + ehlen + iphlen); 1569 tcphlen = otcph->th_off * 4; 1570 1571 /* TCP flags can not include URG, RST, or SYN */ 1572 VERIFY((otcph->th_flags & (TH_SYN | TH_RST | TH_URG)) == 0); 1573 1574 hdrlen = ehlen + iphlen + tcphlen; 1575 1576 VERIFY(MBLKL(mp) >= hdrlen); 1577 1578 if (MBLKL(mp) > hdrlen) { 1579 datamp = mp; 1580 rptr = mp->b_rptr + hdrlen; 1581 } else { /* = */ 1582 datamp = mp->b_cont; 1583 rptr = datamp->b_rptr; 1584 } 1585 1586 NXGE_DEBUG_MSG((NULL, TX_CTL, 1587 "nxge_do_softlso: otcph $%p pktlen: %d, " 1588 "hdrlen %d ehlen %d iphlen %d tcphlen %d " 1589 "mblkl(mp): %d, mblkl(datamp): %d", 1590 otcph, 1591 pktlen, hdrlen, ehlen, iphlen, tcphlen, 1592 (int)MBLKL(mp), (int)MBLKL(datamp))); 1593 1594 hckflags = 0; 1595 nxge_hcksum_retrieve(mp, 1596 &start_offset, &stuff_offset, &value, NULL, &hckflags); 1597 1598 dst = oiph->ip_dst.s_addr; 1599 src = oiph->ip_src.s_addr; 1600 1601 cksum = (dst >> 16) + (dst & 0xFFFF) + 1602 (src >> 16) + (src & 0xFFFF); 1603 l4cksum = cksum + IP_TCP_CSUM_COMP; 1604 1605 sum = l4_len + l4cksum; 1606 sum = (sum & 0xFFFF) + (sum >> 16); 1607 1608 NXGE_DEBUG_MSG((NULL, TX_CTL, 1609 "==> nxge_do_softlso: dst 0x%x src 0x%x sum 0x%x ~new 0x%x " 1610 "hckflags 0x%x start_offset %d stuff_offset %d " 1611 "value (original) 0x%x th_sum 0x%x " 1612 "pktlen %d l4_len %d (0x%x) " 1613 "MBLKL(mp): %d, MBLKL(datamp): %d dump header %s", 1614 dst, src, 1615 (sum & 0xffff), (~sum & 0xffff), 1616 hckflags, start_offset, stuff_offset, 1617 value, otcph->th_sum, 1618 pktlen, 1619 l4_len, 1620 l4_len, 1621 ntohs(oiph->ip_len) - (int)MBLKL(mp), 1622 (int)MBLKL(datamp), 1623 nxge_dump_packet((char *)evh, 12))); 1624 1625 /* 1626 * Start to process. 1627 */ 1628 available = pktlen - hdrlen; 1629 segnum = (available - 1) / mss + 1; 1630 1631 NXGE_DEBUG_MSG((NULL, TX_CTL, 1632 "==> nxge_do_softlso: pktlen %d " 1633 "MBLKL(mp): %d, MBLKL(datamp): %d " 1634 "available %d mss %d segnum %d", 1635 pktlen, (int)MBLKL(mp), (int)MBLKL(datamp), 1636 available, 1637 mss, 1638 segnum)); 1639 1640 VERIFY(segnum >= 2); 1641 1642 /* 1643 * Try to pre-allocate all header messages 1644 */ 1645 mp_chain = NULL; 1646 for (i = 0; i < segnum; i++) { 1647 if ((nmp = allocb(hdrlen, 0)) == NULL) { 1648 /* Clean up the mp_chain */ 1649 while (mp_chain != NULL) { 1650 nmp = mp_chain; 1651 mp_chain = mp_chain->b_next; 1652 freemsg(nmp); 1653 } 1654 NXGE_DEBUG_MSG((NULL, TX_CTL, 1655 "<== nxge_do_softlso: " 1656 "Could not allocate enough messages for headers!")); 1657 freemsg(mp); 1658 return (NULL); 1659 } 1660 nmp->b_next = mp_chain; 1661 mp_chain = nmp; 1662 1663 NXGE_DEBUG_MSG((NULL, TX_CTL, 1664 "==> nxge_do_softlso: " 1665 "mp $%p nmp $%p mp_chain $%p mp_chain->b_next $%p", 1666 mp, nmp, mp_chain, mp_chain->b_next)); 1667 } 1668 1669 NXGE_DEBUG_MSG((NULL, TX_CTL, 1670 "==> nxge_do_softlso: mp $%p nmp $%p mp_chain $%p", 1671 mp, nmp, mp_chain)); 1672 1673 /* 1674 * Associate payload with new packets 1675 */ 1676 cmp = mp_chain; 1677 left = available; 1678 while (cmp != NULL) { 1679 nmp = dupb(datamp); 1680 if (nmp == NULL) { 1681 do_cleanup = B_TRUE; 1682 NXGE_DEBUG_MSG((NULL, TX_CTL, 1683 "==>nxge_do_softlso: " 1684 "Can not dupb(datamp), have to do clean up")); 1685 goto cleanup_allocated_msgs; 1686 } 1687 1688 NXGE_DEBUG_MSG((NULL, TX_CTL, 1689 "==> nxge_do_softlso: (loop) before mp $%p cmp $%p " 1690 "dupb nmp $%p len %d left %d msd %d ", 1691 mp, cmp, nmp, len, left, mss)); 1692 1693 cmp->b_cont = nmp; 1694 nmp->b_rptr = rptr; 1695 len = (left < mss) ? left : mss; 1696 left -= len; 1697 1698 NXGE_DEBUG_MSG((NULL, TX_CTL, 1699 "==> nxge_do_softlso: (loop) after mp $%p cmp $%p " 1700 "dupb nmp $%p len %d left %d mss %d ", 1701 mp, cmp, nmp, len, left, mss)); 1702 NXGE_DEBUG_MSG((NULL, TX_CTL, 1703 "nxge_do_softlso: before available: %d, " 1704 "left: %d, len: %d, segnum: %d MBLK(nmp): %d", 1705 available, left, len, segnum, (int)MBLKL(nmp))); 1706 1707 len -= MBLKL(nmp); 1708 NXGE_DEBUG_MSG((NULL, TX_CTL, 1709 "nxge_do_softlso: after available: %d, " 1710 "left: %d, len: %d, segnum: %d MBLK(nmp): %d", 1711 available, left, len, segnum, (int)MBLKL(nmp))); 1712 1713 while (len > 0) { 1714 mblk_t *mmp = NULL; 1715 1716 NXGE_DEBUG_MSG((NULL, TX_CTL, 1717 "nxge_do_softlso: (4) len > 0 available: %d, " 1718 "left: %d, len: %d, segnum: %d MBLK(nmp): %d", 1719 available, left, len, segnum, (int)MBLKL(nmp))); 1720 1721 if (datamp->b_cont != NULL) { 1722 datamp = datamp->b_cont; 1723 rptr = datamp->b_rptr; 1724 mmp = dupb(datamp); 1725 if (mmp == NULL) { 1726 do_cleanup = B_TRUE; 1727 NXGE_DEBUG_MSG((NULL, TX_CTL, 1728 "==> nxge_do_softlso: " 1729 "Can not dupb(datamp) (1), :" 1730 "have to do clean up")); 1731 NXGE_DEBUG_MSG((NULL, TX_CTL, 1732 "==> nxge_do_softlso: " 1733 "available: %d, left: %d, " 1734 "len: %d, MBLKL(nmp): %d", 1735 available, left, len, 1736 (int)MBLKL(nmp))); 1737 goto cleanup_allocated_msgs; 1738 } 1739 } else { 1740 NXGE_ERROR_MSG((NULL, NXGE_ERR_CTL, 1741 "==> nxge_do_softlso: " 1742 "(1)available: %d, left: %d, " 1743 "len: %d, MBLKL(nmp): %d", 1744 available, left, len, 1745 (int)MBLKL(nmp))); 1746 cmn_err(CE_PANIC, 1747 "==> nxge_do_softlso: " 1748 "Pointers must have been corrupted!\n" 1749 "datamp: $%p, nmp: $%p, rptr: $%p", 1750 (void *)datamp, 1751 (void *)nmp, 1752 (void *)rptr); 1753 } 1754 nmp->b_cont = mmp; 1755 nmp = mmp; 1756 len -= MBLKL(nmp); 1757 } 1758 if (len < 0) { 1759 nmp->b_wptr += len; 1760 rptr = nmp->b_wptr; 1761 NXGE_DEBUG_MSG((NULL, TX_CTL, 1762 "(5) len < 0 (less than 0)" 1763 "available: %d, left: %d, len: %d, MBLKL(nmp): %d", 1764 available, left, len, (int)MBLKL(nmp))); 1765 1766 } else if (len == 0) { 1767 if (datamp->b_cont != NULL) { 1768 NXGE_DEBUG_MSG((NULL, TX_CTL, 1769 "(5) len == 0" 1770 "available: %d, left: %d, len: %d, " 1771 "MBLKL(nmp): %d", 1772 available, left, len, (int)MBLKL(nmp))); 1773 datamp = datamp->b_cont; 1774 rptr = datamp->b_rptr; 1775 } else { 1776 NXGE_DEBUG_MSG((NULL, TX_CTL, 1777 "(6)available b_cont == NULL : %d, " 1778 "left: %d, len: %d, MBLKL(nmp): %d", 1779 available, left, len, (int)MBLKL(nmp))); 1780 1781 VERIFY(cmp->b_next == NULL); 1782 VERIFY(left == 0); 1783 break; /* Done! */ 1784 } 1785 } 1786 cmp = cmp->b_next; 1787 1788 NXGE_DEBUG_MSG((NULL, TX_CTL, 1789 "(7) do_softlso: " 1790 "next mp in mp_chain available len != 0 : %d, " 1791 "left: %d, len: %d, MBLKL(nmp): %d", 1792 available, left, len, (int)MBLKL(nmp))); 1793 } 1794 1795 /* 1796 * From now, start to fill up all headers for the first message 1797 * Hardware checksum flags need to be updated separately for FULLCKSUM 1798 * and PARTIALCKSUM cases. For full checksum, copy the original flags 1799 * into every new packet is enough. But for HCK_PARTIALCKSUM, all 1800 * required fields need to be updated properly. 1801 */ 1802 nmp = mp_chain; 1803 bcopy(mp->b_rptr, nmp->b_rptr, hdrlen); 1804 nmp->b_wptr = nmp->b_rptr + hdrlen; 1805 niph = (struct ip *)(nmp->b_rptr + ehlen); 1806 niph->ip_len = htons(mss + iphlen + tcphlen); 1807 ip_id = ntohs(niph->ip_id); 1808 ntcph = (struct tcphdr *)(nmp->b_rptr + ehlen + iphlen); 1809 #ifdef __sparc 1810 bcopy((char *)&ntcph->th_seq, &tcp_seq_tmp, 4); 1811 tcp_seq = ntohl(tcp_seq_tmp); 1812 #else 1813 tcp_seq = ntohl(ntcph->th_seq); 1814 #endif 1815 1816 ntcph->th_flags &= ~(TH_FIN | TH_PUSH | TH_RST); 1817 1818 DB_CKSUMFLAGS(nmp) = (uint16_t)hckflags; 1819 DB_CKSUMSTART(nmp) = start_offset; 1820 DB_CKSUMSTUFF(nmp) = stuff_offset; 1821 1822 /* calculate IP checksum and TCP pseudo header checksum */ 1823 niph->ip_sum = 0; 1824 niph->ip_sum = (uint16_t)nxge_csgen((uint16_t *)niph, iphlen); 1825 1826 l4_len = mss + tcphlen; 1827 sum = htons(l4_len) + l4cksum; 1828 sum = (sum & 0xFFFF) + (sum >> 16); 1829 ntcph->th_sum = (sum & 0xffff); 1830 1831 NXGE_DEBUG_MSG((NULL, TX_CTL, 1832 "==> nxge_do_softlso: first mp $%p (mp_chain $%p) " 1833 "mss %d pktlen %d l4_len %d (0x%x) " 1834 "MBLKL(mp): %d, MBLKL(datamp): %d " 1835 "ip_sum 0x%x " 1836 "th_sum 0x%x sum 0x%x ) " 1837 "dump first ip->tcp %s", 1838 nmp, mp_chain, 1839 mss, 1840 pktlen, 1841 l4_len, 1842 l4_len, 1843 (int)MBLKL(mp), (int)MBLKL(datamp), 1844 niph->ip_sum, 1845 ntcph->th_sum, 1846 sum, 1847 nxge_dump_packet((char *)niph, 52))); 1848 1849 cmp = nmp; 1850 while ((nmp = nmp->b_next)->b_next != NULL) { 1851 NXGE_DEBUG_MSG((NULL, TX_CTL, 1852 "==>nxge_do_softlso: middle l4_len %d ", l4_len)); 1853 bcopy(cmp->b_rptr, nmp->b_rptr, hdrlen); 1854 nmp->b_wptr = nmp->b_rptr + hdrlen; 1855 niph = (struct ip *)(nmp->b_rptr + ehlen); 1856 niph->ip_id = htons(++ip_id); 1857 niph->ip_len = htons(mss + iphlen + tcphlen); 1858 ntcph = (struct tcphdr *)(nmp->b_rptr + ehlen + iphlen); 1859 tcp_seq += mss; 1860 1861 ntcph->th_flags &= ~(TH_FIN | TH_PUSH | TH_RST | TH_URG); 1862 1863 #ifdef __sparc 1864 tcp_seq_tmp = htonl(tcp_seq); 1865 bcopy(&tcp_seq_tmp, (char *)&ntcph->th_seq, 4); 1866 #else 1867 ntcph->th_seq = htonl(tcp_seq); 1868 #endif 1869 DB_CKSUMFLAGS(nmp) = (uint16_t)hckflags; 1870 DB_CKSUMSTART(nmp) = start_offset; 1871 DB_CKSUMSTUFF(nmp) = stuff_offset; 1872 1873 /* calculate IP checksum and TCP pseudo header checksum */ 1874 niph->ip_sum = 0; 1875 niph->ip_sum = (uint16_t)nxge_csgen((uint16_t *)niph, iphlen); 1876 ntcph->th_sum = (sum & 0xffff); 1877 1878 NXGE_DEBUG_MSG((NULL, TX_CTL, 1879 "==> nxge_do_softlso: middle ip_sum 0x%x " 1880 "th_sum 0x%x " 1881 " mp $%p (mp_chain $%p) pktlen %d " 1882 "MBLKL(mp): %d, MBLKL(datamp): %d ", 1883 niph->ip_sum, 1884 ntcph->th_sum, 1885 nmp, mp_chain, 1886 pktlen, (int)MBLKL(mp), (int)MBLKL(datamp))); 1887 } 1888 1889 /* Last segment */ 1890 /* 1891 * Set FIN and/or PSH flags if present only in the last packet. 1892 * The ip_len could be different from prior packets. 1893 */ 1894 bcopy(cmp->b_rptr, nmp->b_rptr, hdrlen); 1895 nmp->b_wptr = nmp->b_rptr + hdrlen; 1896 niph = (struct ip *)(nmp->b_rptr + ehlen); 1897 niph->ip_id = htons(++ip_id); 1898 niph->ip_len = htons(msgsize(nmp->b_cont) + iphlen + tcphlen); 1899 ntcph = (struct tcphdr *)(nmp->b_rptr + ehlen + iphlen); 1900 tcp_seq += mss; 1901 #ifdef __sparc 1902 tcp_seq_tmp = htonl(tcp_seq); 1903 bcopy(&tcp_seq_tmp, (char *)&ntcph->th_seq, 4); 1904 #else 1905 ntcph->th_seq = htonl(tcp_seq); 1906 #endif 1907 ntcph->th_flags = (otcph->th_flags & ~TH_URG); 1908 1909 DB_CKSUMFLAGS(nmp) = (uint16_t)hckflags; 1910 DB_CKSUMSTART(nmp) = start_offset; 1911 DB_CKSUMSTUFF(nmp) = stuff_offset; 1912 1913 /* calculate IP checksum and TCP pseudo header checksum */ 1914 niph->ip_sum = 0; 1915 niph->ip_sum = (uint16_t)nxge_csgen((uint16_t *)niph, iphlen); 1916 1917 l4_len = ntohs(niph->ip_len) - iphlen; 1918 sum = htons(l4_len) + l4cksum; 1919 sum = (sum & 0xFFFF) + (sum >> 16); 1920 ntcph->th_sum = (sum & 0xffff); 1921 1922 NXGE_DEBUG_MSG((NULL, TX_CTL, 1923 "==> nxge_do_softlso: last next " 1924 "niph->ip_sum 0x%x " 1925 "ntcph->th_sum 0x%x sum 0x%x " 1926 "dump last ip->tcp %s " 1927 "cmp $%p mp $%p (mp_chain $%p) pktlen %d (0x%x) " 1928 "l4_len %d (0x%x) " 1929 "MBLKL(mp): %d, MBLKL(datamp): %d ", 1930 niph->ip_sum, 1931 ntcph->th_sum, sum, 1932 nxge_dump_packet((char *)niph, 52), 1933 cmp, nmp, mp_chain, 1934 pktlen, pktlen, 1935 l4_len, 1936 l4_len, 1937 (int)MBLKL(mp), (int)MBLKL(datamp))); 1938 1939 cleanup_allocated_msgs: 1940 if (do_cleanup) { 1941 NXGE_DEBUG_MSG((NULL, TX_CTL, 1942 "==> nxge_do_softlso: " 1943 "Failed allocating messages, " 1944 "have to clean up and fail!")); 1945 while (mp_chain != NULL) { 1946 nmp = mp_chain; 1947 mp_chain = mp_chain->b_next; 1948 freemsg(nmp); 1949 } 1950 } 1951 /* 1952 * We're done here, so just free the original message and return the 1953 * new message chain, that could be NULL if failed, back to the caller. 1954 */ 1955 freemsg(mp); 1956 1957 NXGE_DEBUG_MSG((NULL, TX_CTL, 1958 "<== nxge_do_softlso:mp_chain $%p", mp_chain)); 1959 return (mp_chain); 1960 } 1961 1962 /* 1963 * Will be called before NIC driver do further operation on the message. 1964 * The input message may include LSO information, if so, go to softlso logic 1965 * to eliminate the oversized LSO packet for the incapable underlying h/w. 1966 * The return could be the same non-LSO message or a message chain for LSO case. 1967 * 1968 * The driver needs to call this function per packet and process the whole chain 1969 * if applied. 1970 */ 1971 static mblk_t * 1972 nxge_lso_eliminate(mblk_t *mp) 1973 { 1974 uint32_t lsoflags; 1975 uint32_t mss; 1976 1977 NXGE_DEBUG_MSG((NULL, TX_CTL, 1978 "==>nxge_lso_eliminate:")); 1979 nxge_lso_info_get(mp, &mss, &lsoflags); 1980 1981 if (lsoflags & HW_LSO) { 1982 mblk_t *nmp; 1983 1984 NXGE_DEBUG_MSG((NULL, TX_CTL, 1985 "==>nxge_lso_eliminate:" 1986 "HW_LSO:mss %d mp $%p", 1987 mss, mp)); 1988 if ((nmp = nxge_do_softlso(mp, mss)) != NULL) { 1989 NXGE_DEBUG_MSG((NULL, TX_CTL, 1990 "<== nxge_lso_eliminate: " 1991 "LSO: nmp not NULL nmp $%p mss %d mp $%p", 1992 nmp, mss, mp)); 1993 return (nmp); 1994 } else { 1995 NXGE_DEBUG_MSG((NULL, TX_CTL, 1996 "<== nxge_lso_eliminate_ " 1997 "LSO: failed nmp NULL nmp $%p mss %d mp $%p", 1998 nmp, mss, mp)); 1999 return (NULL); 2000 } 2001 } 2002 2003 NXGE_DEBUG_MSG((NULL, TX_CTL, 2004 "<== nxge_lso_eliminate")); 2005 return (mp); 2006 } 2007 2008 static uint32_t 2009 nxge_csgen(uint16_t *adr, int len) 2010 { 2011 int i, odd; 2012 uint32_t sum = 0; 2013 uint32_t c = 0; 2014 2015 odd = len % 2; 2016 for (i = 0; i < (len / 2); i++) { 2017 sum += (adr[i] & 0xffff); 2018 } 2019 if (odd) { 2020 sum += adr[len / 2] & 0xff00; 2021 } 2022 while ((c = ((sum & 0xffff0000) >> 16)) != 0) { 2023 sum &= 0xffff; 2024 sum += c; 2025 } 2026 return (~sum & 0xffff); 2027 } 2028