144961713Sgirish /* 244961713Sgirish * CDDL HEADER START 344961713Sgirish * 444961713Sgirish * The contents of this file are subject to the terms of the 544961713Sgirish * Common Development and Distribution License (the "License"). 644961713Sgirish * You may not use this file except in compliance with the License. 744961713Sgirish * 844961713Sgirish * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 944961713Sgirish * or http://www.opensolaris.org/os/licensing. 1044961713Sgirish * See the License for the specific language governing permissions 1144961713Sgirish * and limitations under the License. 1244961713Sgirish * 1344961713Sgirish * When distributing Covered Code, include this CDDL HEADER in each 1444961713Sgirish * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 1544961713Sgirish * If applicable, add the following below this CDDL HEADER, with the 1644961713Sgirish * fields enclosed by brackets "[]" replaced with your own identifying 1744961713Sgirish * information: Portions Copyright [yyyy] [name of copyright owner] 1844961713Sgirish * 1944961713Sgirish * CDDL HEADER END 2044961713Sgirish */ 2144961713Sgirish /* 22321febdeSsbehera * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 2344961713Sgirish * Use is subject to license terms. 2444961713Sgirish */ 2544961713Sgirish 2644961713Sgirish #pragma ident "%Z%%M% %I% %E% SMI" 2744961713Sgirish 28a3c5bd6dSspeer #include <sys/nxge/nxge_impl.h> 2944961713Sgirish 3044961713Sgirish /* 3144961713Sgirish * Tunable Receive Completion Ring Configuration B parameters. 3244961713Sgirish */ 33a3c5bd6dSspeer uint16_t nxge_rx_pkt_thres; /* 16 bits */ 34a3c5bd6dSspeer uint8_t nxge_rx_pkt_timeout; /* 6 bits based on DMA clock divider */ 35a3c5bd6dSspeer 36a3c5bd6dSspeer lb_property_t lb_normal = {normal, "normal", nxge_lb_normal}; 37a3c5bd6dSspeer lb_property_t lb_external10g = {external, "external10g", nxge_lb_ext10g}; 38a3c5bd6dSspeer lb_property_t lb_external1000 = {external, "external1000", nxge_lb_ext1000}; 39a3c5bd6dSspeer lb_property_t lb_external100 = {external, "external100", nxge_lb_ext100}; 40a3c5bd6dSspeer lb_property_t lb_external10 = {external, "external10", nxge_lb_ext10}; 41a3c5bd6dSspeer lb_property_t lb_phy10g = {internal, "phy10g", nxge_lb_phy10g}; 42a3c5bd6dSspeer lb_property_t lb_phy1000 = {internal, "phy1000", nxge_lb_phy1000}; 43a3c5bd6dSspeer lb_property_t lb_phy = {internal, "phy", nxge_lb_phy}; 44a3c5bd6dSspeer lb_property_t lb_serdes10g = {internal, "serdes10g", nxge_lb_serdes10g}; 45a3c5bd6dSspeer lb_property_t lb_serdes1000 = {internal, "serdes", nxge_lb_serdes1000}; 46a3c5bd6dSspeer lb_property_t lb_mac10g = {internal, "mac10g", nxge_lb_mac10g}; 47a3c5bd6dSspeer lb_property_t lb_mac1000 = {internal, "mac1000", nxge_lb_mac1000}; 48a3c5bd6dSspeer lb_property_t lb_mac = {internal, "mac10/100", nxge_lb_mac}; 4944961713Sgirish 5044961713Sgirish uint32_t nxge_lb_dbg = 1; 5144961713Sgirish void nxge_get_mii(p_nxge_t nxgep, p_mblk_t mp); 5244961713Sgirish void nxge_put_mii(p_nxge_t nxgep, p_mblk_t mp); 53ee5416c9Syc static nxge_status_t nxge_check_xaui_xfp(p_nxge_t nxgep); 5444961713Sgirish 5544961713Sgirish extern uint32_t nxge_rx_mode; 56a3c5bd6dSspeer extern uint32_t nxge_jumbo_mtu; 57a3c5bd6dSspeer extern boolean_t nxge_jumbo_enable; 5844961713Sgirish 59a3c5bd6dSspeer static void 60a3c5bd6dSspeer nxge_rtrace_ioctl(p_nxge_t, queue_t *, mblk_t *, struct iocblk *); 6144961713Sgirish 62a3c5bd6dSspeer /* ARGSUSED */ 63321febdeSsbehera nxge_status_t 6444961713Sgirish nxge_global_reset(p_nxge_t nxgep) 6544961713Sgirish { 66321febdeSsbehera nxge_status_t status = NXGE_OK; 67321febdeSsbehera 6844961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_global_reset")); 6944961713Sgirish 70321febdeSsbehera if ((status = nxge_link_monitor(nxgep, LINK_MONITOR_STOP)) != NXGE_OK) 71321febdeSsbehera return (status); 7244961713Sgirish (void) nxge_intr_hw_disable(nxgep); 7344961713Sgirish 7444961713Sgirish if ((nxgep->suspended) || 7552ccf843Smisaki ((nxgep->statsp->port_stats.lb_mode == 7652ccf843Smisaki nxge_lb_phy1000) || 7752ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == 7852ccf843Smisaki nxge_lb_phy10g) || 7952ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == 8052ccf843Smisaki nxge_lb_serdes1000) || 8152ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == 8252ccf843Smisaki nxge_lb_serdes10g))) { 83321febdeSsbehera if ((status = nxge_link_init(nxgep)) != NXGE_OK) 84321febdeSsbehera return (status); 8544961713Sgirish } 86321febdeSsbehera 87321febdeSsbehera if ((status = nxge_link_monitor(nxgep, LINK_MONITOR_START)) != NXGE_OK) 88321febdeSsbehera return (status); 89321febdeSsbehera if ((status = nxge_mac_init(nxgep)) != NXGE_OK) 90321febdeSsbehera return (status); 9144961713Sgirish (void) nxge_intr_hw_enable(nxgep); 9244961713Sgirish 9344961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_global_reset")); 94321febdeSsbehera return (status); 9544961713Sgirish } 9644961713Sgirish 97a3c5bd6dSspeer /* ARGSUSED */ 9844961713Sgirish void 9944961713Sgirish nxge_hw_id_init(p_nxge_t nxgep) 10044961713Sgirish { 10144961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_hw_id_init")); 10244961713Sgirish /* 10344961713Sgirish * Set up initial hardware parameters required such as mac mtu size. 10444961713Sgirish */ 10544961713Sgirish nxgep->mac.is_jumbo = B_FALSE; 1061bd6825cSml /* 1071bd6825cSml * Set the maxframe size to 1522 (1518 + 4) to account for 1081bd6825cSml * VLAN tagged packets. 1091bd6825cSml */ 1101bd6825cSml nxgep->mac.minframesize = NXGE_MIN_MAC_FRAMESIZE; /* 64 */ 1111bd6825cSml nxgep->mac.maxframesize = NXGE_MAX_MAC_FRAMESIZE; /* 1522 */ 11214ea4bb7Ssd if (nxgep->param_arr[param_accept_jumbo].value || nxge_jumbo_enable) { 11314ea4bb7Ssd nxgep->mac.maxframesize = (uint16_t)nxge_jumbo_mtu; 11444961713Sgirish nxgep->mac.is_jumbo = B_TRUE; 11544961713Sgirish } 11644961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, 11752ccf843Smisaki "==> nxge_hw_id_init: maxframesize %d", 11852ccf843Smisaki nxgep->mac.maxframesize)); 11944961713Sgirish 12044961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_hw_id_init")); 12144961713Sgirish } 12244961713Sgirish 123a3c5bd6dSspeer /* ARGSUSED */ 12444961713Sgirish void 12544961713Sgirish nxge_hw_init_niu_common(p_nxge_t nxgep) 12644961713Sgirish { 127a3c5bd6dSspeer p_nxge_hw_list_t hw_p; 12844961713Sgirish 12944961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_hw_init_niu_common")); 13044961713Sgirish 13144961713Sgirish if ((hw_p = nxgep->nxge_hw_p) == NULL) { 13244961713Sgirish return; 13344961713Sgirish } 13444961713Sgirish MUTEX_ENTER(&hw_p->nxge_cfg_lock); 13544961713Sgirish if (hw_p->flags & COMMON_INIT_DONE) { 13644961713Sgirish NXGE_DEBUG_MSG((nxgep, MOD_CTL, 13752ccf843Smisaki "nxge_hw_init_niu_common" 13852ccf843Smisaki " already done for dip $%p function %d exiting", 13952ccf843Smisaki hw_p->parent_devp, nxgep->function_num)); 14044961713Sgirish MUTEX_EXIT(&hw_p->nxge_cfg_lock); 14144961713Sgirish return; 14244961713Sgirish } 14344961713Sgirish 14444961713Sgirish hw_p->flags = COMMON_INIT_START; 14544961713Sgirish NXGE_DEBUG_MSG((nxgep, MOD_CTL, "nxge_hw_init_niu_common" 14652ccf843Smisaki " Started for device id %x with function %d", 14752ccf843Smisaki hw_p->parent_devp, nxgep->function_num)); 148a3c5bd6dSspeer 149a3c5bd6dSspeer /* per neptune common block init */ 150a3c5bd6dSspeer (void) nxge_fflp_hw_reset(nxgep); 15144961713Sgirish 15244961713Sgirish hw_p->flags = COMMON_INIT_DONE; 15344961713Sgirish MUTEX_EXIT(&hw_p->nxge_cfg_lock); 15444961713Sgirish 15544961713Sgirish NXGE_DEBUG_MSG((nxgep, MOD_CTL, "nxge_hw_init_niu_common" 15652ccf843Smisaki " Done for device id %x with function %d", 15752ccf843Smisaki hw_p->parent_devp, nxgep->function_num)); 15844961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_hw_init_niu_common")); 15944961713Sgirish } 16044961713Sgirish 161a3c5bd6dSspeer /* ARGSUSED */ 16244961713Sgirish uint_t 16344961713Sgirish nxge_intr(void *arg1, void *arg2) 16444961713Sgirish { 165a3c5bd6dSspeer p_nxge_ldv_t ldvp = (p_nxge_ldv_t)arg1; 166a3c5bd6dSspeer p_nxge_t nxgep = (p_nxge_t)arg2; 167a3c5bd6dSspeer uint_t serviced = DDI_INTR_UNCLAIMED; 168a3c5bd6dSspeer uint8_t ldv; 169a3c5bd6dSspeer npi_handle_t handle; 170a3c5bd6dSspeer p_nxge_ldgv_t ldgvp; 171a3c5bd6dSspeer p_nxge_ldg_t ldgp, t_ldgp; 172a3c5bd6dSspeer p_nxge_ldv_t t_ldvp; 173a3c5bd6dSspeer uint64_t vector0 = 0, vector1 = 0, vector2 = 0; 174a3c5bd6dSspeer int i, j, nldvs, nintrs = 1; 175a3c5bd6dSspeer npi_status_t rs = NPI_SUCCESS; 17644961713Sgirish 17744961713Sgirish /* DDI interface returns second arg as NULL (n2 niumx driver) !!! */ 178a3c5bd6dSspeer if (arg2 == NULL || (void *) ldvp->nxgep != arg2) { 17944961713Sgirish nxgep = ldvp->nxgep; 18044961713Sgirish } 18144961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr")); 18244961713Sgirish 18344961713Sgirish if (!(nxgep->drv_state & STATE_HW_INITIALIZED)) { 18444961713Sgirish NXGE_ERROR_MSG((nxgep, INT_CTL, 18552ccf843Smisaki "<== nxge_intr: not initialized 0x%x", serviced)); 18644961713Sgirish return (serviced); 18744961713Sgirish } 18844961713Sgirish 18944961713Sgirish ldgvp = nxgep->ldgvp; 190a3c5bd6dSspeer NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: ldgvp $%p", ldgvp)); 19144961713Sgirish if (ldvp == NULL && ldgvp) { 19244961713Sgirish t_ldvp = ldvp = ldgvp->ldvp; 19344961713Sgirish } 19444961713Sgirish if (ldvp) { 19544961713Sgirish ldgp = t_ldgp = ldvp->ldgp; 19644961713Sgirish } 19744961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: " 19852ccf843Smisaki "ldgvp $%p ldvp $%p ldgp $%p", ldgvp, ldvp, ldgp)); 19944961713Sgirish if (ldgvp == NULL || ldvp == NULL || ldgp == NULL) { 20044961713Sgirish NXGE_ERROR_MSG((nxgep, INT_CTL, "==> nxge_intr: " 20152ccf843Smisaki "ldgvp $%p ldvp $%p ldgp $%p", ldgvp, ldvp, ldgp)); 20244961713Sgirish NXGE_ERROR_MSG((nxgep, INT_CTL, "<== nxge_intr: not ready")); 20344961713Sgirish return (DDI_INTR_UNCLAIMED); 20444961713Sgirish } 20544961713Sgirish /* 206a3c5bd6dSspeer * This interrupt handler will have to go through all the logical 207a3c5bd6dSspeer * devices to find out which logical device interrupts us and then call 20844961713Sgirish * its handler to process the events. 20944961713Sgirish */ 21044961713Sgirish handle = NXGE_DEV_NPI_HANDLE(nxgep); 21144961713Sgirish t_ldgp = ldgp; 21244961713Sgirish t_ldvp = ldgp->ldvp; 21344961713Sgirish 21444961713Sgirish nldvs = ldgp->nldvs; 21544961713Sgirish 21644961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: #ldvs %d #intrs %d", 21752ccf843Smisaki nldvs, ldgvp->ldg_intrs)); 21844961713Sgirish 21944961713Sgirish serviced = DDI_INTR_CLAIMED; 22044961713Sgirish for (i = 0; i < nintrs; i++, t_ldgp++) { 22144961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr(%d): #ldvs %d " 22252ccf843Smisaki " #intrs %d", i, nldvs, nintrs)); 22344961713Sgirish /* Get this group's flag bits. */ 22444961713Sgirish t_ldgp->interrupted = B_FALSE; 22544961713Sgirish rs = npi_ldsv_ldfs_get(handle, t_ldgp->ldg, 22652ccf843Smisaki &vector0, &vector1, &vector2); 22744961713Sgirish if (rs) { 22844961713Sgirish continue; 22944961713Sgirish } 23044961713Sgirish if (!vector0 && !vector1 && !vector2) { 23144961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: " 23252ccf843Smisaki "no interrupts on group %d", t_ldgp->ldg)); 23344961713Sgirish continue; 23444961713Sgirish } 23544961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: " 23652ccf843Smisaki "vector0 0x%llx vector1 0x%llx vector2 0x%llx", 23752ccf843Smisaki vector0, vector1, vector2)); 23844961713Sgirish t_ldgp->interrupted = B_TRUE; 23944961713Sgirish nldvs = t_ldgp->nldvs; 24044961713Sgirish for (j = 0; j < nldvs; j++, t_ldvp++) { 24144961713Sgirish /* 24244961713Sgirish * Call device's handler if flag bits are on. 24344961713Sgirish */ 24444961713Sgirish ldv = t_ldvp->ldv; 24544961713Sgirish if (((ldv < NXGE_MAC_LD_START) && 24652ccf843Smisaki (LDV_ON(ldv, vector0) | 24752ccf843Smisaki (LDV_ON(ldv, vector1)))) || 24852ccf843Smisaki (ldv >= NXGE_MAC_LD_START && 24952ccf843Smisaki ((LDV2_ON_1(ldv, vector2)) || 25052ccf843Smisaki (LDV2_ON_2(ldv, vector2))))) { 25144961713Sgirish (void) (t_ldvp->ldv_intr_handler)( 25252ccf843Smisaki (caddr_t)t_ldvp, arg2); 25344961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, 25452ccf843Smisaki "==> nxge_intr: " 25552ccf843Smisaki "calling device %d #ldvs %d #intrs %d", 25652ccf843Smisaki j, nldvs, nintrs)); 25744961713Sgirish } 25844961713Sgirish } 25944961713Sgirish } 26044961713Sgirish 26144961713Sgirish t_ldgp = ldgp; 26244961713Sgirish for (i = 0; i < nintrs; i++, t_ldgp++) { 26344961713Sgirish /* rearm group interrupts */ 26444961713Sgirish if (t_ldgp->interrupted) { 26544961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr: arm " 26652ccf843Smisaki "group %d", t_ldgp->ldg)); 26744961713Sgirish (void) npi_intr_ldg_mgmt_set(handle, t_ldgp->ldg, 26852ccf843Smisaki t_ldgp->arm, t_ldgp->ldg_timer); 26944961713Sgirish } 27044961713Sgirish } 27144961713Sgirish 27244961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_intr: serviced 0x%x", 27352ccf843Smisaki serviced)); 27444961713Sgirish return (serviced); 27544961713Sgirish } 27644961713Sgirish 27700161856Syc 27800161856Syc /* 27900161856Syc * XFP Related Status Register Values Under 3 Different Conditions 28000161856Syc * 28100161856Syc * -------------+-------------------------+------------------------- 282*0cad6a5fSyc * | Intel XFP and Avago | Picolight XFP 28300161856Syc * -------------+---------+---------------+---------+--------------- 28400161856Syc * | STATUS0 | TX_ALARM_STAT | STATUS0 | TX_ALARM_STAT 28500161856Syc * -------------+---------+---------------+---------+--------------- 28600161856Syc * No XFP | 0x639C | 0x40 | 0x639C | 0x40 28700161856Syc * -------------+---------+---------------+---------+--------------- 28800161856Syc * XFP,linkdown | 0x43BC | 0x40 | 0x639C | 0x40 28900161856Syc * -------------+---------+---------------+---------+--------------- 29000161856Syc * XFP,linkup | 0x03FC | 0x0 | 0x03FC | 0x0 29100161856Syc * -------------+---------+---------------+---------+--------------- 29200161856Syc * Note: 29300161856Syc * STATUS0 = BCM8704_USER_ANALOG_STATUS0_REG 29400161856Syc * TX_ALARM_STAT = BCM8704_USER_TX_ALARM_STATUS_REG 29500161856Syc */ 296ee5416c9Syc /* ARGSUSED */ 297ee5416c9Syc static nxge_status_t 298ee5416c9Syc nxge_check_xaui_xfp(p_nxge_t nxgep) 299ee5416c9Syc { 300ee5416c9Syc nxge_status_t status = NXGE_OK; 301ee5416c9Syc uint8_t phy_port_addr; 302ee5416c9Syc uint16_t val; 303ee5416c9Syc uint16_t val1; 304ee5416c9Syc uint8_t portn; 305ee5416c9Syc 306ee5416c9Syc NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_check_xaui_xfp")); 307ee5416c9Syc 308ee5416c9Syc portn = nxgep->mac.portnum; 309ee5416c9Syc phy_port_addr = nxgep->statsp->mac_stats.xcvr_portn; 310ee5416c9Syc 31100161856Syc /* 31200161856Syc * Keep the val1 code even though it is not used. Could be 31300161856Syc * used to differenciate the "No XFP" case and "XFP,linkdown" 31400161856Syc * case when a Intel XFP is used. 31500161856Syc */ 316ee5416c9Syc if ((status = nxge_mdio_read(nxgep, phy_port_addr, 317ee5416c9Syc BCM8704_USER_DEV3_ADDR, 318ee5416c9Syc BCM8704_USER_ANALOG_STATUS0_REG, &val)) == NXGE_OK) { 319ee5416c9Syc status = nxge_mdio_read(nxgep, phy_port_addr, 320ee5416c9Syc BCM8704_USER_DEV3_ADDR, 321ee5416c9Syc BCM8704_USER_TX_ALARM_STATUS_REG, &val1); 322ee5416c9Syc } 32300161856Syc 324ee5416c9Syc if (status != NXGE_OK) { 325ee5416c9Syc NXGE_FM_REPORT_ERROR(nxgep, portn, NULL, 326ee5416c9Syc NXGE_FM_EREPORT_XAUI_ERR); 32700161856Syc if (DDI_FM_EREPORT_CAP(nxgep->fm_capabilities)) { 32800161856Syc NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 32900161856Syc "XAUI is bad or absent on port<%d>\n", portn)); 33000161856Syc } 331*0cad6a5fSyc #ifdef NXGE_DEBUG 332*0cad6a5fSyc /* 333*0cad6a5fSyc * As a workaround for CR6693529, do not execute this block of 334*0cad6a5fSyc * code for non-debug driver. When a Picolight XFP transceiver 335*0cad6a5fSyc * is used, register BCM8704_USER_ANALOG_STATUS0_REG returns 336*0cad6a5fSyc * the same 0x639C value in normal link down case, which causes 337*0cad6a5fSyc * false FMA messages and link reconnection problem. 338*0cad6a5fSyc */ 339ee5416c9Syc } else if (nxgep->mac.portmode == PORT_10G_FIBER) { 340ee5416c9Syc /* 341f6485eecSyc * 0x03FC = 0000 0011 1111 1100 (XFP is normal) 342f6485eecSyc * 0x639C = 0110 0011 1001 1100 (XFP has problem) 343ee5416c9Syc * bit14 = 1: PDM loss-of-light indicator 344ee5416c9Syc * bit13 = 1: PDM Rx loss-of-signal 345ee5416c9Syc * bit6 = 0: Light is NOT ok 346ee5416c9Syc * bit5 = 0: PMD Rx signal is NOT ok 347ee5416c9Syc */ 348f6485eecSyc if (val == 0x639C) { 349ee5416c9Syc NXGE_FM_REPORT_ERROR(nxgep, portn, NULL, 350ee5416c9Syc NXGE_FM_EREPORT_XFP_ERR); 35100161856Syc if (DDI_FM_EREPORT_CAP(nxgep->fm_capabilities)) { 35200161856Syc NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 35300161856Syc "XFP is bad or absent on port<%d>\n", 35400161856Syc portn)); 35500161856Syc } 356ee5416c9Syc status = NXGE_ERROR; 357ee5416c9Syc } 358*0cad6a5fSyc #endif 359ee5416c9Syc } 360ee5416c9Syc NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_check_xaui_xfp")); 361ee5416c9Syc return (status); 362ee5416c9Syc } 363ee5416c9Syc 364ee5416c9Syc 365a3c5bd6dSspeer /* ARGSUSED */ 36644961713Sgirish uint_t 36744961713Sgirish nxge_syserr_intr(void *arg1, void *arg2) 36844961713Sgirish { 369a3c5bd6dSspeer p_nxge_ldv_t ldvp = (p_nxge_ldv_t)arg1; 370a3c5bd6dSspeer p_nxge_t nxgep = (p_nxge_t)arg2; 371a3c5bd6dSspeer p_nxge_ldg_t ldgp = NULL; 372a3c5bd6dSspeer npi_handle_t handle; 373a3c5bd6dSspeer sys_err_stat_t estat; 374a3c5bd6dSspeer uint_t serviced = DDI_INTR_UNCLAIMED; 37544961713Sgirish 37644961713Sgirish if (arg1 == NULL && arg2 == NULL) { 37744961713Sgirish return (serviced); 37844961713Sgirish } 379a3c5bd6dSspeer if (arg2 == NULL || ((ldvp != NULL && (void *) ldvp->nxgep != arg2))) { 38044961713Sgirish if (ldvp != NULL) { 38144961713Sgirish nxgep = ldvp->nxgep; 38244961713Sgirish } 38344961713Sgirish } 38444961713Sgirish NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, 38552ccf843Smisaki "==> nxge_syserr_intr: arg2 $%p arg1 $%p", nxgep, ldvp)); 38644961713Sgirish if (ldvp != NULL && ldvp->use_timer == B_FALSE) { 38744961713Sgirish ldgp = ldvp->ldgp; 38844961713Sgirish if (ldgp == NULL) { 38944961713Sgirish NXGE_ERROR_MSG((nxgep, SYSERR_CTL, 39052ccf843Smisaki "<== nxge_syserrintr(no logical group): " 39152ccf843Smisaki "arg2 $%p arg1 $%p", nxgep, ldvp)); 39244961713Sgirish return (DDI_INTR_UNCLAIMED); 39344961713Sgirish } 39444961713Sgirish /* 39544961713Sgirish * Get the logical device state if the function uses interrupt. 39644961713Sgirish */ 39744961713Sgirish } 39844961713Sgirish 39944961713Sgirish /* This interrupt handler is for system error interrupts. */ 40044961713Sgirish handle = NXGE_DEV_NPI_HANDLE(nxgep); 40144961713Sgirish estat.value = 0; 40244961713Sgirish (void) npi_fzc_sys_err_stat_get(handle, &estat); 40344961713Sgirish NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, 40452ccf843Smisaki "==> nxge_syserr_intr: device error 0x%016llx", estat.value)); 40544961713Sgirish 40644961713Sgirish if (estat.bits.ldw.smx) { 40744961713Sgirish /* SMX */ 40844961713Sgirish NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 40952ccf843Smisaki "==> nxge_syserr_intr: device error - SMX")); 41044961713Sgirish } else if (estat.bits.ldw.mac) { 41144961713Sgirish NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 41252ccf843Smisaki "==> nxge_syserr_intr: device error - MAC")); 41344961713Sgirish /* 414a3c5bd6dSspeer * There is nothing to be done here. All MAC errors go to per 415a3c5bd6dSspeer * MAC port interrupt. MIF interrupt is the only MAC sub-block 416a3c5bd6dSspeer * that can generate status here. MIF status reported will be 417a3c5bd6dSspeer * ignored here. It is checked by per port timer instead. 41844961713Sgirish */ 41944961713Sgirish } else if (estat.bits.ldw.ipp) { 42044961713Sgirish NXGE_DEBUG_MSG((nxgep, NXGE_ERR_CTL, 42152ccf843Smisaki "==> nxge_syserr_intr: device error - IPP")); 42244961713Sgirish (void) nxge_ipp_handle_sys_errors(nxgep); 42344961713Sgirish } else if (estat.bits.ldw.zcp) { 42444961713Sgirish /* ZCP */ 425f6485eecSyc NXGE_DEBUG_MSG((nxgep, NXGE_ERR_CTL, 42652ccf843Smisaki "==> nxge_syserr_intr: device error - ZCP")); 42744961713Sgirish (void) nxge_zcp_handle_sys_errors(nxgep); 42844961713Sgirish } else if (estat.bits.ldw.tdmc) { 42944961713Sgirish /* TDMC */ 43044961713Sgirish NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 43152ccf843Smisaki "==> nxge_syserr_intr: device error - TDMC")); 43244961713Sgirish /* 433a3c5bd6dSspeer * There is no TDMC system errors defined in the PRM. All TDMC 434a3c5bd6dSspeer * channel specific errors are reported on a per channel basis. 43544961713Sgirish */ 43644961713Sgirish } else if (estat.bits.ldw.rdmc) { 43744961713Sgirish /* RDMC */ 43844961713Sgirish NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 43952ccf843Smisaki "==> nxge_syserr_intr: device error - RDMC")); 44044961713Sgirish (void) nxge_rxdma_handle_sys_errors(nxgep); 44144961713Sgirish } else if (estat.bits.ldw.txc) { 44244961713Sgirish NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 44352ccf843Smisaki "==> nxge_syserr_intr: device error - TXC")); 44444961713Sgirish (void) nxge_txc_handle_sys_errors(nxgep); 44544961713Sgirish } else if ((nxgep->niu_type != N2_NIU) && estat.bits.ldw.peu) { 44644961713Sgirish /* PCI-E */ 44744961713Sgirish NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 44852ccf843Smisaki "==> nxge_syserr_intr: device error - PCI-E")); 44944961713Sgirish } else if (estat.bits.ldw.meta1) { 45044961713Sgirish /* META1 */ 45144961713Sgirish NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 45252ccf843Smisaki "==> nxge_syserr_intr: device error - META1")); 45344961713Sgirish } else if (estat.bits.ldw.meta2) { 45444961713Sgirish /* META2 */ 45544961713Sgirish NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 45652ccf843Smisaki "==> nxge_syserr_intr: device error - META2")); 45744961713Sgirish } else if (estat.bits.ldw.fflp) { 45844961713Sgirish /* FFLP */ 45944961713Sgirish NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 46052ccf843Smisaki "==> nxge_syserr_intr: device error - FFLP")); 46144961713Sgirish (void) nxge_fflp_handle_sys_errors(nxgep); 46244961713Sgirish } 463ee5416c9Syc 46400161856Syc /* 46500161856Syc * nxge_check_xaui_xfg checks XAUI for all of the following 46600161856Syc * portmodes, but checks XFP only if portmode == PORT_10G_FIBER. 46700161856Syc */ 468ee5416c9Syc if (nxgep->mac.portmode == PORT_10G_FIBER || 46952ccf843Smisaki nxgep->mac.portmode == PORT_10G_COPPER || 47052ccf843Smisaki nxgep->mac.portmode == PORT_10G_TN1010 || 47152ccf843Smisaki nxgep->mac.portmode == PORT_1G_TN1010) { 472ee5416c9Syc if (nxge_check_xaui_xfp(nxgep) != NXGE_OK) { 473ee5416c9Syc NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 474ee5416c9Syc "==> nxge_syserr_intr: device error - XAUI")); 475ee5416c9Syc } 476ee5416c9Syc } 477ee5416c9Syc 47844961713Sgirish serviced = DDI_INTR_CLAIMED; 47944961713Sgirish 48044961713Sgirish if (ldgp != NULL && ldvp != NULL && ldgp->nldvs == 1 && 48152ccf843Smisaki !ldvp->use_timer) { 48244961713Sgirish (void) npi_intr_ldg_mgmt_set(handle, ldgp->ldg, 48352ccf843Smisaki B_TRUE, ldgp->ldg_timer); 48444961713Sgirish } 48544961713Sgirish NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "<== nxge_syserr_intr")); 48644961713Sgirish return (serviced); 48744961713Sgirish } 48844961713Sgirish 489a3c5bd6dSspeer /* ARGSUSED */ 49044961713Sgirish void 49144961713Sgirish nxge_intr_hw_enable(p_nxge_t nxgep) 49244961713Sgirish { 49344961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr_hw_enable")); 49444961713Sgirish (void) nxge_intr_mask_mgmt_set(nxgep, B_TRUE); 49544961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_intr_hw_enable")); 49644961713Sgirish } 49744961713Sgirish 498a3c5bd6dSspeer /* ARGSUSED */ 49944961713Sgirish void 50044961713Sgirish nxge_intr_hw_disable(p_nxge_t nxgep) 50144961713Sgirish { 50244961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_intr_hw_disable")); 50344961713Sgirish (void) nxge_intr_mask_mgmt_set(nxgep, B_FALSE); 50444961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_intr_hw_disable")); 50544961713Sgirish } 50644961713Sgirish 507a3c5bd6dSspeer /* ARGSUSED */ 50844961713Sgirish void 50944961713Sgirish nxge_rx_hw_blank(void *arg, time_t ticks, uint_t count) 51044961713Sgirish { 511a3c5bd6dSspeer p_nxge_t nxgep = (p_nxge_t)arg; 512a3c5bd6dSspeer uint8_t channel; 513a3c5bd6dSspeer npi_handle_t handle; 514a3c5bd6dSspeer p_nxge_ldgv_t ldgvp; 515a3c5bd6dSspeer p_nxge_ldv_t ldvp; 516a3c5bd6dSspeer int i; 51744961713Sgirish 51844961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "==> nxge_rx_hw_blank")); 51944961713Sgirish handle = NXGE_DEV_NPI_HANDLE(nxgep); 52044961713Sgirish 52144961713Sgirish if ((ldgvp = nxgep->ldgvp) == NULL) { 52244961713Sgirish NXGE_ERROR_MSG((nxgep, INT_CTL, 52352ccf843Smisaki "<== nxge_rx_hw_blank (not enabled)")); 52444961713Sgirish return; 52544961713Sgirish } 52644961713Sgirish ldvp = nxgep->ldgvp->ldvp; 52744961713Sgirish if (ldvp == NULL) { 52844961713Sgirish return; 52944961713Sgirish } 53044961713Sgirish for (i = 0; i < ldgvp->nldvs; i++, ldvp++) { 53144961713Sgirish if (ldvp->is_rxdma) { 53244961713Sgirish channel = ldvp->channel; 53344961713Sgirish (void) npi_rxdma_cfg_rdc_rcr_threshold(handle, 53452ccf843Smisaki channel, count); 53544961713Sgirish (void) npi_rxdma_cfg_rdc_rcr_timeout(handle, 53652ccf843Smisaki channel, ticks); 53744961713Sgirish } 53844961713Sgirish } 53944961713Sgirish 54044961713Sgirish NXGE_DEBUG_MSG((nxgep, INT_CTL, "<== nxge_rx_hw_blank")); 54144961713Sgirish } 54244961713Sgirish 543a3c5bd6dSspeer /* ARGSUSED */ 54444961713Sgirish void 54544961713Sgirish nxge_hw_stop(p_nxge_t nxgep) 54644961713Sgirish { 54744961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_hw_stop")); 54844961713Sgirish 54944961713Sgirish (void) nxge_tx_mac_disable(nxgep); 55044961713Sgirish (void) nxge_rx_mac_disable(nxgep); 55144961713Sgirish (void) nxge_txdma_hw_mode(nxgep, NXGE_DMA_STOP); 55244961713Sgirish (void) nxge_rxdma_hw_mode(nxgep, NXGE_DMA_STOP); 55344961713Sgirish 55444961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_hw_stop")); 55544961713Sgirish } 55644961713Sgirish 557a3c5bd6dSspeer /* ARGSUSED */ 55844961713Sgirish void 55944961713Sgirish nxge_hw_ioctl(p_nxge_t nxgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp) 56044961713Sgirish { 56144961713Sgirish int cmd; 56244961713Sgirish 56344961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "==> nxge_hw_ioctl")); 56444961713Sgirish 56544961713Sgirish if (nxgep == NULL) { 56644961713Sgirish miocnak(wq, mp, 0, EINVAL); 56744961713Sgirish return; 56844961713Sgirish } 56944961713Sgirish iocp->ioc_error = 0; 57044961713Sgirish cmd = iocp->ioc_cmd; 57144961713Sgirish 57244961713Sgirish switch (cmd) { 57344961713Sgirish default: 57444961713Sgirish miocnak(wq, mp, 0, EINVAL); 57544961713Sgirish return; 57644961713Sgirish 57744961713Sgirish case NXGE_GET_MII: 57844961713Sgirish nxge_get_mii(nxgep, mp->b_cont); 57944961713Sgirish miocack(wq, mp, sizeof (uint16_t), 0); 58044961713Sgirish break; 58144961713Sgirish 58244961713Sgirish case NXGE_PUT_MII: 58344961713Sgirish nxge_put_mii(nxgep, mp->b_cont); 58444961713Sgirish miocack(wq, mp, 0, 0); 58544961713Sgirish break; 58644961713Sgirish 58744961713Sgirish case NXGE_GET64: 58844961713Sgirish nxge_get64(nxgep, mp->b_cont); 58944961713Sgirish miocack(wq, mp, sizeof (uint32_t), 0); 59044961713Sgirish break; 59144961713Sgirish 59244961713Sgirish case NXGE_PUT64: 59344961713Sgirish nxge_put64(nxgep, mp->b_cont); 59444961713Sgirish miocack(wq, mp, 0, 0); 59544961713Sgirish break; 59644961713Sgirish 59744961713Sgirish case NXGE_PUT_TCAM: 59844961713Sgirish nxge_put_tcam(nxgep, mp->b_cont); 59944961713Sgirish miocack(wq, mp, 0, 0); 60044961713Sgirish break; 60144961713Sgirish 60244961713Sgirish case NXGE_GET_TCAM: 60344961713Sgirish nxge_get_tcam(nxgep, mp->b_cont); 60444961713Sgirish miocack(wq, mp, 0, 0); 60544961713Sgirish break; 60644961713Sgirish 60744961713Sgirish case NXGE_TX_REGS_DUMP: 60844961713Sgirish nxge_txdma_regs_dump_channels(nxgep); 60944961713Sgirish miocack(wq, mp, 0, 0); 61044961713Sgirish break; 61144961713Sgirish case NXGE_RX_REGS_DUMP: 61244961713Sgirish nxge_rxdma_regs_dump_channels(nxgep); 61344961713Sgirish miocack(wq, mp, 0, 0); 61444961713Sgirish break; 61544961713Sgirish case NXGE_VIR_INT_REGS_DUMP: 61644961713Sgirish case NXGE_INT_REGS_DUMP: 61744961713Sgirish nxge_virint_regs_dump(nxgep); 61844961713Sgirish miocack(wq, mp, 0, 0); 61944961713Sgirish break; 62044961713Sgirish case NXGE_RTRACE: 62144961713Sgirish nxge_rtrace_ioctl(nxgep, wq, mp, iocp); 62244961713Sgirish break; 62344961713Sgirish } 62444961713Sgirish } 62544961713Sgirish 626a3c5bd6dSspeer /* ARGSUSED */ 62744961713Sgirish void 62844961713Sgirish nxge_loopback_ioctl(p_nxge_t nxgep, queue_t *wq, mblk_t *mp, 629a3c5bd6dSspeer struct iocblk *iocp) 63044961713Sgirish { 631a3c5bd6dSspeer p_lb_property_t lb_props; 632a3c5bd6dSspeer 633a3c5bd6dSspeer size_t size; 634a3c5bd6dSspeer int i; 63544961713Sgirish 63644961713Sgirish if (mp->b_cont == NULL) { 63744961713Sgirish miocnak(wq, mp, 0, EINVAL); 63844961713Sgirish } 63944961713Sgirish switch (iocp->ioc_cmd) { 64044961713Sgirish case LB_GET_MODE: 64144961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "NXGE_GET_LB_MODE command")); 64244961713Sgirish if (nxgep != NULL) { 64344961713Sgirish *(lb_info_sz_t *)mp->b_cont->b_rptr = 64452ccf843Smisaki nxgep->statsp->port_stats.lb_mode; 64544961713Sgirish miocack(wq, mp, sizeof (nxge_lb_t), 0); 646ee5416c9Syc } else { 64744961713Sgirish miocnak(wq, mp, 0, EINVAL); 648ee5416c9Syc } 64944961713Sgirish break; 65044961713Sgirish case LB_SET_MODE: 65144961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "NXGE_SET_LB_MODE command")); 65244961713Sgirish if (iocp->ioc_count != sizeof (uint32_t)) { 65344961713Sgirish miocack(wq, mp, 0, 0); 65444961713Sgirish break; 65544961713Sgirish } 65644961713Sgirish if ((nxgep != NULL) && nxge_set_lb(nxgep, wq, mp->b_cont)) { 65744961713Sgirish miocack(wq, mp, 0, 0); 65844961713Sgirish } else { 65944961713Sgirish miocnak(wq, mp, 0, EPROTO); 66044961713Sgirish } 66144961713Sgirish break; 66244961713Sgirish case LB_GET_INFO_SIZE: 66344961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "LB_GET_INFO_SIZE command")); 66444961713Sgirish if (nxgep != NULL) { 66544961713Sgirish size = sizeof (lb_normal); 66644961713Sgirish if (nxgep->statsp->mac_stats.cap_10gfdx) { 66700161856Syc /* TN1010 does not support external loopback */ 66800161856Syc if (nxgep->mac.portmode != PORT_1G_TN1010 && 66900161856Syc nxgep->mac.portmode != PORT_10G_TN1010) { 67000161856Syc size += sizeof (lb_external10g); 67100161856Syc } 67244961713Sgirish size += sizeof (lb_mac10g); 673936117e2Ssbehera /* Publish PHY loopback if PHY is present */ 674936117e2Ssbehera if (nxgep->mac.portmode == PORT_10G_COPPER || 67500161856Syc nxgep->mac.portmode == PORT_10G_TN1010 || 676936117e2Ssbehera nxgep->mac.portmode == PORT_10G_FIBER) 677936117e2Ssbehera size += sizeof (lb_phy10g); 67844961713Sgirish } 67900161856Syc 68000161856Syc /* 68100161856Syc * Even if cap_10gfdx is false, we still do 10G 68200161856Syc * serdes loopback as a part of SunVTS xnetlbtest 68300161856Syc * internal loopback test. 68400161856Syc */ 685936117e2Ssbehera if (nxgep->mac.portmode == PORT_10G_FIBER || 68600161856Syc nxgep->mac.portmode == PORT_10G_TN1010 || 687936117e2Ssbehera nxgep->mac.portmode == PORT_10G_SERDES) 688936117e2Ssbehera size += sizeof (lb_serdes10g); 689936117e2Ssbehera 69044961713Sgirish if (nxgep->statsp->mac_stats.cap_1000fdx) { 69100161856Syc /* TN1010 does not support external loopback */ 69200161856Syc if (nxgep->mac.portmode != PORT_1G_TN1010 && 69300161856Syc nxgep->mac.portmode != PORT_10G_TN1010) { 69400161856Syc size += sizeof (lb_external1000); 69500161856Syc } 69644961713Sgirish size += sizeof (lb_mac1000); 697*0cad6a5fSyc if (nxgep->mac.portmode == PORT_1G_COPPER || 69800161856Syc nxgep->mac.portmode == PORT_1G_TN1010 || 699*0cad6a5fSyc nxgep->mac.portmode == 700*0cad6a5fSyc PORT_1G_RGMII_FIBER) 70144961713Sgirish size += sizeof (lb_phy1000); 70244961713Sgirish } 70344961713Sgirish if (nxgep->statsp->mac_stats.cap_100fdx) 70444961713Sgirish size += sizeof (lb_external100); 70544961713Sgirish if (nxgep->statsp->mac_stats.cap_10fdx) 70644961713Sgirish size += sizeof (lb_external10); 707936117e2Ssbehera if (nxgep->mac.portmode == PORT_1G_FIBER || 70800161856Syc nxgep->mac.portmode == PORT_1G_TN1010 || 709936117e2Ssbehera nxgep->mac.portmode == PORT_1G_SERDES) 71044961713Sgirish size += sizeof (lb_serdes1000); 7112e59129aSraghus 71244961713Sgirish *(lb_info_sz_t *)mp->b_cont->b_rptr = size; 71344961713Sgirish 71444961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, 71552ccf843Smisaki "NXGE_GET_LB_INFO command: size %d", size)); 71644961713Sgirish miocack(wq, mp, sizeof (lb_info_sz_t), 0); 71744961713Sgirish } else 71844961713Sgirish miocnak(wq, mp, 0, EINVAL); 71944961713Sgirish break; 72044961713Sgirish 72144961713Sgirish case LB_GET_INFO: 72244961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "NXGE_GET_LB_INFO command")); 72344961713Sgirish if (nxgep != NULL) { 72444961713Sgirish size = sizeof (lb_normal); 72544961713Sgirish if (nxgep->statsp->mac_stats.cap_10gfdx) { 72600161856Syc /* TN1010 does not support external loopback */ 72700161856Syc if (nxgep->mac.portmode != PORT_1G_TN1010 && 72800161856Syc nxgep->mac.portmode != PORT_10G_TN1010) { 72900161856Syc size += sizeof (lb_external10g); 73000161856Syc } 73144961713Sgirish size += sizeof (lb_mac10g); 732936117e2Ssbehera /* Publish PHY loopback if PHY is present */ 733936117e2Ssbehera if (nxgep->mac.portmode == PORT_10G_COPPER || 73400161856Syc nxgep->mac.portmode == PORT_10G_TN1010 || 735936117e2Ssbehera nxgep->mac.portmode == PORT_10G_FIBER) 736936117e2Ssbehera size += sizeof (lb_phy10g); 73744961713Sgirish } 738936117e2Ssbehera if (nxgep->mac.portmode == PORT_10G_FIBER || 73900161856Syc nxgep->mac.portmode == PORT_10G_TN1010 || 740936117e2Ssbehera nxgep->mac.portmode == PORT_10G_SERDES) 741936117e2Ssbehera size += sizeof (lb_serdes10g); 742936117e2Ssbehera 74344961713Sgirish if (nxgep->statsp->mac_stats.cap_1000fdx) { 74400161856Syc /* TN1010 does not support external loopback */ 74500161856Syc if (nxgep->mac.portmode != PORT_1G_TN1010 && 74600161856Syc nxgep->mac.portmode != PORT_10G_TN1010) { 74700161856Syc size += sizeof (lb_external1000); 74800161856Syc } 74944961713Sgirish size += sizeof (lb_mac1000); 750*0cad6a5fSyc if (nxgep->mac.portmode == PORT_1G_COPPER || 75100161856Syc nxgep->mac.portmode == PORT_1G_TN1010 || 752*0cad6a5fSyc nxgep->mac.portmode == 753*0cad6a5fSyc PORT_1G_RGMII_FIBER) 75444961713Sgirish size += sizeof (lb_phy1000); 75544961713Sgirish } 75644961713Sgirish if (nxgep->statsp->mac_stats.cap_100fdx) 75744961713Sgirish size += sizeof (lb_external100); 75800161856Syc 75944961713Sgirish if (nxgep->statsp->mac_stats.cap_10fdx) 76044961713Sgirish size += sizeof (lb_external10); 76100161856Syc 762936117e2Ssbehera if (nxgep->mac.portmode == PORT_1G_FIBER || 76300161856Syc nxgep->mac.portmode == PORT_1G_TN1010 || 764936117e2Ssbehera nxgep->mac.portmode == PORT_1G_SERDES) 76544961713Sgirish size += sizeof (lb_serdes1000); 76644961713Sgirish 76744961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, 76852ccf843Smisaki "NXGE_GET_LB_INFO command: size %d", size)); 76944961713Sgirish if (size == iocp->ioc_count) { 77044961713Sgirish i = 0; 77144961713Sgirish lb_props = (p_lb_property_t)mp->b_cont->b_rptr; 77244961713Sgirish lb_props[i++] = lb_normal; 77300161856Syc 77444961713Sgirish if (nxgep->statsp->mac_stats.cap_10gfdx) { 77544961713Sgirish lb_props[i++] = lb_mac10g; 776936117e2Ssbehera if (nxgep->mac.portmode == 777936117e2Ssbehera PORT_10G_COPPER || 778936117e2Ssbehera nxgep->mac.portmode == 77900161856Syc PORT_10G_TN1010 || 78000161856Syc nxgep->mac.portmode == 78100161856Syc PORT_10G_FIBER) { 782936117e2Ssbehera lb_props[i++] = lb_phy10g; 78300161856Syc } 78400161856Syc /* TN1010 does not support ext lb */ 78500161856Syc if (nxgep->mac.portmode != 78600161856Syc PORT_10G_TN1010 && 78700161856Syc nxgep->mac.portmode != 78800161856Syc PORT_1G_TN1010) { 78900161856Syc lb_props[i++] = lb_external10g; 79000161856Syc } 79144961713Sgirish } 79200161856Syc 793936117e2Ssbehera if (nxgep->mac.portmode == PORT_10G_FIBER || 79400161856Syc nxgep->mac.portmode == PORT_10G_TN1010 || 795936117e2Ssbehera nxgep->mac.portmode == PORT_10G_SERDES) 796936117e2Ssbehera lb_props[i++] = lb_serdes10g; 797936117e2Ssbehera 79800161856Syc if (nxgep->statsp->mac_stats.cap_1000fdx) { 79900161856Syc /* TN1010 does not support ext lb */ 80000161856Syc if (nxgep->mac.portmode != 80100161856Syc PORT_10G_TN1010 && 80200161856Syc nxgep->mac.portmode != 80300161856Syc PORT_1G_TN1010) { 80400161856Syc lb_props[i++] = lb_external1000; 80500161856Syc } 80600161856Syc } 80700161856Syc 80844961713Sgirish if (nxgep->statsp->mac_stats.cap_100fdx) 80944961713Sgirish lb_props[i++] = lb_external100; 81000161856Syc 81144961713Sgirish if (nxgep->statsp->mac_stats.cap_10fdx) 81244961713Sgirish lb_props[i++] = lb_external10; 81300161856Syc 81444961713Sgirish if (nxgep->statsp->mac_stats.cap_1000fdx) 81544961713Sgirish lb_props[i++] = lb_mac1000; 81600161856Syc 817*0cad6a5fSyc if (nxgep->mac.portmode == PORT_1G_COPPER || 81800161856Syc nxgep->mac.portmode == PORT_1G_TN1010 || 819*0cad6a5fSyc nxgep->mac.portmode == 820*0cad6a5fSyc PORT_1G_RGMII_FIBER) { 82144961713Sgirish if (nxgep->statsp->mac_stats. 82252ccf843Smisaki cap_1000fdx) 82344961713Sgirish lb_props[i++] = lb_phy1000; 824*0cad6a5fSyc } else if (nxgep->mac.portmode == 825*0cad6a5fSyc PORT_1G_FIBER || 826*0cad6a5fSyc nxgep->mac.portmode == PORT_1G_TN1010 || 827*0cad6a5fSyc nxgep->mac.portmode == PORT_1G_SERDES) { 82844961713Sgirish lb_props[i++] = lb_serdes1000; 8292e59129aSraghus } 83044961713Sgirish miocack(wq, mp, size, 0); 83144961713Sgirish } else 83244961713Sgirish miocnak(wq, mp, 0, EINVAL); 83344961713Sgirish } else { 83444961713Sgirish miocnak(wq, mp, 0, EINVAL); 83544961713Sgirish cmn_err(CE_NOTE, "!nxge_hw_ioctl: invalid command 0x%x", 83652ccf843Smisaki iocp->ioc_cmd); 83744961713Sgirish } 83844961713Sgirish break; 83944961713Sgirish } 84044961713Sgirish } 84144961713Sgirish 84244961713Sgirish /* 84344961713Sgirish * DMA channel interfaces to access various channel specific 84444961713Sgirish * hardware functions. 84544961713Sgirish */ 846a3c5bd6dSspeer /* ARGSUSED */ 84744961713Sgirish void 84844961713Sgirish nxge_rxdma_channel_put64(nxge_os_acc_handle_t handle, void *reg_addrp, 849a3c5bd6dSspeer uint32_t reg_base, uint16_t channel, uint64_t reg_data) 85044961713Sgirish { 851a3c5bd6dSspeer uint64_t reg_offset; 85244961713Sgirish 85344961713Sgirish NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_put64")); 85444961713Sgirish 85544961713Sgirish /* 856a3c5bd6dSspeer * Channel is assumed to be from 0 to the maximum DMA channel #. If we 857a3c5bd6dSspeer * use the virtual DMA CSR address space from the config space (in PCI 858a3c5bd6dSspeer * case), then the following code need to be use different offset 85944961713Sgirish * computation macro. 86044961713Sgirish */ 86144961713Sgirish reg_offset = reg_base + DMC_OFFSET(channel); 86244961713Sgirish NXGE_PIO_WRITE64(handle, reg_addrp, reg_offset, reg_data); 86344961713Sgirish 86444961713Sgirish NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_put64")); 86544961713Sgirish } 86644961713Sgirish 867a3c5bd6dSspeer /* ARGSUSED */ 86844961713Sgirish uint64_t 86944961713Sgirish nxge_rxdma_channel_get64(nxge_os_acc_handle_t handle, void *reg_addrp, 870a3c5bd6dSspeer uint32_t reg_base, uint16_t channel) 87144961713Sgirish { 872a3c5bd6dSspeer uint64_t reg_offset; 87344961713Sgirish 87444961713Sgirish NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_get64")); 87544961713Sgirish 87644961713Sgirish /* 877a3c5bd6dSspeer * Channel is assumed to be from 0 to the maximum DMA channel #. If we 878a3c5bd6dSspeer * use the virtual DMA CSR address space from the config space (in PCI 879a3c5bd6dSspeer * case), then the following code need to be use different offset 88044961713Sgirish * computation macro. 88144961713Sgirish */ 88244961713Sgirish reg_offset = reg_base + DMC_OFFSET(channel); 88344961713Sgirish 88444961713Sgirish NXGE_DEBUG_MSG((NULL, DMA_CTL, "<== nxge_rxdma_channel_get64")); 88544961713Sgirish 88644961713Sgirish return (NXGE_PIO_READ64(handle, reg_addrp, reg_offset)); 88744961713Sgirish } 88844961713Sgirish 889a3c5bd6dSspeer /* ARGSUSED */ 89044961713Sgirish void 89144961713Sgirish nxge_get32(p_nxge_t nxgep, p_mblk_t mp) 89244961713Sgirish { 893a3c5bd6dSspeer nxge_os_acc_handle_t nxge_regh; 89444961713Sgirish 89544961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_get32")); 89644961713Sgirish nxge_regh = nxgep->dev_regs->nxge_regh; 89744961713Sgirish 89844961713Sgirish *(uint32_t *)mp->b_rptr = NXGE_PIO_READ32(nxge_regh, 89952ccf843Smisaki nxgep->dev_regs->nxge_regp, *(uint32_t *)mp->b_rptr); 90044961713Sgirish 90144961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "value = 0x%08X", 90252ccf843Smisaki *(uint32_t *)mp->b_rptr)); 90344961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_get32")); 90444961713Sgirish } 90544961713Sgirish 906a3c5bd6dSspeer /* ARGSUSED */ 90744961713Sgirish void 90844961713Sgirish nxge_put32(p_nxge_t nxgep, p_mblk_t mp) 90944961713Sgirish { 91044961713Sgirish nxge_os_acc_handle_t nxge_regh; 91144961713Sgirish uint32_t *buf; 91244961713Sgirish uint8_t *reg; 91344961713Sgirish 91444961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_put32")); 91544961713Sgirish nxge_regh = nxgep->dev_regs->nxge_regh; 91644961713Sgirish 91744961713Sgirish buf = (uint32_t *)mp->b_rptr; 91844961713Sgirish reg = (uint8_t *)(nxgep->dev_regs->nxge_regp) + buf[0]; 91944961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, 92052ccf843Smisaki "reg = 0x%016llX index = 0x%08X value = 0x%08X", 92152ccf843Smisaki reg, buf[0], buf[1])); 92244961713Sgirish NXGE_PIO_WRITE32(nxge_regh, (uint32_t *)reg, 0, buf[1]); 92344961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "nxge_put32")); 92444961713Sgirish } 92544961713Sgirish 92644961713Sgirish /*ARGSUSED*/ 92744961713Sgirish boolean_t 92844961713Sgirish nxge_set_lb(p_nxge_t nxgep, queue_t *wq, p_mblk_t mp) 92944961713Sgirish { 930a3c5bd6dSspeer boolean_t status = B_TRUE; 931a3c5bd6dSspeer uint32_t lb_mode; 932a3c5bd6dSspeer lb_property_t *lb_info; 93344961713Sgirish 93444961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "<== nxge_set_lb")); 93544961713Sgirish lb_mode = nxgep->statsp->port_stats.lb_mode; 93644961713Sgirish if (lb_mode == *(uint32_t *)mp->b_rptr) { 93744961713Sgirish cmn_err(CE_NOTE, 93852ccf843Smisaki "!nxge%d: Loopback mode already set (lb_mode %d).\n", 93952ccf843Smisaki nxgep->instance, lb_mode); 94044961713Sgirish status = B_FALSE; 94144961713Sgirish goto nxge_set_lb_exit; 94244961713Sgirish } 94344961713Sgirish lb_mode = *(uint32_t *)mp->b_rptr; 94444961713Sgirish lb_info = NULL; 94544961713Sgirish if (lb_mode == lb_normal.value) 94644961713Sgirish lb_info = &lb_normal; 94744961713Sgirish else if ((lb_mode == lb_external10g.value) && 94852ccf843Smisaki (nxgep->statsp->mac_stats.cap_10gfdx)) 94944961713Sgirish lb_info = &lb_external10g; 95044961713Sgirish else if ((lb_mode == lb_external1000.value) && 95152ccf843Smisaki (nxgep->statsp->mac_stats.cap_1000fdx)) 95244961713Sgirish lb_info = &lb_external1000; 95344961713Sgirish else if ((lb_mode == lb_external100.value) && 95452ccf843Smisaki (nxgep->statsp->mac_stats.cap_100fdx)) 95544961713Sgirish lb_info = &lb_external100; 95644961713Sgirish else if ((lb_mode == lb_external10.value) && 95752ccf843Smisaki (nxgep->statsp->mac_stats.cap_10fdx)) 95844961713Sgirish lb_info = &lb_external10; 95944961713Sgirish else if ((lb_mode == lb_phy10g.value) && 960*0cad6a5fSyc (nxgep->mac.portmode == PORT_10G_COPPER || 961*0cad6a5fSyc nxgep->mac.portmode == PORT_10G_TN1010 || 962*0cad6a5fSyc nxgep->mac.portmode == PORT_10G_FIBER)) 96344961713Sgirish lb_info = &lb_phy10g; 96444961713Sgirish else if ((lb_mode == lb_phy1000.value) && 965*0cad6a5fSyc (nxgep->mac.portmode == PORT_1G_COPPER || 966*0cad6a5fSyc nxgep->mac.portmode == PORT_1G_TN1010 || 967*0cad6a5fSyc nxgep->mac.portmode == PORT_1G_RGMII_FIBER)) 96844961713Sgirish lb_info = &lb_phy1000; 96944961713Sgirish else if ((lb_mode == lb_phy.value) && 97052ccf843Smisaki (nxgep->mac.portmode == PORT_1G_COPPER)) 97144961713Sgirish lb_info = &lb_phy; 97244961713Sgirish else if ((lb_mode == lb_serdes10g.value) && 973*0cad6a5fSyc (nxgep->mac.portmode == PORT_10G_FIBER || 974*0cad6a5fSyc nxgep->mac.portmode == PORT_10G_COPPER || 975*0cad6a5fSyc nxgep->mac.portmode == PORT_10G_TN1010 || 976*0cad6a5fSyc nxgep->mac.portmode == PORT_10G_SERDES)) 97744961713Sgirish lb_info = &lb_serdes10g; 97844961713Sgirish else if ((lb_mode == lb_serdes1000.value) && 979*0cad6a5fSyc (nxgep->mac.portmode == PORT_1G_FIBER || 980*0cad6a5fSyc nxgep->mac.portmode == PORT_1G_TN1010 || 981*0cad6a5fSyc nxgep->mac.portmode == PORT_1G_SERDES)) 98244961713Sgirish lb_info = &lb_serdes1000; 98344961713Sgirish else if (lb_mode == lb_mac10g.value) 98444961713Sgirish lb_info = &lb_mac10g; 98544961713Sgirish else if (lb_mode == lb_mac1000.value) 98644961713Sgirish lb_info = &lb_mac1000; 98744961713Sgirish else if (lb_mode == lb_mac.value) 98844961713Sgirish lb_info = &lb_mac; 98944961713Sgirish else { 99044961713Sgirish cmn_err(CE_NOTE, 99152ccf843Smisaki "!nxge%d: Loopback mode not supported(mode %d).\n", 99252ccf843Smisaki nxgep->instance, lb_mode); 99344961713Sgirish status = B_FALSE; 99444961713Sgirish goto nxge_set_lb_exit; 99544961713Sgirish } 99644961713Sgirish 99744961713Sgirish if (lb_mode == nxge_lb_normal) { 99844961713Sgirish if (nxge_lb_dbg) { 99944961713Sgirish cmn_err(CE_NOTE, 100052ccf843Smisaki "!nxge%d: Returning to normal operation", 100152ccf843Smisaki nxgep->instance); 100244961713Sgirish } 1003321febdeSsbehera if (nxge_set_lb_normal(nxgep) != NXGE_OK) { 1004321febdeSsbehera status = B_FALSE; 1005321febdeSsbehera cmn_err(CE_NOTE, 1006321febdeSsbehera "!nxge%d: Failed to return to normal operation", 1007321febdeSsbehera nxgep->instance); 1008321febdeSsbehera } 100944961713Sgirish goto nxge_set_lb_exit; 101044961713Sgirish } 101144961713Sgirish nxgep->statsp->port_stats.lb_mode = lb_mode; 101244961713Sgirish 101344961713Sgirish if (nxge_lb_dbg) 101444961713Sgirish cmn_err(CE_NOTE, 101552ccf843Smisaki "!nxge%d: Adapter now in %s loopback mode", 101652ccf843Smisaki nxgep->instance, lb_info->key); 101744961713Sgirish nxgep->param_arr[param_autoneg].value = 0; 101844961713Sgirish nxgep->param_arr[param_anar_10gfdx].value = 101952ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10g) || 102052ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac10g) || 102152ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy10g) || 102252ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_serdes10g); 102344961713Sgirish nxgep->param_arr[param_anar_10ghdx].value = 0; 102444961713Sgirish nxgep->param_arr[param_anar_1000fdx].value = 102552ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext1000) || 102652ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac1000) || 102752ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy1000) || 102852ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_serdes1000); 102944961713Sgirish nxgep->param_arr[param_anar_1000hdx].value = 0; 103044961713Sgirish nxgep->param_arr[param_anar_100fdx].value = 103152ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy) || 103252ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac) || 103352ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext100); 103444961713Sgirish nxgep->param_arr[param_anar_100hdx].value = 0; 103544961713Sgirish nxgep->param_arr[param_anar_10fdx].value = 103652ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_mac) || 103752ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10); 103844961713Sgirish if (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext1000) { 103944961713Sgirish nxgep->param_arr[param_master_cfg_enable].value = 1; 104044961713Sgirish nxgep->param_arr[param_master_cfg_value].value = 1; 104144961713Sgirish } 104244961713Sgirish if ((nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10g) || 104352ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext1000) || 104452ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext100) || 104552ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_ext10) || 104652ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy10g) || 104752ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy1000) || 104852ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == nxge_lb_phy)) { 104944961713Sgirish 1050321febdeSsbehera if (nxge_link_monitor(nxgep, LINK_MONITOR_STOP) != NXGE_OK) 1051321febdeSsbehera goto nxge_set_lb_err; 1052321febdeSsbehera if (nxge_xcvr_find(nxgep) != NXGE_OK) 1053321febdeSsbehera goto nxge_set_lb_err; 1054321febdeSsbehera if (nxge_link_init(nxgep) != NXGE_OK) 1055321febdeSsbehera goto nxge_set_lb_err; 1056321febdeSsbehera if (nxge_link_monitor(nxgep, LINK_MONITOR_START) != NXGE_OK) 1057321febdeSsbehera goto nxge_set_lb_err; 105844961713Sgirish } 105944961713Sgirish if (lb_info->lb_type == internal) { 106044961713Sgirish if ((nxgep->statsp->port_stats.lb_mode == nxge_lb_mac10g) || 106152ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == 106252ccf843Smisaki nxge_lb_phy10g) || 106352ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == 106452ccf843Smisaki nxge_lb_serdes10g)) { 106544961713Sgirish nxgep->statsp->mac_stats.link_speed = 10000; 1066a3c5bd6dSspeer } else if ((nxgep->statsp->port_stats.lb_mode 106752ccf843Smisaki == nxge_lb_mac1000) || 106852ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == 106952ccf843Smisaki nxge_lb_phy1000) || 107052ccf843Smisaki (nxgep->statsp->port_stats.lb_mode == 107152ccf843Smisaki nxge_lb_serdes1000)) { 107244961713Sgirish nxgep->statsp->mac_stats.link_speed = 1000; 107344961713Sgirish } else { 107444961713Sgirish nxgep->statsp->mac_stats.link_speed = 100; 107544961713Sgirish } 107644961713Sgirish nxgep->statsp->mac_stats.link_duplex = 2; 107744961713Sgirish nxgep->statsp->mac_stats.link_up = 1; 107844961713Sgirish } 1079321febdeSsbehera if (nxge_global_reset(nxgep) != NXGE_OK) 1080321febdeSsbehera goto nxge_set_lb_err; 108144961713Sgirish 108244961713Sgirish nxge_set_lb_exit: 108344961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, 108452ccf843Smisaki "<== nxge_set_lb status = 0x%08x", status)); 108544961713Sgirish return (status); 1086321febdeSsbehera nxge_set_lb_err: 1087321febdeSsbehera status = B_FALSE; 1088321febdeSsbehera cmn_err(CE_NOTE, 1089321febdeSsbehera "!nxge%d: Failed to put adapter in %s loopback mode", 1090321febdeSsbehera nxgep->instance, lb_info->key); 1091321febdeSsbehera return (status); 109244961713Sgirish } 109344961713Sgirish 109400161856Syc /* Return to normal (no loopback) mode */ 1095a3c5bd6dSspeer /* ARGSUSED */ 1096321febdeSsbehera nxge_status_t 109744961713Sgirish nxge_set_lb_normal(p_nxge_t nxgep) 109844961713Sgirish { 1099321febdeSsbehera nxge_status_t status = NXGE_OK; 1100321febdeSsbehera 110144961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, "==> nxge_set_lb_normal")); 1102321febdeSsbehera 110344961713Sgirish nxgep->statsp->port_stats.lb_mode = nxge_lb_normal; 110444961713Sgirish nxgep->param_arr[param_autoneg].value = 110552ccf843Smisaki nxgep->param_arr[param_autoneg].old_value; 110644961713Sgirish nxgep->param_arr[param_anar_1000fdx].value = 110752ccf843Smisaki nxgep->param_arr[param_anar_1000fdx].old_value; 110844961713Sgirish nxgep->param_arr[param_anar_1000hdx].value = 110952ccf843Smisaki nxgep->param_arr[param_anar_1000hdx].old_value; 111044961713Sgirish nxgep->param_arr[param_anar_100fdx].value = 111152ccf843Smisaki nxgep->param_arr[param_anar_100fdx].old_value; 111244961713Sgirish nxgep->param_arr[param_anar_100hdx].value = 111352ccf843Smisaki nxgep->param_arr[param_anar_100hdx].old_value; 111444961713Sgirish nxgep->param_arr[param_anar_10fdx].value = 111552ccf843Smisaki nxgep->param_arr[param_anar_10fdx].old_value; 111644961713Sgirish nxgep->param_arr[param_master_cfg_enable].value = 111752ccf843Smisaki nxgep->param_arr[param_master_cfg_enable].old_value; 111844961713Sgirish nxgep->param_arr[param_master_cfg_value].value = 111952ccf843Smisaki nxgep->param_arr[param_master_cfg_value].old_value; 112044961713Sgirish 1121321febdeSsbehera if ((status = nxge_global_reset(nxgep)) != NXGE_OK) 1122321febdeSsbehera return (status); 112344961713Sgirish 1124321febdeSsbehera if ((status = nxge_link_monitor(nxgep, LINK_MONITOR_STOP)) != NXGE_OK) 1125321febdeSsbehera return (status); 1126321febdeSsbehera if ((status = nxge_xcvr_find(nxgep)) != NXGE_OK) 1127321febdeSsbehera return (status); 1128321febdeSsbehera if ((status = nxge_link_init(nxgep)) != NXGE_OK) 1129321febdeSsbehera return (status); 1130321febdeSsbehera status = nxge_link_monitor(nxgep, LINK_MONITOR_START); 113144961713Sgirish 113244961713Sgirish NXGE_DEBUG_MSG((nxgep, DDI_CTL, "<== nxge_set_lb_normal")); 1133321febdeSsbehera 1134321febdeSsbehera return (status); 113544961713Sgirish } 113644961713Sgirish 1137a3c5bd6dSspeer /* ARGSUSED */ 113844961713Sgirish void 113944961713Sgirish nxge_get_mii(p_nxge_t nxgep, p_mblk_t mp) 114044961713Sgirish { 114144961713Sgirish uint16_t reg; 114244961713Sgirish 114344961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "==> nxge_get_mii")); 114444961713Sgirish 114544961713Sgirish reg = *(uint16_t *)mp->b_rptr; 114644961713Sgirish (void) nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, reg, 114752ccf843Smisaki (uint16_t *)mp->b_rptr); 114844961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "reg = 0x%08X value = 0x%04X", 114952ccf843Smisaki reg, *(uint16_t *)mp->b_rptr)); 115044961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "<== nxge_get_mii")); 115144961713Sgirish } 115244961713Sgirish 1153a3c5bd6dSspeer /* ARGSUSED */ 115444961713Sgirish void 115544961713Sgirish nxge_put_mii(p_nxge_t nxgep, p_mblk_t mp) 115644961713Sgirish { 115744961713Sgirish uint16_t *buf; 115844961713Sgirish uint8_t reg; 115944961713Sgirish 116044961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "==> nxge_put_mii")); 116144961713Sgirish buf = (uint16_t *)mp->b_rptr; 116244961713Sgirish reg = (uint8_t)buf[0]; 116344961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, 116452ccf843Smisaki "reg = 0x%08X index = 0x%08X value = 0x%08X", 116552ccf843Smisaki reg, buf[0], buf[1])); 116644961713Sgirish (void) nxge_mii_write(nxgep, nxgep->statsp->mac_stats.xcvr_portn, 116752ccf843Smisaki reg, buf[1]); 116844961713Sgirish NXGE_DEBUG_MSG((nxgep, IOC_CTL, "<== nxge_put_mii")); 116944961713Sgirish } 117044961713Sgirish 1171a3c5bd6dSspeer /* ARGSUSED */ 117244961713Sgirish void 117344961713Sgirish nxge_check_hw_state(p_nxge_t nxgep) 117444961713Sgirish { 1175a3c5bd6dSspeer p_nxge_ldgv_t ldgvp; 1176a3c5bd6dSspeer p_nxge_ldv_t t_ldvp; 117744961713Sgirish 117844961713Sgirish NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "==> nxge_check_hw_state")); 117944961713Sgirish 118014ea4bb7Ssd MUTEX_ENTER(nxgep->genlock); 118114ea4bb7Ssd nxgep->nxge_timerid = 0; 118214ea4bb7Ssd if (!(nxgep->drv_state & STATE_HW_INITIALIZED)) { 118314ea4bb7Ssd goto nxge_check_hw_state_exit; 118414ea4bb7Ssd } 118544961713Sgirish nxge_check_tx_hang(nxgep); 118644961713Sgirish 118744961713Sgirish ldgvp = nxgep->ldgvp; 118844961713Sgirish if (ldgvp == NULL || (ldgvp->ldvp_syserr == NULL)) { 118944961713Sgirish NXGE_ERROR_MSG((nxgep, SYSERR_CTL, "<== nxge_check_hw_state: " 119052ccf843Smisaki "NULL ldgvp (interrupt not ready).")); 119114ea4bb7Ssd goto nxge_check_hw_state_exit; 119244961713Sgirish } 119344961713Sgirish t_ldvp = ldgvp->ldvp_syserr; 119444961713Sgirish if (!t_ldvp->use_timer) { 119544961713Sgirish NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "<== nxge_check_hw_state: " 119652ccf843Smisaki "ldgvp $%p t_ldvp $%p use_timer flag %d", 119752ccf843Smisaki ldgvp, t_ldvp, t_ldvp->use_timer)); 119814ea4bb7Ssd goto nxge_check_hw_state_exit; 119914ea4bb7Ssd } 120014ea4bb7Ssd if (fm_check_acc_handle(nxgep->dev_regs->nxge_regh) != DDI_FM_OK) { 120114ea4bb7Ssd NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, 120252ccf843Smisaki "port%d Bad register acc handle", nxgep->mac.portnum)); 120344961713Sgirish } 1204a3c5bd6dSspeer (void) nxge_syserr_intr((void *) t_ldvp, (void *) nxgep); 120544961713Sgirish 120644961713Sgirish nxgep->nxge_timerid = nxge_start_timer(nxgep, nxge_check_hw_state, 120752ccf843Smisaki NXGE_CHECK_TIMER); 120844961713Sgirish 120914ea4bb7Ssd nxge_check_hw_state_exit: 121014ea4bb7Ssd MUTEX_EXIT(nxgep->genlock); 121144961713Sgirish NXGE_DEBUG_MSG((nxgep, SYSERR_CTL, "<== nxge_check_hw_state")); 121244961713Sgirish } 121344961713Sgirish 121444961713Sgirish /*ARGSUSED*/ 121544961713Sgirish static void 1216a3c5bd6dSspeer nxge_rtrace_ioctl(p_nxge_t nxgep, queue_t *wq, mblk_t *mp, 1217a3c5bd6dSspeer struct iocblk *iocp) 121844961713Sgirish { 1219a3c5bd6dSspeer ssize_t size; 1220a3c5bd6dSspeer rtrace_t *rtp; 1221a3c5bd6dSspeer mblk_t *nmp; 1222a3c5bd6dSspeer uint32_t i, j; 1223a3c5bd6dSspeer uint32_t start_blk; 1224a3c5bd6dSspeer uint32_t base_entry; 1225a3c5bd6dSspeer uint32_t num_entries; 122644961713Sgirish 122744961713Sgirish NXGE_DEBUG_MSG((nxgep, STR_CTL, "==> nxge_rtrace_ioctl")); 122844961713Sgirish 122944961713Sgirish size = 1024; 123044961713Sgirish if (mp->b_cont == NULL || MBLKL(mp->b_cont) < size) { 123144961713Sgirish NXGE_DEBUG_MSG((nxgep, STR_CTL, 123252ccf843Smisaki "malformed M_IOCTL MBLKL = %d size = %d", 123352ccf843Smisaki MBLKL(mp->b_cont), size)); 123444961713Sgirish miocnak(wq, mp, 0, EINVAL); 123544961713Sgirish return; 123644961713Sgirish } 123744961713Sgirish nmp = mp->b_cont; 123844961713Sgirish rtp = (rtrace_t *)nmp->b_rptr; 123944961713Sgirish start_blk = rtp->next_idx; 124044961713Sgirish num_entries = rtp->last_idx; 124144961713Sgirish base_entry = start_blk * MAX_RTRACE_IOC_ENTRIES; 124244961713Sgirish 124344961713Sgirish NXGE_DEBUG_MSG((nxgep, STR_CTL, "start_blk = %d\n", start_blk)); 124444961713Sgirish NXGE_DEBUG_MSG((nxgep, STR_CTL, "num_entries = %d\n", num_entries)); 124544961713Sgirish NXGE_DEBUG_MSG((nxgep, STR_CTL, "base_entry = %d\n", base_entry)); 124644961713Sgirish 124744961713Sgirish rtp->next_idx = npi_rtracebuf.next_idx; 124844961713Sgirish rtp->last_idx = npi_rtracebuf.last_idx; 124944961713Sgirish rtp->wrapped = npi_rtracebuf.wrapped; 125044961713Sgirish for (i = 0, j = base_entry; i < num_entries; i++, j++) { 125144961713Sgirish rtp->buf[i].ctl_addr = npi_rtracebuf.buf[j].ctl_addr; 125244961713Sgirish rtp->buf[i].val_l32 = npi_rtracebuf.buf[j].val_l32; 125344961713Sgirish rtp->buf[i].val_h32 = npi_rtracebuf.buf[j].val_h32; 125444961713Sgirish } 125544961713Sgirish 125644961713Sgirish nmp->b_wptr = nmp->b_rptr + size; 125744961713Sgirish NXGE_DEBUG_MSG((nxgep, STR_CTL, "<== nxge_rtrace_ioctl")); 125844961713Sgirish miocack(wq, mp, (int)size, 0); 125944961713Sgirish } 1260