144961713Sgirish /* 244961713Sgirish * CDDL HEADER START 344961713Sgirish * 444961713Sgirish * The contents of this file are subject to the terms of the 544961713Sgirish * Common Development and Distribution License (the "License"). 644961713Sgirish * You may not use this file except in compliance with the License. 744961713Sgirish * 844961713Sgirish * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 944961713Sgirish * or http://www.opensolaris.org/os/licensing. 1044961713Sgirish * See the License for the specific language governing permissions 1144961713Sgirish * and limitations under the License. 1244961713Sgirish * 1344961713Sgirish * When distributing Covered Code, include this CDDL HEADER in each 1444961713Sgirish * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 1544961713Sgirish * If applicable, add the following below this CDDL HEADER, with the 1644961713Sgirish * fields enclosed by brackets "[]" replaced with your own identifying 1744961713Sgirish * information: Portions Copyright [yyyy] [name of copyright owner] 1844961713Sgirish * 1944961713Sgirish * CDDL HEADER END 2044961713Sgirish */ 2144961713Sgirish /* 2244961713Sgirish * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 2344961713Sgirish * Use is subject to license terms. 2444961713Sgirish */ 2544961713Sgirish 2644961713Sgirish #ifndef _NPI_IPP_H 2744961713Sgirish #define _NPI_IPP_H 2844961713Sgirish 2944961713Sgirish #ifdef __cplusplus 3044961713Sgirish extern "C" { 3144961713Sgirish #endif 3244961713Sgirish 3344961713Sgirish #include <npi.h> 3444961713Sgirish #include <nxge_ipp_hw.h> 3544961713Sgirish 3644961713Sgirish /* IBTP IPP Configuration */ 3744961713Sgirish 3844961713Sgirish typedef enum ipp_config_e { 3944961713Sgirish CFG_IPP = IPP_EN, 4044961713Sgirish CFG_IPP_DFIFO_ECC_CORRECT = IPP_DFIFO_ECC_CORRECT_EN, 4144961713Sgirish CFG_IPP_DROP_BAD_CRC = IPP_DROP_BAD_CRC_EN, 4244961713Sgirish CFG_IPP_TCP_UDP_CKSUM = IPP_TCP_UDP_CKSUM_EN, 4344961713Sgirish CFG_IPP_DFIFO_PIO_WR = IPP_DFIFO_PIO_WR_EN, 4444961713Sgirish CFG_IPP_PRE_FIFO_PIO_WR = IPP_PRE_FIFO_PIO_WR_EN, 4544961713Sgirish CFG_IPP_FFLP_CKSUM_INFO_PIO_WR = IPP_FFLP_CKSUM_INFO_PIO_WR_EN, 4644961713Sgirish CFG_IPP_ALL = (IPP_EN | IPP_DFIFO_ECC_CORRECT_EN | 4744961713Sgirish IPP_DROP_BAD_CRC_EN | IPP_TCP_UDP_CKSUM_EN | 4844961713Sgirish IPP_DFIFO_PIO_WR_EN | IPP_PRE_FIFO_PIO_WR_EN) 4944961713Sgirish } ipp_config_t; 5044961713Sgirish 5144961713Sgirish typedef enum ipp_iconfig_e { 5244961713Sgirish ICFG_IPP_PKT_DISCARD_OVFL = IPP_PKT_DISCARD_CNT_INTR_DIS, 5344961713Sgirish ICFG_IPP_BAD_TCPIP_CKSUM_OVFL = IPP_BAD_TCPIP_CKSUM_CNT_INTR_DIS, 5444961713Sgirish ICFG_IPP_PRE_FIFO_UNDERRUN = IPP_PRE_FIFO_UNDERRUN_INTR_DIS, 5544961713Sgirish ICFG_IPP_PRE_FIFO_OVERRUN = IPP_PRE_FIFO_OVERRUN_INTR_DIS, 5644961713Sgirish ICFG_IPP_PRE_FIFO_PERR = IPP_PRE_FIFO_PERR_INTR_DIS, 5744961713Sgirish ICFG_IPP_DFIFO_ECC_UNCORR_ERR = IPP_DFIFO_ECC_UNCORR_ERR_INTR_DIS, 5844961713Sgirish ICFG_IPP_DFIFO_MISSING_EOP_SOP = IPP_DFIFO_MISSING_EOP_SOP_INTR_DIS, 5944961713Sgirish ICFG_IPP_ECC_ERR_OVFL = IPP_ECC_ERR_CNT_MAX_INTR_DIS, 6044961713Sgirish ICFG_IPP_ALL = (IPP_PKT_DISCARD_CNT_INTR_DIS | 6144961713Sgirish IPP_BAD_TCPIP_CKSUM_CNT_INTR_DIS | 6244961713Sgirish IPP_PRE_FIFO_UNDERRUN_INTR_DIS | 6344961713Sgirish IPP_PRE_FIFO_OVERRUN_INTR_DIS | 6444961713Sgirish IPP_PRE_FIFO_PERR_INTR_DIS | 6544961713Sgirish IPP_DFIFO_ECC_UNCORR_ERR_INTR_DIS | 6644961713Sgirish IPP_DFIFO_MISSING_EOP_SOP_INTR_DIS | 6744961713Sgirish IPP_ECC_ERR_CNT_MAX_INTR_DIS) 6844961713Sgirish } ipp_iconfig_t; 6944961713Sgirish 7044961713Sgirish typedef enum ipp_counter_e { 7144961713Sgirish CNT_IPP_DISCARD_PKT = 0x00000001, 7244961713Sgirish CNT_IPP_TCP_CKSUM_ERR = 0x00000002, 7344961713Sgirish CNT_IPP_ECC_ERR = 0x00000004, 7444961713Sgirish CNT_IPP_ALL = 0x00000007 7544961713Sgirish } ipp_counter_t; 7644961713Sgirish 7744961713Sgirish 7844961713Sgirish typedef enum ipp_port_cnt_idx_e { 7944961713Sgirish HWCI_IPP_PKT_DISCARD = 0, 8044961713Sgirish HWCI_IPP_TCP_CKSUM_ERR, 8144961713Sgirish HWCI_IPP_ECC_ERR, 8244961713Sgirish CI_IPP_MISSING_EOP_SOP, 8344961713Sgirish CI_IPP_UNCORR_ERR, 8444961713Sgirish CI_IPP_PERR, 8544961713Sgirish CI_IPP_FIFO_OVERRUN, 8644961713Sgirish CI_IPP_FIFO_UNDERRUN, 8744961713Sgirish CI_IPP_PORT_CNT_ARR_SIZE 8844961713Sgirish } ipp_port_cnt_idx_t; 8944961713Sgirish 9044961713Sgirish /* IPP specific errors */ 9144961713Sgirish 9244961713Sgirish #define IPP_MAX_PKT_BYTES_INVALID 0x50 9344961713Sgirish #define IPP_FIFO_ADDR_INVALID 0x51 9444961713Sgirish 9544961713Sgirish /* IPP error return macros */ 9644961713Sgirish 9744961713Sgirish #define NPI_IPP_PORT_INVALID(portn)\ 9844961713Sgirish ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | PORT_INVALID |\ 9944961713Sgirish IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 10044961713Sgirish #define NPI_IPP_OPCODE_INVALID(portn)\ 10144961713Sgirish ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | OPCODE_INVALID |\ 10244961713Sgirish IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 10344961713Sgirish #define NPI_IPP_CONFIG_INVALID(portn)\ 10444961713Sgirish ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | CONFIG_INVALID |\ 10544961713Sgirish IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 10644961713Sgirish #define NPI_IPP_MAX_PKT_BYTES_INVALID(portn)\ 10744961713Sgirish ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) |\ 10844961713Sgirish IPP_MAX_PKT_BYTES_INVALID |\ 10944961713Sgirish IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 11044961713Sgirish #define NPI_IPP_COUNTER_INVALID(portn)\ 11144961713Sgirish ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | COUNTER_INVALID |\ 11244961713Sgirish IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 11344961713Sgirish #define NPI_IPP_RESET_FAILED(portn)\ 11444961713Sgirish ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) | RESET_FAILED |\ 11544961713Sgirish IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 11644961713Sgirish #define NPI_IPP_FIFO_ADDR_INVALID(portn)\ 11744961713Sgirish ((IPP_BLK_ID << NPI_BLOCK_ID_SHIFT) |\ 11844961713Sgirish IPP_FIFO_ADDR_INVALID |\ 11944961713Sgirish IS_PORT | (portn << NPI_PORT_CHAN_SHIFT)) 12044961713Sgirish 12144961713Sgirish #define IPP_REG_RD(handle, portn, reg, val) {\ 12244961713Sgirish NXGE_REG_RD64(handle, IPP_REG_ADDR(portn, reg), val);\ 12344961713Sgirish } 12444961713Sgirish 12544961713Sgirish #define IPP_REG_WR(handle, portn, reg, val) {\ 12644961713Sgirish NXGE_REG_WR64(handle, IPP_REG_ADDR(portn, reg), val);\ 12744961713Sgirish } 12844961713Sgirish 12944961713Sgirish /* IPP NPI function prototypes */ 13044961713Sgirish npi_status_t npi_ipp_get_pfifo_rd_ptr(npi_handle_t, uint8_t, 13144961713Sgirish uint16_t *); 13244961713Sgirish 13344961713Sgirish npi_status_t npi_ipp_get_pfifo_wr_ptr(npi_handle_t, uint8_t, 13444961713Sgirish uint16_t *); 13544961713Sgirish 13644961713Sgirish npi_status_t npi_ipp_write_pfifo(npi_handle_t, uint8_t, 13744961713Sgirish uint8_t, uint32_t, uint32_t, uint32_t, 13844961713Sgirish uint32_t, uint32_t); 13944961713Sgirish 14044961713Sgirish npi_status_t npi_ipp_read_pfifo(npi_handle_t, uint8_t, 14144961713Sgirish uint8_t, uint32_t *, uint32_t *, uint32_t *, 14244961713Sgirish uint32_t *, uint32_t *); 14344961713Sgirish 14444961713Sgirish npi_status_t npi_ipp_write_dfifo(npi_handle_t, uint8_t, 14544961713Sgirish uint16_t, uint32_t, uint32_t, uint32_t, 14644961713Sgirish uint32_t, uint32_t); 14744961713Sgirish 14844961713Sgirish npi_status_t npi_ipp_read_dfifo(npi_handle_t, uint8_t, 14944961713Sgirish uint16_t, uint32_t *, uint32_t *, uint32_t *, 15044961713Sgirish uint32_t *, uint32_t *); 15144961713Sgirish 15244961713Sgirish npi_status_t npi_ipp_reset(npi_handle_t, uint8_t); 15344961713Sgirish npi_status_t npi_ipp_config(npi_handle_t, config_op_t, uint8_t, 15444961713Sgirish ipp_config_t); 15544961713Sgirish npi_status_t npi_ipp_set_max_pktsize(npi_handle_t, uint8_t, 15644961713Sgirish uint32_t); 15744961713Sgirish npi_status_t npi_ipp_iconfig(npi_handle_t, config_op_t, uint8_t, 15844961713Sgirish ipp_iconfig_t); 15944961713Sgirish npi_status_t npi_ipp_get_status(npi_handle_t, uint8_t, 16044961713Sgirish ipp_status_t *); 16144961713Sgirish npi_status_t npi_ipp_counters(npi_handle_t, counter_op_t, 16244961713Sgirish ipp_counter_t, uint8_t, npi_counter_t *); 16344961713Sgirish npi_status_t npi_ipp_get_ecc_syndrome(npi_handle_t, uint8_t, 16444961713Sgirish uint16_t *); 16544961713Sgirish npi_status_t npi_ipp_get_dfifo_eopm_rdptr(npi_handle_t, uint8_t, 16644961713Sgirish uint16_t *); 16744961713Sgirish npi_status_t npi_ipp_get_state_mach(npi_handle_t, uint8_t, 16844961713Sgirish uint32_t *); 16944961713Sgirish npi_status_t npi_ipp_get_dfifo_rd_ptr(npi_handle_t, uint8_t, 17044961713Sgirish uint16_t *); 17144961713Sgirish npi_status_t npi_ipp_get_dfifo_wr_ptr(npi_handle_t, uint8_t, 17244961713Sgirish uint16_t *); 17344961713Sgirish npi_status_t npi_ipp_get_ecc_err_count(npi_handle_t, uint8_t, 17444961713Sgirish uint8_t *); 17544961713Sgirish npi_status_t npi_ipp_get_pkt_dis_count(npi_handle_t, uint8_t, 17644961713Sgirish uint16_t *); 17744961713Sgirish npi_status_t npi_ipp_get_cs_err_count(npi_handle_t, uint8_t, 17844961713Sgirish uint16_t *); 17944961713Sgirish npi_status_t npi_ipp_dump_regs(npi_handle_t, uint8_t); 18044961713Sgirish void npi_ipp_read_regs(npi_handle_t, uint8_t); 18144961713Sgirish 18244961713Sgirish #ifdef __cplusplus 18344961713Sgirish } 18444961713Sgirish #endif 18544961713Sgirish 18644961713Sgirish #endif /* _NPI_IPP_H */ 187