1ebb7c6fdSAlex Wilson /* 2ebb7c6fdSAlex Wilson * This file and its contents are supplied under the terms of the 3ebb7c6fdSAlex Wilson * Common Development and Distribution License ("CDDL"), version 1.0. 4ebb7c6fdSAlex Wilson * You may only use this file in accordance with the terms of version 5ebb7c6fdSAlex Wilson * 1.0 of the CDDL. 6ebb7c6fdSAlex Wilson * 7ebb7c6fdSAlex Wilson * A full copy of the text of the CDDL should have accompanied this 8ebb7c6fdSAlex Wilson * source. A copy of the CDDL is also available via the Internet at 9ebb7c6fdSAlex Wilson * http://www.illumos.org/license/CDDL. 10ebb7c6fdSAlex Wilson */ 11ebb7c6fdSAlex Wilson 12ebb7c6fdSAlex Wilson /* 13ebb7c6fdSAlex Wilson * Copyright 2020, The University of Queensland 14ebb7c6fdSAlex Wilson * Copyright (c) 2018, Joyent, Inc. 1522d05228SPaul Winder * Copyright 2020 RackTop Systems, Inc. 16*85e4aa97SDan McDonald * Copyright 2023 MNX Cloud, Inc. 17ebb7c6fdSAlex Wilson */ 18ebb7c6fdSAlex Wilson 19ebb7c6fdSAlex Wilson #ifndef _MLXCX_REG_H 20ebb7c6fdSAlex Wilson #define _MLXCX_REG_H 21ebb7c6fdSAlex Wilson 22ebb7c6fdSAlex Wilson #include <sys/types.h> 23ebb7c6fdSAlex Wilson #include <sys/byteorder.h> 24ebb7c6fdSAlex Wilson 25ebb7c6fdSAlex Wilson #include <mlxcx_endint.h> 26ebb7c6fdSAlex Wilson 27ebb7c6fdSAlex Wilson #if !defined(_BIT_FIELDS_HTOL) && !defined(_BIT_FIELDS_LTOH) 28ebb7c6fdSAlex Wilson #error "Need _BIT_FIELDS_HTOL or _BIT_FIELDS_LTOH" 29ebb7c6fdSAlex Wilson #endif 30ebb7c6fdSAlex Wilson 31ebb7c6fdSAlex Wilson /* 32ebb7c6fdSAlex Wilson * Register offsets. 33ebb7c6fdSAlex Wilson */ 34ebb7c6fdSAlex Wilson 35ebb7c6fdSAlex Wilson #define MLXCX_ISS_FIRMWARE 0x0000 36ebb7c6fdSAlex Wilson #define MLXCX_ISS_FW_MAJOR(x) (((x) & 0xffff)) 37ebb7c6fdSAlex Wilson #define MLXCX_ISS_FW_MINOR(x) (((x) >> 16) & 0xffff) 38ebb7c6fdSAlex Wilson #define MLXCX_ISS_FW_CMD 0x0004 39ebb7c6fdSAlex Wilson #define MLXCX_ISS_FW_REV(x) (((x) & 0xffff)) 40ebb7c6fdSAlex Wilson #define MLXCX_ISS_CMD_REV(x) (((x) >> 16) & 0xffff) 41ebb7c6fdSAlex Wilson #define MLXCX_ISS_CMD_HIGH 0x0010 42ebb7c6fdSAlex Wilson #define MLXCX_ISS_CMD_LOW 0x0014 43ebb7c6fdSAlex Wilson #define MLXCX_ISS_CMDQ_SIZE(x) (((x) >> 4) & 0xf) 44ebb7c6fdSAlex Wilson #define MLXCX_ISS_CMDQ_STRIDE(x) ((x) & 0xf) 45ebb7c6fdSAlex Wilson 46ebb7c6fdSAlex Wilson #define MLXCX_ISS_CMD_DOORBELL 0x0018 47ebb7c6fdSAlex Wilson #define MLXCX_ISS_INIT 0x01fc 48ebb7c6fdSAlex Wilson #define MLXCX_ISS_INITIALIZING(x) (((x) >> 31) & 0x1) 49ebb7c6fdSAlex Wilson #define MLXCX_ISS_HEALTH_BUF 0x0200 50ebb7c6fdSAlex Wilson #define MLXCX_ISS_NO_DRAM_NIC 0x0240 51ebb7c6fdSAlex Wilson #define MLXCX_ISS_TIMER 0x1000 52ebb7c6fdSAlex Wilson #define MLXCX_ISS_HEALTH_COUNT 0x1010 53ebb7c6fdSAlex Wilson #define MLXCX_ISS_HEALTH_SYND 0x1013 54ebb7c6fdSAlex Wilson 55ebb7c6fdSAlex Wilson #define MLXCX_CMD_INLINE_INPUT_LEN 16 56ebb7c6fdSAlex Wilson #define MLXCX_CMD_INLINE_OUTPUT_LEN 16 57ebb7c6fdSAlex Wilson 58ebb7c6fdSAlex Wilson #define MLXCX_CMD_MAILBOX_LEN 512 59ebb7c6fdSAlex Wilson 60ebb7c6fdSAlex Wilson #define MLXCX_CMD_TRANSPORT_PCI 7 61ebb7c6fdSAlex Wilson #define MLXCX_CMD_HW_OWNED 0x01 62ebb7c6fdSAlex Wilson #define MLXCX_CMD_STATUS(x) ((x) >> 1) 63ebb7c6fdSAlex Wilson 645f0e3176SPaul Winder /* 655f0e3176SPaul Winder * You can't have more commands pending, than bit size of a doorbell 665f0e3176SPaul Winder */ 675f0e3176SPaul Winder #define MLXCX_CMD_MAX (sizeof (uint32_t) * NBBY) 685f0e3176SPaul Winder 69ebb7c6fdSAlex Wilson #define MLXCX_UAR_CQ_ARM 0x0020 70ebb7c6fdSAlex Wilson #define MLXCX_UAR_EQ_ARM 0x0040 71ebb7c6fdSAlex Wilson #define MLXCX_UAR_EQ_NOARM 0x0048 72ebb7c6fdSAlex Wilson 73ebb7c6fdSAlex Wilson /* Number of blue flame reg pairs per UAR */ 74ebb7c6fdSAlex Wilson #define MLXCX_BF_PER_UAR 2 75ebb7c6fdSAlex Wilson #define MLXCX_BF_PER_UAR_MASK 0x1 76ebb7c6fdSAlex Wilson #define MLXCX_BF_SIZE 0x100 77ebb7c6fdSAlex Wilson #define MLXCX_BF_BASE 0x0800 78ebb7c6fdSAlex Wilson 79ebb7c6fdSAlex Wilson /* CSTYLED */ 80ebb7c6fdSAlex Wilson #define MLXCX_EQ_ARM_EQN (bitdef_t){24, 0xff000000} 81ebb7c6fdSAlex Wilson /* CSTYLED */ 82ebb7c6fdSAlex Wilson #define MLXCX_EQ_ARM_CI (bitdef_t){0, 0x00ffffff} 83ebb7c6fdSAlex Wilson 84ebb7c6fdSAlex Wilson /* 85ebb7c6fdSAlex Wilson * Hardware structure that is used to represent a command. 86ebb7c6fdSAlex Wilson */ 87ebb7c6fdSAlex Wilson #pragma pack(1) 88ebb7c6fdSAlex Wilson typedef struct { 89ebb7c6fdSAlex Wilson uint8_t mce_type; 90ebb7c6fdSAlex Wilson uint8_t mce_rsvd[3]; 91ebb7c6fdSAlex Wilson uint32be_t mce_in_length; 92ebb7c6fdSAlex Wilson uint64be_t mce_in_mbox; 93ebb7c6fdSAlex Wilson uint8_t mce_input[MLXCX_CMD_INLINE_INPUT_LEN]; 94ebb7c6fdSAlex Wilson uint8_t mce_output[MLXCX_CMD_INLINE_OUTPUT_LEN]; 95ebb7c6fdSAlex Wilson uint64be_t mce_out_mbox; 96ebb7c6fdSAlex Wilson uint32be_t mce_out_length; 97ebb7c6fdSAlex Wilson uint8_t mce_token; 98ebb7c6fdSAlex Wilson uint8_t mce_sig; 99ebb7c6fdSAlex Wilson uint8_t mce_rsvd1; 100ebb7c6fdSAlex Wilson uint8_t mce_status; 101ebb7c6fdSAlex Wilson } mlxcx_cmd_ent_t; 102ebb7c6fdSAlex Wilson 103ebb7c6fdSAlex Wilson typedef struct { 104ebb7c6fdSAlex Wilson uint8_t mlxb_data[MLXCX_CMD_MAILBOX_LEN]; 105ebb7c6fdSAlex Wilson uint8_t mlxb_rsvd[48]; 106ebb7c6fdSAlex Wilson uint64be_t mlxb_nextp; 107ebb7c6fdSAlex Wilson uint32be_t mlxb_blockno; 108ebb7c6fdSAlex Wilson uint8_t mlxb_rsvd1; 109ebb7c6fdSAlex Wilson uint8_t mlxb_token; 110ebb7c6fdSAlex Wilson uint8_t mlxb_ctrl_sig; 111ebb7c6fdSAlex Wilson uint8_t mlxb_sig; 112ebb7c6fdSAlex Wilson } mlxcx_cmd_mailbox_t; 113ebb7c6fdSAlex Wilson 114ebb7c6fdSAlex Wilson typedef struct { 115ebb7c6fdSAlex Wilson uint8_t mled_page_request_rsvd[2]; 116ebb7c6fdSAlex Wilson uint16be_t mled_page_request_function_id; 117ebb7c6fdSAlex Wilson uint32be_t mled_page_request_num_pages; 118ebb7c6fdSAlex Wilson } mlxcx_evdata_page_request_t; 119ebb7c6fdSAlex Wilson 120ebb7c6fdSAlex Wilson /* CSTYLED */ 121ebb7c6fdSAlex Wilson #define MLXCX_EVENT_PORT_NUM (bitdef_t){ .bit_shift = 4, .bit_mask = 0xF0 } 122ebb7c6fdSAlex Wilson 123ebb7c6fdSAlex Wilson typedef struct { 124ebb7c6fdSAlex Wilson uint8_t mled_port_state_rsvd[8]; 125ebb7c6fdSAlex Wilson bits8_t mled_port_state_port_num; 126ebb7c6fdSAlex Wilson } mlxcx_evdata_port_state_t; 127ebb7c6fdSAlex Wilson 128ebb7c6fdSAlex Wilson typedef enum { 129ebb7c6fdSAlex Wilson MLXCX_MODULE_INITIALIZING = 0x0, 130ebb7c6fdSAlex Wilson MLXCX_MODULE_PLUGGED = 0x1, 131ebb7c6fdSAlex Wilson MLXCX_MODULE_UNPLUGGED = 0x2, 132ebb7c6fdSAlex Wilson MLXCX_MODULE_ERROR = 0x3 133ebb7c6fdSAlex Wilson } mlxcx_module_status_t; 134ebb7c6fdSAlex Wilson 135ebb7c6fdSAlex Wilson typedef enum { 136ebb7c6fdSAlex Wilson MLXCX_MODULE_ERR_POWER_BUDGET = 0x0, 137ebb7c6fdSAlex Wilson MLXCX_MODULE_ERR_LONG_RANGE = 0x1, 138ebb7c6fdSAlex Wilson MLXCX_MODULE_ERR_BUS_STUCK = 0x2, 139ebb7c6fdSAlex Wilson MLXCX_MODULE_ERR_NO_EEPROM = 0x3, 140ebb7c6fdSAlex Wilson MLXCX_MODULE_ERR_ENFORCEMENT = 0x4, 141ebb7c6fdSAlex Wilson MLXCX_MODULE_ERR_UNKNOWN_IDENT = 0x5, 142ebb7c6fdSAlex Wilson MLXCX_MODULE_ERR_HIGH_TEMP = 0x6, 143ebb7c6fdSAlex Wilson MLXCX_MODULE_ERR_CABLE_SHORTED = 0x7, 144ebb7c6fdSAlex Wilson } mlxcx_module_error_type_t; 145ebb7c6fdSAlex Wilson 146ebb7c6fdSAlex Wilson typedef struct { 147ebb7c6fdSAlex Wilson uint8_t mled_port_mod_rsvd; 148ebb7c6fdSAlex Wilson uint8_t mled_port_mod_module; 149ebb7c6fdSAlex Wilson uint8_t mled_port_mod_rsvd2; 150ebb7c6fdSAlex Wilson uint8_t mled_port_mod_module_status; 151ebb7c6fdSAlex Wilson uint8_t mled_port_mod_rsvd3[2]; 152ebb7c6fdSAlex Wilson uint8_t mled_port_mod_error_type; 153ebb7c6fdSAlex Wilson uint8_t mled_port_mod_rsvd4; 154ebb7c6fdSAlex Wilson } mlxcx_evdata_port_mod_t; 155ebb7c6fdSAlex Wilson 156ebb7c6fdSAlex Wilson typedef struct { 157ebb7c6fdSAlex Wilson uint8_t mled_completion_rsvd[25]; 158ebb7c6fdSAlex Wilson uint24be_t mled_completion_cqn; 159ebb7c6fdSAlex Wilson } mlxcx_evdata_completion_t; 160ebb7c6fdSAlex Wilson 1615f0e3176SPaul Winder typedef struct { 1625f0e3176SPaul Winder uint32be_t mled_cmd_completion_vec; 1635f0e3176SPaul Winder uint8_t mled_cmd_completion_rsvd[24]; 1645f0e3176SPaul Winder } mlxcx_evdata_cmd_completion_t; 1655f0e3176SPaul Winder 166ebb7c6fdSAlex Wilson typedef enum { 167ebb7c6fdSAlex Wilson MLXCX_EV_QUEUE_TYPE_QP = 0x0, 168ebb7c6fdSAlex Wilson MLXCX_EV_QUEUE_TYPE_RQ = 0x1, 169ebb7c6fdSAlex Wilson MLXCX_EV_QUEUE_TYPE_SQ = 0x2, 170ebb7c6fdSAlex Wilson } mlxcx_evdata_queue_type_t; 171ebb7c6fdSAlex Wilson 172ebb7c6fdSAlex Wilson typedef struct { 173ebb7c6fdSAlex Wilson uint8_t mled_queue_rsvd[20]; 174ebb7c6fdSAlex Wilson uint8_t mled_queue_type; 175ebb7c6fdSAlex Wilson uint8_t mled_queue_rsvd2[4]; 176ebb7c6fdSAlex Wilson uint24be_t mled_queue_num; 177ebb7c6fdSAlex Wilson } mlxcx_evdata_queue_t; 178ebb7c6fdSAlex Wilson 179ebb7c6fdSAlex Wilson #define MLXCX_EQ_OWNER_INIT 1 180ebb7c6fdSAlex Wilson 181ebb7c6fdSAlex Wilson typedef struct { 182ebb7c6fdSAlex Wilson uint8_t mleqe_rsvd[1]; 183ebb7c6fdSAlex Wilson uint8_t mleqe_event_type; 184ebb7c6fdSAlex Wilson uint8_t mleqe_rsvd2[1]; 185ebb7c6fdSAlex Wilson uint8_t mleqe_event_sub_type; 186ebb7c6fdSAlex Wilson uint8_t mleqe_rsvd3[28]; 187ebb7c6fdSAlex Wilson union { 188ebb7c6fdSAlex Wilson uint8_t mleqe_unknown_data[28]; 1895f0e3176SPaul Winder mlxcx_evdata_cmd_completion_t mleqe_cmd_completion; 190ebb7c6fdSAlex Wilson mlxcx_evdata_completion_t mleqe_completion; 191ebb7c6fdSAlex Wilson mlxcx_evdata_page_request_t mleqe_page_request; 192ebb7c6fdSAlex Wilson mlxcx_evdata_port_state_t mleqe_port_state; 193ebb7c6fdSAlex Wilson mlxcx_evdata_port_mod_t mleqe_port_mod; 194ebb7c6fdSAlex Wilson mlxcx_evdata_queue_t mleqe_queue; 195ebb7c6fdSAlex Wilson }; 196ebb7c6fdSAlex Wilson uint8_t mleqe_rsvd4[2]; 197ebb7c6fdSAlex Wilson uint8_t mleqe_signature; 198ebb7c6fdSAlex Wilson uint8_t mleqe_owner; 199ebb7c6fdSAlex Wilson } mlxcx_eventq_ent_t; 200ebb7c6fdSAlex Wilson 201ebb7c6fdSAlex Wilson typedef enum { 202ebb7c6fdSAlex Wilson MLXCX_CQE_L3_HDR_NONE = 0x0, 203ebb7c6fdSAlex Wilson MLXCX_CQE_L3_HDR_RCV_BUF = 0x1, 204ebb7c6fdSAlex Wilson MLXCX_CQE_L3_HDR_CQE = 0x2, 205ebb7c6fdSAlex Wilson } mlxcx_cqe_l3_hdr_placement_t; 206ebb7c6fdSAlex Wilson 207ebb7c6fdSAlex Wilson typedef enum { 208ebb7c6fdSAlex Wilson MLXCX_CQE_CSFLAGS_L4_OK = 1 << 2, 209ebb7c6fdSAlex Wilson MLXCX_CQE_CSFLAGS_L3_OK = 1 << 1, 210ebb7c6fdSAlex Wilson MLXCX_CQE_CSFLAGS_L2_OK = 1 << 0, 211ebb7c6fdSAlex Wilson } mlxcx_cqe_csflags_t; 212ebb7c6fdSAlex Wilson 213ebb7c6fdSAlex Wilson typedef enum { 214ebb7c6fdSAlex Wilson MLXCX_CQE_L4_TYPE_NONE = 0, 215ebb7c6fdSAlex Wilson MLXCX_CQE_L4_TYPE_TCP = 1, 216ebb7c6fdSAlex Wilson MLXCX_CQE_L4_TYPE_UDP = 2, 217ebb7c6fdSAlex Wilson MLXCX_CQE_L4_TYPE_TCP_EMPTY_ACK = 3, 218ebb7c6fdSAlex Wilson MLXCX_CQE_L4_TYPE_TCP_ACK = 4, 219ebb7c6fdSAlex Wilson } mlxcx_cqe_l4_hdr_type_t; 220ebb7c6fdSAlex Wilson 221ebb7c6fdSAlex Wilson typedef enum { 222ebb7c6fdSAlex Wilson MLXCX_CQE_L3_TYPE_NONE = 0, 223ebb7c6fdSAlex Wilson MLXCX_CQE_L3_TYPE_IPv6 = 1, 224ebb7c6fdSAlex Wilson MLXCX_CQE_L3_TYPE_IPv4 = 2, 225ebb7c6fdSAlex Wilson } mlxcx_cqe_l3_hdr_type_t; 226ebb7c6fdSAlex Wilson 227ebb7c6fdSAlex Wilson typedef enum { 228ebb7c6fdSAlex Wilson MLXCX_CQE_RX_HASH_NONE = 0, 229ebb7c6fdSAlex Wilson MLXCX_CQE_RX_HASH_IPv4 = 1, 230ebb7c6fdSAlex Wilson MLXCX_CQE_RX_HASH_IPv6 = 2, 231ebb7c6fdSAlex Wilson MLXCX_CQE_RX_HASH_IPSEC_SPI = 3, 232ebb7c6fdSAlex Wilson } mlxcx_cqe_rx_hash_type_t; 233ebb7c6fdSAlex Wilson /* BEGIN CSTYLED */ 234ebb7c6fdSAlex Wilson #define MLXCX_CQE_RX_HASH_IP_SRC (bitdef_t){0, 0x3} 235ebb7c6fdSAlex Wilson #define MLXCX_CQE_RX_HASH_IP_DEST (bitdef_t){2, (0x3 << 2)} 236ebb7c6fdSAlex Wilson #define MLXCX_CQE_RX_HASH_L4_SRC (bitdef_t){4, (0x3 << 4)} 237ebb7c6fdSAlex Wilson #define MLXCX_CQE_RX_HASH_L4_DEST (bitdef_t){6, (0x3 << 6)} 238ebb7c6fdSAlex Wilson /* END CSTYLED */ 239ebb7c6fdSAlex Wilson 240ebb7c6fdSAlex Wilson typedef enum { 241ebb7c6fdSAlex Wilson MLXCX_CQE_OP_REQ = 0x0, 242ebb7c6fdSAlex Wilson MLXCX_CQE_OP_RESP_RDMA = 0x1, 243ebb7c6fdSAlex Wilson MLXCX_CQE_OP_RESP = 0x2, 244ebb7c6fdSAlex Wilson MLXCX_CQE_OP_RESP_IMMEDIATE = 0x3, 245ebb7c6fdSAlex Wilson MLXCX_CQE_OP_RESP_INVALIDATE = 0x4, 246ebb7c6fdSAlex Wilson MLXCX_CQE_OP_RESIZE_CQ = 0x5, 247ebb7c6fdSAlex Wilson MLXCX_CQE_OP_SIG_ERR = 0x12, 248ebb7c6fdSAlex Wilson MLXCX_CQE_OP_REQ_ERR = 0xd, 249ebb7c6fdSAlex Wilson MLXCX_CQE_OP_RESP_ERR = 0xe, 250ebb7c6fdSAlex Wilson MLXCX_CQE_OP_INVALID = 0xf 251ebb7c6fdSAlex Wilson } mlxcx_cqe_opcode_t; 252ebb7c6fdSAlex Wilson 253ebb7c6fdSAlex Wilson typedef enum { 254ebb7c6fdSAlex Wilson MLXCX_CQE_FORMAT_BASIC = 0, 255ebb7c6fdSAlex Wilson MLXCX_CQE_FORMAT_INLINE_32 = 1, 256ebb7c6fdSAlex Wilson MLXCX_CQE_FORMAT_INLINE_64 = 2, 257ebb7c6fdSAlex Wilson MLXCX_CQE_FORMAT_COMPRESSED = 3, 258ebb7c6fdSAlex Wilson } mlxcx_cqe_format_t; 259ebb7c6fdSAlex Wilson 260ebb7c6fdSAlex Wilson typedef enum { 261ebb7c6fdSAlex Wilson MLXCX_CQE_OWNER_INIT = 1 262ebb7c6fdSAlex Wilson } mlxcx_cqe_owner_t; 263ebb7c6fdSAlex Wilson 264ebb7c6fdSAlex Wilson typedef enum { 265ebb7c6fdSAlex Wilson MLXCX_VLAN_TYPE_NONE, 266ebb7c6fdSAlex Wilson MLXCX_VLAN_TYPE_CVLAN, 267ebb7c6fdSAlex Wilson MLXCX_VLAN_TYPE_SVLAN, 268ebb7c6fdSAlex Wilson } mlxcx_vlan_type_t; 269ebb7c6fdSAlex Wilson 270ebb7c6fdSAlex Wilson typedef enum { 271ebb7c6fdSAlex Wilson MLXCX_CQ_ERR_LOCAL_LENGTH = 0x1, 272ebb7c6fdSAlex Wilson MLXCX_CQ_ERR_LOCAL_QP_OP = 0x2, 273ebb7c6fdSAlex Wilson MLXCX_CQ_ERR_LOCAL_PROTECTION = 0x4, 274ebb7c6fdSAlex Wilson MLXCX_CQ_ERR_WR_FLUSHED = 0x5, 275ebb7c6fdSAlex Wilson MLXCX_CQ_ERR_MEM_WINDOW_BIND = 0x6, 276ebb7c6fdSAlex Wilson MLXCX_CQ_ERR_BAD_RESPONSE = 0x10, 277ebb7c6fdSAlex Wilson MLXCX_CQ_ERR_LOCAL_ACCESS = 0x11, 278ebb7c6fdSAlex Wilson MLXCX_CQ_ERR_XPORT_RETRY_CTR = 0x15, 279ebb7c6fdSAlex Wilson MLXCX_CQ_ERR_RNR_RETRY_CTR = 0x16, 280ebb7c6fdSAlex Wilson MLXCX_CQ_ERR_ABORTED = 0x22 281ebb7c6fdSAlex Wilson } mlxcx_cq_error_syndrome_t; 282ebb7c6fdSAlex Wilson 283ebb7c6fdSAlex Wilson typedef struct { 284ebb7c6fdSAlex Wilson uint8_t mlcqee_rsvd[2]; 285ebb7c6fdSAlex Wilson uint16be_t mlcqee_wqe_id; 286ebb7c6fdSAlex Wilson uint8_t mlcqee_rsvd2[29]; 287ebb7c6fdSAlex Wilson uint24be_t mlcqee_user_index; 288ebb7c6fdSAlex Wilson uint8_t mlcqee_rsvd3[8]; 289ebb7c6fdSAlex Wilson uint32be_t mlcqee_byte_cnt; 290ebb7c6fdSAlex Wilson uint8_t mlcqee_rsvd4[6]; 291ebb7c6fdSAlex Wilson uint8_t mlcqee_vendor_error_syndrome; 292ebb7c6fdSAlex Wilson uint8_t mlcqee_syndrome; 293ebb7c6fdSAlex Wilson uint8_t mlcqee_wqe_opcode; 294ebb7c6fdSAlex Wilson uint24be_t mlcqee_flow_tag; 295ebb7c6fdSAlex Wilson uint16be_t mlcqee_wqe_counter; 296ebb7c6fdSAlex Wilson uint8_t mlcqee_signature; 297ebb7c6fdSAlex Wilson struct { 298ebb7c6fdSAlex Wilson #if defined(_BIT_FIELDS_HTOL) 299ebb7c6fdSAlex Wilson uint8_t mlcqe_opcode:4; 300ebb7c6fdSAlex Wilson uint8_t mlcqe_rsvd5:3; 301ebb7c6fdSAlex Wilson uint8_t mlcqe_owner:1; 302ebb7c6fdSAlex Wilson #elif defined(_BIT_FIELDS_LTOH) 303ebb7c6fdSAlex Wilson uint8_t mlcqe_owner:1; 304ebb7c6fdSAlex Wilson uint8_t mlcqe_rsvd5:3; 305ebb7c6fdSAlex Wilson uint8_t mlcqe_opcode:4; 306ebb7c6fdSAlex Wilson #endif 307ebb7c6fdSAlex Wilson }; 308ebb7c6fdSAlex Wilson } mlxcx_completionq_error_ent_t; 309ebb7c6fdSAlex Wilson 310ebb7c6fdSAlex Wilson typedef struct { 311ebb7c6fdSAlex Wilson uint8_t mlcqe_tunnel_flags; 312ebb7c6fdSAlex Wilson uint8_t mlcqe_rsvd[3]; 313ebb7c6fdSAlex Wilson uint8_t mlcqe_lro_flags; 314ebb7c6fdSAlex Wilson uint8_t mlcqe_lro_min_ttl; 315ebb7c6fdSAlex Wilson uint16be_t mlcqe_lro_tcp_win; 316ebb7c6fdSAlex Wilson uint32be_t mlcqe_lro_ack_seq_num; 317ebb7c6fdSAlex Wilson uint32be_t mlcqe_rx_hash_result; 318ebb7c6fdSAlex Wilson bits8_t mlcqe_rx_hash_type; 319ebb7c6fdSAlex Wilson uint8_t mlcqe_ml_path; 320ebb7c6fdSAlex Wilson uint8_t mlcqe_rsvd2[2]; 321ebb7c6fdSAlex Wilson uint16be_t mlcqe_checksum; 322ebb7c6fdSAlex Wilson uint16be_t mlcqe_slid_smac_lo; 323ebb7c6fdSAlex Wilson struct { 324ebb7c6fdSAlex Wilson #if defined(_BIT_FIELDS_HTOL) 325ebb7c6fdSAlex Wilson uint8_t mlcqe_rsvd3:1; 326ebb7c6fdSAlex Wilson uint8_t mlcqe_force_loopback:1; 327ebb7c6fdSAlex Wilson uint8_t mlcqe_l3_hdr:2; 328ebb7c6fdSAlex Wilson uint8_t mlcqe_sl_roce_pktype:4; 329ebb7c6fdSAlex Wilson #elif defined(_BIT_FIELDS_LTOH) 330ebb7c6fdSAlex Wilson uint8_t mlcqe_sl_roce_pktype:4; 331ebb7c6fdSAlex Wilson uint8_t mlcqe_l3_hdr:2; 332ebb7c6fdSAlex Wilson uint8_t mlcqe_force_loopback:1; 333ebb7c6fdSAlex Wilson uint8_t mlcqe_rsvd3:1; 334ebb7c6fdSAlex Wilson #endif 335ebb7c6fdSAlex Wilson }; 336ebb7c6fdSAlex Wilson uint24be_t mlcqe_rqpn; 337ebb7c6fdSAlex Wilson bits8_t mlcqe_csflags; 338ebb7c6fdSAlex Wilson struct { 339ebb7c6fdSAlex Wilson #if defined(_BIT_FIELDS_HTOL) 340ebb7c6fdSAlex Wilson uint8_t mlcqe_ip_frag:1; 341ebb7c6fdSAlex Wilson uint8_t mlcqe_l4_hdr_type:3; 342ebb7c6fdSAlex Wilson uint8_t mlcqe_l3_hdr_type:2; 343ebb7c6fdSAlex Wilson uint8_t mlcqe_ip_ext_opts:1; 344ebb7c6fdSAlex Wilson uint8_t mlcqe_cv:1; 345ebb7c6fdSAlex Wilson #elif defined(_BIT_FIELDS_LTOH) 346ebb7c6fdSAlex Wilson uint8_t mlcqe_cv:1; 347ebb7c6fdSAlex Wilson uint8_t mlcqe_ip_ext_opts:1; 348ebb7c6fdSAlex Wilson uint8_t mlcqe_l3_hdr_type:2; 349ebb7c6fdSAlex Wilson uint8_t mlcqe_l4_hdr_type:3; 350ebb7c6fdSAlex Wilson uint8_t mlcqe_ip_frag:1; 351ebb7c6fdSAlex Wilson #endif 352ebb7c6fdSAlex Wilson }; 353ebb7c6fdSAlex Wilson uint16be_t mlcqe_up_cfi_vid; 354ebb7c6fdSAlex Wilson uint8_t mlcqe_lro_num_seg; 355ebb7c6fdSAlex Wilson uint24be_t mlcqe_user_index; 356ebb7c6fdSAlex Wilson uint32be_t mlcqe_immediate; 357ebb7c6fdSAlex Wilson uint8_t mlcqe_rsvd4[4]; 358ebb7c6fdSAlex Wilson uint32be_t mlcqe_byte_cnt; 359ebb7c6fdSAlex Wilson union { 360ebb7c6fdSAlex Wilson struct { 361ebb7c6fdSAlex Wilson uint32be_t mlcqe_lro_timestamp_value; 362ebb7c6fdSAlex Wilson uint32be_t mlcqe_lro_timestamp_echo; 363ebb7c6fdSAlex Wilson }; 364ebb7c6fdSAlex Wilson uint64be_t mlcqe_timestamp; 365ebb7c6fdSAlex Wilson }; 366ebb7c6fdSAlex Wilson union { 367ebb7c6fdSAlex Wilson uint8_t mlcqe_rx_drop_counter; 368ebb7c6fdSAlex Wilson uint8_t mlcqe_send_wqe_opcode; 369ebb7c6fdSAlex Wilson }; 370ebb7c6fdSAlex Wilson uint24be_t mlcqe_flow_tag; 371ebb7c6fdSAlex Wilson uint16be_t mlcqe_wqe_counter; 372ebb7c6fdSAlex Wilson uint8_t mlcqe_signature; 373ebb7c6fdSAlex Wilson struct { 374ebb7c6fdSAlex Wilson #if defined(_BIT_FIELDS_HTOL) 375ebb7c6fdSAlex Wilson uint8_t mlcqe_opcode:4; 376ebb7c6fdSAlex Wilson uint8_t mlcqe_format:2; 377ebb7c6fdSAlex Wilson uint8_t mlcqe_se:1; 378ebb7c6fdSAlex Wilson uint8_t mlcqe_owner:1; 379ebb7c6fdSAlex Wilson #elif defined(_BIT_FIELDS_LTOH) 380ebb7c6fdSAlex Wilson uint8_t mlcqe_owner:1; 381ebb7c6fdSAlex Wilson uint8_t mlcqe_se:1; 382ebb7c6fdSAlex Wilson uint8_t mlcqe_format:2; 383ebb7c6fdSAlex Wilson uint8_t mlcqe_opcode:4; 384ebb7c6fdSAlex Wilson #endif 385ebb7c6fdSAlex Wilson }; 386ebb7c6fdSAlex Wilson } mlxcx_completionq_ent_t; 387ebb7c6fdSAlex Wilson 388ebb7c6fdSAlex Wilson typedef struct { 389ebb7c6fdSAlex Wilson uint8_t mlcqe_data[64]; 390ebb7c6fdSAlex Wilson mlxcx_completionq_ent_t mlcqe_ent; 391ebb7c6fdSAlex Wilson } mlxcx_completionq_ent128_t; 392ebb7c6fdSAlex Wilson 393ebb7c6fdSAlex Wilson typedef enum { 394ebb7c6fdSAlex Wilson MLXCX_WQE_OP_NOP = 0x00, 395ebb7c6fdSAlex Wilson MLXCX_WQE_OP_SEND_INVALIDATE = 0x01, 396ebb7c6fdSAlex Wilson MLXCX_WQE_OP_RDMA_W = 0x08, 397ebb7c6fdSAlex Wilson MLXCX_WQE_OP_RDMA_W_IMMEDIATE = 0x09, 398ebb7c6fdSAlex Wilson MLXCX_WQE_OP_SEND = 0x0A, 399ebb7c6fdSAlex Wilson MLXCX_WQE_OP_SEND_IMMEDIATE = 0x0B, 400ebb7c6fdSAlex Wilson MLXCX_WQE_OP_LSO = 0x0E, 401ebb7c6fdSAlex Wilson MLXCX_WQE_OP_WAIT = 0x0F, 402ebb7c6fdSAlex Wilson MLXCX_WQE_OP_RDMA_R = 0x10, 403ebb7c6fdSAlex Wilson } mlxcx_wqe_opcode_t; 404ebb7c6fdSAlex Wilson 40582b4190eSPaul Winder #define MLXCX_WQE_OCTOWORD 16 406ebb7c6fdSAlex Wilson #define MLXCX_SQE_MAX_DS ((1 << 6) - 1) 40782b4190eSPaul Winder /* 40882b4190eSPaul Winder * Calculate the max number of address pointers in a single ethernet 40982b4190eSPaul Winder * send message. This is the remainder from MLXCX_SQE_MAX_DS 41082b4190eSPaul Winder * after accounting for the Control and Ethernet segements. 41182b4190eSPaul Winder */ 41282b4190eSPaul Winder #define MLXCX_SQE_MAX_PTRS (MLXCX_SQE_MAX_DS - \ 41382b4190eSPaul Winder (sizeof (mlxcx_wqe_eth_seg_t) + sizeof (mlxcx_wqe_control_seg_t)) / \ 41482b4190eSPaul Winder MLXCX_WQE_OCTOWORD) 415ebb7c6fdSAlex Wilson 416ebb7c6fdSAlex Wilson typedef enum { 417ebb7c6fdSAlex Wilson MLXCX_SQE_FENCE_NONE = 0x0, 418ebb7c6fdSAlex Wilson MLXCX_SQE_FENCE_WAIT_OTHERS = 0x1, 419ebb7c6fdSAlex Wilson MLXCX_SQE_FENCE_START = 0x2, 420ebb7c6fdSAlex Wilson MLXCX_SQE_FENCE_STRONG_ORDER = 0x3, 421ebb7c6fdSAlex Wilson MLXCX_SQE_FENCE_START_WAIT = 0x4 422ebb7c6fdSAlex Wilson } mlxcx_sqe_fence_mode_t; 423ebb7c6fdSAlex Wilson 424ebb7c6fdSAlex Wilson typedef enum { 425ebb7c6fdSAlex Wilson MLXCX_SQE_CQE_ON_EACH_ERROR = 0x0, 426ebb7c6fdSAlex Wilson MLXCX_SQE_CQE_ON_FIRST_ERROR = 0x1, 427ebb7c6fdSAlex Wilson MLXCX_SQE_CQE_ALWAYS = 0x2, 428ebb7c6fdSAlex Wilson MLXCX_SQE_CQE_ALWAYS_PLUS_EQE = 0x3 429ebb7c6fdSAlex Wilson } mlxcx_sqe_completion_mode_t; 430ebb7c6fdSAlex Wilson 431ebb7c6fdSAlex Wilson #define MLXCX_SQE_SOLICITED (1 << 1) 432ebb7c6fdSAlex Wilson /* CSTYLED */ 433ebb7c6fdSAlex Wilson #define MLXCX_SQE_FENCE_MODE (bitdef_t){5, 0xe0} 434ebb7c6fdSAlex Wilson /* CSTYLED */ 435ebb7c6fdSAlex Wilson #define MLXCX_SQE_COMPLETION_MODE (bitdef_t){2, 0x0c} 436ebb7c6fdSAlex Wilson 437ebb7c6fdSAlex Wilson typedef struct { 438ebb7c6fdSAlex Wilson uint8_t mlcs_opcode_mod; 439ebb7c6fdSAlex Wilson uint16be_t mlcs_wqe_index; 440ebb7c6fdSAlex Wilson uint8_t mlcs_opcode; 441ebb7c6fdSAlex Wilson uint24be_t mlcs_qp_or_sq; 442ebb7c6fdSAlex Wilson uint8_t mlcs_ds; 443ebb7c6fdSAlex Wilson uint8_t mlcs_signature; 444ebb7c6fdSAlex Wilson uint8_t mlcs_rsvd2[2]; 445ebb7c6fdSAlex Wilson bits8_t mlcs_flags; 446ebb7c6fdSAlex Wilson uint32be_t mlcs_immediate; 447ebb7c6fdSAlex Wilson } mlxcx_wqe_control_seg_t; 448ebb7c6fdSAlex Wilson 449ebb7c6fdSAlex Wilson typedef enum { 450ebb7c6fdSAlex Wilson MLXCX_SQE_ETH_CSFLAG_L4_CHECKSUM = 1 << 7, 451ebb7c6fdSAlex Wilson MLXCX_SQE_ETH_CSFLAG_L3_CHECKSUM = 1 << 6, 452ebb7c6fdSAlex Wilson MLXCX_SQE_ETH_CSFLAG_L4_INNER_CHECKSUM = 1 << 5, 453ebb7c6fdSAlex Wilson MLXCX_SQE_ETH_CSFLAG_L3_INNER_CHECKSUM = 1 << 4, 454ebb7c6fdSAlex Wilson } mlxcx_wqe_eth_flags_t; 455ebb7c6fdSAlex Wilson 456ebb7c6fdSAlex Wilson /* CSTYLED */ 457ebb7c6fdSAlex Wilson #define MLXCX_SQE_ETH_INLINE_HDR_SZ (bitdef_t){0, 0x03ff} 458ebb7c6fdSAlex Wilson #define MLXCX_SQE_ETH_SZFLAG_VLAN (1 << 15) 459ebb7c6fdSAlex Wilson #define MLXCX_MAX_INLINE_HEADERLEN 64 460ebb7c6fdSAlex Wilson 461ebb7c6fdSAlex Wilson typedef struct { 462ebb7c6fdSAlex Wilson uint8_t mles_rsvd[4]; 463ebb7c6fdSAlex Wilson bits8_t mles_csflags; 464ebb7c6fdSAlex Wilson uint8_t mles_rsvd2[1]; 465ebb7c6fdSAlex Wilson uint16_t mles_mss; 466ebb7c6fdSAlex Wilson uint8_t mles_rsvd3[4]; 467ebb7c6fdSAlex Wilson bits16_t mles_szflags; 468ebb7c6fdSAlex Wilson uint8_t mles_inline_headers[18]; 469ebb7c6fdSAlex Wilson } mlxcx_wqe_eth_seg_t; 470ebb7c6fdSAlex Wilson 471ebb7c6fdSAlex Wilson typedef struct { 472ebb7c6fdSAlex Wilson uint32be_t mlds_byte_count; 473ebb7c6fdSAlex Wilson uint32be_t mlds_lkey; 474ebb7c6fdSAlex Wilson uint64be_t mlds_address; 475ebb7c6fdSAlex Wilson } mlxcx_wqe_data_seg_t; 476ebb7c6fdSAlex Wilson 477ebb7c6fdSAlex Wilson #define MLXCX_SENDQ_STRIDE_SHIFT 6 478ebb7c6fdSAlex Wilson 479ebb7c6fdSAlex Wilson typedef struct { 480ebb7c6fdSAlex Wilson mlxcx_wqe_control_seg_t mlsqe_control; 481ebb7c6fdSAlex Wilson mlxcx_wqe_eth_seg_t mlsqe_eth; 482ebb7c6fdSAlex Wilson mlxcx_wqe_data_seg_t mlsqe_data[1]; 483ebb7c6fdSAlex Wilson } mlxcx_sendq_ent_t; 484ebb7c6fdSAlex Wilson 485ebb7c6fdSAlex Wilson typedef struct { 486ebb7c6fdSAlex Wilson uint64be_t mlsqbf_qwords[8]; 487ebb7c6fdSAlex Wilson } mlxcx_sendq_bf_t; 488ebb7c6fdSAlex Wilson 489ebb7c6fdSAlex Wilson typedef struct { 490ebb7c6fdSAlex Wilson mlxcx_wqe_data_seg_t mlsqe_data[4]; 491ebb7c6fdSAlex Wilson } mlxcx_sendq_extra_ent_t; 492ebb7c6fdSAlex Wilson 493ebb7c6fdSAlex Wilson #define MLXCX_RECVQ_STRIDE_SHIFT 7 494ebb7c6fdSAlex Wilson /* 495ebb7c6fdSAlex Wilson * Each mlxcx_wqe_data_seg_t is 1<<4 bytes long (there's a CTASSERT to verify 496ebb7c6fdSAlex Wilson * this in mlxcx_cmd.c), so the number of pointers is 1 << (shift - 4). 497ebb7c6fdSAlex Wilson */ 498ebb7c6fdSAlex Wilson #define MLXCX_RECVQ_MAX_PTRS (1 << (MLXCX_RECVQ_STRIDE_SHIFT - 4)) 499ebb7c6fdSAlex Wilson typedef struct { 500ebb7c6fdSAlex Wilson mlxcx_wqe_data_seg_t mlrqe_data[MLXCX_RECVQ_MAX_PTRS]; 501ebb7c6fdSAlex Wilson } mlxcx_recvq_ent_t; 502ebb7c6fdSAlex Wilson 503ebb7c6fdSAlex Wilson /* CSTYLED */ 504ebb7c6fdSAlex Wilson #define MLXCX_CQ_ARM_CI (bitdef_t){ .bit_shift = 0, \ 505ebb7c6fdSAlex Wilson .bit_mask = 0x00ffffff } 506ebb7c6fdSAlex Wilson /* CSTYLED */ 507ebb7c6fdSAlex Wilson #define MLXCX_CQ_ARM_SEQ (bitdef_t){ .bit_shift = 28, \ 508ebb7c6fdSAlex Wilson .bit_mask = 0x30000000 } 509ebb7c6fdSAlex Wilson #define MLXCX_CQ_ARM_SOLICITED (1 << 24) 510ebb7c6fdSAlex Wilson 511ebb7c6fdSAlex Wilson typedef struct { 512ebb7c6fdSAlex Wilson uint8_t mlcqd_rsvd; 513ebb7c6fdSAlex Wilson uint24be_t mlcqd_update_ci; 514ebb7c6fdSAlex Wilson bits32_t mlcqd_arm_ci; 515ebb7c6fdSAlex Wilson } mlxcx_completionq_doorbell_t; 516ebb7c6fdSAlex Wilson 517ebb7c6fdSAlex Wilson typedef struct { 518ebb7c6fdSAlex Wilson uint16be_t mlwqd_rsvd; 519ebb7c6fdSAlex Wilson uint16be_t mlwqd_recv_counter; 520ebb7c6fdSAlex Wilson uint16be_t mlwqd_rsvd2; 521ebb7c6fdSAlex Wilson uint16be_t mlwqd_send_counter; 522ebb7c6fdSAlex Wilson } mlxcx_workq_doorbell_t; 523ebb7c6fdSAlex Wilson 524ebb7c6fdSAlex Wilson #define MLXCX_EQ_STATUS_OK (0x0 << 4) 525ebb7c6fdSAlex Wilson #define MLXCX_EQ_STATUS_WRITE_FAILURE (0xA << 4) 526ebb7c6fdSAlex Wilson 527ebb7c6fdSAlex Wilson #define MLXCX_EQ_OI (1 << 1) 528ebb7c6fdSAlex Wilson #define MLXCX_EQ_EC (1 << 2) 529ebb7c6fdSAlex Wilson 530ebb7c6fdSAlex Wilson #define MLXCX_EQ_ST_ARMED 0x9 531ebb7c6fdSAlex Wilson #define MLXCX_EQ_ST_FIRED 0xA 532ebb7c6fdSAlex Wilson 533ebb7c6fdSAlex Wilson /* CSTYLED */ 534ebb7c6fdSAlex Wilson #define MLXCX_EQ_LOG_PAGE_SIZE (bitdef_t){ .bit_shift = 24, \ 535ebb7c6fdSAlex Wilson .bit_mask = 0x1F000000 } 536ebb7c6fdSAlex Wilson 537ebb7c6fdSAlex Wilson typedef struct { 538ebb7c6fdSAlex Wilson uint8_t mleqc_status; 539ebb7c6fdSAlex Wilson uint8_t mleqc_ecoi; 540ebb7c6fdSAlex Wilson uint8_t mleqc_state; 541ebb7c6fdSAlex Wilson uint8_t mleqc_rsvd[7]; 542ebb7c6fdSAlex Wilson uint16be_t mleqc_page_offset; 543ebb7c6fdSAlex Wilson uint8_t mleqc_log_eq_size; 544ebb7c6fdSAlex Wilson uint24be_t mleqc_uar_page; 545ebb7c6fdSAlex Wilson uint8_t mleqc_rsvd3[7]; 546ebb7c6fdSAlex Wilson uint8_t mleqc_intr; 547ebb7c6fdSAlex Wilson uint32be_t mleqc_log_page; 548ebb7c6fdSAlex Wilson uint8_t mleqc_rsvd4[13]; 549ebb7c6fdSAlex Wilson uint24be_t mleqc_consumer_counter; 550ebb7c6fdSAlex Wilson uint8_t mleqc_rsvd5; 551ebb7c6fdSAlex Wilson uint24be_t mleqc_producer_counter; 552ebb7c6fdSAlex Wilson uint8_t mleqc_rsvd6[16]; 553ebb7c6fdSAlex Wilson } mlxcx_eventq_ctx_t; 554ebb7c6fdSAlex Wilson 555ebb7c6fdSAlex Wilson typedef enum { 556ebb7c6fdSAlex Wilson MLXCX_CQC_CQE_SIZE_64 = 0x0, 557ebb7c6fdSAlex Wilson MLXCX_CQC_CQE_SIZE_128 = 0x1, 558ebb7c6fdSAlex Wilson } mlxcx_cqc_cqe_sz_t; 559ebb7c6fdSAlex Wilson 560ebb7c6fdSAlex Wilson typedef enum { 561ebb7c6fdSAlex Wilson MLXCX_CQC_STATUS_OK = 0x0, 562ebb7c6fdSAlex Wilson MLXCX_CQC_STATUS_OVERFLOW = 0x9, 563ebb7c6fdSAlex Wilson MLXCX_CQC_STATUS_WRITE_FAIL = 0xA, 564ebb7c6fdSAlex Wilson MLXCX_CQC_STATUS_INVALID = 0xF 565ebb7c6fdSAlex Wilson } mlxcx_cqc_status_t; 566ebb7c6fdSAlex Wilson 567ebb7c6fdSAlex Wilson typedef enum { 568ebb7c6fdSAlex Wilson MLXCX_CQC_STATE_ARMED_SOLICITED = 0x6, 569ebb7c6fdSAlex Wilson MLXCX_CQC_STATE_ARMED = 0x9, 570ebb7c6fdSAlex Wilson MLXCX_CQC_STATE_FIRED = 0xA 571ebb7c6fdSAlex Wilson } mlxcx_cqc_state_t; 572ebb7c6fdSAlex Wilson 573ebb7c6fdSAlex Wilson /* CSTYLED */ 574ebb7c6fdSAlex Wilson #define MLXCX_CQ_CTX_STATUS (bitdef_t){28, 0xf0000000} 575ebb7c6fdSAlex Wilson /* CSTYLED */ 576ebb7c6fdSAlex Wilson #define MLXCX_CQ_CTX_CQE_SZ (bitdef_t){21, 0x00e00000} 577ebb7c6fdSAlex Wilson /* CSTYLED */ 578ebb7c6fdSAlex Wilson #define MLXCX_CQ_CTX_PERIOD_MODE (bitdef_t){15, 0x00018000} 579ebb7c6fdSAlex Wilson /* CSTYLED */ 580ebb7c6fdSAlex Wilson #define MLXCX_CQ_CTX_MINI_CQE_FORMAT (bitdef_t){12, 0x00003000} 581ebb7c6fdSAlex Wilson /* CSTYLED */ 582ebb7c6fdSAlex Wilson #define MLXCX_CQ_CTX_STATE (bitdef_t){8, 0x00000f00} 583ebb7c6fdSAlex Wilson 584ebb7c6fdSAlex Wilson typedef struct mlxcx_completionq_ctx { 585ebb7c6fdSAlex Wilson bits32_t mlcqc_flags; 586ebb7c6fdSAlex Wilson 587ebb7c6fdSAlex Wilson uint8_t mlcqc_rsvd4[4]; 588ebb7c6fdSAlex Wilson 589ebb7c6fdSAlex Wilson uint8_t mlcqc_rsvd5[2]; 590ebb7c6fdSAlex Wilson uint16be_t mlcqc_page_offset; 591ebb7c6fdSAlex Wilson 592ebb7c6fdSAlex Wilson uint8_t mlcqc_log_cq_size; 593ebb7c6fdSAlex Wilson uint24be_t mlcqc_uar_page; 594ebb7c6fdSAlex Wilson 595ebb7c6fdSAlex Wilson uint16be_t mlcqc_cq_period; 596ebb7c6fdSAlex Wilson uint16be_t mlcqc_cq_max_count; 597ebb7c6fdSAlex Wilson 598ebb7c6fdSAlex Wilson uint8_t mlcqc_rsvd7[3]; 599ebb7c6fdSAlex Wilson uint8_t mlcqc_eqn; 600ebb7c6fdSAlex Wilson 601ebb7c6fdSAlex Wilson uint8_t mlcqc_log_page_size; 602ebb7c6fdSAlex Wilson uint8_t mlcqc_rsvd8[3]; 603ebb7c6fdSAlex Wilson 604ebb7c6fdSAlex Wilson uint8_t mlcqc_rsvd9[4]; 605ebb7c6fdSAlex Wilson 606ebb7c6fdSAlex Wilson uint8_t mlcqc_rsvd10; 607ebb7c6fdSAlex Wilson uint24be_t mlcqc_last_notified_index; 608ebb7c6fdSAlex Wilson uint8_t mlcqc_rsvd11; 609ebb7c6fdSAlex Wilson uint24be_t mlcqc_last_solicit_index; 610ebb7c6fdSAlex Wilson uint8_t mlcqc_rsvd12; 611ebb7c6fdSAlex Wilson uint24be_t mlcqc_consumer_counter; 612ebb7c6fdSAlex Wilson uint8_t mlcqc_rsvd13; 613ebb7c6fdSAlex Wilson uint24be_t mlcqc_producer_counter; 614ebb7c6fdSAlex Wilson 615ebb7c6fdSAlex Wilson uint8_t mlcqc_rsvd14[8]; 616ebb7c6fdSAlex Wilson 617ebb7c6fdSAlex Wilson uint64be_t mlcqc_dbr_addr; 618ebb7c6fdSAlex Wilson } mlxcx_completionq_ctx_t; 619ebb7c6fdSAlex Wilson 620ebb7c6fdSAlex Wilson typedef enum { 621ebb7c6fdSAlex Wilson MLXCX_WORKQ_TYPE_LINKED_LIST = 0x0, 622ebb7c6fdSAlex Wilson MLXCX_WORKQ_TYPE_CYCLIC = 0x1, 623ebb7c6fdSAlex Wilson MLXCX_WORKQ_TYPE_LINKED_LIST_STRIDING = 0x2, 624ebb7c6fdSAlex Wilson MLXCX_WORKQ_TYPE_CYCLIC_STRIDING = 0x3 625ebb7c6fdSAlex Wilson } mlxcx_workq_ctx_type_t; 626ebb7c6fdSAlex Wilson 627ebb7c6fdSAlex Wilson typedef enum { 628ebb7c6fdSAlex Wilson MLXCX_WORKQ_END_PAD_NONE = 0x0, 629ebb7c6fdSAlex Wilson MLXCX_WORKQ_END_PAD_ALIGN = 0x1 630ebb7c6fdSAlex Wilson } mlxcx_workq_end_padding_t; 631ebb7c6fdSAlex Wilson 632ebb7c6fdSAlex Wilson /* CSTYLED */ 633ebb7c6fdSAlex Wilson #define MLXCX_WORKQ_CTX_TYPE (bitdef_t){ \ 634ebb7c6fdSAlex Wilson .bit_shift = 28, \ 635ebb7c6fdSAlex Wilson .bit_mask = 0xf0000000 } 636ebb7c6fdSAlex Wilson #define MLXCX_WORKQ_CTX_SIGNATURE (1 << 27) 637ebb7c6fdSAlex Wilson #define MLXCX_WORKQ_CTX_CD_SLAVE (1 << 24) 638ebb7c6fdSAlex Wilson /* CSTYLED */ 639ebb7c6fdSAlex Wilson #define MLXCX_WORKQ_CTX_END_PADDING (bitdef_t){ \ 640ebb7c6fdSAlex Wilson .bit_shift = 25, \ 641ebb7c6fdSAlex Wilson .bit_mask = 0x06000000 } 642ebb7c6fdSAlex Wilson 643ebb7c6fdSAlex Wilson #define MLXCX_WORKQ_CTX_MAX_ADDRESSES 128 644ebb7c6fdSAlex Wilson 645ebb7c6fdSAlex Wilson typedef struct mlxcx_workq_ctx { 646ebb7c6fdSAlex Wilson bits32_t mlwqc_flags; 647ebb7c6fdSAlex Wilson uint8_t mlwqc_rsvd[2]; 648ebb7c6fdSAlex Wilson uint16be_t mlwqc_lwm; 649ebb7c6fdSAlex Wilson uint8_t mlwqc_rsvd2; 650ebb7c6fdSAlex Wilson uint24be_t mlwqc_pd; 651ebb7c6fdSAlex Wilson uint8_t mlwqc_rsvd3; 652ebb7c6fdSAlex Wilson uint24be_t mlwqc_uar_page; 653ebb7c6fdSAlex Wilson uint64be_t mlwqc_dbr_addr; 654ebb7c6fdSAlex Wilson uint32be_t mlwqc_hw_counter; 655ebb7c6fdSAlex Wilson uint32be_t mlwqc_sw_counter; 656ebb7c6fdSAlex Wilson uint8_t mlwqc_rsvd4; 657ebb7c6fdSAlex Wilson uint8_t mlwqc_log_wq_stride; 658ebb7c6fdSAlex Wilson uint8_t mlwqc_log_wq_pg_sz; 659ebb7c6fdSAlex Wilson uint8_t mlwqc_log_wq_sz; 660ebb7c6fdSAlex Wilson uint8_t mlwqc_rsvd5[2]; 661ebb7c6fdSAlex Wilson bits16_t mlwqc_strides; 662ebb7c6fdSAlex Wilson uint8_t mlwqc_rsvd6[152]; 663ebb7c6fdSAlex Wilson uint64be_t mlwqc_pas[MLXCX_WORKQ_CTX_MAX_ADDRESSES]; 664ebb7c6fdSAlex Wilson } mlxcx_workq_ctx_t; 665ebb7c6fdSAlex Wilson 666ebb7c6fdSAlex Wilson #define MLXCX_RQ_FLAGS_RLKEY (1UL << 31) 667ebb7c6fdSAlex Wilson #define MLXCX_RQ_FLAGS_SCATTER_FCS (1 << 29) 668ebb7c6fdSAlex Wilson #define MLXCX_RQ_FLAGS_VLAN_STRIP_DISABLE (1 << 28) 669ebb7c6fdSAlex Wilson #define MLXCX_RQ_FLAGS_FLUSH_IN_ERROR (1 << 18) 670ebb7c6fdSAlex Wilson /* CSTYLED */ 671ebb7c6fdSAlex Wilson #define MLXCX_RQ_MEM_RQ_TYPE (bitdef_t){ \ 672ebb7c6fdSAlex Wilson .bit_shift = 24, \ 673ebb7c6fdSAlex Wilson .bit_mask = 0x0f000000 } 674ebb7c6fdSAlex Wilson /* CSTYLED */ 675ebb7c6fdSAlex Wilson #define MLXCX_RQ_STATE (bitdef_t){ \ 676ebb7c6fdSAlex Wilson .bit_shift = 20, \ 677ebb7c6fdSAlex Wilson .bit_mask = 0x00f00000 } 678ebb7c6fdSAlex Wilson 679ebb7c6fdSAlex Wilson typedef struct mlxcx_rq_ctx { 680ebb7c6fdSAlex Wilson bits32_t mlrqc_flags; 681ebb7c6fdSAlex Wilson uint8_t mlrqc_rsvd; 682ebb7c6fdSAlex Wilson uint24be_t mlrqc_user_index; 683ebb7c6fdSAlex Wilson uint8_t mlrqc_rsvd2; 684ebb7c6fdSAlex Wilson uint24be_t mlrqc_cqn; 685ebb7c6fdSAlex Wilson uint8_t mlrqc_counter_set_id; 686ebb7c6fdSAlex Wilson uint8_t mlrqc_rsvd3[4]; 687ebb7c6fdSAlex Wilson uint24be_t mlrqc_rmpn; 688ebb7c6fdSAlex Wilson uint8_t mlrqc_rsvd4[28]; 689ebb7c6fdSAlex Wilson mlxcx_workq_ctx_t mlrqc_wq; 690ebb7c6fdSAlex Wilson } mlxcx_rq_ctx_t; 691ebb7c6fdSAlex Wilson 692ebb7c6fdSAlex Wilson #define MLXCX_SQ_FLAGS_RLKEY (1UL << 31) 693ebb7c6fdSAlex Wilson #define MLXCX_SQ_FLAGS_CD_MASTER (1 << 30) 694ebb7c6fdSAlex Wilson #define MLXCX_SQ_FLAGS_FRE (1 << 29) 695ebb7c6fdSAlex Wilson #define MLXCX_SQ_FLAGS_FLUSH_IN_ERROR (1 << 28) 696ebb7c6fdSAlex Wilson #define MLXCX_SQ_FLAGS_ALLOW_MULTI_PKT (1 << 27) 697ebb7c6fdSAlex Wilson #define MLXCX_SQ_FLAGS_REG_UMR (1 << 19) 698ebb7c6fdSAlex Wilson 699ebb7c6fdSAlex Wilson typedef enum { 700ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_INLINE_REQUIRE_L2 = 0, 701ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_INLINE_VPORT_CTX = 1, 702ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_INLINE_NOT_REQUIRED = 2 703ebb7c6fdSAlex Wilson } mlxcx_eth_cap_inline_mode_t; 704ebb7c6fdSAlex Wilson 705ebb7c6fdSAlex Wilson typedef enum { 706ebb7c6fdSAlex Wilson MLXCX_ETH_INLINE_NONE = 0, 707ebb7c6fdSAlex Wilson MLXCX_ETH_INLINE_L2 = 1, 708ebb7c6fdSAlex Wilson MLXCX_ETH_INLINE_L3 = 2, 709ebb7c6fdSAlex Wilson MLXCX_ETH_INLINE_L4 = 3, 710ebb7c6fdSAlex Wilson MLXCX_ETH_INLINE_INNER_L2 = 5, 711ebb7c6fdSAlex Wilson MLXCX_ETH_INLINE_INNER_L3 = 6, 712ebb7c6fdSAlex Wilson MLXCX_ETH_INLINE_INNER_L4 = 7 713ebb7c6fdSAlex Wilson } mlxcx_eth_inline_mode_t; 714ebb7c6fdSAlex Wilson 715ebb7c6fdSAlex Wilson /* CSTYLED */ 716ebb7c6fdSAlex Wilson #define MLXCX_SQ_MIN_WQE_INLINE (bitdef_t){ \ 717ebb7c6fdSAlex Wilson .bit_shift = 24, \ 718ebb7c6fdSAlex Wilson .bit_mask = 0x07000000 } 719ebb7c6fdSAlex Wilson /* CSTYLED */ 720ebb7c6fdSAlex Wilson #define MLXCX_SQ_STATE (bitdef_t){ \ 721ebb7c6fdSAlex Wilson .bit_shift = 20, \ 722ebb7c6fdSAlex Wilson .bit_mask = 0x00f00000 } 723ebb7c6fdSAlex Wilson 724ebb7c6fdSAlex Wilson typedef struct mlxcx_sq_ctx { 725ebb7c6fdSAlex Wilson bits32_t mlsqc_flags; 726ebb7c6fdSAlex Wilson uint8_t mlsqc_rsvd; 727ebb7c6fdSAlex Wilson uint24be_t mlsqc_user_index; 728ebb7c6fdSAlex Wilson uint8_t mlsqc_rsvd2; 729ebb7c6fdSAlex Wilson uint24be_t mlsqc_cqn; 730ebb7c6fdSAlex Wilson uint8_t mlsqc_rsvd3[18]; 731ebb7c6fdSAlex Wilson uint16be_t mlsqc_packet_pacing_rate_limit_index; 732ebb7c6fdSAlex Wilson uint16be_t mlsqc_tis_lst_sz; 733ebb7c6fdSAlex Wilson uint8_t mlsqc_rsvd4[11]; 734ebb7c6fdSAlex Wilson uint24be_t mlsqc_tis_num; 735ebb7c6fdSAlex Wilson mlxcx_workq_ctx_t mlsqc_wq; 736ebb7c6fdSAlex Wilson } mlxcx_sq_ctx_t; 737ebb7c6fdSAlex Wilson 738ebb7c6fdSAlex Wilson #define MLXCX_NIC_VPORT_CTX_MAX_ADDRESSES 64 739ebb7c6fdSAlex Wilson 740ebb7c6fdSAlex Wilson typedef enum { 741ebb7c6fdSAlex Wilson MLXCX_VPORT_PROMISC_UCAST = 1 << 15, 742ebb7c6fdSAlex Wilson MLXCX_VPORT_PROMISC_MCAST = 1 << 14, 743ebb7c6fdSAlex Wilson MLXCX_VPORT_PROMISC_ALL = 1 << 13 744ebb7c6fdSAlex Wilson } mlxcx_nic_vport_ctx_promisc_t; 745ebb7c6fdSAlex Wilson 746ebb7c6fdSAlex Wilson #define MLXCX_VPORT_LIST_TYPE_MASK 0x07 747ebb7c6fdSAlex Wilson #define MLXCX_VPORT_LIST_TYPE_SHIFT 0 748ebb7c6fdSAlex Wilson 749ebb7c6fdSAlex Wilson /* CSTYLED */ 750ebb7c6fdSAlex Wilson #define MLXCX_VPORT_CTX_MIN_WQE_INLINE (bitdef_t){56, 0x0700000000000000} 751ebb7c6fdSAlex Wilson 752ebb7c6fdSAlex Wilson typedef struct { 753ebb7c6fdSAlex Wilson bits64_t mlnvc_flags; 754ebb7c6fdSAlex Wilson uint8_t mlnvc_rsvd[28]; 755ebb7c6fdSAlex Wilson uint8_t mlnvc_rsvd2[2]; 756ebb7c6fdSAlex Wilson uint16be_t mlnvc_mtu; 757ebb7c6fdSAlex Wilson uint64be_t mlnvc_system_image_guid; 758ebb7c6fdSAlex Wilson uint64be_t mlnvc_port_guid; 759ebb7c6fdSAlex Wilson uint64be_t mlnvc_node_guid; 760ebb7c6fdSAlex Wilson uint8_t mlnvc_rsvd3[40]; 761ebb7c6fdSAlex Wilson uint16be_t mlnvc_qkey_violation_counter; 762ebb7c6fdSAlex Wilson uint8_t mlnvc_rsvd4[2]; 763ebb7c6fdSAlex Wilson uint8_t mlnvc_rsvd5[132]; 764ebb7c6fdSAlex Wilson bits16_t mlnvc_promisc_list_type; 765ebb7c6fdSAlex Wilson uint16be_t mlnvc_allowed_list_size; 766ebb7c6fdSAlex Wilson uint8_t mlnvc_rsvd6[2]; 767ebb7c6fdSAlex Wilson uint8_t mlnvc_permanent_address[6]; 768ebb7c6fdSAlex Wilson uint8_t mlnvc_rsvd7[4]; 769ebb7c6fdSAlex Wilson uint64be_t mlnvc_address[MLXCX_NIC_VPORT_CTX_MAX_ADDRESSES]; 770ebb7c6fdSAlex Wilson } mlxcx_nic_vport_ctx_t; 771ebb7c6fdSAlex Wilson 772ebb7c6fdSAlex Wilson typedef struct { 773ebb7c6fdSAlex Wilson uint8_t mlftc_flags; 774ebb7c6fdSAlex Wilson uint8_t mlftc_level; 775ebb7c6fdSAlex Wilson uint8_t mlftc_rsvd; 776ebb7c6fdSAlex Wilson uint8_t mlftc_log_size; 777ebb7c6fdSAlex Wilson uint8_t mlftc_rsvd2; 778ebb7c6fdSAlex Wilson uint24be_t mlftc_table_miss_id; 779ebb7c6fdSAlex Wilson uint8_t mlftc_rsvd3[4]; 780ebb7c6fdSAlex Wilson uint8_t mlftc_rsvd4[28]; 781ebb7c6fdSAlex Wilson } mlxcx_flow_table_ctx_t; 782ebb7c6fdSAlex Wilson 783ebb7c6fdSAlex Wilson /* CSTYLED */ 784ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_FIRST_VID (bitdef_t){0, 0x07ff} 785ebb7c6fdSAlex Wilson /* CSTYLED */ 786ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_FIRST_PRIO (bitdef_t){13,0x7000} 787ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_FIRST_CFI (1 << 12) 788ebb7c6fdSAlex Wilson 789ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_IP_DSCP_SHIFT 18 790ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_IP_DSCP_MASK 0xfc0000 791ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_IP_ECN_SHIFT 16 792ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_IP_ECN_MASK 0x030000 793ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_CVLAN_TAG (1 << 15) 794ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_SVLAN_TAG (1 << 14) 795ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_FRAG (1 << 13) 796ebb7c6fdSAlex Wilson /* CSTYLED */ 797ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_IP_VERSION (bitdef_t){ \ 798ebb7c6fdSAlex Wilson .bit_shift = 9, \ 799ebb7c6fdSAlex Wilson .bit_mask = 0x001e00 } 800ebb7c6fdSAlex Wilson /* CSTYLED */ 801ebb7c6fdSAlex Wilson #define MLXCX_FLOW_HDR_TCP_FLAGS (bitdef_t){ \ 802ebb7c6fdSAlex Wilson .bit_shift = 0, \ 803ebb7c6fdSAlex Wilson .bit_mask = 0x0001ff } 804ebb7c6fdSAlex Wilson 805ebb7c6fdSAlex Wilson typedef struct { 806ebb7c6fdSAlex Wilson uint8_t mlfh_smac[6]; 807ebb7c6fdSAlex Wilson uint16be_t mlfh_ethertype; 808ebb7c6fdSAlex Wilson uint8_t mlfh_dmac[6]; 809ebb7c6fdSAlex Wilson bits16_t mlfh_first_vid_flags; 810ebb7c6fdSAlex Wilson uint8_t mlfh_ip_protocol; 811ebb7c6fdSAlex Wilson bits24_t mlfh_tcp_ip_flags; 812ebb7c6fdSAlex Wilson uint16be_t mlfh_tcp_sport; 813ebb7c6fdSAlex Wilson uint16be_t mlfh_tcp_dport; 814ebb7c6fdSAlex Wilson uint8_t mlfh_rsvd[3]; 815ebb7c6fdSAlex Wilson uint8_t mlfh_ip_ttl_hoplimit; 816ebb7c6fdSAlex Wilson uint16be_t mlfh_udp_sport; 817ebb7c6fdSAlex Wilson uint16be_t mlfh_udp_dport; 818ebb7c6fdSAlex Wilson uint8_t mlfh_src_ip[16]; 819ebb7c6fdSAlex Wilson uint8_t mlfh_dst_ip[16]; 820ebb7c6fdSAlex Wilson } mlxcx_flow_header_match_t; 821ebb7c6fdSAlex Wilson 822ebb7c6fdSAlex Wilson typedef struct { 823ebb7c6fdSAlex Wilson uint8_t mlfp_rsvd; 824ebb7c6fdSAlex Wilson uint24be_t mlfp_source_sqn; 825ebb7c6fdSAlex Wilson uint8_t mlfp_rsvd2[2]; 826ebb7c6fdSAlex Wilson uint16be_t mlfp_source_port; 827ebb7c6fdSAlex Wilson bits16_t mlfp_outer_second_vid_flags; 828ebb7c6fdSAlex Wilson bits16_t mlfp_inner_second_vid_flags; 829ebb7c6fdSAlex Wilson bits16_t mlfp_vlan_flags; 830ebb7c6fdSAlex Wilson uint16be_t mlfp_gre_protocol; 831ebb7c6fdSAlex Wilson uint32be_t mlfp_gre_key; 832ebb7c6fdSAlex Wilson uint24be_t mlfp_vxlan_vni; 833ebb7c6fdSAlex Wilson uint8_t mlfp_rsvd3; 834ebb7c6fdSAlex Wilson uint8_t mlfp_rsvd4[4]; 835ebb7c6fdSAlex Wilson uint8_t mlfp_rsvd5; 836ebb7c6fdSAlex Wilson uint24be_t mlfp_outer_ipv6_flow_label; 837ebb7c6fdSAlex Wilson uint8_t mlfp_rsvd6; 838ebb7c6fdSAlex Wilson uint24be_t mlfp_inner_ipv6_flow_label; 839ebb7c6fdSAlex Wilson uint8_t mlfp_rsvd7[28]; 840ebb7c6fdSAlex Wilson } mlxcx_flow_params_match_t; 841ebb7c6fdSAlex Wilson 842ebb7c6fdSAlex Wilson typedef struct { 843ebb7c6fdSAlex Wilson mlxcx_flow_header_match_t mlfm_outer_headers; 844ebb7c6fdSAlex Wilson mlxcx_flow_params_match_t mlfm_misc_parameters; 845ebb7c6fdSAlex Wilson mlxcx_flow_header_match_t mlfm_inner_headers; 846ebb7c6fdSAlex Wilson uint8_t mlfm_rsvd[320]; 847ebb7c6fdSAlex Wilson } mlxcx_flow_match_t; 848ebb7c6fdSAlex Wilson 849ebb7c6fdSAlex Wilson #define MLXCX_FLOW_MAX_DESTINATIONS 64 850ebb7c6fdSAlex Wilson typedef enum { 851ebb7c6fdSAlex Wilson MLXCX_FLOW_DEST_VPORT = 0x0, 852ebb7c6fdSAlex Wilson MLXCX_FLOW_DEST_FLOW_TABLE = 0x1, 853ebb7c6fdSAlex Wilson MLXCX_FLOW_DEST_TIR = 0x2, 854ebb7c6fdSAlex Wilson MLXCX_FLOW_DEST_QP = 0x3 855ebb7c6fdSAlex Wilson } mlxcx_flow_destination_type_t; 856ebb7c6fdSAlex Wilson 857ebb7c6fdSAlex Wilson typedef struct { 858ebb7c6fdSAlex Wilson uint8_t mlfd_destination_type; 859ebb7c6fdSAlex Wilson uint24be_t mlfd_destination_id; 860ebb7c6fdSAlex Wilson uint8_t mlfd_rsvd[4]; 861ebb7c6fdSAlex Wilson } mlxcx_flow_dest_t; 862ebb7c6fdSAlex Wilson 863ebb7c6fdSAlex Wilson typedef enum { 864ebb7c6fdSAlex Wilson MLXCX_FLOW_ACTION_ALLOW = 1 << 0, 865ebb7c6fdSAlex Wilson MLXCX_FLOW_ACTION_DROP = 1 << 1, 866ebb7c6fdSAlex Wilson MLXCX_FLOW_ACTION_FORWARD = 1 << 2, 867ebb7c6fdSAlex Wilson MLXCX_FLOW_ACTION_COUNT = 1 << 3, 868ebb7c6fdSAlex Wilson MLXCX_FLOW_ACTION_ENCAP = 1 << 4, 869ebb7c6fdSAlex Wilson MLXCX_FLOW_ACTION_DECAP = 1 << 5 870ebb7c6fdSAlex Wilson } mlxcx_flow_action_t; 871ebb7c6fdSAlex Wilson 872ebb7c6fdSAlex Wilson typedef struct { 873ebb7c6fdSAlex Wilson uint8_t mlfec_rsvd[4]; 874ebb7c6fdSAlex Wilson uint32be_t mlfec_group_id; 875ebb7c6fdSAlex Wilson uint8_t mlfec_rsvd2; 876ebb7c6fdSAlex Wilson uint24be_t mlfec_flow_tag; 877ebb7c6fdSAlex Wilson uint8_t mlfec_rsvd3[2]; 878ebb7c6fdSAlex Wilson uint16be_t mlfec_action; 879ebb7c6fdSAlex Wilson uint8_t mlfec_rsvd4; 880ebb7c6fdSAlex Wilson uint24be_t mlfec_destination_list_size; 881ebb7c6fdSAlex Wilson uint8_t mlfec_rsvd5; 882ebb7c6fdSAlex Wilson uint24be_t mlfec_flow_counter_list_size; 883ebb7c6fdSAlex Wilson uint32be_t mlfec_encap_id; 884ebb7c6fdSAlex Wilson uint8_t mlfec_rsvd6[36]; 885ebb7c6fdSAlex Wilson mlxcx_flow_match_t mlfec_match_value; 886ebb7c6fdSAlex Wilson uint8_t mlfec_rsvd7[192]; 887ebb7c6fdSAlex Wilson mlxcx_flow_dest_t mlfec_destination[MLXCX_FLOW_MAX_DESTINATIONS]; 888ebb7c6fdSAlex Wilson } mlxcx_flow_entry_ctx_t; 889ebb7c6fdSAlex Wilson 890ebb7c6fdSAlex Wilson /* CSTYLED */ 891ebb7c6fdSAlex Wilson #define MLXCX_TIR_CTX_DISP_TYPE (bitdef_t){ 4, 0xf0 } 892ebb7c6fdSAlex Wilson typedef enum { 893ebb7c6fdSAlex Wilson MLXCX_TIR_DIRECT = 0x0, 894ebb7c6fdSAlex Wilson MLXCX_TIR_INDIRECT = 0x1, 895ebb7c6fdSAlex Wilson } mlxcx_tir_type_t; 896ebb7c6fdSAlex Wilson 897ebb7c6fdSAlex Wilson /* CSTYLED */ 898ebb7c6fdSAlex Wilson #define MLXCX_TIR_LRO_TIMEOUT (bitdef_t){ 12, 0x0ffff000 } 899ebb7c6fdSAlex Wilson /* CSTYLED */ 900ebb7c6fdSAlex Wilson #define MLXCX_TIR_LRO_ENABLE_MASK (bitdef_t){ 8, 0x00000f00 } 901ebb7c6fdSAlex Wilson /* CSTYLED */ 902ebb7c6fdSAlex Wilson #define MLXCX_TIR_LRO_MAX_MSG_SZ (bitdef_t){ 0, 0x000000ff } 903ebb7c6fdSAlex Wilson 904ebb7c6fdSAlex Wilson /* CSTYLED */ 905ebb7c6fdSAlex Wilson #define MLXCX_TIR_RX_HASH_FN (bitdef_t){ 4, 0xf0 } 906ebb7c6fdSAlex Wilson typedef enum { 907ebb7c6fdSAlex Wilson MLXCX_TIR_HASH_NONE = 0x0, 908ebb7c6fdSAlex Wilson MLXCX_TIR_HASH_XOR8 = 0x1, 909ebb7c6fdSAlex Wilson MLXCX_TIR_HASH_TOEPLITZ = 0x2 910ebb7c6fdSAlex Wilson } mlxcx_tir_hash_fn_t; 911ebb7c6fdSAlex Wilson #define MLXCX_TIR_LB_UNICAST (1 << 24) 912ebb7c6fdSAlex Wilson #define MLXCX_TIR_LB_MULTICAST (1 << 25) 913ebb7c6fdSAlex Wilson 914ebb7c6fdSAlex Wilson /* CSTYLED */ 915ebb7c6fdSAlex Wilson #define MLXCX_RX_HASH_L3_TYPE (bitdef_t){ 31, 0x80000000 } 916ebb7c6fdSAlex Wilson typedef enum { 917ebb7c6fdSAlex Wilson MLXCX_RX_HASH_L3_IPv4 = 0, 918ebb7c6fdSAlex Wilson MLXCX_RX_HASH_L3_IPv6 = 1 919ebb7c6fdSAlex Wilson } mlxcx_tir_rx_hash_l3_type_t; 920ebb7c6fdSAlex Wilson /* CSTYLED */ 921ebb7c6fdSAlex Wilson #define MLXCX_RX_HASH_L4_TYPE (bitdef_t){ 30, 0x40000000 } 922ebb7c6fdSAlex Wilson typedef enum { 923ebb7c6fdSAlex Wilson MLXCX_RX_HASH_L4_TCP = 0, 924ebb7c6fdSAlex Wilson MLXCX_RX_HASH_L4_UDP = 1 925ebb7c6fdSAlex Wilson } mlxcx_tir_rx_hash_l4_type_t; 926ebb7c6fdSAlex Wilson /* CSTYLED */ 927ebb7c6fdSAlex Wilson #define MLXCX_RX_HASH_FIELDS (bitdef_t){ 0, 0x3fffffff } 928ebb7c6fdSAlex Wilson typedef enum { 929ebb7c6fdSAlex Wilson MLXCX_RX_HASH_SRC_IP = 1 << 0, 930ebb7c6fdSAlex Wilson MLXCX_RX_HASH_DST_IP = 1 << 1, 931ebb7c6fdSAlex Wilson MLXCX_RX_HASH_L4_SPORT = 1 << 2, 932ebb7c6fdSAlex Wilson MLXCX_RX_HASH_L4_DPORT = 1 << 3, 933ebb7c6fdSAlex Wilson MLXCX_RX_HASH_IPSEC_SPI = 1 << 4 934ebb7c6fdSAlex Wilson } mlxcx_tir_rx_hash_fields_t; 935ebb7c6fdSAlex Wilson 936ebb7c6fdSAlex Wilson typedef struct { 937ebb7c6fdSAlex Wilson uint8_t mltirc_rsvd[4]; 938ebb7c6fdSAlex Wilson bits8_t mltirc_disp_type; 939ebb7c6fdSAlex Wilson uint8_t mltirc_rsvd2[11]; 940ebb7c6fdSAlex Wilson bits32_t mltirc_lro; 941ebb7c6fdSAlex Wilson uint8_t mltirc_rsvd3[9]; 942ebb7c6fdSAlex Wilson uint24be_t mltirc_inline_rqn; 943ebb7c6fdSAlex Wilson bits8_t mltirc_flags; 944ebb7c6fdSAlex Wilson uint24be_t mltirc_indirect_table; 945ebb7c6fdSAlex Wilson bits8_t mltirc_hash_lb; 946ebb7c6fdSAlex Wilson uint24be_t mltirc_transport_domain; 947ebb7c6fdSAlex Wilson uint8_t mltirc_rx_hash_toeplitz_key[40]; 948ebb7c6fdSAlex Wilson bits32_t mltirc_rx_hash_fields_outer; 949ebb7c6fdSAlex Wilson bits32_t mltirc_rx_hash_fields_inner; 950ebb7c6fdSAlex Wilson uint8_t mltirc_rsvd4[152]; 951ebb7c6fdSAlex Wilson } mlxcx_tir_ctx_t; 952ebb7c6fdSAlex Wilson 953ebb7c6fdSAlex Wilson typedef struct { 954ebb7c6fdSAlex Wilson uint8_t mltisc_rsvd; 955ebb7c6fdSAlex Wilson uint8_t mltisc_prio_or_sl; 956ebb7c6fdSAlex Wilson uint8_t mltisc_rsvd2[35]; 957ebb7c6fdSAlex Wilson uint24be_t mltisc_transport_domain; 958ebb7c6fdSAlex Wilson uint8_t mltisc_rsvd3[120]; 959ebb7c6fdSAlex Wilson } mlxcx_tis_ctx_t; 960ebb7c6fdSAlex Wilson 961ebb7c6fdSAlex Wilson #define MLXCX_RQT_MAX_RQ_REFS 64 962ebb7c6fdSAlex Wilson 963ebb7c6fdSAlex Wilson typedef struct { 964ebb7c6fdSAlex Wilson uint8_t mlrqtr_rsvd; 965ebb7c6fdSAlex Wilson uint24be_t mlrqtr_rqn; 966ebb7c6fdSAlex Wilson } mlxcx_rqtable_rq_ref_t; 967ebb7c6fdSAlex Wilson 968ebb7c6fdSAlex Wilson typedef struct { 969ebb7c6fdSAlex Wilson uint8_t mlrqtc_rsvd[22]; 970ebb7c6fdSAlex Wilson uint16be_t mlrqtc_max_size; 971ebb7c6fdSAlex Wilson uint8_t mlrqtc_rsvd2[2]; 972ebb7c6fdSAlex Wilson uint16be_t mlrqtc_actual_size; 973ebb7c6fdSAlex Wilson uint8_t mlrqtc_rsvd3[212]; 974ebb7c6fdSAlex Wilson mlxcx_rqtable_rq_ref_t mlrqtc_rqref[MLXCX_RQT_MAX_RQ_REFS]; 975ebb7c6fdSAlex Wilson } mlxcx_rqtable_ctx_t; 976ebb7c6fdSAlex Wilson 977ebb7c6fdSAlex Wilson #pragma pack() 978ebb7c6fdSAlex Wilson 979ebb7c6fdSAlex Wilson typedef enum { 980ebb7c6fdSAlex Wilson MLXCX_EVENT_COMPLETION = 0x00, 981ebb7c6fdSAlex Wilson MLXCX_EVENT_PATH_MIGRATED = 0x01, 982ebb7c6fdSAlex Wilson MLXCX_EVENT_COMM_ESTABLISH = 0x02, 983ebb7c6fdSAlex Wilson MLXCX_EVENT_SENDQ_DRAIN = 0x03, 984ebb7c6fdSAlex Wilson MLXCX_EVENT_LAST_WQE = 0x13, 985ebb7c6fdSAlex Wilson MLXCX_EVENT_SRQ_LIMIT = 0x14, 986ebb7c6fdSAlex Wilson MLXCX_EVENT_DCT_ALL_CLOSED = 0x1C, 987ebb7c6fdSAlex Wilson MLXCX_EVENT_DCT_ACCKEY_VIOL = 0x1D, 988ebb7c6fdSAlex Wilson MLXCX_EVENT_CQ_ERROR = 0x04, 989ebb7c6fdSAlex Wilson MLXCX_EVENT_WQ_CATASTROPHE = 0x05, 990ebb7c6fdSAlex Wilson MLXCX_EVENT_PATH_MIGRATE_FAIL = 0x07, 991ebb7c6fdSAlex Wilson MLXCX_EVENT_PAGE_FAULT = 0x0C, 992ebb7c6fdSAlex Wilson MLXCX_EVENT_WQ_INVALID_REQ = 0x10, 993ebb7c6fdSAlex Wilson MLXCX_EVENT_WQ_ACCESS_VIOL = 0x11, 994ebb7c6fdSAlex Wilson MLXCX_EVENT_SRQ_CATASTROPHE = 0x12, 995ebb7c6fdSAlex Wilson MLXCX_EVENT_INTERNAL_ERROR = 0x08, 996ebb7c6fdSAlex Wilson MLXCX_EVENT_PORT_STATE = 0x09, 997ebb7c6fdSAlex Wilson MLXCX_EVENT_GPIO = 0x15, 998ebb7c6fdSAlex Wilson MLXCX_EVENT_PORT_MODULE = 0x16, 999ebb7c6fdSAlex Wilson MLXCX_EVENT_TEMP_WARNING = 0x17, 1000ebb7c6fdSAlex Wilson MLXCX_EVENT_REMOTE_CONFIG = 0x19, 1001ebb7c6fdSAlex Wilson MLXCX_EVENT_DCBX_CHANGE = 0x1E, 1002ebb7c6fdSAlex Wilson MLXCX_EVENT_DOORBELL_CONGEST = 0x1A, 1003ebb7c6fdSAlex Wilson MLXCX_EVENT_STALL_VL = 0x1B, 1004ebb7c6fdSAlex Wilson MLXCX_EVENT_CMD_COMPLETION = 0x0A, 1005ebb7c6fdSAlex Wilson MLXCX_EVENT_PAGE_REQUEST = 0x0B, 1006ebb7c6fdSAlex Wilson MLXCX_EVENT_NIC_VPORT = 0x0D, 1007ebb7c6fdSAlex Wilson MLXCX_EVENT_EC_PARAMS_CHANGE = 0x0E, 1008ebb7c6fdSAlex Wilson MLXCX_EVENT_XRQ_ERROR = 0x18 1009ebb7c6fdSAlex Wilson } mlxcx_event_t; 1010ebb7c6fdSAlex Wilson 1011ebb7c6fdSAlex Wilson typedef enum { 1012ebb7c6fdSAlex Wilson MLXCX_CMD_R_OK = 0x00, 1013ebb7c6fdSAlex Wilson MLXCX_CMD_R_INTERNAL_ERR = 0x01, 1014ebb7c6fdSAlex Wilson MLXCX_CMD_R_BAD_OP = 0x02, 1015ebb7c6fdSAlex Wilson MLXCX_CMD_R_BAD_PARAM = 0x03, 1016ebb7c6fdSAlex Wilson MLXCX_CMD_R_BAD_SYS_STATE = 0x04, 1017ebb7c6fdSAlex Wilson MLXCX_CMD_R_BAD_RESOURCE = 0x05, 1018ebb7c6fdSAlex Wilson MLXCX_CMD_R_RESOURCE_BUSY = 0x06, 1019ebb7c6fdSAlex Wilson MLXCX_CMD_R_EXCEED_LIM = 0x08, 1020ebb7c6fdSAlex Wilson MLXCX_CMD_R_BAD_RES_STATE = 0x09, 1021ebb7c6fdSAlex Wilson MLXCX_CMD_R_BAD_INDEX = 0x0a, 1022ebb7c6fdSAlex Wilson MLXCX_CMD_R_NO_RESOURCES = 0x0f, 1023ebb7c6fdSAlex Wilson MLXCX_CMD_R_BAD_INPUT_LEN = 0x50, 1024ebb7c6fdSAlex Wilson MLXCX_CMD_R_BAD_OUTPUT_LEN = 0x51, 1025ebb7c6fdSAlex Wilson MLXCX_CMD_R_BAD_RESOURCE_STATE = 0x10, 1026ebb7c6fdSAlex Wilson MLXCX_CMD_R_BAD_PKT = 0x30, 1027ebb7c6fdSAlex Wilson MLXCX_CMD_R_BAD_SIZE = 0x40, 1028ebb7c6fdSAlex Wilson MLXCX_CMD_R_TIMEOUT = 0xFF 1029ebb7c6fdSAlex Wilson } mlxcx_cmd_ret_t; 1030ebb7c6fdSAlex Wilson 1031ebb7c6fdSAlex Wilson typedef enum { 1032ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_HCA_CAP = 0x100, 1033ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_ADAPTER = 0x101, 1034ebb7c6fdSAlex Wilson MLXCX_OP_INIT_HCA = 0x102, 1035ebb7c6fdSAlex Wilson MLXCX_OP_TEARDOWN_HCA = 0x103, 1036ebb7c6fdSAlex Wilson MLXCX_OP_ENABLE_HCA = 0x104, 1037ebb7c6fdSAlex Wilson MLXCX_OP_DISABLE_HCA = 0x105, 1038ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_PAGES = 0x107, 1039ebb7c6fdSAlex Wilson MLXCX_OP_MANAGE_PAGES = 0x108, 1040ebb7c6fdSAlex Wilson MLXCX_OP_SET_HCA_CAP = 0x109, 1041ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_ISSI = 0x10A, 1042ebb7c6fdSAlex Wilson MLXCX_OP_SET_ISSI = 0x10B, 1043ebb7c6fdSAlex Wilson MLXCX_OP_SET_DRIVER_VERSION = 0x10D, 1044ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_OTHER_HCA_CAP = 0x10E, 1045ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_OTHER_HCA_CAP = 0x10F, 1046ebb7c6fdSAlex Wilson MLXCX_OP_SET_TUNNELED_OPERATIONS = 0x110, 1047ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_MKEY = 0x200, 1048ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_MKEY = 0x201, 1049ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_MKEY = 0x202, 1050ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_SPECIAL_CONTEXTS = 0x203, 1051ebb7c6fdSAlex Wilson MLXCX_OP_PAGE_FAULT_RESUME = 0x204, 1052ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_EQ = 0x301, 1053ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_EQ = 0x302, 1054ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_EQ = 0x303, 1055ebb7c6fdSAlex Wilson MLXCX_OP_GEN_EQE = 0x304, 1056ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_CQ = 0x400, 1057ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_CQ = 0x401, 1058ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_CQ = 0x402, 1059ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_CQ = 0x403, 1060ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_QP = 0x500, 1061ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_QP = 0x501, 1062ebb7c6fdSAlex Wilson MLXCX_OP_RST2INIT_QP = 0x502, 1063ebb7c6fdSAlex Wilson MLXCX_OP_INIT2RTR_QP = 0x503, 1064ebb7c6fdSAlex Wilson MLXCX_OP_RTR2RTS_QP = 0x504, 1065ebb7c6fdSAlex Wilson MLXCX_OP_RTS2RTS_QP = 0x505, 1066ebb7c6fdSAlex Wilson MLXCX_OP_SQERR2RTS_QP = 0x506, 1067ebb7c6fdSAlex Wilson MLXCX_OP__2ERR_QP = 0x507, 1068ebb7c6fdSAlex Wilson MLXCX_OP__2RST_QP = 0x50A, 1069ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_QP = 0x50B, 1070ebb7c6fdSAlex Wilson MLXCX_OP_SQD_RTS_QP = 0x50C, 1071ebb7c6fdSAlex Wilson MLXCX_OP_INIT2INIT_QP = 0x50E, 1072ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_PSV = 0x600, 1073ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_PSV = 0x601, 1074ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_SRQ = 0x700, 1075ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_SRQ = 0x701, 1076ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_SRQ = 0x702, 1077ebb7c6fdSAlex Wilson MLXCX_OP_ARM_RQ = 0x703, 1078ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_XRC_SRQ = 0x705, 1079ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_XRC_SRQ = 0x706, 1080ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_XRC_SRQ = 0x707, 1081ebb7c6fdSAlex Wilson MLXCX_OP_ARM_XRC_SRQ = 0x708, 1082ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_DCT = 0x710, 1083ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_DCT = 0x711, 1084ebb7c6fdSAlex Wilson MLXCX_OP_DRAIN_DCT = 0x712, 1085ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_DCT = 0x713, 1086ebb7c6fdSAlex Wilson MLXCX_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714, 1087ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_XRQ = 0x717, 1088ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_XRQ = 0x718, 1089ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_XRQ = 0x719, 1090ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_NVMF_BACKEND_CONTROLLER = 0x720, 1091ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_NVMF_BACKEND_CONTROLLER = 0x721, 1092ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_NVMF_BACKEND_CONTROLLER = 0x722, 1093ebb7c6fdSAlex Wilson MLXCX_OP_ATTACH_NVMF_NAMESPACE = 0x723, 1094ebb7c6fdSAlex Wilson MLXCX_OP_DETACH_NVMF_NAMESPACE = 0x724, 1095ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_XRQ_DC_PARAMS_ENTRY = 0x725, 1096ebb7c6fdSAlex Wilson MLXCX_OP_SET_XRQ_DC_PARAMS_ENTRY = 0x726, 1097ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_XRQ_ERROR_PARAMS = 0x727, 1098ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_VPORT_STATE = 0x750, 1099ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_VPORT_STATE = 0x751, 1100ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_ESW_VPORT_CONTEXT = 0x752, 1101ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753, 1102ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_NIC_VPORT_CONTEXT = 0x754, 1103ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755, 1104ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_ROCE_ADDRESS = 0x760, 1105ebb7c6fdSAlex Wilson MLXCX_OP_SET_ROCE_ADDRESS = 0x761, 1106ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_HCA_VPORT_CONTEXT = 0x762, 1107ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763, 1108ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_HCA_VPORT_GID = 0x764, 1109ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_HCA_VPORT_PKEY = 0x765, 1110ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_VPORT_COUNTER = 0x770, 1111ebb7c6fdSAlex Wilson MLXCX_OP_ALLOC_Q_COUNTER = 0x771, 1112ebb7c6fdSAlex Wilson MLXCX_OP_DEALLOC_Q_COUNTER = 0x772, 1113ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_Q_COUNTER = 0x773, 1114ebb7c6fdSAlex Wilson MLXCX_OP_SET_PP_RATE_LIMIT = 0x780, 1115ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_PP_RATE_LIMIT = 0x781, 1116ebb7c6fdSAlex Wilson MLXCX_OP_ALLOC_PD = 0x800, 1117ebb7c6fdSAlex Wilson MLXCX_OP_DEALLOC_PD = 0x801, 1118ebb7c6fdSAlex Wilson MLXCX_OP_ALLOC_UAR = 0x802, 1119ebb7c6fdSAlex Wilson MLXCX_OP_DEALLOC_UAR = 0x803, 1120ebb7c6fdSAlex Wilson MLXCX_OP_CONFIG_INT_MODERATION = 0x804, 1121ebb7c6fdSAlex Wilson MLXCX_OP_ACCESS_REG = 0x805, 1122ebb7c6fdSAlex Wilson MLXCX_OP_ATTACH_TO_MCG = 0x806, 1123ebb7c6fdSAlex Wilson MLXCX_OP_DETACH_FROM_MCG = 0x807, 1124ebb7c6fdSAlex Wilson MLXCX_OP_MAD_IFC = 0x50D, 1125ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_MAD_DEMUX = 0x80B, 1126ebb7c6fdSAlex Wilson MLXCX_OP_SET_MAD_DEMUX = 0x80C, 1127ebb7c6fdSAlex Wilson MLXCX_OP_NOP = 0x80D, 1128ebb7c6fdSAlex Wilson MLXCX_OP_ALLOC_XRCD = 0x80E, 1129ebb7c6fdSAlex Wilson MLXCX_OP_DEALLOC_XRCD = 0x80F, 1130ebb7c6fdSAlex Wilson MLXCX_OP_ALLOC_TRANSPORT_DOMAIN = 0x816, 1131ebb7c6fdSAlex Wilson MLXCX_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817, 1132ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_CONG_STATUS = 0x822, 1133ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_CONG_STATUS = 0x823, 1134ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_CONG_PARAMS = 0x824, 1135ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_CONG_PARAMS = 0x825, 1136ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_CONG_STATISTICS = 0x826, 1137ebb7c6fdSAlex Wilson MLXCX_OP_ADD_VXLAN_UDP_DPORT = 0x827, 1138ebb7c6fdSAlex Wilson MLXCX_OP_DELETE_VXLAN_UDP_DPORT = 0x828, 1139ebb7c6fdSAlex Wilson MLXCX_OP_SET_L2_TABLE_ENTRY = 0x829, 1140ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_L2_TABLE_ENTRY = 0x82A, 1141ebb7c6fdSAlex Wilson MLXCX_OP_DELETE_L2_TABLE_ENTRY = 0x82B, 1142ebb7c6fdSAlex Wilson MLXCX_OP_SET_WOL_ROL = 0x830, 1143ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_WOL_ROL = 0x831, 1144ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_TIR = 0x900, 1145ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_TIR = 0x901, 1146ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_TIR = 0x902, 1147ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_TIR = 0x903, 1148ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_SQ = 0x904, 1149ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_SQ = 0x905, 1150ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_SQ = 0x906, 1151ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_SQ = 0x907, 1152ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_RQ = 0x908, 1153ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_RQ = 0x909, 1154ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_RQ = 0x90A, 1155ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_RQ = 0x90B, 1156ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_RMP = 0x90C, 1157ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_RMP = 0x90D, 1158ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_RMP = 0x90E, 1159ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_RMP = 0x90F, 1160ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_TIS = 0x912, 1161ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_TIS = 0x913, 1162ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_TIS = 0x914, 1163ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_TIS = 0x915, 1164ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_RQT = 0x916, 1165ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_RQT = 0x917, 1166ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_RQT = 0x918, 1167ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_RQT = 0x919, 1168ebb7c6fdSAlex Wilson MLXCX_OP_SET_FLOW_TABLE_ROOT = 0x92f, 1169ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_FLOW_TABLE = 0x930, 1170ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_FLOW_TABLE = 0x931, 1171ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_FLOW_TABLE = 0x932, 1172ebb7c6fdSAlex Wilson MLXCX_OP_CREATE_FLOW_GROUP = 0x933, 1173ebb7c6fdSAlex Wilson MLXCX_OP_DESTROY_FLOW_GROUP = 0x934, 1174ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_FLOW_GROUP = 0x935, 1175ebb7c6fdSAlex Wilson MLXCX_OP_SET_FLOW_TABLE_ENTRY = 0x936, 1176ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_FLOW_TABLE_ENTRY = 0x937, 1177ebb7c6fdSAlex Wilson MLXCX_OP_DELETE_FLOW_TABLE_ENTRY = 0x938, 1178ebb7c6fdSAlex Wilson MLXCX_OP_ALLOC_FLOW_COUNTER = 0x939, 1179ebb7c6fdSAlex Wilson MLXCX_OP_DEALLOC_FLOW_COUNTER = 0x93a, 1180ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_FLOW_COUNTER = 0x93b, 1181ebb7c6fdSAlex Wilson MLXCX_OP_MODIFY_FLOW_TABLE = 0x93c, 1182ebb7c6fdSAlex Wilson MLXCX_OP_ALLOC_ENCAP_HEADER = 0x93d, 1183ebb7c6fdSAlex Wilson MLXCX_OP_DEALLOC_ENCAP_HEADER = 0x93e, 1184ebb7c6fdSAlex Wilson MLXCX_OP_QUERY_ENCAP_HEADER = 0x93f 1185ebb7c6fdSAlex Wilson } mlxcx_cmd_op_t; 1186ebb7c6fdSAlex Wilson 1187ebb7c6fdSAlex Wilson /* 1188ebb7c6fdSAlex Wilson * Definitions for relevant commands 1189ebb7c6fdSAlex Wilson */ 1190ebb7c6fdSAlex Wilson #pragma pack(1) 1191ebb7c6fdSAlex Wilson typedef struct { 1192ebb7c6fdSAlex Wilson uint16be_t mci_opcode; 1193ebb7c6fdSAlex Wilson uint8_t mci_rsvd[4]; 1194ebb7c6fdSAlex Wilson uint16be_t mci_op_mod; 1195ebb7c6fdSAlex Wilson } mlxcx_cmd_in_t; 1196ebb7c6fdSAlex Wilson 1197ebb7c6fdSAlex Wilson typedef struct { 1198ebb7c6fdSAlex Wilson uint8_t mco_status; 1199ebb7c6fdSAlex Wilson uint8_t mco_rsvd[3]; 1200ebb7c6fdSAlex Wilson uint32be_t mco_syndrome; 1201ebb7c6fdSAlex Wilson } mlxcx_cmd_out_t; 1202ebb7c6fdSAlex Wilson 1203ebb7c6fdSAlex Wilson typedef struct { 1204ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_enable_hca_head; 1205ebb7c6fdSAlex Wilson uint8_t mlxi_enable_hca_rsvd[2]; 1206ebb7c6fdSAlex Wilson uint16be_t mlxi_enable_hca_func; 1207ebb7c6fdSAlex Wilson uint8_t mlxi_enable_hca_rsvd1[4]; 1208ebb7c6fdSAlex Wilson } mlxcx_cmd_enable_hca_in_t; 1209ebb7c6fdSAlex Wilson 1210ebb7c6fdSAlex Wilson typedef struct { 1211ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_enable_hca_head; 1212ebb7c6fdSAlex Wilson uint8_t mlxo_enable_hca_rsvd[8]; 1213ebb7c6fdSAlex Wilson } mlxcx_cmd_enable_hca_out_t; 1214ebb7c6fdSAlex Wilson 1215ebb7c6fdSAlex Wilson typedef struct { 1216ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_disable_hca_head; 1217ebb7c6fdSAlex Wilson uint8_t mlxi_disable_hca_rsvd[2]; 1218ebb7c6fdSAlex Wilson uint16be_t mlxi_disable_hca_func; 1219ebb7c6fdSAlex Wilson uint8_t mlxi_disable_hca_rsvd1[4]; 1220ebb7c6fdSAlex Wilson } mlxcx_cmd_disable_hca_in_t; 1221ebb7c6fdSAlex Wilson 1222ebb7c6fdSAlex Wilson typedef struct { 1223ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_disable_hca_head; 1224ebb7c6fdSAlex Wilson uint8_t mlxo_disable_hca_rsvd[8]; 1225ebb7c6fdSAlex Wilson } mlxcx_cmd_disable_hca_out_t; 1226ebb7c6fdSAlex Wilson 1227ebb7c6fdSAlex Wilson typedef struct { 1228ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_query_issi_head; 1229ebb7c6fdSAlex Wilson uint8_t mlxi_query_issi_rsvd[8]; 1230ebb7c6fdSAlex Wilson } mlxcx_cmd_query_issi_in_t; 1231ebb7c6fdSAlex Wilson 1232ebb7c6fdSAlex Wilson typedef struct { 1233ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_query_issi_head; 1234ebb7c6fdSAlex Wilson uint8_t mlxo_query_issi_rsv[2]; 1235ebb7c6fdSAlex Wilson uint16be_t mlxo_query_issi_current; 1236ebb7c6fdSAlex Wilson uint8_t mlxo_query_issi_rsvd1[20]; 1237ebb7c6fdSAlex Wilson /* 1238ebb7c6fdSAlex Wilson * To date we only support version 1 of the ISSI. The last byte has the 1239ebb7c6fdSAlex Wilson * ISSI data that we care about, therefore we phrase the struct this 1240ebb7c6fdSAlex Wilson * way. 1241ebb7c6fdSAlex Wilson */ 1242ebb7c6fdSAlex Wilson uint8_t mlxo_query_issi_rsvd2[79]; 1243ebb7c6fdSAlex Wilson uint8_t mlxo_supported_issi; 1244ebb7c6fdSAlex Wilson } mlxcx_cmd_query_issi_out_t; 1245ebb7c6fdSAlex Wilson 1246ebb7c6fdSAlex Wilson typedef struct { 1247ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_set_issi_head; 1248ebb7c6fdSAlex Wilson uint8_t mlxi_set_issi_rsvd[2]; 1249ebb7c6fdSAlex Wilson uint16be_t mlxi_set_issi_current; 1250ebb7c6fdSAlex Wilson uint8_t mlxi_set_iss_rsvd1[4]; 1251ebb7c6fdSAlex Wilson } mlxcx_cmd_set_issi_in_t; 1252ebb7c6fdSAlex Wilson 1253ebb7c6fdSAlex Wilson typedef struct { 1254ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_set_issi_head; 1255ebb7c6fdSAlex Wilson uint8_t mlxo_set_issi_rsvd[8]; 1256ebb7c6fdSAlex Wilson } mlxcx_cmd_set_issi_out_t; 1257ebb7c6fdSAlex Wilson 1258ebb7c6fdSAlex Wilson typedef struct { 1259ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_init_hca_head; 1260ebb7c6fdSAlex Wilson uint8_t mlxi_init_hca_rsvd[8]; 1261ebb7c6fdSAlex Wilson } mlxcx_cmd_init_hca_in_t; 1262ebb7c6fdSAlex Wilson 1263ebb7c6fdSAlex Wilson typedef struct { 1264ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_init_hca_head; 1265ebb7c6fdSAlex Wilson uint8_t mlxo_init_hca_rsvd[8]; 1266ebb7c6fdSAlex Wilson } mlxcx_cmd_init_hca_out_t; 1267ebb7c6fdSAlex Wilson 1268ebb7c6fdSAlex Wilson #define MLXCX_TEARDOWN_HCA_GRACEFUL 0x00 1269ebb7c6fdSAlex Wilson #define MLXCX_TEARDOWN_HCA_FORCE 0x01 1270ebb7c6fdSAlex Wilson 1271ebb7c6fdSAlex Wilson typedef struct { 1272ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_teardown_hca_head; 1273ebb7c6fdSAlex Wilson uint8_t mlxi_teardown_hca_rsvd[2]; 1274ebb7c6fdSAlex Wilson uint16be_t mlxi_teardown_hca_profile; 1275ebb7c6fdSAlex Wilson uint8_t mlxi_teardown_hca_rsvd1[4]; 1276ebb7c6fdSAlex Wilson } mlxcx_cmd_teardown_hca_in_t; 1277ebb7c6fdSAlex Wilson 1278ebb7c6fdSAlex Wilson typedef struct { 1279ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_teardown_hca_head; 1280ebb7c6fdSAlex Wilson uint8_t mlxo_teardown_hca_rsvd[7]; 1281ebb7c6fdSAlex Wilson uint8_t mlxo_teardown_hca_state; 1282ebb7c6fdSAlex Wilson } mlxcx_cmd_teardown_hca_out_t; 1283ebb7c6fdSAlex Wilson 1284ebb7c6fdSAlex Wilson #define MLXCX_QUERY_PAGES_OPMOD_BOOT 0x01 1285ebb7c6fdSAlex Wilson #define MLXCX_QUERY_PAGES_OPMOD_INIT 0x02 1286ebb7c6fdSAlex Wilson #define MLXCX_QUERY_PAGES_OPMOD_REGULAR 0x03 1287ebb7c6fdSAlex Wilson 1288ebb7c6fdSAlex Wilson typedef struct { 1289ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_query_pages_head; 1290ebb7c6fdSAlex Wilson uint8_t mlxi_query_pages_rsvd[2]; 1291ebb7c6fdSAlex Wilson uint16be_t mlxi_query_pages_func; 1292ebb7c6fdSAlex Wilson uint8_t mlxi_query_pages_rsvd1[4]; 1293ebb7c6fdSAlex Wilson } mlxcx_cmd_query_pages_in_t; 1294ebb7c6fdSAlex Wilson 1295ebb7c6fdSAlex Wilson typedef struct { 1296ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_query_pages_head; 1297ebb7c6fdSAlex Wilson uint8_t mlxo_query_pages_rsvd[2]; 1298ebb7c6fdSAlex Wilson uint16be_t mlxo_query_pages_func; 1299ebb7c6fdSAlex Wilson uint32be_t mlxo_query_pages_npages; 1300ebb7c6fdSAlex Wilson } mlxcx_cmd_query_pages_out_t; 1301ebb7c6fdSAlex Wilson 1302ebb7c6fdSAlex Wilson #define MLXCX_MANAGE_PAGES_OPMOD_ALLOC_FAIL 0x00 1303ebb7c6fdSAlex Wilson #define MLXCX_MANAGE_PAGES_OPMOD_GIVE_PAGES 0x01 1304ebb7c6fdSAlex Wilson #define MLXCX_MANAGE_PAGES_OPMOD_RETURN_PAGES 0x02 1305ebb7c6fdSAlex Wilson 1306ebb7c6fdSAlex Wilson /* 1307ebb7c6fdSAlex Wilson * This is an artificial limit that we're imposing on our actions. 13085f0e3176SPaul Winder * Large enough to limit the number of manage pages calls we have to 13095f0e3176SPaul Winder * make, but not so large that it will overflow any of the command 13105f0e3176SPaul Winder * mailboxes. 1311ebb7c6fdSAlex Wilson */ 13125f0e3176SPaul Winder #define MLXCX_MANAGE_PAGES_MAX_PAGES 4096 1313ebb7c6fdSAlex Wilson 1314ebb7c6fdSAlex Wilson typedef struct { 1315ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_manage_pages_head; 1316ebb7c6fdSAlex Wilson uint8_t mlxi_manage_pages_rsvd[2]; 1317ebb7c6fdSAlex Wilson uint16be_t mlxi_manage_pages_func; 1318ebb7c6fdSAlex Wilson uint32be_t mlxi_manage_pages_npages; 13195f0e3176SPaul Winder uint64be_t mlxi_manage_pages_pas[]; 1320ebb7c6fdSAlex Wilson } mlxcx_cmd_manage_pages_in_t; 1321ebb7c6fdSAlex Wilson 1322ebb7c6fdSAlex Wilson typedef struct { 1323ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_manage_pages_head; 1324ebb7c6fdSAlex Wilson uint32be_t mlxo_manage_pages_npages; 1325ebb7c6fdSAlex Wilson uint8_t mlxo_manage_pages_rsvd[4]; 13265f0e3176SPaul Winder uint64be_t mlxo_manage_pages_pas[]; 1327ebb7c6fdSAlex Wilson } mlxcx_cmd_manage_pages_out_t; 1328ebb7c6fdSAlex Wilson 1329ebb7c6fdSAlex Wilson typedef enum { 1330ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_MODE_MAX = 0x0, 1331ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_MODE_CURRENT = 0x1 1332ebb7c6fdSAlex Wilson } mlxcx_hca_cap_mode_t; 1333ebb7c6fdSAlex Wilson 1334ebb7c6fdSAlex Wilson typedef enum { 1335ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_GENERAL = 0x0, 1336ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_ETHERNET = 0x1, 1337ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_ODP = 0x2, 1338ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_ATOMIC = 0x3, 1339ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_ROCE = 0x4, 1340ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_IPoIB = 0x5, 1341ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_NIC_FLOW = 0x7, 1342ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_ESWITCH_FLOW = 0x8, 1343ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_ESWITCH = 0x9, 1344ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_VECTOR = 0xb, 1345ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_QoS = 0xc, 1346ebb7c6fdSAlex Wilson MLXCX_HCA_CAP_NVMEoF = 0xe 1347ebb7c6fdSAlex Wilson } mlxcx_hca_cap_type_t; 1348ebb7c6fdSAlex Wilson 1349ebb7c6fdSAlex Wilson typedef enum { 1350ebb7c6fdSAlex Wilson MLXCX_CAP_GENERAL_PORT_TYPE_IB = 0x0, 1351ebb7c6fdSAlex Wilson MLXCX_CAP_GENERAL_PORT_TYPE_ETHERNET = 0x1, 1352ebb7c6fdSAlex Wilson } mlxcx_hca_cap_general_port_type_t; 1353ebb7c6fdSAlex Wilson 1354ebb7c6fdSAlex Wilson typedef enum { 1355*85e4aa97SDan McDonald MLXCX_CAP_GENERAL_FLAGS_C_PCAM_REG = (1 << 5), 1356ebb7c6fdSAlex Wilson MLXCX_CAP_GENERAL_FLAGS_C_ESW_FLOW_TABLE = (1 << 8), 1357ebb7c6fdSAlex Wilson MLXCX_CAP_GENERAL_FLAGS_C_NIC_FLOW_TABLE = (1 << 9), 1358ebb7c6fdSAlex Wilson } mlxcx_hca_cap_general_flags_c_t; 1359ebb7c6fdSAlex Wilson 1360ebb7c6fdSAlex Wilson typedef struct { 1361ebb7c6fdSAlex Wilson uint8_t mlcap_general_access_other_hca_roce; 1362ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd[3]; 1363ebb7c6fdSAlex Wilson 1364ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd2[12]; 1365ebb7c6fdSAlex Wilson 1366ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_srq_sz; 1367ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_qp_sz; 1368ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd3[1]; 1369ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_qp; 1370ebb7c6fdSAlex Wilson 1371ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd4[1]; 1372ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_srq; 1373ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd5[2]; 1374ebb7c6fdSAlex Wilson 1375ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd6[1]; 1376ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_cq_sz; 1377*85e4aa97SDan McDonald uint8_t mlcap_general_access_register_user_max_fixed_mkey_bufs; 1378ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_cq; 1379ebb7c6fdSAlex Wilson 1380ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_eq_sz; 1381*85e4aa97SDan McDonald /* NOTE: bits 0xc0 of mkey_flags are now for relaxed_ordering. */ 1382*85e4aa97SDan McDonald bits8_t mlcap_general_log_max_mkey_flags; 1383ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd8[1]; 1384*85e4aa97SDan McDonald /* NOTE: bit 0x80 of max_eq is now for fast_teardown. */ 1385*85e4aa97SDan McDonald bits8_t mlcap_general_log_max_eq; 1386ebb7c6fdSAlex Wilson 1387ebb7c6fdSAlex Wilson uint8_t mlcap_general_max_indirection; 1388ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_mrw_sz_flags; 1389*85e4aa97SDan McDonald /* NOTE: bit 0x80 of bsf_list is now for force_teardown. */ 1390*85e4aa97SDan McDonald bits8_t mlcap_general_log_max_bsf_list_size_flags; 1391ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_klm_list_size_flags; 1392ebb7c6fdSAlex Wilson 1393ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd9[1]; 1394ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_ra_req_dc; 1395ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd10[1]; 1396ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_ra_res_dc; 1397ebb7c6fdSAlex Wilson 1398ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd11[1]; 1399ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_ra_req_qp; 1400ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd12[1]; 1401ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_ra_res_qp; 1402ebb7c6fdSAlex Wilson 1403ebb7c6fdSAlex Wilson uint16be_t mlcap_general_flags_a; 1404ebb7c6fdSAlex Wilson uint16be_t mlcap_general_gid_table_size; 1405ebb7c6fdSAlex Wilson 1406*85e4aa97SDan McDonald /* NOTE: bits 0x3ff of flags_b are for max_qp_count */ 1407ebb7c6fdSAlex Wilson bits16_t mlcap_general_flags_b; 1408ebb7c6fdSAlex Wilson uint16be_t mlcap_general_pkey_table_size; 1409ebb7c6fdSAlex Wilson 1410ebb7c6fdSAlex Wilson bits16_t mlcap_general_flags_c; 1411ebb7c6fdSAlex Wilson struct { 1412ebb7c6fdSAlex Wilson #if defined(_BIT_FIELDS_HTOL) 1413ebb7c6fdSAlex Wilson uint8_t mlcap_general_flags_d:6; 1414ebb7c6fdSAlex Wilson uint8_t mlcap_general_port_type:2; 1415ebb7c6fdSAlex Wilson #elif defined(_BIT_FIELDS_LTOH) 1416ebb7c6fdSAlex Wilson uint8_t mlcap_general_port_type:2; 1417ebb7c6fdSAlex Wilson uint8_t mlcap_general_flags_d:6; 1418ebb7c6fdSAlex Wilson #endif 1419ebb7c6fdSAlex Wilson }; 1420ebb7c6fdSAlex Wilson uint8_t mlcap_general_num_ports; 1421ebb7c6fdSAlex Wilson 1422ebb7c6fdSAlex Wilson struct { 1423ebb7c6fdSAlex Wilson #if defined(_BIT_FIELDS_HTOL) 1424ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd13:3; 1425ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_msg:5; 1426ebb7c6fdSAlex Wilson #elif defined(_BIT_FIELDS_LTOH) 1427ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_msg:5; 1428ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd13:3; 1429ebb7c6fdSAlex Wilson #endif 1430ebb7c6fdSAlex Wilson }; 1431ebb7c6fdSAlex Wilson uint8_t mlcap_general_max_tc; 1432ebb7c6fdSAlex Wilson bits16_t mlcap_general_flags_d_wol; 1433ebb7c6fdSAlex Wilson 1434ebb7c6fdSAlex Wilson uint16be_t mlcap_general_state_rate_support; 1435ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd14[1]; 1436ebb7c6fdSAlex Wilson struct { 1437ebb7c6fdSAlex Wilson #if defined(_BIT_FIELDS_HTOL) 1438ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd15:4; 1439ebb7c6fdSAlex Wilson uint8_t mlcap_general_cqe_version:4; 1440ebb7c6fdSAlex Wilson #elif defined(_BIT_FIELDS_LTOH) 1441ebb7c6fdSAlex Wilson uint8_t mlcap_general_cqe_version:4; 1442ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd15:4; 1443ebb7c6fdSAlex Wilson #endif 1444ebb7c6fdSAlex Wilson }; 1445ebb7c6fdSAlex Wilson 1446ebb7c6fdSAlex Wilson uint32be_t mlcap_general_flags_e; 1447ebb7c6fdSAlex Wilson 1448ebb7c6fdSAlex Wilson uint32be_t mlcap_general_flags_f; 1449ebb7c6fdSAlex Wilson 1450ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd16[1]; 1451ebb7c6fdSAlex Wilson uint8_t mlcap_general_uar_sz; 1452ebb7c6fdSAlex Wilson uint8_t mlcap_general_cnak; 1453ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_pg_sz; 1454ebb7c6fdSAlex Wilson uint8_t mlcap_general_rsvd17[32]; 1455ebb7c6fdSAlex Wilson bits8_t mlcap_general_log_max_rq_flags; 1456ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_sq; 1457ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_tir; 1458ebb7c6fdSAlex Wilson uint8_t mlcap_general_log_max_tis; 1459ebb7c6fdSAlex Wilson } mlxcx_hca_cap_general_caps_t; 1460ebb7c6fdSAlex Wilson 1461ebb7c6fdSAlex Wilson typedef enum { 1462ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_TUNNEL_STATELESS_VXLAN = 1 << 0, 1463ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_TUNNEL_STATELESS_GRE = 1 << 1, 1464ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_TUNNEL_LSO_CONST_OUT_IP_ID = 1 << 4, 1465ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_SCATTER_FCS = 1 << 6, 1466ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_REG_UMR_SQ = 1 << 7, 1467ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_SELF_LB_UC = 1 << 21, 1468ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_SELF_LB_MC = 1 << 22, 1469ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_SELF_LB_EN_MODIFIABLE = 1 << 23, 1470ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_WQE_VLAN_INSERT = 1 << 24, 1471ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_LRO_TIME_STAMP = 1 << 27, 1472ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_LRO_PSH_FLAG = 1 << 28, 1473ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_LRO_CAP = 1 << 29, 1474ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_VLAN_STRIP = 1 << 30, 1475ebb7c6fdSAlex Wilson MLXCX_ETH_CAP_CSUM_CAP = 1UL << 31 1476ebb7c6fdSAlex Wilson } mlxcx_hca_eth_cap_flags_t; 1477ebb7c6fdSAlex Wilson 1478ebb7c6fdSAlex Wilson /* CSTYLED */ 1479ebb7c6fdSAlex Wilson #define MLXCX_ETH_CAP_RSS_IND_TBL_CAP (bitdef_t){8, 0x00000f00} 1480ebb7c6fdSAlex Wilson /* CSTYLED */ 1481ebb7c6fdSAlex Wilson #define MLXCX_ETH_CAP_WQE_INLINE_MODE (bitdef_t){12, 0x00003000} 1482ebb7c6fdSAlex Wilson /* CSTYLED */ 1483ebb7c6fdSAlex Wilson #define MLXCX_ETH_CAP_MULTI_PKT_SEND_WQE (bitdef_t){14, 0x0000c000} 1484ebb7c6fdSAlex Wilson /* CSTYLED */ 1485ebb7c6fdSAlex Wilson #define MLXCX_ETH_CAP_MAX_LSO_CAP (bitdef_t){16, 0x001f0000} 1486ebb7c6fdSAlex Wilson /* CSTYLED */ 1487ebb7c6fdSAlex Wilson #define MLXCX_ETH_CAP_LRO_MAX_MSG_SZ_MODE (bitdef_t){25, 0x06000000} 1488ebb7c6fdSAlex Wilson 1489ebb7c6fdSAlex Wilson typedef struct { 1490ebb7c6fdSAlex Wilson bits32_t mlcap_eth_flags; 1491ebb7c6fdSAlex Wilson uint8_t mlcap_eth_rsvd[6]; 1492ebb7c6fdSAlex Wilson uint16be_t mlcap_eth_lro_min_mss_size; 1493ebb7c6fdSAlex Wilson uint8_t mlcap_eth_rsvd2[36]; 1494ebb7c6fdSAlex Wilson uint32be_t mlcap_eth_lro_timer_supported_periods[4]; 1495ebb7c6fdSAlex Wilson } mlxcx_hca_cap_eth_caps_t; 1496ebb7c6fdSAlex Wilson 1497ebb7c6fdSAlex Wilson typedef enum { 1498ebb7c6fdSAlex Wilson MLXCX_FLOW_CAP_PROPS_DECAP = 1 << 23, 1499ebb7c6fdSAlex Wilson MLXCX_FLOW_CAP_PROPS_ENCAP = 1 << 24, 1500ebb7c6fdSAlex Wilson MLXCX_FLOW_CAP_PROPS_MODIFY_TBL = 1 << 25, 1501ebb7c6fdSAlex Wilson MLXCX_FLOW_CAP_PROPS_MISS_TABLE = 1 << 26, 1502ebb7c6fdSAlex Wilson MLXCX_FLOW_CAP_PROPS_MODIFY_ROOT_TBL = 1 << 27, 1503ebb7c6fdSAlex Wilson MLXCX_FLOW_CAP_PROPS_MODIFY = 1 << 28, 1504ebb7c6fdSAlex Wilson MLXCX_FLOW_CAP_PROPS_COUNTER = 1 << 29, 1505ebb7c6fdSAlex Wilson MLXCX_FLOW_CAP_PROPS_TAG = 1 << 30, 1506ebb7c6fdSAlex Wilson MLXCX_FLOW_CAP_PROPS_SUPPORT = 1UL << 31 1507ebb7c6fdSAlex Wilson } mlxcx_hca_cap_flow_cap_props_flags_t; 1508ebb7c6fdSAlex Wilson 1509ebb7c6fdSAlex Wilson typedef struct { 1510ebb7c6fdSAlex Wilson bits32_t mlcap_flow_prop_flags; 1511ebb7c6fdSAlex Wilson uint8_t mlcap_flow_prop_log_max_ft_size; 1512ebb7c6fdSAlex Wilson uint8_t mlcap_flow_prop_rsvd[2]; 1513ebb7c6fdSAlex Wilson uint8_t mlcap_flow_prop_max_ft_level; 1514ebb7c6fdSAlex Wilson uint8_t mlcap_flow_prop_rsvd2[7]; 1515ebb7c6fdSAlex Wilson uint8_t mlcap_flow_prop_log_max_ft_num; 1516ebb7c6fdSAlex Wilson uint8_t mlcap_flow_prop_rsvd3[2]; 1517ebb7c6fdSAlex Wilson uint8_t mlcap_flow_prop_log_max_flow_counter; 1518ebb7c6fdSAlex Wilson uint8_t mlcap_flow_prop_log_max_destination; 1519ebb7c6fdSAlex Wilson uint8_t mlcap_flow_prop_rsvd4[3]; 1520ebb7c6fdSAlex Wilson uint8_t mlcap_flow_prop_log_max_flow; 1521ebb7c6fdSAlex Wilson uint8_t mlcap_flow_prop_rsvd5[8]; 1522ebb7c6fdSAlex Wilson bits32_t mlcap_flow_prop_support[4]; 1523ebb7c6fdSAlex Wilson bits32_t mlcap_flow_prop_bitmask[4]; 1524ebb7c6fdSAlex Wilson } mlxcx_hca_cap_flow_cap_props_t; 1525ebb7c6fdSAlex Wilson 1526ebb7c6fdSAlex Wilson typedef struct { 1527ebb7c6fdSAlex Wilson bits32_t mlcap_flow_flags; 1528ebb7c6fdSAlex Wilson uint8_t mlcap_flow_rsvd[60]; 1529ebb7c6fdSAlex Wilson mlxcx_hca_cap_flow_cap_props_t mlcap_flow_nic_rx; 1530ebb7c6fdSAlex Wilson mlxcx_hca_cap_flow_cap_props_t mlcap_flow_nic_rx_rdma; 1531ebb7c6fdSAlex Wilson mlxcx_hca_cap_flow_cap_props_t mlcap_flow_nic_rx_sniffer; 1532ebb7c6fdSAlex Wilson mlxcx_hca_cap_flow_cap_props_t mlcap_flow_nic_tx; 1533ebb7c6fdSAlex Wilson mlxcx_hca_cap_flow_cap_props_t mlcap_flow_nic_tx_rdma; 1534ebb7c6fdSAlex Wilson mlxcx_hca_cap_flow_cap_props_t mlcap_flow_nic_tx_sniffer; 1535ebb7c6fdSAlex Wilson } mlxcx_hca_cap_flow_caps_t; 1536ebb7c6fdSAlex Wilson 1537ebb7c6fdSAlex Wilson /* 1538ebb7c6fdSAlex Wilson * Size of a buffer that is required to hold the output data. 1539ebb7c6fdSAlex Wilson */ 1540ebb7c6fdSAlex Wilson #define MLXCX_HCA_CAP_SIZE 0x1000 1541ebb7c6fdSAlex Wilson 1542ebb7c6fdSAlex Wilson typedef struct { 1543ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_query_hca_cap_head; 1544ebb7c6fdSAlex Wilson uint8_t mlxi_query_hca_cap_rsvd[8]; 1545ebb7c6fdSAlex Wilson } mlxcx_cmd_query_hca_cap_in_t; 1546ebb7c6fdSAlex Wilson 1547ebb7c6fdSAlex Wilson typedef struct { 1548ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_query_hca_cap_head; 1549ebb7c6fdSAlex Wilson uint8_t mlxo_query_hca_cap_rsvd[8]; 1550ebb7c6fdSAlex Wilson uint8_t mlxo_query_hca_cap_data[MLXCX_HCA_CAP_SIZE]; 1551ebb7c6fdSAlex Wilson } mlxcx_cmd_query_hca_cap_out_t; 1552ebb7c6fdSAlex Wilson 1553ebb7c6fdSAlex Wilson typedef struct { 1554ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_set_driver_version_head; 1555ebb7c6fdSAlex Wilson uint8_t mlxi_set_driver_version_rsvd[8]; 1556ebb7c6fdSAlex Wilson char mlxi_set_driver_version_version[64]; 1557ebb7c6fdSAlex Wilson } mlxcx_cmd_set_driver_version_in_t; 1558ebb7c6fdSAlex Wilson 1559ebb7c6fdSAlex Wilson typedef struct { 1560ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_set_driver_version_head; 1561ebb7c6fdSAlex Wilson uint8_t mlxo_set_driver_version_rsvd[8]; 1562ebb7c6fdSAlex Wilson } mlxcx_cmd_set_driver_version_out_t; 1563ebb7c6fdSAlex Wilson 1564ebb7c6fdSAlex Wilson typedef struct { 1565ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_alloc_uar_head; 1566ebb7c6fdSAlex Wilson uint8_t mlxi_alloc_uar_rsvd[8]; 1567ebb7c6fdSAlex Wilson } mlxcx_cmd_alloc_uar_in_t; 1568ebb7c6fdSAlex Wilson 1569ebb7c6fdSAlex Wilson typedef struct { 1570ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_alloc_uar_head; 1571ebb7c6fdSAlex Wilson uint8_t mlxo_alloc_uar_rsvd; 1572ebb7c6fdSAlex Wilson uint24be_t mlxo_alloc_uar_uar; 1573ebb7c6fdSAlex Wilson uint8_t mlxo_alloc_uar_rsvd2[4]; 1574ebb7c6fdSAlex Wilson } mlxcx_cmd_alloc_uar_out_t; 1575ebb7c6fdSAlex Wilson 1576ebb7c6fdSAlex Wilson typedef struct { 1577ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_dealloc_uar_head; 1578ebb7c6fdSAlex Wilson uint8_t mlxi_dealloc_uar_rsvd; 1579ebb7c6fdSAlex Wilson uint24be_t mlxi_dealloc_uar_uar; 1580ebb7c6fdSAlex Wilson uint8_t mlxi_dealloc_uar_rsvd2[4]; 1581ebb7c6fdSAlex Wilson } mlxcx_cmd_dealloc_uar_in_t; 1582ebb7c6fdSAlex Wilson 1583ebb7c6fdSAlex Wilson typedef struct { 1584ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_dealloc_uar_head; 1585ebb7c6fdSAlex Wilson uint8_t mlxo_dealloc_uar_rsvd[8]; 1586ebb7c6fdSAlex Wilson } mlxcx_cmd_dealloc_uar_out_t; 1587ebb7c6fdSAlex Wilson 1588ebb7c6fdSAlex Wilson /* 1589ebb7c6fdSAlex Wilson * This is an artificial limit that we're imposing on our actions. 1590ebb7c6fdSAlex Wilson */ 1591ebb7c6fdSAlex Wilson #define MLXCX_CREATE_QUEUE_MAX_PAGES 128 1592ebb7c6fdSAlex Wilson 1593ebb7c6fdSAlex Wilson typedef struct { 1594ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_create_eq_head; 1595ebb7c6fdSAlex Wilson uint8_t mlxi_create_eq_rsvd[8]; 1596ebb7c6fdSAlex Wilson mlxcx_eventq_ctx_t mlxi_create_eq_context; 1597ebb7c6fdSAlex Wilson uint8_t mlxi_create_eq_rsvd2[8]; 1598ebb7c6fdSAlex Wilson uint64be_t mlxi_create_eq_event_bitmask; 1599ebb7c6fdSAlex Wilson uint8_t mlxi_create_eq_rsvd3[176]; 1600ebb7c6fdSAlex Wilson uint64be_t mlxi_create_eq_pas[MLXCX_CREATE_QUEUE_MAX_PAGES]; 1601ebb7c6fdSAlex Wilson } mlxcx_cmd_create_eq_in_t; 1602ebb7c6fdSAlex Wilson 1603ebb7c6fdSAlex Wilson typedef struct { 1604ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_create_eq_head; 1605ebb7c6fdSAlex Wilson uint8_t mlxo_create_eq_rsvd[3]; 1606ebb7c6fdSAlex Wilson uint8_t mlxo_create_eq_eqn; 1607ebb7c6fdSAlex Wilson uint8_t mlxo_create_eq_rsvd2[4]; 1608ebb7c6fdSAlex Wilson } mlxcx_cmd_create_eq_out_t; 1609ebb7c6fdSAlex Wilson 1610ebb7c6fdSAlex Wilson typedef struct { 1611ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_query_eq_head; 1612ebb7c6fdSAlex Wilson uint8_t mlxi_query_eq_rsvd[3]; 1613ebb7c6fdSAlex Wilson uint8_t mlxi_query_eq_eqn; 1614ebb7c6fdSAlex Wilson uint8_t mlxi_query_eq_rsvd2[4]; 1615ebb7c6fdSAlex Wilson } mlxcx_cmd_query_eq_in_t; 1616ebb7c6fdSAlex Wilson 1617ebb7c6fdSAlex Wilson typedef struct { 1618ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_query_eq_head; 1619ebb7c6fdSAlex Wilson uint8_t mlxo_query_eq_rsvd[8]; 1620ebb7c6fdSAlex Wilson mlxcx_eventq_ctx_t mlxo_query_eq_context; 1621ebb7c6fdSAlex Wilson uint8_t mlxi_query_eq_rsvd2[8]; 1622ebb7c6fdSAlex Wilson uint64be_t mlxi_query_eq_event_bitmask; 1623ebb7c6fdSAlex Wilson uint8_t mlxi_query_eq_rsvd3[176]; 1624ebb7c6fdSAlex Wilson uint64be_t mlxi_create_eq_pas[MLXCX_CREATE_QUEUE_MAX_PAGES]; 1625ebb7c6fdSAlex Wilson } mlxcx_cmd_query_eq_out_t; 1626ebb7c6fdSAlex Wilson 1627ebb7c6fdSAlex Wilson typedef struct { 1628ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_destroy_eq_head; 1629ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_eq_rsvd[3]; 1630ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_eq_eqn; 1631ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_eq_rsvd2[4]; 1632ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_eq_in_t; 1633ebb7c6fdSAlex Wilson 1634ebb7c6fdSAlex Wilson typedef struct { 1635ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_destroy_eq_head; 1636ebb7c6fdSAlex Wilson uint8_t mlxo_destroy_eq_rsvd[8]; 1637ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_eq_out_t; 1638ebb7c6fdSAlex Wilson 1639ebb7c6fdSAlex Wilson typedef struct { 1640ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_alloc_pd_head; 1641ebb7c6fdSAlex Wilson uint8_t mlxi_alloc_pd_rsvd[8]; 1642ebb7c6fdSAlex Wilson } mlxcx_cmd_alloc_pd_in_t; 1643ebb7c6fdSAlex Wilson 1644ebb7c6fdSAlex Wilson typedef struct { 1645ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_alloc_pd_head; 1646ebb7c6fdSAlex Wilson uint8_t mlxo_alloc_pd_rsvd; 1647ebb7c6fdSAlex Wilson uint24be_t mlxo_alloc_pd_pdn; 1648ebb7c6fdSAlex Wilson uint8_t mlxo_alloc_pd_rsvd2[4]; 1649ebb7c6fdSAlex Wilson } mlxcx_cmd_alloc_pd_out_t; 1650ebb7c6fdSAlex Wilson 1651ebb7c6fdSAlex Wilson typedef struct { 1652ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_dealloc_pd_head; 1653ebb7c6fdSAlex Wilson uint8_t mlxi_dealloc_pd_rsvd; 1654ebb7c6fdSAlex Wilson uint24be_t mlxi_dealloc_pd_pdn; 1655ebb7c6fdSAlex Wilson uint8_t mlxi_dealloc_pd_rsvd2[4]; 1656ebb7c6fdSAlex Wilson } mlxcx_cmd_dealloc_pd_in_t; 1657ebb7c6fdSAlex Wilson 1658ebb7c6fdSAlex Wilson typedef struct { 1659ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_dealloc_pd_head; 1660ebb7c6fdSAlex Wilson uint8_t mlxo_dealloc_pd_rsvd[8]; 1661ebb7c6fdSAlex Wilson } mlxcx_cmd_dealloc_pd_out_t; 1662ebb7c6fdSAlex Wilson 1663ebb7c6fdSAlex Wilson typedef struct { 1664ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_alloc_tdom_head; 1665ebb7c6fdSAlex Wilson uint8_t mlxi_alloc_tdom_rsvd[8]; 1666ebb7c6fdSAlex Wilson } mlxcx_cmd_alloc_tdom_in_t; 1667ebb7c6fdSAlex Wilson 1668ebb7c6fdSAlex Wilson typedef struct { 1669ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_alloc_tdom_head; 1670ebb7c6fdSAlex Wilson uint8_t mlxo_alloc_tdom_rsvd; 1671ebb7c6fdSAlex Wilson uint24be_t mlxo_alloc_tdom_tdomn; 1672ebb7c6fdSAlex Wilson uint8_t mlxo_alloc_tdom_rsvd2[4]; 1673ebb7c6fdSAlex Wilson } mlxcx_cmd_alloc_tdom_out_t; 1674ebb7c6fdSAlex Wilson 1675ebb7c6fdSAlex Wilson typedef struct { 1676ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_dealloc_tdom_head; 1677ebb7c6fdSAlex Wilson uint8_t mlxi_dealloc_tdom_rsvd; 1678ebb7c6fdSAlex Wilson uint24be_t mlxi_dealloc_tdom_tdomn; 1679ebb7c6fdSAlex Wilson uint8_t mlxi_dealloc_tdom_rsvd2[4]; 1680ebb7c6fdSAlex Wilson } mlxcx_cmd_dealloc_tdom_in_t; 1681ebb7c6fdSAlex Wilson 1682ebb7c6fdSAlex Wilson typedef struct { 1683ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_dealloc_tdom_head; 1684ebb7c6fdSAlex Wilson uint8_t mlxo_dealloc_tdom_rsvd[8]; 1685ebb7c6fdSAlex Wilson } mlxcx_cmd_dealloc_tdom_out_t; 1686ebb7c6fdSAlex Wilson 1687ebb7c6fdSAlex Wilson typedef struct { 1688ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_create_tir_head; 1689ebb7c6fdSAlex Wilson uint8_t mlxi_create_tir_rsvd[24]; 1690ebb7c6fdSAlex Wilson mlxcx_tir_ctx_t mlxi_create_tir_context; 1691ebb7c6fdSAlex Wilson } mlxcx_cmd_create_tir_in_t; 1692ebb7c6fdSAlex Wilson 1693ebb7c6fdSAlex Wilson typedef struct { 1694ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_create_tir_head; 1695ebb7c6fdSAlex Wilson uint8_t mlxo_create_tir_rsvd; 1696ebb7c6fdSAlex Wilson uint24be_t mlxo_create_tir_tirn; 1697ebb7c6fdSAlex Wilson uint8_t mlxo_create_tir_rsvd2[4]; 1698ebb7c6fdSAlex Wilson } mlxcx_cmd_create_tir_out_t; 1699ebb7c6fdSAlex Wilson 1700ebb7c6fdSAlex Wilson typedef struct { 1701ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_destroy_tir_head; 1702ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_tir_rsvd; 1703ebb7c6fdSAlex Wilson uint24be_t mlxi_destroy_tir_tirn; 1704ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_tir_rsvd2[4]; 1705ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_tir_in_t; 1706ebb7c6fdSAlex Wilson 1707ebb7c6fdSAlex Wilson typedef struct { 1708ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_destroy_tir_head; 1709ebb7c6fdSAlex Wilson uint8_t mlxo_destroy_tir_rsvd[8]; 1710ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_tir_out_t; 1711ebb7c6fdSAlex Wilson 1712ebb7c6fdSAlex Wilson typedef struct { 1713ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_create_tis_head; 1714ebb7c6fdSAlex Wilson uint8_t mlxi_create_tis_rsvd[24]; 1715ebb7c6fdSAlex Wilson mlxcx_tis_ctx_t mlxi_create_tis_context; 1716ebb7c6fdSAlex Wilson } mlxcx_cmd_create_tis_in_t; 1717ebb7c6fdSAlex Wilson 1718ebb7c6fdSAlex Wilson typedef struct { 1719ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_create_tis_head; 1720ebb7c6fdSAlex Wilson uint8_t mlxo_create_tis_rsvd; 1721ebb7c6fdSAlex Wilson uint24be_t mlxo_create_tis_tisn; 1722ebb7c6fdSAlex Wilson uint8_t mlxo_create_tis_rsvd2[4]; 1723ebb7c6fdSAlex Wilson } mlxcx_cmd_create_tis_out_t; 1724ebb7c6fdSAlex Wilson 1725ebb7c6fdSAlex Wilson typedef struct { 1726ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_destroy_tis_head; 1727ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_tis_rsvd; 1728ebb7c6fdSAlex Wilson uint24be_t mlxi_destroy_tis_tisn; 1729ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_tis_rsvd2[4]; 1730ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_tis_in_t; 1731ebb7c6fdSAlex Wilson 1732ebb7c6fdSAlex Wilson typedef struct { 1733ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_destroy_tis_head; 1734ebb7c6fdSAlex Wilson uint8_t mlxo_destroy_tis_rsvd[8]; 1735ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_tis_out_t; 1736ebb7c6fdSAlex Wilson 1737ebb7c6fdSAlex Wilson typedef struct { 1738ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_query_special_ctxs_head; 1739ebb7c6fdSAlex Wilson uint8_t mlxi_query_special_ctxs_rsvd[8]; 1740ebb7c6fdSAlex Wilson } mlxcx_cmd_query_special_ctxs_in_t; 1741ebb7c6fdSAlex Wilson 1742ebb7c6fdSAlex Wilson typedef struct { 1743ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_query_special_ctxs_head; 1744ebb7c6fdSAlex Wilson uint8_t mlxo_query_special_ctxs_rsvd[4]; 1745ebb7c6fdSAlex Wilson uint32be_t mlxo_query_special_ctxs_resd_lkey; 1746ebb7c6fdSAlex Wilson uint32be_t mlxo_query_special_ctxs_null_mkey; 1747ebb7c6fdSAlex Wilson uint8_t mlxo_query_special_ctxs_rsvd2[12]; 1748ebb7c6fdSAlex Wilson } mlxcx_cmd_query_special_ctxs_out_t; 1749ebb7c6fdSAlex Wilson 1750ebb7c6fdSAlex Wilson typedef enum { 1751ebb7c6fdSAlex Wilson MLXCX_VPORT_TYPE_VNIC = 0x0, 1752ebb7c6fdSAlex Wilson MLXCX_VPORT_TYPE_ESWITCH = 0x1, 1753ebb7c6fdSAlex Wilson MLXCX_VPORT_TYPE_UPLINK = 0x2, 1754ebb7c6fdSAlex Wilson } mlxcx_cmd_vport_op_mod_t; 1755ebb7c6fdSAlex Wilson 1756ebb7c6fdSAlex Wilson typedef struct { 1757ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_query_nic_vport_ctx_head; 1758ebb7c6fdSAlex Wilson uint8_t mlxi_query_nic_vport_ctx_other_vport; 1759ebb7c6fdSAlex Wilson uint8_t mlxi_query_nic_vport_ctx_rsvd[1]; 1760ebb7c6fdSAlex Wilson uint16be_t mlxi_query_nic_vport_ctx_vport_number; 1761ebb7c6fdSAlex Wilson uint8_t mlxi_query_nic_vport_ctx_allowed_list_type; 1762ebb7c6fdSAlex Wilson uint8_t mlxi_query_nic_vport_ctx_rsvd2[3]; 1763ebb7c6fdSAlex Wilson } mlxcx_cmd_query_nic_vport_ctx_in_t; 1764ebb7c6fdSAlex Wilson 1765ebb7c6fdSAlex Wilson typedef struct { 1766ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_query_nic_vport_ctx_head; 1767ebb7c6fdSAlex Wilson uint8_t mlxo_query_nic_vport_ctx_rsvd[8]; 1768ebb7c6fdSAlex Wilson mlxcx_nic_vport_ctx_t mlxo_query_nic_vport_ctx_context; 1769ebb7c6fdSAlex Wilson } mlxcx_cmd_query_nic_vport_ctx_out_t; 1770ebb7c6fdSAlex Wilson 1771ebb7c6fdSAlex Wilson typedef enum { 1772ebb7c6fdSAlex Wilson MLXCX_MODIFY_NIC_VPORT_CTX_ROCE_EN = 1 << 1, 1773ebb7c6fdSAlex Wilson MLXCX_MODIFY_NIC_VPORT_CTX_ADDR_LIST = 1 << 2, 1774ebb7c6fdSAlex Wilson MLXCX_MODIFY_NIC_VPORT_CTX_PERM_ADDR = 1 << 3, 1775ebb7c6fdSAlex Wilson MLXCX_MODIFY_NIC_VPORT_CTX_PROMISC = 1 << 4, 1776ebb7c6fdSAlex Wilson MLXCX_MODIFY_NIC_VPORT_CTX_EVENT = 1 << 5, 1777ebb7c6fdSAlex Wilson MLXCX_MODIFY_NIC_VPORT_CTX_MTU = 1 << 6, 1778ebb7c6fdSAlex Wilson MLXCX_MODIFY_NIC_VPORT_CTX_WQE_INLINE = 1 << 7, 1779ebb7c6fdSAlex Wilson MLXCX_MODIFY_NIC_VPORT_CTX_PORT_GUID = 1 << 8, 1780ebb7c6fdSAlex Wilson MLXCX_MODIFY_NIC_VPORT_CTX_NODE_GUID = 1 << 9, 1781ebb7c6fdSAlex Wilson } mlxcx_modify_nic_vport_ctx_fields_t; 1782ebb7c6fdSAlex Wilson 1783ebb7c6fdSAlex Wilson typedef struct { 1784ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_modify_nic_vport_ctx_head; 1785ebb7c6fdSAlex Wilson uint8_t mlxi_modify_nic_vport_ctx_other_vport; 1786ebb7c6fdSAlex Wilson uint8_t mlxi_modify_nic_vport_ctx_rsvd[1]; 1787ebb7c6fdSAlex Wilson uint16be_t mlxi_modify_nic_vport_ctx_vport_number; 1788ebb7c6fdSAlex Wilson uint32be_t mlxi_modify_nic_vport_ctx_field_select; 1789ebb7c6fdSAlex Wilson uint8_t mlxi_modify_nic_vport_ctx_rsvd2[240]; 1790ebb7c6fdSAlex Wilson mlxcx_nic_vport_ctx_t mlxi_modify_nic_vport_ctx_context; 1791ebb7c6fdSAlex Wilson } mlxcx_cmd_modify_nic_vport_ctx_in_t; 1792ebb7c6fdSAlex Wilson 1793ebb7c6fdSAlex Wilson typedef struct { 1794ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_modify_nic_vport_ctx_head; 1795ebb7c6fdSAlex Wilson uint8_t mlxo_modify_nic_vport_ctx_rsvd[8]; 1796ebb7c6fdSAlex Wilson } mlxcx_cmd_modify_nic_vport_ctx_out_t; 1797ebb7c6fdSAlex Wilson 1798ebb7c6fdSAlex Wilson typedef struct { 1799ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_query_vport_state_head; 1800ebb7c6fdSAlex Wilson uint8_t mlxi_query_vport_state_other_vport; 1801ebb7c6fdSAlex Wilson uint8_t mlxi_query_vport_state_rsvd[1]; 1802ebb7c6fdSAlex Wilson uint16be_t mlxi_query_vport_state_vport_number; 1803ebb7c6fdSAlex Wilson uint8_t mlxi_query_vport_state_rsvd2[4]; 1804ebb7c6fdSAlex Wilson } mlxcx_cmd_query_vport_state_in_t; 1805ebb7c6fdSAlex Wilson 1806ebb7c6fdSAlex Wilson /* CSTYLED */ 1807ebb7c6fdSAlex Wilson #define MLXCX_VPORT_ADMIN_STATE (bitdef_t){4, 0xF0} 1808ebb7c6fdSAlex Wilson /* CSTYLED */ 1809ebb7c6fdSAlex Wilson #define MLXCX_VPORT_OPER_STATE (bitdef_t){0, 0x0F} 1810ebb7c6fdSAlex Wilson 1811ebb7c6fdSAlex Wilson typedef enum { 1812ebb7c6fdSAlex Wilson MLXCX_VPORT_OPER_STATE_DOWN = 0x0, 1813ebb7c6fdSAlex Wilson MLXCX_VPORT_OPER_STATE_UP = 0x1, 1814ebb7c6fdSAlex Wilson } mlxcx_vport_oper_state_t; 1815ebb7c6fdSAlex Wilson 1816ebb7c6fdSAlex Wilson typedef enum { 1817ebb7c6fdSAlex Wilson MLXCX_VPORT_ADMIN_STATE_DOWN = 0x0, 1818ebb7c6fdSAlex Wilson MLXCX_VPORT_ADMIN_STATE_UP = 0x1, 1819ebb7c6fdSAlex Wilson MLXCX_VPORT_ADMIN_STATE_FOLLOW = 0x2, 1820ebb7c6fdSAlex Wilson } mlxcx_vport_admin_state_t; 1821ebb7c6fdSAlex Wilson 1822ebb7c6fdSAlex Wilson typedef struct { 1823ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_query_vport_state_head; 1824ebb7c6fdSAlex Wilson uint8_t mlxo_query_vport_state_rsvd[4]; 1825ebb7c6fdSAlex Wilson uint16be_t mlxo_query_vport_state_max_tx_speed; 1826ebb7c6fdSAlex Wilson uint8_t mlxo_query_vport_state_rsvd2[1]; 1827ebb7c6fdSAlex Wilson uint8_t mlxo_query_vport_state_state; 1828ebb7c6fdSAlex Wilson } mlxcx_cmd_query_vport_state_out_t; 1829ebb7c6fdSAlex Wilson 1830ebb7c6fdSAlex Wilson typedef struct { 1831ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_create_cq_head; 1832ebb7c6fdSAlex Wilson uint8_t mlxi_create_cq_rsvd[8]; 1833ebb7c6fdSAlex Wilson mlxcx_completionq_ctx_t mlxi_create_cq_context; 1834ebb7c6fdSAlex Wilson uint8_t mlxi_create_cq_rsvd2[192]; 1835ebb7c6fdSAlex Wilson uint64be_t mlxi_create_cq_pas[MLXCX_CREATE_QUEUE_MAX_PAGES]; 1836ebb7c6fdSAlex Wilson } mlxcx_cmd_create_cq_in_t; 1837ebb7c6fdSAlex Wilson 1838ebb7c6fdSAlex Wilson typedef struct { 1839ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_create_cq_head; 1840ebb7c6fdSAlex Wilson uint8_t mlxo_create_cq_rsvd; 1841ebb7c6fdSAlex Wilson uint24be_t mlxo_create_cq_cqn; 1842ebb7c6fdSAlex Wilson uint8_t mlxo_create_cq_rsvd2[4]; 1843ebb7c6fdSAlex Wilson } mlxcx_cmd_create_cq_out_t; 1844ebb7c6fdSAlex Wilson 1845ebb7c6fdSAlex Wilson typedef struct { 1846ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_destroy_cq_head; 1847ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_cq_rsvd; 1848ebb7c6fdSAlex Wilson uint24be_t mlxi_destroy_cq_cqn; 1849ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_cq_rsvd2[4]; 1850ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_cq_in_t; 1851ebb7c6fdSAlex Wilson 1852ebb7c6fdSAlex Wilson typedef struct { 1853ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_destroy_cq_head; 1854ebb7c6fdSAlex Wilson uint8_t mlxo_destroy_cq_rsvd[8]; 1855ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_cq_out_t; 1856ebb7c6fdSAlex Wilson 1857ebb7c6fdSAlex Wilson typedef struct { 1858ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_query_cq_head; 1859ebb7c6fdSAlex Wilson uint8_t mlxi_query_cq_rsvd; 1860ebb7c6fdSAlex Wilson uint24be_t mlxi_query_cq_cqn; 1861ebb7c6fdSAlex Wilson uint8_t mlxi_query_cq_rsvd2[4]; 1862ebb7c6fdSAlex Wilson } mlxcx_cmd_query_cq_in_t; 1863ebb7c6fdSAlex Wilson 1864ebb7c6fdSAlex Wilson typedef struct { 1865ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_query_cq_head; 1866ebb7c6fdSAlex Wilson uint8_t mlxo_query_cq_rsvd[8]; 1867ebb7c6fdSAlex Wilson mlxcx_completionq_ctx_t mlxo_query_cq_context; 1868ebb7c6fdSAlex Wilson uint8_t mlxo_query_cq_rsvd2[192]; 1869ebb7c6fdSAlex Wilson uint64be_t mlxo_query_cq_pas[MLXCX_CREATE_QUEUE_MAX_PAGES]; 1870ebb7c6fdSAlex Wilson } mlxcx_cmd_query_cq_out_t; 1871ebb7c6fdSAlex Wilson 1872ebb7c6fdSAlex Wilson typedef struct { 1873ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_create_rq_head; 1874ebb7c6fdSAlex Wilson uint8_t mlxi_create_rq_rsvd[24]; 1875ebb7c6fdSAlex Wilson mlxcx_rq_ctx_t mlxi_create_rq_context; 1876ebb7c6fdSAlex Wilson } mlxcx_cmd_create_rq_in_t; 1877ebb7c6fdSAlex Wilson 1878ebb7c6fdSAlex Wilson typedef struct { 1879ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_create_rq_head; 1880ebb7c6fdSAlex Wilson uint8_t mlxo_create_rq_rsvd; 1881ebb7c6fdSAlex Wilson uint24be_t mlxo_create_rq_rqn; 1882ebb7c6fdSAlex Wilson uint8_t mlxo_create_rq_rsvd2[4]; 1883ebb7c6fdSAlex Wilson } mlxcx_cmd_create_rq_out_t; 1884ebb7c6fdSAlex Wilson 1885ebb7c6fdSAlex Wilson /* CSTYLED */ 1886ebb7c6fdSAlex Wilson #define MLXCX_CMD_MODIFY_RQ_STATE (bitdef_t){ \ 1887ebb7c6fdSAlex Wilson .bit_shift = 4, .bit_mask = 0xF0 } 1888ebb7c6fdSAlex Wilson 1889ebb7c6fdSAlex Wilson typedef enum { 1890ebb7c6fdSAlex Wilson MLXCX_MODIFY_RQ_SCATTER_FCS = 1 << 2, 1891ebb7c6fdSAlex Wilson MLXCX_MODIFY_RQ_VSD = 1 << 1, 1892ebb7c6fdSAlex Wilson MLXCX_MODIFY_RQ_COUNTER_SET_ID = 1 << 3, 1893ebb7c6fdSAlex Wilson MLXCX_MODIFY_RQ_LWM = 1 << 0 1894ebb7c6fdSAlex Wilson } mlxcx_cmd_modify_rq_bitmask_t; 1895ebb7c6fdSAlex Wilson 1896ebb7c6fdSAlex Wilson typedef enum { 1897ebb7c6fdSAlex Wilson MLXCX_RQ_STATE_RST = 0x0, 1898ebb7c6fdSAlex Wilson MLXCX_RQ_STATE_RDY = 0x1, 1899ebb7c6fdSAlex Wilson MLXCX_RQ_STATE_ERR = 0x3 1900ebb7c6fdSAlex Wilson } mlxcx_rq_state_t; 1901ebb7c6fdSAlex Wilson 1902ebb7c6fdSAlex Wilson typedef struct { 1903ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_modify_rq_head; 1904ebb7c6fdSAlex Wilson bits8_t mlxi_modify_rq_state; 1905ebb7c6fdSAlex Wilson uint24be_t mlxi_modify_rq_rqn; 1906ebb7c6fdSAlex Wilson uint8_t mlxi_modify_rq_rsvd[4]; 1907ebb7c6fdSAlex Wilson uint64be_t mlxi_modify_rq_bitmask; 1908ebb7c6fdSAlex Wilson uint8_t mlxi_modify_rq_rsvd2[8]; 1909ebb7c6fdSAlex Wilson mlxcx_rq_ctx_t mlxi_modify_rq_context; 1910ebb7c6fdSAlex Wilson } mlxcx_cmd_modify_rq_in_t; 1911ebb7c6fdSAlex Wilson 1912ebb7c6fdSAlex Wilson typedef struct { 1913ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_modify_rq_head; 1914ebb7c6fdSAlex Wilson uint8_t mlxo_modify_rq_rsvd[8]; 1915ebb7c6fdSAlex Wilson } mlxcx_cmd_modify_rq_out_t; 1916ebb7c6fdSAlex Wilson 1917ebb7c6fdSAlex Wilson typedef struct { 1918ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_query_rq_head; 1919ebb7c6fdSAlex Wilson uint8_t mlxi_query_rq_rsvd; 1920ebb7c6fdSAlex Wilson uint24be_t mlxi_query_rq_rqn; 1921ebb7c6fdSAlex Wilson uint8_t mlxi_query_rq_rsvd2[4]; 1922ebb7c6fdSAlex Wilson } mlxcx_cmd_query_rq_in_t; 1923ebb7c6fdSAlex Wilson 1924ebb7c6fdSAlex Wilson typedef struct { 1925ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_query_rq_head; 1926ebb7c6fdSAlex Wilson uint8_t mlxo_query_rq_rsvd[24]; 1927ebb7c6fdSAlex Wilson mlxcx_rq_ctx_t mlxo_query_rq_context; 1928ebb7c6fdSAlex Wilson } mlxcx_cmd_query_rq_out_t; 1929ebb7c6fdSAlex Wilson 1930ebb7c6fdSAlex Wilson typedef struct { 1931ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_destroy_rq_head; 1932ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_rq_rsvd; 1933ebb7c6fdSAlex Wilson uint24be_t mlxi_destroy_rq_rqn; 1934ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_rq_rsvd2[4]; 1935ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_rq_in_t; 1936ebb7c6fdSAlex Wilson 1937ebb7c6fdSAlex Wilson typedef struct { 1938ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_destroy_rq_head; 1939ebb7c6fdSAlex Wilson uint8_t mlxo_destroy_rq_rsvd[8]; 1940ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_rq_out_t; 1941ebb7c6fdSAlex Wilson 1942ebb7c6fdSAlex Wilson typedef struct { 1943ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_create_sq_head; 1944ebb7c6fdSAlex Wilson uint8_t mlxi_create_sq_rsvd[24]; 1945ebb7c6fdSAlex Wilson mlxcx_sq_ctx_t mlxi_create_sq_context; 1946ebb7c6fdSAlex Wilson } mlxcx_cmd_create_sq_in_t; 1947ebb7c6fdSAlex Wilson 1948ebb7c6fdSAlex Wilson typedef struct { 1949ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_create_sq_head; 1950ebb7c6fdSAlex Wilson uint8_t mlxo_create_sq_rsvd; 1951ebb7c6fdSAlex Wilson uint24be_t mlxo_create_sq_sqn; 1952ebb7c6fdSAlex Wilson uint8_t mlxo_create_sq_rsvd2[4]; 1953ebb7c6fdSAlex Wilson } mlxcx_cmd_create_sq_out_t; 1954ebb7c6fdSAlex Wilson 1955ebb7c6fdSAlex Wilson /* CSTYLED */ 1956ebb7c6fdSAlex Wilson #define MLXCX_CMD_MODIFY_SQ_STATE (bitdef_t){ \ 1957ebb7c6fdSAlex Wilson .bit_shift = 4, .bit_mask = 0xF0 } 1958ebb7c6fdSAlex Wilson 1959ebb7c6fdSAlex Wilson typedef enum { 1960ebb7c6fdSAlex Wilson MLXCX_MODIFY_SQ_PACKET_PACING_INDEX = 1 << 0, 1961ebb7c6fdSAlex Wilson } mlxcx_cmd_modify_sq_bitmask_t; 1962ebb7c6fdSAlex Wilson 1963ebb7c6fdSAlex Wilson typedef enum { 1964ebb7c6fdSAlex Wilson MLXCX_SQ_STATE_RST = 0x0, 1965ebb7c6fdSAlex Wilson MLXCX_SQ_STATE_RDY = 0x1, 1966ebb7c6fdSAlex Wilson MLXCX_SQ_STATE_ERR = 0x3 1967ebb7c6fdSAlex Wilson } mlxcx_sq_state_t; 1968ebb7c6fdSAlex Wilson 1969ebb7c6fdSAlex Wilson typedef struct { 1970ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_modify_sq_head; 1971ebb7c6fdSAlex Wilson bits8_t mlxi_modify_sq_state; 1972ebb7c6fdSAlex Wilson uint24be_t mlxi_modify_sq_sqn; 1973ebb7c6fdSAlex Wilson uint8_t mlxi_modify_sq_rsvd[4]; 1974ebb7c6fdSAlex Wilson uint64be_t mlxi_modify_sq_bitmask; 1975ebb7c6fdSAlex Wilson uint8_t mlxi_modify_sq_rsvd2[8]; 1976ebb7c6fdSAlex Wilson mlxcx_sq_ctx_t mlxi_modify_sq_context; 1977ebb7c6fdSAlex Wilson } mlxcx_cmd_modify_sq_in_t; 1978ebb7c6fdSAlex Wilson 1979ebb7c6fdSAlex Wilson typedef struct { 1980ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_modify_sq_head; 1981ebb7c6fdSAlex Wilson uint8_t mlxo_modify_sq_rsvd[8]; 1982ebb7c6fdSAlex Wilson } mlxcx_cmd_modify_sq_out_t; 1983ebb7c6fdSAlex Wilson 1984ebb7c6fdSAlex Wilson typedef struct { 1985ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_query_sq_head; 1986ebb7c6fdSAlex Wilson uint8_t mlxi_query_sq_rsvd; 1987ebb7c6fdSAlex Wilson uint24be_t mlxi_query_sq_sqn; 1988ebb7c6fdSAlex Wilson uint8_t mlxi_query_sq_rsvd2[4]; 1989ebb7c6fdSAlex Wilson } mlxcx_cmd_query_sq_in_t; 1990ebb7c6fdSAlex Wilson 1991ebb7c6fdSAlex Wilson typedef struct { 1992ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_query_sq_head; 1993ebb7c6fdSAlex Wilson uint8_t mlxo_query_sq_rsvd[24]; 1994ebb7c6fdSAlex Wilson mlxcx_sq_ctx_t mlxo_query_sq_context; 1995ebb7c6fdSAlex Wilson } mlxcx_cmd_query_sq_out_t; 1996ebb7c6fdSAlex Wilson 1997ebb7c6fdSAlex Wilson typedef struct { 1998ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_destroy_sq_head; 1999ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_sq_rsvd; 2000ebb7c6fdSAlex Wilson uint24be_t mlxi_destroy_sq_sqn; 2001ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_sq_rsvd2[4]; 2002ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_sq_in_t; 2003ebb7c6fdSAlex Wilson 2004ebb7c6fdSAlex Wilson typedef struct { 2005ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_destroy_sq_head; 2006ebb7c6fdSAlex Wilson uint8_t mlxo_destroy_sq_rsvd[8]; 2007ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_sq_out_t; 2008ebb7c6fdSAlex Wilson 2009ebb7c6fdSAlex Wilson typedef struct { 2010ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_create_rqt_head; 2011ebb7c6fdSAlex Wilson uint8_t mlxi_create_rqt_rsvd[24]; 2012ebb7c6fdSAlex Wilson mlxcx_rqtable_ctx_t mlxi_create_rqt_context; 2013ebb7c6fdSAlex Wilson } mlxcx_cmd_create_rqt_in_t; 2014ebb7c6fdSAlex Wilson 2015ebb7c6fdSAlex Wilson typedef struct { 2016ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_create_rqt_head; 2017ebb7c6fdSAlex Wilson uint8_t mlxo_create_rqt_rsvd; 2018ebb7c6fdSAlex Wilson uint24be_t mlxo_create_rqt_rqtn; 2019ebb7c6fdSAlex Wilson uint8_t mlxo_create_rqt_rsvd2[4]; 2020ebb7c6fdSAlex Wilson } mlxcx_cmd_create_rqt_out_t; 2021ebb7c6fdSAlex Wilson 2022ebb7c6fdSAlex Wilson typedef struct { 2023ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_destroy_rqt_head; 2024ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_rqt_rsvd; 2025ebb7c6fdSAlex Wilson uint24be_t mlxi_destroy_rqt_rqtn; 2026ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_rqt_rsvd2[4]; 2027ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_rqt_in_t; 2028ebb7c6fdSAlex Wilson 2029ebb7c6fdSAlex Wilson typedef struct { 2030ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_destroy_rqt_head; 2031ebb7c6fdSAlex Wilson uint8_t mlxo_destroy_rqt_rsvd[8]; 2032ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_rqt_out_t; 2033ebb7c6fdSAlex Wilson 2034ebb7c6fdSAlex Wilson typedef enum { 2035ebb7c6fdSAlex Wilson MLXCX_FLOW_TABLE_NIC_RX = 0x0, 2036ebb7c6fdSAlex Wilson MLXCX_FLOW_TABLE_NIC_TX = 0x1, 2037ebb7c6fdSAlex Wilson MLXCX_FLOW_TABLE_ESW_OUT = 0x2, 2038ebb7c6fdSAlex Wilson MLXCX_FLOW_TABLE_ESW_IN = 0x3, 2039ebb7c6fdSAlex Wilson MLXCX_FLOW_TABLE_ESW_FDB = 0x4, 2040ebb7c6fdSAlex Wilson MLXCX_FLOW_TABLE_NIC_RX_SNIFF = 0x5, 2041ebb7c6fdSAlex Wilson MLXCX_FLOW_TABLE_NIC_TX_SNIFF = 0x6, 2042ebb7c6fdSAlex Wilson MLXCX_FLOW_TABLE_NIC_RX_RDMA = 0x7, 2043ebb7c6fdSAlex Wilson MLXCX_FLOW_TABLE_NIC_TX_RDMA = 0x8 2044ebb7c6fdSAlex Wilson } mlxcx_flow_table_type_t; 2045ebb7c6fdSAlex Wilson 2046ebb7c6fdSAlex Wilson typedef struct { 2047ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_create_flow_table_head; 2048ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_table_other_vport; 2049ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_table_rsvd; 2050ebb7c6fdSAlex Wilson uint16be_t mlxi_create_flow_table_vport_number; 2051ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_table_rsvd2[4]; 2052ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_table_table_type; 2053ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_table_rsvd3[7]; 2054ebb7c6fdSAlex Wilson mlxcx_flow_table_ctx_t mlxi_create_flow_table_context; 2055ebb7c6fdSAlex Wilson } mlxcx_cmd_create_flow_table_in_t; 2056ebb7c6fdSAlex Wilson 2057ebb7c6fdSAlex Wilson typedef struct { 2058ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_create_flow_table_head; 2059ebb7c6fdSAlex Wilson uint8_t mlxo_create_flow_table_rsvd; 2060ebb7c6fdSAlex Wilson uint24be_t mlxo_create_flow_table_table_id; 2061ebb7c6fdSAlex Wilson uint8_t mlxo_create_flow_table_rsvd2[4]; 2062ebb7c6fdSAlex Wilson } mlxcx_cmd_create_flow_table_out_t; 2063ebb7c6fdSAlex Wilson 2064ebb7c6fdSAlex Wilson typedef struct { 2065ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_destroy_flow_table_head; 2066ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_table_other_vport; 2067ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_table_rsvd; 2068ebb7c6fdSAlex Wilson uint16be_t mlxi_destroy_flow_table_vport_number; 2069ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_table_rsvd2[4]; 2070ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_table_table_type; 2071ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_table_rsvd3[4]; 2072ebb7c6fdSAlex Wilson uint24be_t mlxi_destroy_flow_table_table_id; 2073ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_table_rsvd4[4]; 2074ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_flow_table_in_t; 2075ebb7c6fdSAlex Wilson 2076ebb7c6fdSAlex Wilson typedef struct { 2077ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_destroy_flow_table_head; 2078ebb7c6fdSAlex Wilson uint8_t mlxo_destroy_flow_table_rsvd[8]; 2079ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_flow_table_out_t; 2080ebb7c6fdSAlex Wilson 2081ebb7c6fdSAlex Wilson typedef struct { 2082ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_set_flow_table_root_head; 2083ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_root_other_vport; 2084ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_root_rsvd; 2085ebb7c6fdSAlex Wilson uint16be_t mlxi_set_flow_table_root_vport_number; 2086ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_root_rsvd2[4]; 2087ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_root_table_type; 2088ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_root_rsvd3[4]; 2089ebb7c6fdSAlex Wilson uint24be_t mlxi_set_flow_table_root_table_id; 2090ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_root_rsvd4[4]; 20917cbbb9b5SAlex Wilson uint8_t mlxi_set_flow_table_root_esw_owner_vhca_id_valid; 20927cbbb9b5SAlex Wilson uint8_t mlxi_set_flow_table_root_rsvd5; 20937cbbb9b5SAlex Wilson uint16be_t mlxi_set_flow_table_root_esw_owner_vhca_id; 20947cbbb9b5SAlex Wilson uint8_t mlxi_set_flow_table_root_rsvd6[32]; 2095ebb7c6fdSAlex Wilson } mlxcx_cmd_set_flow_table_root_in_t; 2096ebb7c6fdSAlex Wilson 2097ebb7c6fdSAlex Wilson typedef struct { 2098ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_set_flow_table_root_head; 2099ebb7c6fdSAlex Wilson uint8_t mlxo_set_flow_table_root_rsvd[8]; 2100ebb7c6fdSAlex Wilson } mlxcx_cmd_set_flow_table_root_out_t; 2101ebb7c6fdSAlex Wilson 2102ebb7c6fdSAlex Wilson typedef enum { 2103ebb7c6fdSAlex Wilson MLXCX_FLOW_GROUP_MATCH_OUTER_HDRS = 1 << 0, 2104ebb7c6fdSAlex Wilson MLXCX_FLOW_GROUP_MATCH_MISC_PARAMS = 1 << 1, 2105ebb7c6fdSAlex Wilson MLXCX_FLOW_GROUP_MATCH_INNER_HDRS = 1 << 2, 2106ebb7c6fdSAlex Wilson } mlxcx_flow_group_match_criteria_t; 2107ebb7c6fdSAlex Wilson 2108ebb7c6fdSAlex Wilson typedef struct { 2109ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_create_flow_group_head; 2110ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_group_other_vport; 2111ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_group_rsvd; 2112ebb7c6fdSAlex Wilson uint16be_t mlxi_create_flow_group_vport_number; 2113ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_group_rsvd2[4]; 2114ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_group_table_type; 2115ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_group_rsvd3[4]; 2116ebb7c6fdSAlex Wilson uint24be_t mlxi_create_flow_group_table_id; 2117ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_group_rsvd4[4]; 2118ebb7c6fdSAlex Wilson uint32be_t mlxi_create_flow_group_start_flow_index; 2119ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_group_rsvd5[4]; 2120ebb7c6fdSAlex Wilson uint32be_t mlxi_create_flow_group_end_flow_index; 2121ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_group_rsvd6[23]; 2122ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_group_match_criteria_en; 2123ebb7c6fdSAlex Wilson mlxcx_flow_match_t mlxi_create_flow_group_match_criteria; 2124ebb7c6fdSAlex Wilson uint8_t mlxi_create_flow_group_rsvd7[448]; 2125ebb7c6fdSAlex Wilson } mlxcx_cmd_create_flow_group_in_t; 2126ebb7c6fdSAlex Wilson 2127ebb7c6fdSAlex Wilson typedef struct { 2128ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_create_flow_group_head; 2129ebb7c6fdSAlex Wilson uint8_t mlxo_create_flow_group_rsvd; 2130ebb7c6fdSAlex Wilson uint24be_t mlxo_create_flow_group_group_id; 2131ebb7c6fdSAlex Wilson uint8_t mlxo_create_flow_group_rsvd2[4]; 2132ebb7c6fdSAlex Wilson } mlxcx_cmd_create_flow_group_out_t; 2133ebb7c6fdSAlex Wilson 2134ebb7c6fdSAlex Wilson typedef struct { 2135ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_destroy_flow_group_head; 2136ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_group_other_vport; 2137ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_group_rsvd; 2138ebb7c6fdSAlex Wilson uint16be_t mlxi_destroy_flow_group_vport_number; 2139ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_group_rsvd2[4]; 2140ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_group_table_type; 2141ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_group_rsvd3[4]; 2142ebb7c6fdSAlex Wilson uint24be_t mlxi_destroy_flow_group_table_id; 2143ebb7c6fdSAlex Wilson uint32be_t mlxi_destroy_flow_group_group_id; 2144ebb7c6fdSAlex Wilson uint8_t mlxi_destroy_flow_group_rsvd4[36]; 2145ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_flow_group_in_t; 2146ebb7c6fdSAlex Wilson 2147ebb7c6fdSAlex Wilson typedef struct { 2148ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_destroy_flow_group_head; 2149ebb7c6fdSAlex Wilson uint8_t mlxo_destroy_flow_group_rsvd[8]; 2150ebb7c6fdSAlex Wilson } mlxcx_cmd_destroy_flow_group_out_t; 2151ebb7c6fdSAlex Wilson 2152ebb7c6fdSAlex Wilson typedef enum { 2153ebb7c6fdSAlex Wilson MLXCX_CMD_FLOW_ENTRY_SET_NEW = 0, 2154ebb7c6fdSAlex Wilson MLXCX_CMD_FLOW_ENTRY_MODIFY = 1, 2155ebb7c6fdSAlex Wilson } mlxcx_cmd_set_flow_table_entry_opmod_t; 2156ebb7c6fdSAlex Wilson 2157ebb7c6fdSAlex Wilson typedef enum { 2158ebb7c6fdSAlex Wilson MLXCX_CMD_FLOW_ENTRY_SET_ACTION = 1 << 0, 2159ebb7c6fdSAlex Wilson MLXCX_CMD_FLOW_ENTRY_SET_FLOW_TAG = 1 << 1, 2160ebb7c6fdSAlex Wilson MLXCX_CMD_FLOW_ENTRY_SET_DESTINATION = 1 << 2, 2161ebb7c6fdSAlex Wilson MLXCX_CMD_FLOW_ENTRY_SET_COUNTERS = 1 << 3, 2162ebb7c6fdSAlex Wilson MLXCX_CMD_FLOW_ENTRY_SET_ENCAP = 1 << 4 2163ebb7c6fdSAlex Wilson } mlxcx_cmd_set_flow_table_entry_bitmask_t; 2164ebb7c6fdSAlex Wilson 2165ebb7c6fdSAlex Wilson typedef struct { 2166ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_set_flow_table_entry_head; 2167ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_entry_other_vport; 2168ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_entry_rsvd; 2169ebb7c6fdSAlex Wilson uint16be_t mlxi_set_flow_table_entry_vport_number; 2170ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_entry_rsvd2[4]; 2171ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_entry_table_type; 2172ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_entry_rsvd3[4]; 2173ebb7c6fdSAlex Wilson uint24be_t mlxi_set_flow_table_entry_table_id; 2174ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_entry_rsvd4[3]; 2175ebb7c6fdSAlex Wilson bits8_t mlxi_set_flow_table_entry_modify_bitmask; 2176ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_entry_rsvd5[4]; 2177ebb7c6fdSAlex Wilson uint32be_t mlxi_set_flow_table_entry_flow_index; 2178ebb7c6fdSAlex Wilson uint8_t mlxi_set_flow_table_entry_rsvd6[28]; 2179ebb7c6fdSAlex Wilson mlxcx_flow_entry_ctx_t mlxi_set_flow_table_entry_context; 2180ebb7c6fdSAlex Wilson } mlxcx_cmd_set_flow_table_entry_in_t; 2181ebb7c6fdSAlex Wilson 2182ebb7c6fdSAlex Wilson typedef struct { 2183ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_set_flow_table_entry_head; 2184ebb7c6fdSAlex Wilson uint8_t mlxo_set_flow_table_entry_rsvd[8]; 2185ebb7c6fdSAlex Wilson } mlxcx_cmd_set_flow_table_entry_out_t; 2186ebb7c6fdSAlex Wilson 2187ebb7c6fdSAlex Wilson typedef struct { 2188ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_delete_flow_table_entry_head; 2189ebb7c6fdSAlex Wilson uint8_t mlxi_delete_flow_table_entry_other_vport; 2190ebb7c6fdSAlex Wilson uint8_t mlxi_delete_flow_table_entry_rsvd; 2191ebb7c6fdSAlex Wilson uint16be_t mlxi_delete_flow_table_entry_vport_number; 2192ebb7c6fdSAlex Wilson uint8_t mlxi_delete_flow_table_entry_rsvd2[4]; 2193ebb7c6fdSAlex Wilson uint8_t mlxi_delete_flow_table_entry_table_type; 2194ebb7c6fdSAlex Wilson uint8_t mlxi_delete_flow_table_entry_rsvd3[4]; 2195ebb7c6fdSAlex Wilson uint24be_t mlxi_delete_flow_table_entry_table_id; 2196ebb7c6fdSAlex Wilson uint8_t mlxi_delete_flow_table_entry_rsvd4[8]; 2197ebb7c6fdSAlex Wilson uint32be_t mlxi_delete_flow_table_entry_flow_index; 2198ebb7c6fdSAlex Wilson uint8_t mlxi_delete_flow_table_entry_rsvd5[28]; 2199ebb7c6fdSAlex Wilson } mlxcx_cmd_delete_flow_table_entry_in_t; 2200ebb7c6fdSAlex Wilson 2201ebb7c6fdSAlex Wilson typedef struct { 2202ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_delete_flow_table_entry_head; 2203ebb7c6fdSAlex Wilson uint8_t mlxo_delete_flow_table_entry_rsvd[8]; 2204ebb7c6fdSAlex Wilson } mlxcx_cmd_delete_flow_table_entry_out_t; 2205ebb7c6fdSAlex Wilson 2206ebb7c6fdSAlex Wilson typedef enum { 2207ebb7c6fdSAlex Wilson MLXCX_CMD_CONFIG_INT_MOD_READ = 1, 2208ebb7c6fdSAlex Wilson MLXCX_CMD_CONFIG_INT_MOD_WRITE = 0 2209ebb7c6fdSAlex Wilson } mlxcx_cmd_config_int_mod_opmod_t; 2210ebb7c6fdSAlex Wilson 2211ebb7c6fdSAlex Wilson typedef struct { 2212ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_config_int_mod_head; 2213ebb7c6fdSAlex Wilson uint16be_t mlxi_config_int_mod_min_delay; 2214ebb7c6fdSAlex Wilson uint16be_t mlxi_config_int_mod_int_vector; 2215ebb7c6fdSAlex Wilson uint8_t mlxi_config_int_mod_rsvd[4]; 2216ebb7c6fdSAlex Wilson } mlxcx_cmd_config_int_mod_in_t; 2217ebb7c6fdSAlex Wilson 2218ebb7c6fdSAlex Wilson typedef struct { 2219ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_config_int_mod_head; 2220ebb7c6fdSAlex Wilson uint16be_t mlxo_config_int_mod_min_delay; 2221ebb7c6fdSAlex Wilson uint16be_t mlxo_config_int_mod_int_vector; 2222ebb7c6fdSAlex Wilson uint8_t mlxo_config_int_mod_rsvd[4]; 2223ebb7c6fdSAlex Wilson } mlxcx_cmd_config_int_mod_out_t; 2224ebb7c6fdSAlex Wilson 2225ebb7c6fdSAlex Wilson typedef struct { 2226ebb7c6fdSAlex Wilson uint8_t mlrd_pmtu_rsvd; 2227ebb7c6fdSAlex Wilson uint8_t mlrd_pmtu_local_port; 2228ebb7c6fdSAlex Wilson uint8_t mlrd_pmtu_rsvd2[2]; 2229ebb7c6fdSAlex Wilson 2230ebb7c6fdSAlex Wilson uint16be_t mlrd_pmtu_max_mtu; 2231ebb7c6fdSAlex Wilson uint8_t mlrd_pmtu_rsvd3[2]; 2232ebb7c6fdSAlex Wilson 2233ebb7c6fdSAlex Wilson uint16be_t mlrd_pmtu_admin_mtu; 2234ebb7c6fdSAlex Wilson uint8_t mlrd_pmtu_rsvd4[2]; 2235ebb7c6fdSAlex Wilson 2236ebb7c6fdSAlex Wilson uint16be_t mlrd_pmtu_oper_mtu; 2237ebb7c6fdSAlex Wilson uint8_t mlrd_pmtu_rsvd5[2]; 2238ebb7c6fdSAlex Wilson } mlxcx_reg_pmtu_t; 2239ebb7c6fdSAlex Wilson 2240ebb7c6fdSAlex Wilson typedef enum { 2241ebb7c6fdSAlex Wilson MLXCX_PORT_STATUS_UP = 1, 2242ebb7c6fdSAlex Wilson MLXCX_PORT_STATUS_DOWN = 2, 2243ebb7c6fdSAlex Wilson MLXCX_PORT_STATUS_UP_ONCE = 3, 2244ebb7c6fdSAlex Wilson MLXCX_PORT_STATUS_DISABLED = 4, 2245ebb7c6fdSAlex Wilson } mlxcx_port_status_t; 2246ebb7c6fdSAlex Wilson 2247ebb7c6fdSAlex Wilson typedef enum { 2248ebb7c6fdSAlex Wilson MLXCX_PAOS_ADMIN_ST_EN = 1UL << 31, 2249ebb7c6fdSAlex Wilson } mlxcx_paos_flags_t; 2250ebb7c6fdSAlex Wilson 2251ebb7c6fdSAlex Wilson typedef struct { 2252ebb7c6fdSAlex Wilson uint8_t mlrd_paos_swid; 2253ebb7c6fdSAlex Wilson uint8_t mlrd_paos_local_port; 2254ebb7c6fdSAlex Wilson uint8_t mlrd_paos_admin_status; 2255ebb7c6fdSAlex Wilson uint8_t mlrd_paos_oper_status; 2256ebb7c6fdSAlex Wilson bits32_t mlrd_paos_flags; 2257ebb7c6fdSAlex Wilson uint8_t mlrd_paos_rsvd[8]; 2258ebb7c6fdSAlex Wilson } mlxcx_reg_paos_t; 2259ebb7c6fdSAlex Wilson 2260ebb7c6fdSAlex Wilson typedef enum { 2261*85e4aa97SDan McDonald MLXCX_PROTO_NONE = 0, 2262ebb7c6fdSAlex Wilson MLXCX_PROTO_SGMII = 1 << 0, 2263ebb7c6fdSAlex Wilson MLXCX_PROTO_1000BASE_KX = 1 << 1, 2264ebb7c6fdSAlex Wilson MLXCX_PROTO_10GBASE_CX4 = 1 << 2, 2265ebb7c6fdSAlex Wilson MLXCX_PROTO_10GBASE_KX4 = 1 << 3, 2266ebb7c6fdSAlex Wilson MLXCX_PROTO_10GBASE_KR = 1 << 4, 2267ebb7c6fdSAlex Wilson MLXCX_PROTO_UNKNOWN_1 = 1 << 5, 2268ebb7c6fdSAlex Wilson MLXCX_PROTO_40GBASE_CR4 = 1 << 6, 2269ebb7c6fdSAlex Wilson MLXCX_PROTO_40GBASE_KR4 = 1 << 7, 2270ebb7c6fdSAlex Wilson MLXCX_PROTO_UNKNOWN_2 = 1 << 8, 2271ebb7c6fdSAlex Wilson MLXCX_PROTO_SGMII_100BASE = 1 << 9, 2272ebb7c6fdSAlex Wilson MLXCX_PROTO_UNKNOWN_3 = 1 << 10, 2273ebb7c6fdSAlex Wilson MLXCX_PROTO_UNKNOWN_4 = 1 << 11, 2274ebb7c6fdSAlex Wilson MLXCX_PROTO_10GBASE_CR = 1 << 12, 2275ebb7c6fdSAlex Wilson MLXCX_PROTO_10GBASE_SR = 1 << 13, 2276ebb7c6fdSAlex Wilson MLXCX_PROTO_10GBASE_ER_LR = 1 << 14, 2277ebb7c6fdSAlex Wilson MLXCX_PROTO_40GBASE_SR4 = 1 << 15, 2278ebb7c6fdSAlex Wilson MLXCX_PROTO_40GBASE_LR4_ER4 = 1 << 16, 2279ebb7c6fdSAlex Wilson MLXCX_PROTO_UNKNOWN_5 = 1 << 17, 2280ebb7c6fdSAlex Wilson MLXCX_PROTO_50GBASE_SR2 = 1 << 18, 2281ebb7c6fdSAlex Wilson MLXCX_PROTO_UNKNOWN_6 = 1 << 19, 2282ebb7c6fdSAlex Wilson MLXCX_PROTO_100GBASE_CR4 = 1 << 20, 2283ebb7c6fdSAlex Wilson MLXCX_PROTO_100GBASE_SR4 = 1 << 21, 2284ebb7c6fdSAlex Wilson MLXCX_PROTO_100GBASE_KR4 = 1 << 22, 2285*85e4aa97SDan McDonald MLXCX_PROTO_100GBASE_LR4_ER4 = 1 << 23, 2286*85e4aa97SDan McDonald MLXCX_PROTO_100BASE_TX = 1 << 24, 2287*85e4aa97SDan McDonald MLXCX_PROTO_1000BASE_T = 1 << 25, 2288*85e4aa97SDan McDonald MLXCX_PROTO_10GBASE_T = 1 << 26, 2289ebb7c6fdSAlex Wilson MLXCX_PROTO_25GBASE_CR = 1 << 27, 2290ebb7c6fdSAlex Wilson MLXCX_PROTO_25GBASE_KR = 1 << 28, 2291ebb7c6fdSAlex Wilson MLXCX_PROTO_25GBASE_SR = 1 << 29, 2292ebb7c6fdSAlex Wilson MLXCX_PROTO_50GBASE_CR2 = 1 << 30, 2293ebb7c6fdSAlex Wilson MLXCX_PROTO_50GBASE_KR2 = 1UL << 31, 2294ebb7c6fdSAlex Wilson } mlxcx_eth_proto_t; 2295ebb7c6fdSAlex Wilson 2296*85e4aa97SDan McDonald /* Extended proto values introduced with ConnectX-6. */ 2297*85e4aa97SDan McDonald typedef enum { 2298*85e4aa97SDan McDonald MLXCX_EXTPROTO_NONE = 0, 2299*85e4aa97SDan McDonald MLXCX_EXTPROTO_SGMII_100BASE = 1 << 0, 2300*85e4aa97SDan McDonald MLXCX_EXTPROTO_1000BASE_X_SGMII = 1 << 1, 2301*85e4aa97SDan McDonald /* 1 << 2 */ 2302*85e4aa97SDan McDonald MLXCX_EXTPROTO_5GBASE_R = 1 << 3, 2303*85e4aa97SDan McDonald MLXCX_EXTPROTO_10GBASE_XFI_XAUI_1 = 1 << 4, 2304*85e4aa97SDan McDonald MLXCX_EXTPROTO_40GBASE_XLAUI_4_XLPPI_4 = 1 << 5, 2305*85e4aa97SDan McDonald MLXCX_EXTPROTO_25GAUI_1_25GBASE_CR_KR = 1 << 6, 2306*85e4aa97SDan McDonald MLXCX_EXTPROTO_50GAUI_2_LAUI_2_50GBASE_CR2_KR2 = 1 << 7, 2307*85e4aa97SDan McDonald MLXCX_EXTPROTO_50GAUI_1_LAUI_1_50GBASE_CR_KR = 1 << 8, 2308*85e4aa97SDan McDonald MLXCX_EXTPROTO_CAUI_4_100GBASE_CR4_KR4 = 1 << 9, 2309*85e4aa97SDan McDonald MLXCX_EXTPROTO_100GAUI_2_100GBASE_CR2_KR2 = 1 << 10, 2310*85e4aa97SDan McDonald MLXCX_EXTPROTO_100GAUI_1_100GBASE_CR_KR = 1 << 11, 2311*85e4aa97SDan McDonald MLXCX_EXTPROTO_200GAUI_4_200GBASE_CR4_KR4 = 1 << 12, 2312*85e4aa97SDan McDonald MLXCX_EXTPROTO_200GAUI_2_200GBASE_CR2_KR2 = 1 << 13, 2313*85e4aa97SDan McDonald /* 1 << 14 */ 2314*85e4aa97SDan McDonald MLXCX_EXTPROTO_400GAUI_8_400GBASE_CR8 = 1 << 15, 2315*85e4aa97SDan McDonald MLXCX_EXTPROTO_400GAUI_4_400GBASE_CR4 = 1 << 16, 2316*85e4aa97SDan McDonald /* 1UL << [17-30] */ 2317*85e4aa97SDan McDonald MLXCX_EXTPROTO_SGMII = 1UL << 31, 2318*85e4aa97SDan McDonald } mlxcx_ext_eth_proto_t; 2319*85e4aa97SDan McDonald 2320*85e4aa97SDan McDonald #define MLXCX_PROTO_100M (MLXCX_PROTO_SGMII_100BASE | \ 2321*85e4aa97SDan McDonald MLXCX_PROTO_100BASE_TX) 2322*85e4aa97SDan McDonald #define MLXCX_EXTPROTO_100M MLXCX_EXTPROTO_SGMII_100BASE 2323*85e4aa97SDan McDonald 2324*85e4aa97SDan McDonald #define MLXCX_PROTO_1G (MLXCX_PROTO_1000BASE_KX | MLXCX_PROTO_SGMII | \ 2325*85e4aa97SDan McDonald MLXCX_PROTO_1000BASE_T) 2326*85e4aa97SDan McDonald #define MLXCX_EXTPROTO_1G (MLXCX_EXTPROTO_1000BASE_X_SGMII) 2327*85e4aa97SDan McDonald 2328*85e4aa97SDan McDonald #define MLXCX_EXTPROTO_5G MLXCX_EXTPROTO_5GBASE_R 232922d05228SPaul Winder 233022d05228SPaul Winder #define MLXCX_PROTO_10G (MLXCX_PROTO_10GBASE_CX4 | \ 233122d05228SPaul Winder MLXCX_PROTO_10GBASE_KX4 | MLXCX_PROTO_10GBASE_KR | \ 233222d05228SPaul Winder MLXCX_PROTO_10GBASE_CR | MLXCX_PROTO_10GBASE_SR | \ 2333*85e4aa97SDan McDonald MLXCX_PROTO_10GBASE_ER_LR | MLXCX_PROTO_10GBASE_T) 2334*85e4aa97SDan McDonald #define MLXCX_EXTPROTO_10G MLXCX_EXTPROTO_10GBASE_XFI_XAUI_1 233522d05228SPaul Winder 233622d05228SPaul Winder #define MLXCX_PROTO_25G (MLXCX_PROTO_25GBASE_CR | \ 233722d05228SPaul Winder MLXCX_PROTO_25GBASE_KR | MLXCX_PROTO_25GBASE_SR) 2338*85e4aa97SDan McDonald #define MLXCX_EXTPROTO_25G MLXCX_EXTPROTO_25GAUI_1_25GBASE_CR_KR 233922d05228SPaul Winder 234022d05228SPaul Winder #define MLXCX_PROTO_40G (MLXCX_PROTO_40GBASE_SR4 | \ 234122d05228SPaul Winder MLXCX_PROTO_40GBASE_LR4_ER4 | MLXCX_PROTO_40GBASE_CR4 | \ 234222d05228SPaul Winder MLXCX_PROTO_40GBASE_KR4) 2343*85e4aa97SDan McDonald #define MLXCX_EXTPROTO_40G MLXCX_EXTPROTO_40GBASE_XLAUI_4_XLPPI_4 234422d05228SPaul Winder 234522d05228SPaul Winder #define MLXCX_PROTO_50G (MLXCX_PROTO_50GBASE_CR2 | \ 234622d05228SPaul Winder MLXCX_PROTO_50GBASE_KR2 | MLXCX_PROTO_50GBASE_SR2) 2347*85e4aa97SDan McDonald #define MLXCX_EXTPROTO_50G (MLXCX_EXTPROTO_50GAUI_2_LAUI_2_50GBASE_CR2_KR2 | \ 2348*85e4aa97SDan McDonald MLXCX_EXTPROTO_50GAUI_1_LAUI_1_50GBASE_CR_KR) 234922d05228SPaul Winder 235022d05228SPaul Winder #define MLXCX_PROTO_100G (MLXCX_PROTO_100GBASE_CR4 | \ 2351*85e4aa97SDan McDonald MLXCX_PROTO_100GBASE_SR4 | MLXCX_PROTO_100GBASE_KR4 | \ 2352*85e4aa97SDan McDonald MLXCX_PROTO_100GBASE_LR4_ER4) 2353*85e4aa97SDan McDonald #define MLXCX_EXTPROTO_100G (MLXCX_EXTPROTO_CAUI_4_100GBASE_CR4_KR4 | \ 2354*85e4aa97SDan McDonald MLXCX_EXTPROTO_100GAUI_2_100GBASE_CR2_KR2 | \ 2355*85e4aa97SDan McDonald MLXCX_EXTPROTO_100GAUI_1_100GBASE_CR_KR) 2356*85e4aa97SDan McDonald 2357*85e4aa97SDan McDonald /* 200G and higher only are in the extended protocol bits. */ 2358*85e4aa97SDan McDonald #define MLXCX_EXTPROTO_200G (MLXCX_EXTPROTO_200GAUI_4_200GBASE_CR4_KR4 | \ 2359*85e4aa97SDan McDonald MLXCX_EXTPROTO_200GAUI_2_200GBASE_CR2_KR2) 2360*85e4aa97SDan McDonald 2361*85e4aa97SDan McDonald #define MLXCX_EXTPROTO_400G (MLXCX_EXTPROTO_400GAUI_8_400GBASE_CR8 | \ 2362*85e4aa97SDan McDonald MLXCX_EXTPROTO_400GAUI_4_400GBASE_CR4) 2363*85e4aa97SDan McDonald 236422d05228SPaul Winder 2365ebb7c6fdSAlex Wilson typedef enum { 2366ebb7c6fdSAlex Wilson MLXCX_AUTONEG_DISABLE_CAP = 1 << 5, 2367ebb7c6fdSAlex Wilson MLXCX_AUTONEG_DISABLE = 1 << 6 2368ebb7c6fdSAlex Wilson } mlxcx_autoneg_flags_t; 2369ebb7c6fdSAlex Wilson 2370ebb7c6fdSAlex Wilson typedef enum { 2371ebb7c6fdSAlex Wilson MLXCX_PTYS_PROTO_MASK_IB = 1 << 0, 2372ebb7c6fdSAlex Wilson MLXCX_PTYS_PROTO_MASK_ETH = 1 << 2, 2373ebb7c6fdSAlex Wilson } mlxcx_reg_ptys_proto_mask_t; 2374ebb7c6fdSAlex Wilson 2375ebb7c6fdSAlex Wilson typedef struct { 2376ebb7c6fdSAlex Wilson bits8_t mlrd_ptys_autoneg_flags; 2377ebb7c6fdSAlex Wilson uint8_t mlrd_ptys_local_port; 2378ebb7c6fdSAlex Wilson uint8_t mlrd_ptys_rsvd; 2379ebb7c6fdSAlex Wilson bits8_t mlrd_ptys_proto_mask; 2380ebb7c6fdSAlex Wilson 2381ebb7c6fdSAlex Wilson bits8_t mlrd_ptys_autoneg_status; 2382ebb7c6fdSAlex Wilson uint8_t mlrd_ptys_rsvd2; 2383ebb7c6fdSAlex Wilson uint16be_t mlrd_ptys_data_rate_oper; 2384ebb7c6fdSAlex Wilson 2385*85e4aa97SDan McDonald bits32_t mlrd_ptys_ext_proto_cap; 2386ebb7c6fdSAlex Wilson bits32_t mlrd_ptys_proto_cap; 2387*85e4aa97SDan McDonald uint8_t mlrd_ptys_rsvd4[4]; 2388*85e4aa97SDan McDonald bits32_t mlrd_ptys_ext_proto_admin; 2389ebb7c6fdSAlex Wilson bits32_t mlrd_ptys_proto_admin; 2390*85e4aa97SDan McDonald uint8_t mlrd_ptys_rsvd5[4]; 2391*85e4aa97SDan McDonald bits32_t mlrd_ptys_ext_proto_oper; 2392ebb7c6fdSAlex Wilson bits32_t mlrd_ptys_proto_oper; 2393ebb7c6fdSAlex Wilson uint8_t mlrd_ptys_rsvd6[8]; 2394ebb7c6fdSAlex Wilson bits32_t mlrd_ptys_proto_partner_advert; 2395ebb7c6fdSAlex Wilson uint8_t mlrd_ptys_rsvd7[12]; 2396ebb7c6fdSAlex Wilson } mlxcx_reg_ptys_t; 2397ebb7c6fdSAlex Wilson 2398*85e4aa97SDan McDonald typedef enum { 2399*85e4aa97SDan McDonald MLXCX_PCAM_LOW_FFLAGS_PTYS_EXTENDED = (1 << 13), 2400*85e4aa97SDan McDonald } mlxcx_pcam_low_feature_flags_t; 2401*85e4aa97SDan McDonald 2402*85e4aa97SDan McDonald typedef struct { 2403*85e4aa97SDan McDonald uint8_t mlrd_pcam_rsvd1; 2404*85e4aa97SDan McDonald uint8_t mlrd_pcam_feature_group; 2405*85e4aa97SDan McDonald uint8_t mlrd_pcam_rsvd2; 2406*85e4aa97SDan McDonald uint8_t mlrd_pcam_access_reg_group; 2407*85e4aa97SDan McDonald uint8_t mlrd_pcam_rsvd3[4]; 2408*85e4aa97SDan McDonald bits64_t mlrd_pcam_port_access_reg_cap_mask_high; /* Bits 127 -> 64 */ 2409*85e4aa97SDan McDonald bits64_t mlrd_pcam_port_access_reg_cap_mask_low; /* Bits 63 -> 0 */ 2410*85e4aa97SDan McDonald uint8_t mlrd_pcam_rsvd4[16]; 2411*85e4aa97SDan McDonald bits64_t mlrd_pcam_feature_cap_mask_high; /* Bits 127 -> 64 */ 2412*85e4aa97SDan McDonald bits64_t mlrd_pcam_feature_cap_mask_low; /* Bits 63 -> 0 */ 2413*85e4aa97SDan McDonald uint8_t mlrd_pcam_rsvd5[24]; 2414*85e4aa97SDan McDonald } mlxcx_reg_pcam_t; 2415*85e4aa97SDan McDonald 2416ebb7c6fdSAlex Wilson typedef enum { 2417ebb7c6fdSAlex Wilson MLXCX_LED_TYPE_BOTH = 0x0, 2418ebb7c6fdSAlex Wilson MLXCX_LED_TYPE_UID = 0x1, 2419ebb7c6fdSAlex Wilson MLXCX_LED_TYPE_PORT = 0x2, 2420ebb7c6fdSAlex Wilson } mlxcx_led_type_t; 2421ebb7c6fdSAlex Wilson 2422ebb7c6fdSAlex Wilson #define MLXCX_MLCR_INDIVIDUAL_ONLY (1 << 4) 2423ebb7c6fdSAlex Wilson /* CSTYLED */ 2424ebb7c6fdSAlex Wilson #define MLXCX_MLCR_LED_TYPE (bitdef_t){ 0, 0x0F } 2425ebb7c6fdSAlex Wilson 2426ebb7c6fdSAlex Wilson typedef struct { 2427ebb7c6fdSAlex Wilson uint8_t mlrd_mlcr_rsvd; 2428ebb7c6fdSAlex Wilson uint8_t mlrd_mlcr_local_port; 2429ebb7c6fdSAlex Wilson uint8_t mlrd_mlcr_rsvd2; 2430ebb7c6fdSAlex Wilson bits8_t mlrd_mlcr_flags; 2431ebb7c6fdSAlex Wilson uint8_t mlrd_mlcr_rsvd3[2]; 2432ebb7c6fdSAlex Wilson uint16be_t mlrd_mlcr_beacon_duration; 2433ebb7c6fdSAlex Wilson uint8_t mlrd_mlcr_rsvd4[2]; 2434ebb7c6fdSAlex Wilson uint16be_t mlrd_mlcr_beacon_remain; 2435ebb7c6fdSAlex Wilson } mlxcx_reg_mlcr_t; 2436ebb7c6fdSAlex Wilson 2437ebb7c6fdSAlex Wilson typedef struct { 2438ebb7c6fdSAlex Wilson uint8_t mlrd_pmaos_rsvd; 2439ebb7c6fdSAlex Wilson uint8_t mlrd_pmaos_module; 2440ebb7c6fdSAlex Wilson uint8_t mlrd_pmaos_admin_status; 2441ebb7c6fdSAlex Wilson uint8_t mlrd_pmaos_oper_status; 2442ebb7c6fdSAlex Wilson bits8_t mlrd_pmaos_flags; 2443ebb7c6fdSAlex Wilson uint8_t mlrd_pmaos_rsvd2; 2444ebb7c6fdSAlex Wilson uint8_t mlrd_pmaos_error_type; 2445ebb7c6fdSAlex Wilson uint8_t mlrd_pmaos_event_en; 2446ebb7c6fdSAlex Wilson uint8_t mlrd_pmaos_rsvd3[8]; 2447ebb7c6fdSAlex Wilson } mlxcx_reg_pmaos_t; 2448ebb7c6fdSAlex Wilson 2449ebb7c6fdSAlex Wilson typedef enum { 2450ebb7c6fdSAlex Wilson MLXCX_MCIA_STATUS_OK = 0x0, 2451ebb7c6fdSAlex Wilson MLXCX_MCIA_STATUS_NO_EEPROM = 0x1, 2452ebb7c6fdSAlex Wilson MLXCX_MCIA_STATUS_NOT_SUPPORTED = 0x2, 2453ebb7c6fdSAlex Wilson MLXCX_MCIA_STATUS_NOT_CONNECTED = 0x3, 2454ebb7c6fdSAlex Wilson MLXCX_MCIA_STATUS_I2C_ERROR = 0x9, 2455ebb7c6fdSAlex Wilson MLXCX_MCIA_STATUS_DISABLED = 0x10 2456ebb7c6fdSAlex Wilson } mlxcx_mcia_status_t; 2457ebb7c6fdSAlex Wilson 2458ebb7c6fdSAlex Wilson typedef struct { 2459ebb7c6fdSAlex Wilson bits8_t mlrd_mcia_flags; 2460ebb7c6fdSAlex Wilson uint8_t mlrd_mcia_module; 2461ebb7c6fdSAlex Wilson uint8_t mlrd_mcia_rsvd; 2462ebb7c6fdSAlex Wilson uint8_t mlrd_mcia_status; 2463ebb7c6fdSAlex Wilson uint8_t mlrd_mcia_i2c_device_addr; 2464ebb7c6fdSAlex Wilson uint8_t mlrd_mcia_page_number; 2465ebb7c6fdSAlex Wilson uint16be_t mlrd_mcia_device_addr; 2466ebb7c6fdSAlex Wilson uint8_t mlrd_mcia_rsvd2[2]; 2467ebb7c6fdSAlex Wilson uint16be_t mlrd_mcia_size; 2468ebb7c6fdSAlex Wilson uint8_t mlrd_mcia_rsvd3[4]; 2469ebb7c6fdSAlex Wilson uint8_t mlrd_mcia_data[48]; 2470ebb7c6fdSAlex Wilson } mlxcx_reg_mcia_t; 2471ebb7c6fdSAlex Wilson 2472ebb7c6fdSAlex Wilson typedef struct { 2473ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_frames_tx; 2474ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_frames_rx; 2475ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_fcs_err; 2476ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_align_err; 2477ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_bytes_tx; 2478ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_bytes_rx; 2479ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_mcast_tx; 2480ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_bcast_tx; 2481ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_mcast_rx; 2482ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_bcast_rx; 2483ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_in_range_len_err; 2484ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_out_of_range_len_err; 2485ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_frame_too_long_err; 2486ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_symbol_err; 2487ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_mac_ctrl_tx; 2488ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_mac_ctrl_rx; 2489ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_unsup_opcodes_rx; 2490ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_pause_rx; 2491ebb7c6fdSAlex Wilson uint64be_t mlppc_ieee_802_3_pause_tx; 2492ebb7c6fdSAlex Wilson } mlxcx_ppcnt_ieee_802_3_t; 2493ebb7c6fdSAlex Wilson 2494ebb7c6fdSAlex Wilson typedef struct { 2495ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_in_octets; 2496ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_in_ucast_pkts; 2497ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_in_discards; 2498ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_in_errors; 2499ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_in_unknown_protos; 2500ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_out_octets; 2501ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_out_ucast_pkts; 2502ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_out_discards; 2503ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_out_errors; 2504ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_in_mcast_pkts; 2505ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_in_bcast_pkts; 2506ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_out_mcast_pkts; 2507ebb7c6fdSAlex Wilson uint64be_t mlppc_rfc_2863_out_bcast_pkts; 2508ebb7c6fdSAlex Wilson } mlxcx_ppcnt_rfc_2863_t; 2509ebb7c6fdSAlex Wilson 2510ebb7c6fdSAlex Wilson typedef struct { 2511ebb7c6fdSAlex Wilson uint64be_t mlppc_phy_stats_time_since_last_clear; 2512ebb7c6fdSAlex Wilson uint64be_t mlppc_phy_stats_rx_bits; 2513ebb7c6fdSAlex Wilson uint64be_t mlppc_phy_stats_symbol_errs; 2514ebb7c6fdSAlex Wilson uint64be_t mlppc_phy_stats_corrected_bits; 2515ebb7c6fdSAlex Wilson uint8_t mlppc_phy_stats_rsvd[2]; 2516ebb7c6fdSAlex Wilson uint8_t mlppc_phy_stats_raw_ber_mag; 2517ebb7c6fdSAlex Wilson uint8_t mlppc_phy_stats_raw_ber_coef; 2518ebb7c6fdSAlex Wilson uint8_t mlppc_phy_stats_rsvd2[2]; 2519ebb7c6fdSAlex Wilson uint8_t mlppc_phy_stats_eff_ber_mag; 2520ebb7c6fdSAlex Wilson uint8_t mlppc_phy_stats_eff_ber_coef; 2521ebb7c6fdSAlex Wilson } mlxcx_ppcnt_phy_stats_t; 2522ebb7c6fdSAlex Wilson 2523ebb7c6fdSAlex Wilson typedef enum { 2524ebb7c6fdSAlex Wilson MLXCX_PPCNT_GRP_IEEE_802_3 = 0x0, 2525ebb7c6fdSAlex Wilson MLXCX_PPCNT_GRP_RFC_2863 = 0x1, 2526ebb7c6fdSAlex Wilson MLXCX_PPCNT_GRP_RFC_2819 = 0x2, 2527ebb7c6fdSAlex Wilson MLXCX_PPCNT_GRP_RFC_3635 = 0x3, 2528ebb7c6fdSAlex Wilson MLXCX_PPCNT_GRP_ETH_EXTD = 0x5, 2529ebb7c6fdSAlex Wilson MLXCX_PPCNT_GRP_ETH_DISCARD = 0x6, 2530ebb7c6fdSAlex Wilson MLXCX_PPCNT_GRP_PER_PRIO = 0x10, 2531ebb7c6fdSAlex Wilson MLXCX_PPCNT_GRP_PER_TC = 0x11, 2532ebb7c6fdSAlex Wilson MLXCX_PPCNT_GRP_PER_TC_CONGEST = 0x13, 2533ebb7c6fdSAlex Wilson MLXCX_PPCNT_GRP_PHY_STATS = 0x16 2534ebb7c6fdSAlex Wilson } mlxcx_ppcnt_grp_t; 2535ebb7c6fdSAlex Wilson 2536ebb7c6fdSAlex Wilson typedef enum { 2537ebb7c6fdSAlex Wilson MLXCX_PPCNT_CLEAR = (1 << 7), 2538ebb7c6fdSAlex Wilson MLXCX_PPCNT_NO_CLEAR = 0 2539ebb7c6fdSAlex Wilson } mlxcx_ppcnt_clear_t; 2540ebb7c6fdSAlex Wilson 2541ebb7c6fdSAlex Wilson typedef struct { 2542ebb7c6fdSAlex Wilson uint8_t mlrd_ppcnt_swid; 2543ebb7c6fdSAlex Wilson uint8_t mlrd_ppcnt_local_port; 2544ebb7c6fdSAlex Wilson uint8_t mlrd_ppcnt_pnat; 2545ebb7c6fdSAlex Wilson uint8_t mlrd_ppcnt_grp; 2546ebb7c6fdSAlex Wilson uint8_t mlrd_ppcnt_clear; 2547ebb7c6fdSAlex Wilson uint8_t mlrd_ppcnt_rsvd[2]; 2548ebb7c6fdSAlex Wilson uint8_t mlrd_ppcnt_prio_tc; 2549ebb7c6fdSAlex Wilson union { 2550ebb7c6fdSAlex Wilson uint8_t mlrd_ppcnt_data[248]; 2551ebb7c6fdSAlex Wilson mlxcx_ppcnt_ieee_802_3_t mlrd_ppcnt_ieee_802_3; 2552ebb7c6fdSAlex Wilson mlxcx_ppcnt_rfc_2863_t mlrd_ppcnt_rfc_2863; 2553ebb7c6fdSAlex Wilson mlxcx_ppcnt_phy_stats_t mlrd_ppcnt_phy_stats; 2554ebb7c6fdSAlex Wilson }; 2555ebb7c6fdSAlex Wilson } mlxcx_reg_ppcnt_t; 2556ebb7c6fdSAlex Wilson 2557d77e6e0fSPaul Winder typedef enum { 2558d77e6e0fSPaul Winder MLXCX_PPLM_FEC_CAP_AUTO = 0, 2559d77e6e0fSPaul Winder MLXCX_PPLM_FEC_CAP_NONE = (1 << 0), 2560d77e6e0fSPaul Winder MLXCX_PPLM_FEC_CAP_FIRECODE = (1 << 1), 2561d77e6e0fSPaul Winder MLXCX_PPLM_FEC_CAP_RS = (1 << 2), 2562d77e6e0fSPaul Winder } mlxcx_pplm_fec_caps_t; 2563d77e6e0fSPaul Winder 2564d77e6e0fSPaul Winder typedef enum { 2565d77e6e0fSPaul Winder MLXCX_PPLM_FEC_ACTIVE_NONE = (1 << 0), 2566d77e6e0fSPaul Winder MLXCX_PPLM_FEC_ACTIVE_FIRECODE = (1 << 1), 2567d77e6e0fSPaul Winder MLXCX_PPLM_FEC_ACTIVE_RS528 = (1 << 2), 2568d77e6e0fSPaul Winder MLXCX_PPLM_FEC_ACTIVE_RS271 = (1 << 3), 2569d77e6e0fSPaul Winder MLXCX_PPLM_FEC_ACTIVE_RS544 = (1 << 7), 2570d77e6e0fSPaul Winder MLXCX_PPLM_FEC_ACTIVE_RS272 = (1 << 9), 2571d77e6e0fSPaul Winder } mlxcx_pplm_fec_active_t; 2572d77e6e0fSPaul Winder 2573d77e6e0fSPaul Winder /* CSTYLED */ 2574d77e6e0fSPaul Winder #define MLXCX_PPLM_CAP_56G (bitdef_t){ 16, 0x000f0000 } 2575d77e6e0fSPaul Winder /* CSTYLED */ 2576d77e6e0fSPaul Winder #define MLXCX_PPLM_CAP_100G (bitdef_t){ 12, 0x0000f000 } 2577d77e6e0fSPaul Winder /* CSTYLED */ 2578d77e6e0fSPaul Winder #define MLXCX_PPLM_CAP_50G (bitdef_t){ 8, 0x00000f00 } 2579d77e6e0fSPaul Winder /* CSTYLED */ 2580d77e6e0fSPaul Winder #define MLXCX_PPLM_CAP_25G (bitdef_t){ 4, 0x000000f0 } 2581d77e6e0fSPaul Winder /* CSTYLED */ 2582d77e6e0fSPaul Winder #define MLXCX_PPLM_CAP_10_40G (bitdef_t){ 0, 0x0000000f } 2583d77e6e0fSPaul Winder 2584d77e6e0fSPaul Winder typedef struct { 2585d77e6e0fSPaul Winder uint8_t mlrd_pplm_rsvd; 2586d77e6e0fSPaul Winder uint8_t mlrd_pplm_local_port; 2587d77e6e0fSPaul Winder uint8_t mlrd_pplm_rsvd1[11]; 2588d77e6e0fSPaul Winder uint24be_t mlrd_pplm_fec_mode_active; 2589d77e6e0fSPaul Winder bits32_t mlrd_pplm_fec_override_cap; 2590d77e6e0fSPaul Winder bits32_t mlrd_pplm_fec_override_admin; 2591d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_cap_400g_8x; 2592d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_cap_200g_4x; 2593d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_cap_100g_2x; 2594d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_cap_50g_1x; 2595d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_admin_400g_8x; 2596d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_admin_200g_4x; 2597d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_admin_100g_2x; 2598d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_admin_50g_1x; 2599d77e6e0fSPaul Winder uint8_t mlrd_pplm_rsvd2[8]; 2600d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_cap_hdr; 2601d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_cap_edr; 2602d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_cap_fdr; 2603d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_cap_fdr10; 2604d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_admin_hdr; 2605d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_admin_edr; 2606d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_admin_fdr; 2607d77e6e0fSPaul Winder uint16be_t mlrd_pplm_fec_override_admin_fdr10; 2608d77e6e0fSPaul Winder } mlxcx_reg_pplm_t; 2609d77e6e0fSPaul Winder 26101718c316SRobert Mustacchi typedef struct { 26111718c316SRobert Mustacchi uint8_t mlrd_mtcap_rsvd[3]; 26121718c316SRobert Mustacchi uint8_t mlrd_mtcap_sensor_count; 26131718c316SRobert Mustacchi uint8_t mlrd_mtcap_rsvd1[4]; 26141718c316SRobert Mustacchi uint64be_t mlrd_mtcap_sensor_map; 26151718c316SRobert Mustacchi } mlxcx_reg_mtcap_t; 26161718c316SRobert Mustacchi 26171718c316SRobert Mustacchi #define MLXCX_MTMP_NAMELEN 8 26181718c316SRobert Mustacchi 26191718c316SRobert Mustacchi typedef struct { 26201718c316SRobert Mustacchi uint8_t mlrd_mtmp_rsvd[2]; 26211718c316SRobert Mustacchi uint16be_t mlrd_mtmp_sensor_index; 26221718c316SRobert Mustacchi uint8_t mlrd_mtmp_rsvd1[2]; 26231718c316SRobert Mustacchi uint16be_t mlrd_mtmp_temperature; 26241718c316SRobert Mustacchi bits16_t mlrd_mtmp_max_flags; 26251718c316SRobert Mustacchi uint16be_t mlrd_mtmp_max_temperature; 26261718c316SRobert Mustacchi bits16_t mlrd_mtmp_tee; 26271718c316SRobert Mustacchi uint16be_t mlrd_mtmp_temp_thresh_hi; 26281718c316SRobert Mustacchi uint8_t mlrd_mtmp_rsvd2[2]; 26291718c316SRobert Mustacchi uint16be_t mlrd_mtmp_temp_thresh_lo; 26301718c316SRobert Mustacchi uint8_t mlrd_mtmp_rsvd3[4]; 26311718c316SRobert Mustacchi uint8_t mlrd_mtmp_name[MLXCX_MTMP_NAMELEN]; 26321718c316SRobert Mustacchi } mlxcx_reg_mtmp_t; 26331718c316SRobert Mustacchi 2634ebb7c6fdSAlex Wilson typedef enum { 2635ebb7c6fdSAlex Wilson MLXCX_REG_PMTU = 0x5003, 2636ebb7c6fdSAlex Wilson MLXCX_REG_PTYS = 0x5004, 2637ebb7c6fdSAlex Wilson MLXCX_REG_PAOS = 0x5006, 2638ebb7c6fdSAlex Wilson MLXCX_REG_PMAOS = 0x5012, 2639ebb7c6fdSAlex Wilson MLXCX_REG_MSGI = 0x9021, 2640ebb7c6fdSAlex Wilson MLXCX_REG_MLCR = 0x902B, 2641ebb7c6fdSAlex Wilson MLXCX_REG_MCIA = 0x9014, 2642ebb7c6fdSAlex Wilson MLXCX_REG_PPCNT = 0x5008, 2643d77e6e0fSPaul Winder MLXCX_REG_PPLM = 0x5023, 2644*85e4aa97SDan McDonald MLXCX_REG_PCAM = 0x507f, 26451718c316SRobert Mustacchi MLXCX_REG_MTCAP = 0x9009, 26461718c316SRobert Mustacchi MLXCX_REG_MTMP = 0x900A 2647ebb7c6fdSAlex Wilson } mlxcx_register_id_t; 2648ebb7c6fdSAlex Wilson 2649ebb7c6fdSAlex Wilson typedef union { 2650ebb7c6fdSAlex Wilson mlxcx_reg_pmtu_t mlrd_pmtu; 2651ebb7c6fdSAlex Wilson mlxcx_reg_paos_t mlrd_paos; 2652*85e4aa97SDan McDonald mlxcx_reg_pcam_t mlrd_pcam; 2653ebb7c6fdSAlex Wilson mlxcx_reg_ptys_t mlrd_ptys; 2654ebb7c6fdSAlex Wilson mlxcx_reg_mlcr_t mlrd_mlcr; 2655ebb7c6fdSAlex Wilson mlxcx_reg_pmaos_t mlrd_pmaos; 2656ebb7c6fdSAlex Wilson mlxcx_reg_mcia_t mlrd_mcia; 2657ebb7c6fdSAlex Wilson mlxcx_reg_ppcnt_t mlrd_ppcnt; 2658d77e6e0fSPaul Winder mlxcx_reg_pplm_t mlrd_pplm; 26591718c316SRobert Mustacchi mlxcx_reg_mtcap_t mlrd_mtcap; 26601718c316SRobert Mustacchi mlxcx_reg_mtmp_t mlrd_mtmp; 2661ebb7c6fdSAlex Wilson } mlxcx_register_data_t; 2662ebb7c6fdSAlex Wilson 2663ebb7c6fdSAlex Wilson typedef enum { 2664ebb7c6fdSAlex Wilson MLXCX_CMD_ACCESS_REGISTER_READ = 1, 2665ebb7c6fdSAlex Wilson MLXCX_CMD_ACCESS_REGISTER_WRITE = 0 2666ebb7c6fdSAlex Wilson } mlxcx_cmd_reg_opmod_t; 2667ebb7c6fdSAlex Wilson 2668ebb7c6fdSAlex Wilson typedef struct { 2669ebb7c6fdSAlex Wilson mlxcx_cmd_in_t mlxi_access_register_head; 2670ebb7c6fdSAlex Wilson uint8_t mlxi_access_register_rsvd[2]; 2671ebb7c6fdSAlex Wilson uint16be_t mlxi_access_register_register_id; 2672ebb7c6fdSAlex Wilson uint32be_t mlxi_access_register_argument; 2673ebb7c6fdSAlex Wilson mlxcx_register_data_t mlxi_access_register_data; 2674ebb7c6fdSAlex Wilson } mlxcx_cmd_access_register_in_t; 2675ebb7c6fdSAlex Wilson 2676ebb7c6fdSAlex Wilson typedef struct { 2677ebb7c6fdSAlex Wilson mlxcx_cmd_out_t mlxo_access_register_head; 2678ebb7c6fdSAlex Wilson uint8_t mlxo_access_register_rsvd[8]; 2679ebb7c6fdSAlex Wilson mlxcx_register_data_t mlxo_access_register_data; 2680ebb7c6fdSAlex Wilson } mlxcx_cmd_access_register_out_t; 2681ebb7c6fdSAlex Wilson 2682ebb7c6fdSAlex Wilson #pragma pack() 2683ebb7c6fdSAlex Wilson 268482b4190eSPaul Winder CTASSERT(MLXCX_SQE_MAX_PTRS > 0); 268582b4190eSPaul Winder 2686ebb7c6fdSAlex Wilson #ifdef __cplusplus 2687ebb7c6fdSAlex Wilson } 2688ebb7c6fdSAlex Wilson #endif 2689ebb7c6fdSAlex Wilson 2690ebb7c6fdSAlex Wilson #endif /* _MLXCX_REG_H */ 2691