1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24  */
25 
26 /*
27  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28  */
29 /*
30  * Copyright (c) 2012, Joyent, Inc. All rights reserved.
31  */
32 
33 #ifndef	_IXGBE_OSDEP_H
34 #define	_IXGBE_OSDEP_H
35 
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39 
40 #include <sys/types.h>
41 #include <sys/byteorder.h>
42 #include <sys/conf.h>
43 #include <sys/debug.h>
44 #include <sys/stropts.h>
45 #include <sys/stream.h>
46 #include <sys/strlog.h>
47 #include <sys/kmem.h>
48 #include <sys/stat.h>
49 #include <sys/kstat.h>
50 #include <sys/modctl.h>
51 #include <sys/errno.h>
52 #include <sys/ddi.h>
53 #include <sys/dditypes.h>
54 #include <sys/sunddi.h>
55 #include <sys/pci.h>
56 #include <sys/atomic.h>
57 #include <sys/note.h>
58 #include "ixgbe_debug.h"
59 
60 /* Cheesy hack for EWARN() */
61 #define	EWARN(H, W, S) cmn_err(CE_NOTE, W)
62 
63 /* function declarations */
64 struct ixgbe_hw;
65 uint16_t ixgbe_read_pci_cfg(struct ixgbe_hw *, uint32_t);
66 void ixgbe_write_pci_cfg(struct ixgbe_hw *, uint32_t, uint32_t);
67 
68 #define	usec_delay(x)		drv_usecwait(x)
69 #define	msec_delay(x)		drv_usecwait(x * 1000)
70 
71 #define	OS_DEP(hw)		((struct ixgbe_osdep *)((hw)->back))
72 
73 #define	false		B_FALSE
74 #define	true		B_TRUE
75 #define	FALSE		B_FALSE
76 #define	TRUE		B_TRUE
77 
78 #define	IXGBE_READ_PCIE_WORD 	ixgbe_read_pci_cfg
79 #define	IXGBE_WRITE_PCIE_WORD 	ixgbe_write_pci_cfg
80 #define	CMD_MEM_WRT_INVALIDATE	0x0010	/* BIT_4 */
81 #define	PCI_COMMAND_REGISTER	0x04
82 #define	PCI_EX_CONF_CAP		0xE0
83 #define	SPEED_10GB		10000
84 #define	SPEED_1GB		1000
85 #define	SPEED_100		100
86 #define	FULL_DUPLEX		2
87 
88 #define	IXGBE_WRITE_FLUSH(a)	(void) IXGBE_READ_REG(a, IXGBE_STATUS)
89 
90 #define	IXGBE_WRITE_REG(a, reg, value)	\
91 	ddi_put32((OS_DEP(a))->reg_handle, \
92 	    (uint32_t *)((uintptr_t)(a)->hw_addr + reg), (value))
93 
94 #define	IXGBE_WRITE_REG_ARRAY(a, reg, index, value)	\
95 	IXGBE_WRITE_REG(a, ((reg) + ((index) << 2)), (value))
96 
97 #define	IXGBE_READ_REG(a, reg)	\
98 	ddi_get32((OS_DEP(a))->reg_handle, \
99 	    (uint32_t *)((uintptr_t)(a)->hw_addr + reg))
100 
101 #define	IXGBE_READ_REG_ARRAY(a, reg, index)	\
102 	IXGBE_READ_REG(a, ((reg) + ((index) << 2)))
103 
104 #define	msec_delay_irq	msec_delay
105 #define	IXGBE_HTONL	htonl
106 #define	IXGBE_NTOHL	ntohl
107 #define	IXGBE_NTOHS	ntohs
108 
109 #ifdef _BIG_ENDIAN
110 #define IXGBE_CPU_TO_LE32	BSWAP_32
111 #define IXGBE_LE32_TO_CPUS 	BSWAP_32
112 #else
113 #define IXGBE_CPU_TO_LE32(x)	(x)
114 #if lint
115 /* Use lint-happy operation... */
116 #define IXGBE_LE32_TO_CPUS(x)
117 #else
118 #define IXGBE_LE32_TO_CPUS(x)	(x)
119 #endif /* lint */
120 #endif	/* _BIG_ENDIAN */
121 
122 #define	UNREFERENCED_PARAMETER(x)		_NOTE(ARGUNUSED(x))
123 #define UNREFERENCED_1PARAMETER(_p)		UNREFERENCED_PARAMETER(_p)
124 #define UNREFERENCED_2PARAMETER(_p, _q)		_NOTE(ARGUNUSED(_p, _q))
125 #define UNREFERENCED_3PARAMETER(_p, _q, _r)	_NOTE(ARGUNUSED(_p, _q, _r))
126 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)	_NOTE(ARGUNUSED(_p, _q,_r, _s))
127 
128 
129 
130 typedef	int8_t		s8;
131 typedef	int16_t		s16;
132 typedef	int32_t		s32;
133 typedef	int64_t		s64;
134 typedef uint8_t		u8;
135 typedef	uint16_t 	u16;
136 typedef	uint32_t	u32;
137 typedef	uint64_t	u64;
138 typedef boolean_t	bool;
139 
140 struct ixgbe_osdep {
141 	ddi_acc_handle_t reg_handle;
142 	ddi_acc_handle_t cfg_handle;
143 	struct ixgbe *ixgbe;
144 };
145 
146 #ifdef __cplusplus
147 }
148 #endif
149 
150 #endif	/* _IXGBE_OSDEP_H */
151