1dc0cb1cdSDale Ghent /******************************************************************************
2dc0cb1cdSDale Ghent 
3*48ed61a7SRobert Mustacchi   Copyright (c) 2001-2017, Intel Corporation
4dc0cb1cdSDale Ghent   All rights reserved.
5*48ed61a7SRobert Mustacchi 
6*48ed61a7SRobert Mustacchi   Redistribution and use in source and binary forms, with or without
7dc0cb1cdSDale Ghent   modification, are permitted provided that the following conditions are met:
8*48ed61a7SRobert Mustacchi 
9*48ed61a7SRobert Mustacchi    1. Redistributions of source code must retain the above copyright notice,
10dc0cb1cdSDale Ghent       this list of conditions and the following disclaimer.
11*48ed61a7SRobert Mustacchi 
12*48ed61a7SRobert Mustacchi    2. Redistributions in binary form must reproduce the above copyright
13*48ed61a7SRobert Mustacchi       notice, this list of conditions and the following disclaimer in the
14dc0cb1cdSDale Ghent       documentation and/or other materials provided with the distribution.
15*48ed61a7SRobert Mustacchi 
16*48ed61a7SRobert Mustacchi    3. Neither the name of the Intel Corporation nor the names of its
17*48ed61a7SRobert Mustacchi       contributors may be used to endorse or promote products derived from
18dc0cb1cdSDale Ghent       this software without specific prior written permission.
19*48ed61a7SRobert Mustacchi 
20dc0cb1cdSDale Ghent   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21*48ed61a7SRobert Mustacchi   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22*48ed61a7SRobert Mustacchi   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23*48ed61a7SRobert Mustacchi   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24*48ed61a7SRobert Mustacchi   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25*48ed61a7SRobert Mustacchi   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26*48ed61a7SRobert Mustacchi   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27*48ed61a7SRobert Mustacchi   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28*48ed61a7SRobert Mustacchi   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29dc0cb1cdSDale Ghent   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30dc0cb1cdSDale Ghent   POSSIBILITY OF SUCH DAMAGE.
31dc0cb1cdSDale Ghent 
32dc0cb1cdSDale Ghent ******************************************************************************/
33dc0cb1cdSDale Ghent /*$FreeBSD$*/
34dc0cb1cdSDale Ghent 
35dc0cb1cdSDale Ghent #ifndef _IXGBE_X550_H_
36dc0cb1cdSDale Ghent #define _IXGBE_X550_H_
37dc0cb1cdSDale Ghent 
38dc0cb1cdSDale Ghent #include "ixgbe_type.h"
39dc0cb1cdSDale Ghent 
40dc0cb1cdSDale Ghent s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw);
41dc0cb1cdSDale Ghent s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw);
42dc0cb1cdSDale Ghent s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw);
43dc0cb1cdSDale Ghent 
44dc0cb1cdSDale Ghent s32 ixgbe_get_bus_info_X550em(struct ixgbe_hw *hw);
45dc0cb1cdSDale Ghent s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw);
46dc0cb1cdSDale Ghent s32 ixgbe_update_eeprom_checksum_X550(struct ixgbe_hw *hw);
47dc0cb1cdSDale Ghent s32 ixgbe_calc_eeprom_checksum_X550(struct ixgbe_hw *hw);
48dc0cb1cdSDale Ghent s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size);
49dc0cb1cdSDale Ghent s32 ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw, u16 *checksum_val);
50dc0cb1cdSDale Ghent s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw);
51dc0cb1cdSDale Ghent s32 ixgbe_write_ee_hostif_buffer_X550(struct ixgbe_hw *hw,
52dc0cb1cdSDale Ghent 				      u16 offset, u16 words, u16 *data);
53dc0cb1cdSDale Ghent s32 ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset,
54dc0cb1cdSDale Ghent 			       u16 data);
55dc0cb1cdSDale Ghent s32 ixgbe_read_ee_hostif_buffer_X550(struct ixgbe_hw *hw,
56dc0cb1cdSDale Ghent 				     u16 offset, u16 words, u16 *data);
57dc0cb1cdSDale Ghent s32 ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset,
58dc0cb1cdSDale Ghent u16				*data);
59dc0cb1cdSDale Ghent s32 ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset,
60dc0cb1cdSDale Ghent 				    u16 data);
61dc0cb1cdSDale Ghent void ixgbe_set_source_address_pruning_X550(struct ixgbe_hw *hw, bool enable,
62dc0cb1cdSDale Ghent 					   unsigned int pool);
63dc0cb1cdSDale Ghent void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw,
64dc0cb1cdSDale Ghent 					    bool enable, int vf);
65dc0cb1cdSDale Ghent s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
66dc0cb1cdSDale Ghent 				 u32 device_type, u32 data);
67dc0cb1cdSDale Ghent s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
68dc0cb1cdSDale Ghent 	u32 device_type, u32 *data);
69*48ed61a7SRobert Mustacchi s32 ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min,
70*48ed61a7SRobert Mustacchi 			      u8 build, u8 ver, u16 len, const char *str);
71*48ed61a7SRobert Mustacchi s32 ixgbe_get_phy_token(struct ixgbe_hw *);
72*48ed61a7SRobert Mustacchi s32 ixgbe_put_phy_token(struct ixgbe_hw *);
73*48ed61a7SRobert Mustacchi s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
74*48ed61a7SRobert Mustacchi 	u32 device_type, u32 data);
75*48ed61a7SRobert Mustacchi s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
76*48ed61a7SRobert Mustacchi 	u32 device_type, u32 *data);
77dc0cb1cdSDale Ghent void ixgbe_disable_mdd_X550(struct ixgbe_hw *hw);
78dc0cb1cdSDale Ghent void ixgbe_enable_mdd_X550(struct ixgbe_hw *hw);
79dc0cb1cdSDale Ghent void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap);
80dc0cb1cdSDale Ghent void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf);
81dc0cb1cdSDale Ghent enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw);
82dc0cb1cdSDale Ghent s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw);
83dc0cb1cdSDale Ghent s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,
84dc0cb1cdSDale Ghent 				       ixgbe_link_speed *speed, bool *autoneg);
85dc0cb1cdSDale Ghent void ixgbe_init_mac_link_ops_X550em(struct ixgbe_hw *hw);
86dc0cb1cdSDale Ghent s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw);
87dc0cb1cdSDale Ghent s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw);
88dc0cb1cdSDale Ghent s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw);
89dc0cb1cdSDale Ghent s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw);
90dc0cb1cdSDale Ghent s32 ixgbe_setup_internal_phy_t_x550em(struct ixgbe_hw *hw);
91dc0cb1cdSDale Ghent s32 ixgbe_setup_phy_loopback_x550em(struct ixgbe_hw *hw);
92*48ed61a7SRobert Mustacchi u64 ixgbe_get_supported_physical_layer_X550em(struct ixgbe_hw *hw);
93dc0cb1cdSDale Ghent void ixgbe_disable_rx_x550(struct ixgbe_hw *hw);
94dc0cb1cdSDale Ghent s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *lcd_speed);
95dc0cb1cdSDale Ghent s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw);
96dc0cb1cdSDale Ghent s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);
97dc0cb1cdSDale Ghent void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);
98dc0cb1cdSDale Ghent s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw);
99dc0cb1cdSDale Ghent s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
100dc0cb1cdSDale Ghent 				    ixgbe_link_speed speed,
101dc0cb1cdSDale Ghent 				    bool autoneg_wait_to_complete);
102*48ed61a7SRobert Mustacchi s32 ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw,
103*48ed61a7SRobert Mustacchi 				    ixgbe_link_speed speed,
104*48ed61a7SRobert Mustacchi 				    bool autoneg_wait_to_complete);
105*48ed61a7SRobert Mustacchi s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
106*48ed61a7SRobert Mustacchi 			       u32 device_type, u16 *phy_data);
107*48ed61a7SRobert Mustacchi s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
108*48ed61a7SRobert Mustacchi 				u32 device_type, u16 phy_data);
109*48ed61a7SRobert Mustacchi s32 ixgbe_setup_fc_fiber_x550em_a(struct ixgbe_hw *hw);
110*48ed61a7SRobert Mustacchi s32 ixgbe_setup_fc_backplane_x550em_a(struct ixgbe_hw *hw);
111*48ed61a7SRobert Mustacchi s32 ixgbe_setup_fc_sgmii_x550em_a(struct ixgbe_hw *hw);
112*48ed61a7SRobert Mustacchi void ixgbe_fc_autoneg_fiber_x550em_a(struct ixgbe_hw *hw);
113*48ed61a7SRobert Mustacchi void ixgbe_fc_autoneg_backplane_x550em_a(struct ixgbe_hw *hw);
114*48ed61a7SRobert Mustacchi void ixgbe_fc_autoneg_sgmii_x550em_a(struct ixgbe_hw *hw);
115dc0cb1cdSDale Ghent s32 ixgbe_handle_lasi_ext_t_x550em(struct ixgbe_hw *hw);
116dc0cb1cdSDale Ghent s32 ixgbe_setup_mac_link_t_X550em(struct ixgbe_hw *hw,
117dc0cb1cdSDale Ghent 				  ixgbe_link_speed speed,
118dc0cb1cdSDale Ghent 				  bool autoneg_wait_to_complete);
119dc0cb1cdSDale Ghent s32 ixgbe_check_link_t_X550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
120dc0cb1cdSDale Ghent 			      bool *link_up, bool link_up_wait_to_complete);
121dc0cb1cdSDale Ghent s32 ixgbe_reset_phy_t_X550em(struct ixgbe_hw *hw);
122dc0cb1cdSDale Ghent s32 ixgbe_identify_sfp_module_X550em(struct ixgbe_hw *hw);
123dc0cb1cdSDale Ghent s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx);
124dc0cb1cdSDale Ghent s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx);
125dc0cb1cdSDale Ghent #endif /* _IXGBE_X550_H_ */
126