163b3bba8SJerry Jelinek /****************************************************************************** 2*48ed61a7SRobert Mustacchi SPDX-License-Identifier: BSD-3-Clause 363b3bba8SJerry Jelinek 4*48ed61a7SRobert Mustacchi Copyright (c) 2001-2017, Intel Corporation 563b3bba8SJerry Jelinek All rights reserved. 6*48ed61a7SRobert Mustacchi 7*48ed61a7SRobert Mustacchi Redistribution and use in source and binary forms, with or without 863b3bba8SJerry Jelinek modification, are permitted provided that the following conditions are met: 9*48ed61a7SRobert Mustacchi 10*48ed61a7SRobert Mustacchi 1. Redistributions of source code must retain the above copyright notice, 1163b3bba8SJerry Jelinek this list of conditions and the following disclaimer. 12*48ed61a7SRobert Mustacchi 13*48ed61a7SRobert Mustacchi 2. Redistributions in binary form must reproduce the above copyright 14*48ed61a7SRobert Mustacchi notice, this list of conditions and the following disclaimer in the 1563b3bba8SJerry Jelinek documentation and/or other materials provided with the distribution. 16*48ed61a7SRobert Mustacchi 17*48ed61a7SRobert Mustacchi 3. Neither the name of the Intel Corporation nor the names of its 18*48ed61a7SRobert Mustacchi contributors may be used to endorse or promote products derived from 1963b3bba8SJerry Jelinek this software without specific prior written permission. 20*48ed61a7SRobert Mustacchi 2163b3bba8SJerry Jelinek THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22*48ed61a7SRobert Mustacchi AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23*48ed61a7SRobert Mustacchi IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24*48ed61a7SRobert Mustacchi ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25*48ed61a7SRobert Mustacchi LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26*48ed61a7SRobert Mustacchi CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27*48ed61a7SRobert Mustacchi SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28*48ed61a7SRobert Mustacchi INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29*48ed61a7SRobert Mustacchi CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3063b3bba8SJerry Jelinek ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3163b3bba8SJerry Jelinek POSSIBILITY OF SUCH DAMAGE. 3263b3bba8SJerry Jelinek 3363b3bba8SJerry Jelinek ******************************************************************************/ 3463b3bba8SJerry Jelinek /*$FreeBSD$*/ 3563b3bba8SJerry Jelinek 3663b3bba8SJerry Jelinek #ifndef _IXGBE_PHY_H_ 3763b3bba8SJerry Jelinek #define _IXGBE_PHY_H_ 389da57d7bSbt 399da57d7bSbt #include "ixgbe_type.h" 40dc0cb1cdSDale Ghent #define IXGBE_I2C_EEPROM_DEV_ADDR 0xA0 41dc0cb1cdSDale Ghent #define IXGBE_I2C_EEPROM_DEV_ADDR2 0xA2 42dc0cb1cdSDale Ghent #define IXGBE_I2C_EEPROM_BANK_LEN 0xFF 4313740cb2SPaul Guo 4413740cb2SPaul Guo /* EEPROM byte offsets */ 4569b5a878SDan McDonald #define IXGBE_SFF_IDENTIFIER 0x0 4669b5a878SDan McDonald #define IXGBE_SFF_IDENTIFIER_SFP 0x3 4769b5a878SDan McDonald #define IXGBE_SFF_VENDOR_OUI_BYTE0 0x25 4869b5a878SDan McDonald #define IXGBE_SFF_VENDOR_OUI_BYTE1 0x26 4969b5a878SDan McDonald #define IXGBE_SFF_VENDOR_OUI_BYTE2 0x27 5069b5a878SDan McDonald #define IXGBE_SFF_1GBE_COMP_CODES 0x6 5169b5a878SDan McDonald #define IXGBE_SFF_10GBE_COMP_CODES 0x3 5269b5a878SDan McDonald #define IXGBE_SFF_CABLE_TECHNOLOGY 0x8 5369b5a878SDan McDonald #define IXGBE_SFF_CABLE_SPEC_COMP 0x3C 54dc0cb1cdSDale Ghent #define IXGBE_SFF_SFF_8472_SWAP 0x5C 55dc0cb1cdSDale Ghent #define IXGBE_SFF_SFF_8472_COMP 0x5E 56dc0cb1cdSDale Ghent #define IXGBE_SFF_SFF_8472_OSCB 0x6E 57dc0cb1cdSDale Ghent #define IXGBE_SFF_SFF_8472_ESCB 0x76 58dc0cb1cdSDale Ghent #define IXGBE_SFF_IDENTIFIER_QSFP_PLUS 0xD 59dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE0 0xA5 60dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE1 0xA6 61dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE2 0xA7 62dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_CONNECTOR 0x82 63dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_10GBE_COMP 0x83 64dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_1GBE_COMP 0x86 65dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_CABLE_LENGTH 0x92 66dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_DEVICE_TECH 0x93 6713740cb2SPaul Guo 6813740cb2SPaul Guo /* Bitmasks */ 6969b5a878SDan McDonald #define IXGBE_SFF_DA_PASSIVE_CABLE 0x4 7069b5a878SDan McDonald #define IXGBE_SFF_DA_ACTIVE_CABLE 0x8 7169b5a878SDan McDonald #define IXGBE_SFF_DA_SPEC_ACTIVE_LIMITING 0x4 7269b5a878SDan McDonald #define IXGBE_SFF_1GBASESX_CAPABLE 0x1 7369b5a878SDan McDonald #define IXGBE_SFF_1GBASELX_CAPABLE 0x2 7469b5a878SDan McDonald #define IXGBE_SFF_1GBASET_CAPABLE 0x8 7569b5a878SDan McDonald #define IXGBE_SFF_10GBASESR_CAPABLE 0x10 7669b5a878SDan McDonald #define IXGBE_SFF_10GBASELR_CAPABLE 0x20 77dc0cb1cdSDale Ghent #define IXGBE_SFF_SOFT_RS_SELECT_MASK 0x8 78dc0cb1cdSDale Ghent #define IXGBE_SFF_SOFT_RS_SELECT_10G 0x8 79dc0cb1cdSDale Ghent #define IXGBE_SFF_SOFT_RS_SELECT_1G 0x0 80dc0cb1cdSDale Ghent #define IXGBE_SFF_ADDRESSING_MODE 0x4 81dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_DA_ACTIVE_CABLE 0x1 82dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_DA_PASSIVE_CABLE 0x8 83dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_CONNECTOR_NOT_SEPARABLE 0x23 84dc0cb1cdSDale Ghent #define IXGBE_SFF_QSFP_TRANSMITER_850NM_VCSEL 0x0 8569b5a878SDan McDonald #define IXGBE_I2C_EEPROM_READ_MASK 0x100 8669b5a878SDan McDonald #define IXGBE_I2C_EEPROM_STATUS_MASK 0x3 8769b5a878SDan McDonald #define IXGBE_I2C_EEPROM_STATUS_NO_OPERATION 0x0 8869b5a878SDan McDonald #define IXGBE_I2C_EEPROM_STATUS_PASS 0x1 8969b5a878SDan McDonald #define IXGBE_I2C_EEPROM_STATUS_FAIL 0x2 9069b5a878SDan McDonald #define IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS 0x3 9113740cb2SPaul Guo 92dc0cb1cdSDale Ghent #define IXGBE_CS4227 0xBE /* CS4227 address */ 93dc0cb1cdSDale Ghent #define IXGBE_CS4227_GLOBAL_ID_LSB 0 94*48ed61a7SRobert Mustacchi #define IXGBE_CS4227_GLOBAL_ID_MSB 1 95dc0cb1cdSDale Ghent #define IXGBE_CS4227_SCRATCH 2 96dc0cb1cdSDale Ghent #define IXGBE_CS4227_GLOBAL_ID_VALUE 0x03E5 97*48ed61a7SRobert Mustacchi #define IXGBE_CS4227_EFUSE_PDF_SKU 0x19F 98*48ed61a7SRobert Mustacchi #define IXGBE_CS4223_SKU_ID 0x0010 /* Quad port */ 99*48ed61a7SRobert Mustacchi #define IXGBE_CS4227_SKU_ID 0x0014 /* Dual port */ 100dc0cb1cdSDale Ghent #define IXGBE_CS4227_RESET_PENDING 0x1357 101dc0cb1cdSDale Ghent #define IXGBE_CS4227_RESET_COMPLETE 0x5AA5 102dc0cb1cdSDale Ghent #define IXGBE_CS4227_RETRIES 15 103dc0cb1cdSDale Ghent #define IXGBE_CS4227_EFUSE_STATUS 0x0181 104dc0cb1cdSDale Ghent #define IXGBE_CS4227_LINE_SPARE22_MSB 0x12AD /* Reg to program speed */ 105dc0cb1cdSDale Ghent #define IXGBE_CS4227_LINE_SPARE24_LSB 0x12B0 /* Reg to program EDC */ 106dc0cb1cdSDale Ghent #define IXGBE_CS4227_HOST_SPARE22_MSB 0x1AAD /* Reg to program speed */ 107dc0cb1cdSDale Ghent #define IXGBE_CS4227_HOST_SPARE24_LSB 0x1AB0 /* Reg to program EDC */ 108dc0cb1cdSDale Ghent #define IXGBE_CS4227_EEPROM_STATUS 0x5001 109dc0cb1cdSDale Ghent #define IXGBE_CS4227_EEPROM_LOAD_OK 0x0001 110dc0cb1cdSDale Ghent #define IXGBE_CS4227_SPEED_1G 0x8000 111dc0cb1cdSDale Ghent #define IXGBE_CS4227_SPEED_10G 0 112dc0cb1cdSDale Ghent #define IXGBE_CS4227_EDC_MODE_CX1 0x0002 113dc0cb1cdSDale Ghent #define IXGBE_CS4227_EDC_MODE_SR 0x0004 114dc0cb1cdSDale Ghent #define IXGBE_CS4227_EDC_MODE_DIAG 0x0008 115dc0cb1cdSDale Ghent #define IXGBE_CS4227_RESET_HOLD 500 /* microseconds */ 116dc0cb1cdSDale Ghent #define IXGBE_CS4227_RESET_DELAY 450 /* milliseconds */ 117dc0cb1cdSDale Ghent #define IXGBE_CS4227_CHECK_DELAY 30 /* milliseconds */ 118dc0cb1cdSDale Ghent #define IXGBE_PE 0xE0 /* Port expander address */ 119dc0cb1cdSDale Ghent #define IXGBE_PE_OUTPUT 1 /* Output register offset */ 120dc0cb1cdSDale Ghent #define IXGBE_PE_CONFIG 3 /* Config register offset */ 121dc0cb1cdSDale Ghent #define IXGBE_PE_BIT1 (1 << 1) 122dc0cb1cdSDale Ghent 1235b6dd21fSchenlu chen - Sun Microsystems - Beijing China /* Flow control defines */ 12469b5a878SDan McDonald #define IXGBE_TAF_SYM_PAUSE 0x400 12569b5a878SDan McDonald #define IXGBE_TAF_ASM_PAUSE 0x800 1265b6dd21fSchenlu chen - Sun Microsystems - Beijing China 12713740cb2SPaul Guo /* Bit-shift macros */ 12869b5a878SDan McDonald #define IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT 24 12969b5a878SDan McDonald #define IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT 16 13069b5a878SDan McDonald #define IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT 8 13113740cb2SPaul Guo 13213740cb2SPaul Guo /* Vendor OUIs: format of OUI is 0x[byte0][byte1][byte2][00] */ 13369b5a878SDan McDonald #define IXGBE_SFF_VENDOR_OUI_TYCO 0x00407600 13469b5a878SDan McDonald #define IXGBE_SFF_VENDOR_OUI_FTL 0x00906500 13569b5a878SDan McDonald #define IXGBE_SFF_VENDOR_OUI_AVAGO 0x00176A00 13669b5a878SDan McDonald #define IXGBE_SFF_VENDOR_OUI_INTEL 0x001B2100 13713740cb2SPaul Guo 13873cd555cSBin Tu - Sun Microsystems - Beijing China /* I2C SDA and SCL timing parameters for standard mode */ 13969b5a878SDan McDonald #define IXGBE_I2C_T_HD_STA 4 14069b5a878SDan McDonald #define IXGBE_I2C_T_LOW 5 14169b5a878SDan McDonald #define IXGBE_I2C_T_HIGH 4 14269b5a878SDan McDonald #define IXGBE_I2C_T_SU_STA 5 14369b5a878SDan McDonald #define IXGBE_I2C_T_HD_DATA 5 14469b5a878SDan McDonald #define IXGBE_I2C_T_SU_DATA 1 14569b5a878SDan McDonald #define IXGBE_I2C_T_RISE 1 14669b5a878SDan McDonald #define IXGBE_I2C_T_FALL 1 14769b5a878SDan McDonald #define IXGBE_I2C_T_SU_STO 4 14869b5a878SDan McDonald #define IXGBE_I2C_T_BUF 5 14963b3bba8SJerry Jelinek 150dc0cb1cdSDale Ghent #ifndef IXGBE_SFP_DETECT_RETRIES 151dc0cb1cdSDale Ghent #define IXGBE_SFP_DETECT_RETRIES 10 152dc0cb1cdSDale Ghent 153dc0cb1cdSDale Ghent #endif /* IXGBE_SFP_DETECT_RETRIES */ 15469b5a878SDan McDonald #define IXGBE_TN_LASI_STATUS_REG 0x9005 15569b5a878SDan McDonald #define IXGBE_TN_LASI_STATUS_TEMP_ALARM 0x0008 1565b6dd21fSchenlu chen - Sun Microsystems - Beijing China 157dc0cb1cdSDale Ghent /* SFP+ SFF-8472 Compliance */ 158dc0cb1cdSDale Ghent #define IXGBE_SFF_SFF_8472_UNSUP 0x00 159dc0cb1cdSDale Ghent 1609da57d7bSbt s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw); 1619da57d7bSbt bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr); 1629da57d7bSbt enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id); 1639da57d7bSbt s32 ixgbe_get_phy_id(struct ixgbe_hw *hw); 1649da57d7bSbt s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw); 1659da57d7bSbt s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw); 166dc0cb1cdSDale Ghent s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 167dc0cb1cdSDale Ghent u16 *phy_data); 168dc0cb1cdSDale Ghent s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 169dc0cb1cdSDale Ghent u16 phy_data); 1709da57d7bSbt s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, 17169b5a878SDan McDonald u32 device_type, u16 *phy_data); 1729da57d7bSbt s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, 17369b5a878SDan McDonald u32 device_type, u16 phy_data); 1749da57d7bSbt s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw); 1759da57d7bSbt s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, 17669b5a878SDan McDonald ixgbe_link_speed speed, 17769b5a878SDan McDonald bool autoneg_wait_to_complete); 17873cd555cSBin Tu - Sun Microsystems - Beijing China s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, 17969b5a878SDan McDonald ixgbe_link_speed *speed, 18069b5a878SDan McDonald bool *autoneg); 181dc0cb1cdSDale Ghent s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw); 18213740cb2SPaul Guo 18313740cb2SPaul Guo /* PHY specific */ 18413740cb2SPaul Guo s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, 18569b5a878SDan McDonald ixgbe_link_speed *speed, 18669b5a878SDan McDonald bool *link_up); 1873cfa0eb9Schenlu chen - Sun Microsystems - Beijing China s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw); 18813740cb2SPaul Guo s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw, 18969b5a878SDan McDonald u16 *firmware_version); 1903cfa0eb9Schenlu chen - Sun Microsystems - Beijing China s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw, 19169b5a878SDan McDonald u16 *firmware_version); 19213740cb2SPaul Guo 19313740cb2SPaul Guo s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw); 194dc0cb1cdSDale Ghent s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on); 19569b5a878SDan McDonald s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw); 19613740cb2SPaul Guo s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw); 197*48ed61a7SRobert Mustacchi u64 ixgbe_get_supported_phy_sfp_layer_generic(struct ixgbe_hw *hw); 198dc0cb1cdSDale Ghent s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw); 19913740cb2SPaul Guo s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, 20069b5a878SDan McDonald u16 *list_offset, 20169b5a878SDan McDonald u16 *data_offset); 2025b6dd21fSchenlu chen - Sun Microsystems - Beijing China s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw); 20373cd555cSBin Tu - Sun Microsystems - Beijing China s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 20469b5a878SDan McDonald u8 dev_addr, u8 *data); 205dc0cb1cdSDale Ghent s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 206dc0cb1cdSDale Ghent u8 dev_addr, u8 *data); 20773cd555cSBin Tu - Sun Microsystems - Beijing China s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 20869b5a878SDan McDonald u8 dev_addr, u8 data); 209dc0cb1cdSDale Ghent s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 210dc0cb1cdSDale Ghent u8 dev_addr, u8 data); 21173cd555cSBin Tu - Sun Microsystems - Beijing China s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 21269b5a878SDan McDonald u8 *eeprom_data); 21373cd555cSBin Tu - Sun Microsystems - Beijing China s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 21469b5a878SDan McDonald u8 eeprom_data); 21569b5a878SDan McDonald void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw); 216*48ed61a7SRobert Mustacchi s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg, 217*48ed61a7SRobert Mustacchi u16 *val, bool lock); 218*48ed61a7SRobert Mustacchi s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg, 219*48ed61a7SRobert Mustacchi u16 val, bool lock); 22063b3bba8SJerry Jelinek #endif /* _IXGBE_PHY_H_ */ 221