19d26e4fcSRobert Mustacchi /* 29d26e4fcSRobert Mustacchi * This file and its contents are supplied under the terms of the 39d26e4fcSRobert Mustacchi * Common Development and Distribution License ("CDDL"), version 1.0. 49d26e4fcSRobert Mustacchi * You may only use this file in accordance with the terms of version 59d26e4fcSRobert Mustacchi * 1.0 of the CDDL. 69d26e4fcSRobert Mustacchi * 79d26e4fcSRobert Mustacchi * A full copy of the text of the CDDL should have accompanied this 89d26e4fcSRobert Mustacchi * source. A copy of the CDDL is also available via the Internet at 99d26e4fcSRobert Mustacchi * http://www.illumos.org/license/CDDL. 109d26e4fcSRobert Mustacchi */ 119d26e4fcSRobert Mustacchi 129d26e4fcSRobert Mustacchi /* 139d26e4fcSRobert Mustacchi * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved. 1409aee612SRyan Zezeski * Copyright 2019 Joyent, Inc. 15396505afSPaul Winder * Copyright 2017 Tegile Systems, Inc. All rights reserved. 16234a3cfbSPaul Winder * Copyright 2020 RackTop Systems, Inc. 1788628b1bSRyan Zezeski * Copyright 2020 Ryan Zezeski 18*df36e06dSRobert Mustacchi * Copyright 2021 Oxide Computer Company 199d26e4fcSRobert Mustacchi */ 209d26e4fcSRobert Mustacchi 219d26e4fcSRobert Mustacchi /* 229d26e4fcSRobert Mustacchi * i40e - Intel 10/40 Gb Ethernet driver 239d26e4fcSRobert Mustacchi * 249d26e4fcSRobert Mustacchi * The i40e driver is the main software device driver for the Intel 40 Gb family 259d26e4fcSRobert Mustacchi * of devices. Note that these devices come in many flavors with both 40 GbE 269d26e4fcSRobert Mustacchi * ports and 10 GbE ports. This device is the successor to the 82599 family of 279d26e4fcSRobert Mustacchi * devices (ixgbe). 289d26e4fcSRobert Mustacchi * 299d26e4fcSRobert Mustacchi * Unlike previous generations of Intel 1 GbE and 10 GbE devices, the 40 GbE 309d26e4fcSRobert Mustacchi * devices defined in the XL710 controller (previously known as Fortville) are a 319d26e4fcSRobert Mustacchi * rather different beast and have a small switch embedded inside of them. In 329d26e4fcSRobert Mustacchi * addition, the way that most of the programming is done has been overhauled. 339d26e4fcSRobert Mustacchi * As opposed to just using PCIe memory mapped registers, it also has an 349d26e4fcSRobert Mustacchi * administrative queue which is used to communicate with firmware running on 359d26e4fcSRobert Mustacchi * the chip. 369d26e4fcSRobert Mustacchi * 379d26e4fcSRobert Mustacchi * Each physical function in the hardware shows up as a device that this driver 389d26e4fcSRobert Mustacchi * will bind to. The hardware splits many resources evenly across all of the 399d26e4fcSRobert Mustacchi * physical functions present on the device, while other resources are instead 409d26e4fcSRobert Mustacchi * shared across the entire card and its up to the device driver to 419d26e4fcSRobert Mustacchi * intelligently partition them. 429d26e4fcSRobert Mustacchi * 439d26e4fcSRobert Mustacchi * ------------ 449d26e4fcSRobert Mustacchi * Organization 459d26e4fcSRobert Mustacchi * ------------ 469d26e4fcSRobert Mustacchi * 479d26e4fcSRobert Mustacchi * This driver is made up of several files which have their own theory 489d26e4fcSRobert Mustacchi * statements spread across them. We'll touch on the high level purpose of each 499d26e4fcSRobert Mustacchi * file here, and then we'll get into more discussion on how the device is 509d26e4fcSRobert Mustacchi * generally modelled with respect to the interfaces in illumos. 519d26e4fcSRobert Mustacchi * 529d26e4fcSRobert Mustacchi * i40e_gld.c: This file contains all of the bindings to MAC and the networking 539d26e4fcSRobert Mustacchi * stack. 549d26e4fcSRobert Mustacchi * 559d26e4fcSRobert Mustacchi * i40e_intr.c: This file contains all of the interrupt service routines and 569d26e4fcSRobert Mustacchi * contains logic to enable and disable interrupts on the hardware. 579d26e4fcSRobert Mustacchi * It also contains the logic to map hardware resources such as the 589d26e4fcSRobert Mustacchi * rings to and from interrupts and controls their ability to fire. 599d26e4fcSRobert Mustacchi * 609d26e4fcSRobert Mustacchi * There is a big theory statement on interrupts present there. 619d26e4fcSRobert Mustacchi * 629d26e4fcSRobert Mustacchi * i40e_main.c: The file that you're currently in. It interfaces with the 639d26e4fcSRobert Mustacchi * traditional OS DDI interfaces and is in charge of configuring 649d26e4fcSRobert Mustacchi * the device. 659d26e4fcSRobert Mustacchi * 669d26e4fcSRobert Mustacchi * i40e_osdep.[ch]: These files contain interfaces and definitions needed to 679d26e4fcSRobert Mustacchi * work with Intel's common code for the device. 689d26e4fcSRobert Mustacchi * 699d26e4fcSRobert Mustacchi * i40e_stats.c: This file contains the general work and logic around our 709d26e4fcSRobert Mustacchi * kstats. A theory statement on their organization and use of the 719d26e4fcSRobert Mustacchi * hardware exists there. 729d26e4fcSRobert Mustacchi * 739d26e4fcSRobert Mustacchi * i40e_sw.h: This header file contains all of the primary structure definitions 749d26e4fcSRobert Mustacchi * and constants that are used across the entire driver. 759d26e4fcSRobert Mustacchi * 769d26e4fcSRobert Mustacchi * i40e_transceiver.c: This file contains all of the logic for sending and 779d26e4fcSRobert Mustacchi * receiving data. It contains all of the ring and DMA 789d26e4fcSRobert Mustacchi * allocation logic, as well as, the actual interfaces to 799d26e4fcSRobert Mustacchi * send and receive data. 809d26e4fcSRobert Mustacchi * 819d26e4fcSRobert Mustacchi * A big theory statement on ring management, descriptors, 829d26e4fcSRobert Mustacchi * and how it ties into the OS is present there. 839d26e4fcSRobert Mustacchi * 849d26e4fcSRobert Mustacchi * -------------- 859d26e4fcSRobert Mustacchi * General Design 869d26e4fcSRobert Mustacchi * -------------- 879d26e4fcSRobert Mustacchi * 889d26e4fcSRobert Mustacchi * Before we go too far into the general way we've laid out data structures and 899d26e4fcSRobert Mustacchi * the like, it's worth taking some time to explain how the hardware is 909d26e4fcSRobert Mustacchi * organized. This organization informs a lot of how we do things at this time 919d26e4fcSRobert Mustacchi * in the driver. 929d26e4fcSRobert Mustacchi * 939d26e4fcSRobert Mustacchi * Each physical device consists of a number of one or more ports, which are 949d26e4fcSRobert Mustacchi * considered physical functions in the PCI sense and thus each get enumerated 959d26e4fcSRobert Mustacchi * by the system, resulting in an instance being created and attached to. While 969d26e4fcSRobert Mustacchi * there are many resources that are unique to each physical function eg. 979d26e4fcSRobert Mustacchi * instance of the device, there are many that are shared across all of them. 989d26e4fcSRobert Mustacchi * Several resources have an amount reserved for each Virtual Station Interface 999d26e4fcSRobert Mustacchi * (VSI) and then a static pool of resources, available for all functions on the 1009d26e4fcSRobert Mustacchi * card. 1019d26e4fcSRobert Mustacchi * 1029d26e4fcSRobert Mustacchi * The most important resource in hardware are its transmit and receive queue 1039d26e4fcSRobert Mustacchi * pairs (i40e_trqpair_t). These should be thought of as rings in GLDv3 1049d26e4fcSRobert Mustacchi * parlance. There are a set number of these on each device; however, they are 1059d26e4fcSRobert Mustacchi * statically partitioned among all of the different physical functions. 1069d26e4fcSRobert Mustacchi * 1079d26e4fcSRobert Mustacchi * 'Fortville' (the code name for this device family) is basically a switch. To 1089d26e4fcSRobert Mustacchi * map MAC addresses and other things to queues, we end up having to create 1099d26e4fcSRobert Mustacchi * Virtual Station Interfaces (VSIs) and establish forwarding rules that direct 1109d26e4fcSRobert Mustacchi * traffic to a queue. A VSI owns a collection of queues and has a series of 1119d26e4fcSRobert Mustacchi * forwarding rules that point to it. One way to think of this is to treat it 1129d26e4fcSRobert Mustacchi * like MAC does a VNIC. When MAC refers to a group, a collection of rings and 1139d26e4fcSRobert Mustacchi * classification resources, that is a VSI in i40e. 1149d26e4fcSRobert Mustacchi * 1159d26e4fcSRobert Mustacchi * The sets of VSIs is shared across the entire device, though there may be some 1169d26e4fcSRobert Mustacchi * amount that are reserved to each PF. Because the GLDv3 does not let us change 1179d26e4fcSRobert Mustacchi * the number of groups dynamically, we instead statically divide this amount 1189d26e4fcSRobert Mustacchi * evenly between all the functions that exist. In addition, we have the same 1199d26e4fcSRobert Mustacchi * problem with the mac address forwarding rules. There are a static number that 1209d26e4fcSRobert Mustacchi * exist shared across all the functions. 1219d26e4fcSRobert Mustacchi * 1229d26e4fcSRobert Mustacchi * To handle both of these resources, what we end up doing is going through and 1239d26e4fcSRobert Mustacchi * determining which functions belong to the same device. Nominally one might do 1249d26e4fcSRobert Mustacchi * this by having a nexus driver; however, a prime requirement for a nexus 1259d26e4fcSRobert Mustacchi * driver is identifying the various children and activating them. While it is 1269d26e4fcSRobert Mustacchi * possible to get this information from NVRAM, we would end up duplicating a 1279d26e4fcSRobert Mustacchi * lot of the PCI enumeration logic. Really, at the end of the day, the device 1289d26e4fcSRobert Mustacchi * doesn't give us the traditional identification properties we want from a 1299d26e4fcSRobert Mustacchi * nexus driver. 1309d26e4fcSRobert Mustacchi * 1319d26e4fcSRobert Mustacchi * Instead, we rely on some properties that are guaranteed to be unique. While 1329d26e4fcSRobert Mustacchi * it might be tempting to leverage the PBA or serial number of the device from 1339d26e4fcSRobert Mustacchi * NVRAM, there is nothing that says that two devices can't be mis-programmed to 1349d26e4fcSRobert Mustacchi * have the same values in NVRAM. Instead, we uniquely identify a group of 1359d26e4fcSRobert Mustacchi * functions based on their parent in the /devices tree, their PCI bus and PCI 1369d26e4fcSRobert Mustacchi * function identifiers. Using either on their own may not be sufficient. 1379d26e4fcSRobert Mustacchi * 1389d26e4fcSRobert Mustacchi * For each unique PCI device that we encounter, we'll create a i40e_device_t. 1399d26e4fcSRobert Mustacchi * From there, because we don't have a good way to tell the GLDv3 about sharing 1409d26e4fcSRobert Mustacchi * resources between everything, we'll end up just dividing the resources 1419d26e4fcSRobert Mustacchi * evenly between all of the functions. Longer term, if we don't have to declare 1429d26e4fcSRobert Mustacchi * to the GLDv3 that these resources are shared, then we'll maintain a pool and 1437267b93fSMarcel Telka * have each PF allocate from the pool in the device, thus if only two of four 1449d26e4fcSRobert Mustacchi * ports are being used, for example, then all of the resources can still be 1459d26e4fcSRobert Mustacchi * used. 1469d26e4fcSRobert Mustacchi * 1479d26e4fcSRobert Mustacchi * ------------------------------------------- 1489d26e4fcSRobert Mustacchi * Transmit and Receive Queue Pair Allocations 1499d26e4fcSRobert Mustacchi * ------------------------------------------- 1509d26e4fcSRobert Mustacchi * 1519d26e4fcSRobert Mustacchi * NVRAM ends up assigning each PF its own share of the transmit and receive LAN 1529d26e4fcSRobert Mustacchi * queue pairs, we have no way of modifying it, only observing it. From there, 1539d26e4fcSRobert Mustacchi * it's up to us to map these queues to VSIs and VFs. Since we don't support any 1549d26e4fcSRobert Mustacchi * VFs at this time, we only focus on assignments to VSIs. 1559d26e4fcSRobert Mustacchi * 1569d26e4fcSRobert Mustacchi * At the moment, we used a static mapping of transmit/receive queue pairs to a 1579d26e4fcSRobert Mustacchi * given VSI (eg. rings to a group). Though in the fullness of time, we want to 1589d26e4fcSRobert Mustacchi * make this something which is fully dynamic and take advantage of documented, 1599d26e4fcSRobert Mustacchi * but not yet available functionality for adding filters based on VXLAN and 1609d26e4fcSRobert Mustacchi * other encapsulation technologies. 1619d26e4fcSRobert Mustacchi * 1629d26e4fcSRobert Mustacchi * ------------------------------------- 1639d26e4fcSRobert Mustacchi * Broadcast, Multicast, and Promiscuous 1649d26e4fcSRobert Mustacchi * ------------------------------------- 1659d26e4fcSRobert Mustacchi * 1669d26e4fcSRobert Mustacchi * As part of the GLDv3, we need to make sure that we can handle receiving 1679d26e4fcSRobert Mustacchi * broadcast and multicast traffic. As well as enabling promiscuous mode when 1689d26e4fcSRobert Mustacchi * requested. GLDv3 requires that all broadcast and multicast traffic be 1699d26e4fcSRobert Mustacchi * retrieved by the default group, eg. the first one. This is the same thing as 1709d26e4fcSRobert Mustacchi * the default VSI. 1719d26e4fcSRobert Mustacchi * 1729d26e4fcSRobert Mustacchi * To receieve broadcast traffic, we enable it through the admin queue, rather 1739d26e4fcSRobert Mustacchi * than use one of our filters for it. For multicast traffic, we reserve a 1749d26e4fcSRobert Mustacchi * certain number of the hash filters and assign them to a given PF. When we 1757267b93fSMarcel Telka * exceed those, we then switch to using promiscuous mode for multicast traffic. 1769d26e4fcSRobert Mustacchi * 1779d26e4fcSRobert Mustacchi * More specifically, once we exceed the number of filters (indicated because 1789d26e4fcSRobert Mustacchi * the i40e_t`i40e_resources.ifr_nmcastfilt == 1799d26e4fcSRobert Mustacchi * i40e_t`i40e_resources.ifr_nmcastfilt_used), we then instead need to toggle 1809d26e4fcSRobert Mustacchi * promiscuous mode. If promiscuous mode is toggled then we keep track of the 1819d26e4fcSRobert Mustacchi * number of MACs added to it by incrementing i40e_t`i40e_mcast_promisc_count. 1829d26e4fcSRobert Mustacchi * That will stay enabled until that count reaches zero indicating that we have 1839d26e4fcSRobert Mustacchi * only added multicast addresses that we have a corresponding entry for. 1849d26e4fcSRobert Mustacchi * 1859d26e4fcSRobert Mustacchi * Because MAC itself wants to toggle promiscuous mode, which includes both 1869d26e4fcSRobert Mustacchi * unicast and multicast traffic, we go through and keep track of that 1879d26e4fcSRobert Mustacchi * ourselves. That is maintained through the use of the i40e_t`i40e_promisc_on 1889d26e4fcSRobert Mustacchi * member. 1899d26e4fcSRobert Mustacchi * 1909d26e4fcSRobert Mustacchi * -------------- 1919d26e4fcSRobert Mustacchi * VSI Management 1929d26e4fcSRobert Mustacchi * -------------- 1939d26e4fcSRobert Mustacchi * 19409aee612SRyan Zezeski * The PFs share 384 VSIs. The firmware creates one VSI per PF by default. 19509aee612SRyan Zezeski * During chip start we retrieve the SEID of this VSI and assign it as the 19609aee612SRyan Zezeski * default VSI for our VEB (one VEB per PF). We then add additional VSIs to 19709aee612SRyan Zezeski * the VEB up to the determined number of rx groups: i40e_t`i40e_num_rx_groups. 19809aee612SRyan Zezeski * We currently cap this number to I40E_GROUP_MAX to a) make sure all PFs can 19909aee612SRyan Zezeski * allocate the same number of VSIs, and b) to keep the interrupt multiplexing 20009aee612SRyan Zezeski * under control. In the future, when we improve the interrupt allocation, we 20109aee612SRyan Zezeski * may want to revisit this cap to make better use of the available VSIs. The 20209aee612SRyan Zezeski * VSI allocation and configuration can be found in i40e_chip_start(). 2039d26e4fcSRobert Mustacchi * 2049d26e4fcSRobert Mustacchi * ---------------- 2059d26e4fcSRobert Mustacchi * Structure Layout 2069d26e4fcSRobert Mustacchi * ---------------- 2079d26e4fcSRobert Mustacchi * 2089d26e4fcSRobert Mustacchi * The following images relates the core data structures together. The primary 2099d26e4fcSRobert Mustacchi * structure in the system is the i40e_t. It itself contains multiple rings, 2109d26e4fcSRobert Mustacchi * i40e_trqpair_t's which contain the various transmit and receive data. The 2119d26e4fcSRobert Mustacchi * receive data is stored outside of the i40e_trqpair_t and instead in the 2129d26e4fcSRobert Mustacchi * i40e_rx_data_t. The i40e_t has a corresponding i40e_device_t which keeps 2139d26e4fcSRobert Mustacchi * track of per-physical device state. Finally, for every active descriptor, 2149d26e4fcSRobert Mustacchi * there is a corresponding control block, which is where the 2159d26e4fcSRobert Mustacchi * i40e_rx_control_block_t and the i40e_tx_control_block_t come from. 2169d26e4fcSRobert Mustacchi * 2179d26e4fcSRobert Mustacchi * +-----------------------+ +-----------------------+ 2189d26e4fcSRobert Mustacchi * | Global i40e_t list | | Global Device list | 2199d26e4fcSRobert Mustacchi * | | +--| | 2209d26e4fcSRobert Mustacchi * | i40e_glist | | | i40e_dlist | 2219d26e4fcSRobert Mustacchi * +-----------------------+ | +-----------------------+ 2229d26e4fcSRobert Mustacchi * | v 2239d26e4fcSRobert Mustacchi * | +------------------------+ +-----------------------+ 2249d26e4fcSRobert Mustacchi * | | Device-wide Structure |----->| Device-wide Structure |--> ... 2259d26e4fcSRobert Mustacchi * | | i40e_device_t | | i40e_device_t | 2269d26e4fcSRobert Mustacchi * | | | +-----------------------+ 2279d26e4fcSRobert Mustacchi * | | dev_info_t * ------+--> Parent in devices tree. 2289d26e4fcSRobert Mustacchi * | | uint_t ------+--> PCI bus number 2299d26e4fcSRobert Mustacchi * | | uint_t ------+--> PCI device number 2309d26e4fcSRobert Mustacchi * | | uint_t ------+--> Number of functions 2319d26e4fcSRobert Mustacchi * | | i40e_switch_rsrcs_t ---+--> Captured total switch resources 2329d26e4fcSRobert Mustacchi * | | list_t ------+-------------+ 2339d26e4fcSRobert Mustacchi * | +------------------------+ | 2349d26e4fcSRobert Mustacchi * | ^ | 2359d26e4fcSRobert Mustacchi * | +--------+ | 2369d26e4fcSRobert Mustacchi * | | v 2379d26e4fcSRobert Mustacchi * | +---------------------------+ | +-------------------+ 2389d26e4fcSRobert Mustacchi * +->| GLDv3 Device, per PF |-----|-->| GLDv3 Device (PF) |--> ... 2399d26e4fcSRobert Mustacchi * | i40e_t | | | i40e_t | 2409d26e4fcSRobert Mustacchi * | **Primary Structure** | | +-------------------+ 2419d26e4fcSRobert Mustacchi * | | | 2429d26e4fcSRobert Mustacchi * | i40e_device_t * --+-----+ 2439d26e4fcSRobert Mustacchi * | i40e_state_t --+---> Device State 2449d26e4fcSRobert Mustacchi * | i40e_hw_t --+---> Intel common code structure 2459d26e4fcSRobert Mustacchi * | mac_handle_t --+---> GLDv3 handle to MAC 2469d26e4fcSRobert Mustacchi * | ddi_periodic_t --+---> Link activity timer 24709aee612SRyan Zezeski * | i40e_vsi_t * --+---> Array of VSIs 2489d26e4fcSRobert Mustacchi * | i40e_func_rsrc_t --+---> Available hardware resources 2499d26e4fcSRobert Mustacchi * | i40e_switch_rsrc_t * --+---> Switch resource snapshot 2509d26e4fcSRobert Mustacchi * | i40e_sdu --+---> Current MTU 2519d26e4fcSRobert Mustacchi * | i40e_frame_max --+---> Current HW frame size 2529d26e4fcSRobert Mustacchi * | i40e_uaddr_t * --+---> Array of assigned unicast MACs 2539d26e4fcSRobert Mustacchi * | i40e_maddr_t * --+---> Array of assigned multicast MACs 2549d26e4fcSRobert Mustacchi * | i40e_mcast_promisccount --+---> Active multicast state 2559d26e4fcSRobert Mustacchi * | i40e_promisc_on --+---> Current promiscuous mode state 25609aee612SRyan Zezeski * | uint_t --+---> Number of transmit/receive pairs 25709aee612SRyan Zezeski * | i40e_rx_group_t * --+---> Array of Rx groups 2589d26e4fcSRobert Mustacchi * | kstat_t * --+---> PF kstats 2599d26e4fcSRobert Mustacchi * | i40e_pf_stats_t --+---> PF kstat backing data 2609d26e4fcSRobert Mustacchi * | i40e_trqpair_t * --+---------+ 2619d26e4fcSRobert Mustacchi * +---------------------------+ | 2629d26e4fcSRobert Mustacchi * | 2639d26e4fcSRobert Mustacchi * v 2649d26e4fcSRobert Mustacchi * +-------------------------------+ +-----------------------------+ 2659d26e4fcSRobert Mustacchi * | Transmit/Receive Queue Pair |-------| Transmit/Receive Queue Pair |->... 2669d26e4fcSRobert Mustacchi * | i40e_trqpair_t | | i40e_trqpair_t | 2679d26e4fcSRobert Mustacchi * + Ring Data Structure | +-----------------------------+ 2689d26e4fcSRobert Mustacchi * | | 2699d26e4fcSRobert Mustacchi * | mac_ring_handle_t +--> MAC RX ring handle 2709d26e4fcSRobert Mustacchi * | mac_ring_handle_t +--> MAC TX ring handle 2719d26e4fcSRobert Mustacchi * | i40e_rxq_stat_t --+--> RX Queue stats 2729d26e4fcSRobert Mustacchi * | i40e_txq_stat_t --+--> TX Queue stats 2739d26e4fcSRobert Mustacchi * | uint32_t (tx ring size) +--> TX Ring Size 2749d26e4fcSRobert Mustacchi * | uint32_t (tx free list size) +--> TX Free List Size 2759d26e4fcSRobert Mustacchi * | i40e_dma_buffer_t --------+--> TX Descriptor ring DMA 2769d26e4fcSRobert Mustacchi * | i40e_tx_desc_t * --------+--> TX descriptor ring 2779d26e4fcSRobert Mustacchi * | volatile unt32_t * +--> TX Write back head 2789d26e4fcSRobert Mustacchi * | uint32_t -------+--> TX ring head 2799d26e4fcSRobert Mustacchi * | uint32_t -------+--> TX ring tail 2809d26e4fcSRobert Mustacchi * | uint32_t -------+--> Num TX desc free 2819d26e4fcSRobert Mustacchi * | i40e_tx_control_block_t * --+--> TX control block array ---+ 2829d26e4fcSRobert Mustacchi * | i40e_tx_control_block_t ** --+--> TCB work list ----+ 2839d26e4fcSRobert Mustacchi * | i40e_tx_control_block_t ** --+--> TCB free list ---+ 2849d26e4fcSRobert Mustacchi * | uint32_t -------+--> Free TCB count | 2859d26e4fcSRobert Mustacchi * | i40e_rx_data_t * -------+--+ v 2869d26e4fcSRobert Mustacchi * +-------------------------------+ | +---------------------------+ 2879d26e4fcSRobert Mustacchi * | | Per-TX Frame Metadata | 2889d26e4fcSRobert Mustacchi * | | i40e_tx_control_block_t | 2899d26e4fcSRobert Mustacchi * +--------------------+ | | 2909d26e4fcSRobert Mustacchi * | mblk to transmit <--+--- mblk_t * | 2919d26e4fcSRobert Mustacchi * | type of transmit <--+--- i40e_tx_type_t | 2929d26e4fcSRobert Mustacchi * | TX DMA handle <--+--- ddi_dma_handle_t | 2939d26e4fcSRobert Mustacchi * v TX DMA buffer <--+--- i40e_dma_buffer_t | 2949d26e4fcSRobert Mustacchi * +------------------------------+ +---------------------------+ 2959d26e4fcSRobert Mustacchi * | Core Receive Data | 2969d26e4fcSRobert Mustacchi * | i40e_rx_data_t | 2979d26e4fcSRobert Mustacchi * | | 2989d26e4fcSRobert Mustacchi * | i40e_dma_buffer_t --+--> RX descriptor DMA Data 2999d26e4fcSRobert Mustacchi * | i40e_rx_desc_t --+--> RX descriptor ring 3009d26e4fcSRobert Mustacchi * | uint32_t --+--> Next free desc. 3019d26e4fcSRobert Mustacchi * | i40e_rx_control_block_t * --+--> RX Control Block Array ---+ 3029d26e4fcSRobert Mustacchi * | i40e_rx_control_block_t ** --+--> RCB work list ---+ 3039d26e4fcSRobert Mustacchi * | i40e_rx_control_block_t ** --+--> RCB free list ---+ 3049d26e4fcSRobert Mustacchi * +------------------------------+ | 3059d26e4fcSRobert Mustacchi * ^ | 3069d26e4fcSRobert Mustacchi * | +---------------------------+ | 3079d26e4fcSRobert Mustacchi * | | Per-RX Frame Metadata |<---------------+ 3089d26e4fcSRobert Mustacchi * | | i40e_rx_control_block_t | 3099d26e4fcSRobert Mustacchi * | | | 3109d26e4fcSRobert Mustacchi * | | mblk_t * ----+--> Received mblk_t data 3119d26e4fcSRobert Mustacchi * | | uint32_t ----+--> Reference count 3129d26e4fcSRobert Mustacchi * | | i40e_dma_buffer_t ----+--> Receive data DMA info 3139d26e4fcSRobert Mustacchi * | | frtn_t ----+--> mblk free function info 3149d26e4fcSRobert Mustacchi * +-----+-- i40e_rx_data_t * | 3159d26e4fcSRobert Mustacchi * +---------------------------+ 3169d26e4fcSRobert Mustacchi * 3179d26e4fcSRobert Mustacchi * ------------- 3189d26e4fcSRobert Mustacchi * Lock Ordering 3199d26e4fcSRobert Mustacchi * ------------- 3209d26e4fcSRobert Mustacchi * 3219d26e4fcSRobert Mustacchi * In order to ensure that we don't deadlock, the following represents the 3229d26e4fcSRobert Mustacchi * lock order being used. When grabbing locks, follow the following order. Lower 3239d26e4fcSRobert Mustacchi * numbers are more important. Thus, the i40e_glock which is number 0, must be 3249d26e4fcSRobert Mustacchi * taken before any other locks in the driver. On the other hand, the 3259d26e4fcSRobert Mustacchi * i40e_t`i40e_stat_lock, has the highest number because it's the least 3269d26e4fcSRobert Mustacchi * important lock. Note, that just because one lock is higher than another does 3279d26e4fcSRobert Mustacchi * not mean that all intermediary locks are required. 3289d26e4fcSRobert Mustacchi * 3299d26e4fcSRobert Mustacchi * 0) i40e_glock 3309d26e4fcSRobert Mustacchi * 1) i40e_t`i40e_general_lock 3319d26e4fcSRobert Mustacchi * 3329d26e4fcSRobert Mustacchi * 2) i40e_trqpair_t`itrq_rx_lock 3339d26e4fcSRobert Mustacchi * 3) i40e_trqpair_t`itrq_tx_lock 334aa2a44afSPaul Winder * 4) i40e_trqpair_t`itrq_intr_lock 335aa2a44afSPaul Winder * 5) i40e_t`i40e_rx_pending_lock 336aa2a44afSPaul Winder * 6) i40e_trqpair_t`itrq_tcb_lock 3379d26e4fcSRobert Mustacchi * 338aa2a44afSPaul Winder * 7) i40e_t`i40e_stat_lock 3399d26e4fcSRobert Mustacchi * 3409d26e4fcSRobert Mustacchi * Rules and expectations: 3419d26e4fcSRobert Mustacchi * 3429d26e4fcSRobert Mustacchi * 1) A thread holding locks belong to one PF should not hold locks belonging to 3439d26e4fcSRobert Mustacchi * a second. If for some reason this becomes necessary, locks should be grabbed 3449d26e4fcSRobert Mustacchi * based on the list order in the i40e_device_t, which implies that the 3459d26e4fcSRobert Mustacchi * i40e_glock is held. 3469d26e4fcSRobert Mustacchi * 3479d26e4fcSRobert Mustacchi * 2) When grabbing locks between multiple transmit and receive queues, the 3489d26e4fcSRobert Mustacchi * locks for the lowest number transmit/receive queue should be grabbed first. 3499d26e4fcSRobert Mustacchi * 3509d26e4fcSRobert Mustacchi * 3) When grabbing both the transmit and receive lock for a given queue, always 3519d26e4fcSRobert Mustacchi * grab i40e_trqpair_t`itrq_rx_lock before the i40e_trqpair_t`itrq_tx_lock. 3529d26e4fcSRobert Mustacchi * 3539d26e4fcSRobert Mustacchi * 4) The following pairs of locks are not expected to be held at the same time: 3549d26e4fcSRobert Mustacchi * 3559d26e4fcSRobert Mustacchi * o i40e_t`i40e_rx_pending_lock and i40e_trqpair_t`itrq_tcb_lock 356aa2a44afSPaul Winder * o i40e_trqpair_t`itrq_intr_lock is not expected to be held with any 357aa2a44afSPaul Winder * other lock except i40e_t`i40e_general_lock in mc_start(9E) and 358aa2a44afSPaul Winder * mc_stop(9e). 3599d26e4fcSRobert Mustacchi * 3609d26e4fcSRobert Mustacchi * ----------- 3619d26e4fcSRobert Mustacchi * Future Work 3629d26e4fcSRobert Mustacchi * ----------- 3639d26e4fcSRobert Mustacchi * 3649d26e4fcSRobert Mustacchi * At the moment the i40e_t driver is rather bare bones, allowing us to start 3659d26e4fcSRobert Mustacchi * getting data flowing and folks using it while we develop additional features. 3669d26e4fcSRobert Mustacchi * While bugs have been filed to cover this future work, the following gives an 3679d26e4fcSRobert Mustacchi * overview of expected work: 3689d26e4fcSRobert Mustacchi * 3699d26e4fcSRobert Mustacchi * o DMA binding and breaking up the locking in ring recycling. 3709d26e4fcSRobert Mustacchi * o Enhanced detection of device errors 3719d26e4fcSRobert Mustacchi * o Participation in IRM 3729d26e4fcSRobert Mustacchi * o FMA device reset 3739d26e4fcSRobert Mustacchi * o Stall detection, temperature error detection, etc. 3749d26e4fcSRobert Mustacchi * o More dynamic resource pools 3759d26e4fcSRobert Mustacchi */ 3769d26e4fcSRobert Mustacchi 3779d26e4fcSRobert Mustacchi #include "i40e_sw.h" 3789d26e4fcSRobert Mustacchi 37909aee612SRyan Zezeski static char i40e_ident[] = "Intel 10/40Gb Ethernet v1.0.3"; 3809d26e4fcSRobert Mustacchi 3819d26e4fcSRobert Mustacchi /* 3829d26e4fcSRobert Mustacchi * The i40e_glock primarily protects the lists below and the i40e_device_t 3839d26e4fcSRobert Mustacchi * structures. 3849d26e4fcSRobert Mustacchi */ 3859d26e4fcSRobert Mustacchi static kmutex_t i40e_glock; 3869d26e4fcSRobert Mustacchi static list_t i40e_glist; 3879d26e4fcSRobert Mustacchi static list_t i40e_dlist; 3889d26e4fcSRobert Mustacchi 3899d26e4fcSRobert Mustacchi /* 3909d26e4fcSRobert Mustacchi * Access attributes for register mapping. 3919d26e4fcSRobert Mustacchi */ 3929d26e4fcSRobert Mustacchi static ddi_device_acc_attr_t i40e_regs_acc_attr = { 3939d26e4fcSRobert Mustacchi DDI_DEVICE_ATTR_V1, 3949d26e4fcSRobert Mustacchi DDI_STRUCTURE_LE_ACC, 3959d26e4fcSRobert Mustacchi DDI_STRICTORDER_ACC, 3969d26e4fcSRobert Mustacchi DDI_FLAGERR_ACC 3979d26e4fcSRobert Mustacchi }; 3989d26e4fcSRobert Mustacchi 3999d26e4fcSRobert Mustacchi /* 4009d26e4fcSRobert Mustacchi * Logging function for this driver. 4019d26e4fcSRobert Mustacchi */ 4029d26e4fcSRobert Mustacchi static void 4039d26e4fcSRobert Mustacchi i40e_dev_err(i40e_t *i40e, int level, boolean_t console, const char *fmt, 4049d26e4fcSRobert Mustacchi va_list ap) 4059d26e4fcSRobert Mustacchi { 4069d26e4fcSRobert Mustacchi char buf[1024]; 4079d26e4fcSRobert Mustacchi 4089d26e4fcSRobert Mustacchi (void) vsnprintf(buf, sizeof (buf), fmt, ap); 4099d26e4fcSRobert Mustacchi 4109d26e4fcSRobert Mustacchi if (i40e == NULL) { 4119d26e4fcSRobert Mustacchi cmn_err(level, (console) ? "%s: %s" : "!%s: %s", 4129d26e4fcSRobert Mustacchi I40E_MODULE_NAME, buf); 4139d26e4fcSRobert Mustacchi } else { 4149d26e4fcSRobert Mustacchi dev_err(i40e->i40e_dip, level, (console) ? "%s" : "!%s", 4159d26e4fcSRobert Mustacchi buf); 4169d26e4fcSRobert Mustacchi } 4179d26e4fcSRobert Mustacchi } 4189d26e4fcSRobert Mustacchi 4199d26e4fcSRobert Mustacchi /* 4209d26e4fcSRobert Mustacchi * Because there's the stupid trailing-comma problem with the C preprocessor 4219d26e4fcSRobert Mustacchi * and variable arguments, I need to instantiate these. Pardon the redundant 4229d26e4fcSRobert Mustacchi * code. 4239d26e4fcSRobert Mustacchi */ 4249d26e4fcSRobert Mustacchi /*PRINTFLIKE2*/ 4259d26e4fcSRobert Mustacchi void 4269d26e4fcSRobert Mustacchi i40e_error(i40e_t *i40e, const char *fmt, ...) 4279d26e4fcSRobert Mustacchi { 4289d26e4fcSRobert Mustacchi va_list ap; 4299d26e4fcSRobert Mustacchi 4309d26e4fcSRobert Mustacchi va_start(ap, fmt); 4319d26e4fcSRobert Mustacchi i40e_dev_err(i40e, CE_WARN, B_FALSE, fmt, ap); 4329d26e4fcSRobert Mustacchi va_end(ap); 4339d26e4fcSRobert Mustacchi } 4349d26e4fcSRobert Mustacchi 4359d26e4fcSRobert Mustacchi /*PRINTFLIKE2*/ 4369d26e4fcSRobert Mustacchi void 4379d26e4fcSRobert Mustacchi i40e_log(i40e_t *i40e, const char *fmt, ...) 4389d26e4fcSRobert Mustacchi { 4399d26e4fcSRobert Mustacchi va_list ap; 4409d26e4fcSRobert Mustacchi 4419d26e4fcSRobert Mustacchi va_start(ap, fmt); 4429d26e4fcSRobert Mustacchi i40e_dev_err(i40e, CE_NOTE, B_FALSE, fmt, ap); 4439d26e4fcSRobert Mustacchi va_end(ap); 4449d26e4fcSRobert Mustacchi } 4459d26e4fcSRobert Mustacchi 4469d26e4fcSRobert Mustacchi /*PRINTFLIKE2*/ 4479d26e4fcSRobert Mustacchi void 4489d26e4fcSRobert Mustacchi i40e_notice(i40e_t *i40e, const char *fmt, ...) 4499d26e4fcSRobert Mustacchi { 4509d26e4fcSRobert Mustacchi va_list ap; 4519d26e4fcSRobert Mustacchi 4529d26e4fcSRobert Mustacchi va_start(ap, fmt); 4539d26e4fcSRobert Mustacchi i40e_dev_err(i40e, CE_NOTE, B_TRUE, fmt, ap); 4549d26e4fcSRobert Mustacchi va_end(ap); 4559d26e4fcSRobert Mustacchi } 4569d26e4fcSRobert Mustacchi 457b9d34b9dSRobert Mustacchi /* 458b9d34b9dSRobert Mustacchi * Various parts of the driver need to know if the controller is from the X722 459b9d34b9dSRobert Mustacchi * family, which has a few additional capabilities and different programming 460b9d34b9dSRobert Mustacchi * means. We don't consider virtual functions as part of this as they are quite 461b9d34b9dSRobert Mustacchi * different and will require substantially more work. 462b9d34b9dSRobert Mustacchi */ 463b9d34b9dSRobert Mustacchi static boolean_t 464b9d34b9dSRobert Mustacchi i40e_is_x722(i40e_t *i40e) 465b9d34b9dSRobert Mustacchi { 466b9d34b9dSRobert Mustacchi return (i40e->i40e_hw_space.mac.type == I40E_MAC_X722); 467b9d34b9dSRobert Mustacchi } 468b9d34b9dSRobert Mustacchi 4699d26e4fcSRobert Mustacchi static void 4709d26e4fcSRobert Mustacchi i40e_device_rele(i40e_t *i40e) 4719d26e4fcSRobert Mustacchi { 4729d26e4fcSRobert Mustacchi i40e_device_t *idp = i40e->i40e_device; 4739d26e4fcSRobert Mustacchi 4749d26e4fcSRobert Mustacchi if (idp == NULL) 4759d26e4fcSRobert Mustacchi return; 4769d26e4fcSRobert Mustacchi 4779d26e4fcSRobert Mustacchi mutex_enter(&i40e_glock); 4789d26e4fcSRobert Mustacchi VERIFY(idp->id_nreg > 0); 4799d26e4fcSRobert Mustacchi list_remove(&idp->id_i40e_list, i40e); 4809d26e4fcSRobert Mustacchi idp->id_nreg--; 4819d26e4fcSRobert Mustacchi if (idp->id_nreg == 0) { 4829d26e4fcSRobert Mustacchi list_remove(&i40e_dlist, idp); 4839d26e4fcSRobert Mustacchi list_destroy(&idp->id_i40e_list); 4849d26e4fcSRobert Mustacchi kmem_free(idp->id_rsrcs, sizeof (i40e_switch_rsrc_t) * 4859d26e4fcSRobert Mustacchi idp->id_rsrcs_alloc); 4869d26e4fcSRobert Mustacchi kmem_free(idp, sizeof (i40e_device_t)); 4879d26e4fcSRobert Mustacchi } 4889d26e4fcSRobert Mustacchi i40e->i40e_device = NULL; 4899d26e4fcSRobert Mustacchi mutex_exit(&i40e_glock); 4909d26e4fcSRobert Mustacchi } 4919d26e4fcSRobert Mustacchi 4929d26e4fcSRobert Mustacchi static i40e_device_t * 4939d26e4fcSRobert Mustacchi i40e_device_find(i40e_t *i40e, dev_info_t *parent, uint_t bus, uint_t device) 4949d26e4fcSRobert Mustacchi { 4959d26e4fcSRobert Mustacchi i40e_device_t *idp; 4969d26e4fcSRobert Mustacchi mutex_enter(&i40e_glock); 4979d26e4fcSRobert Mustacchi for (idp = list_head(&i40e_dlist); idp != NULL; 4989d26e4fcSRobert Mustacchi idp = list_next(&i40e_dlist, idp)) { 4999d26e4fcSRobert Mustacchi if (idp->id_parent == parent && idp->id_pci_bus == bus && 5009d26e4fcSRobert Mustacchi idp->id_pci_device == device) { 5019d26e4fcSRobert Mustacchi break; 5029d26e4fcSRobert Mustacchi } 5039d26e4fcSRobert Mustacchi } 5049d26e4fcSRobert Mustacchi 5059d26e4fcSRobert Mustacchi if (idp != NULL) { 5069d26e4fcSRobert Mustacchi VERIFY(idp->id_nreg < idp->id_nfuncs); 5079d26e4fcSRobert Mustacchi idp->id_nreg++; 5089d26e4fcSRobert Mustacchi } else { 5099d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 5109d26e4fcSRobert Mustacchi ASSERT(hw->num_ports > 0); 5119d26e4fcSRobert Mustacchi ASSERT(hw->num_partitions > 0); 5129d26e4fcSRobert Mustacchi 5139d26e4fcSRobert Mustacchi /* 5149d26e4fcSRobert Mustacchi * The Intel common code doesn't exactly keep the number of PCI 5159d26e4fcSRobert Mustacchi * functions. But it calculates it during discovery of 5169d26e4fcSRobert Mustacchi * partitions and ports. So what we do is undo the calculation 5179d26e4fcSRobert Mustacchi * that it does originally, as functions are evenly spread 5189d26e4fcSRobert Mustacchi * across ports in the rare case of partitions. 5199d26e4fcSRobert Mustacchi */ 5209d26e4fcSRobert Mustacchi idp = kmem_alloc(sizeof (i40e_device_t), KM_SLEEP); 5219d26e4fcSRobert Mustacchi idp->id_parent = parent; 5229d26e4fcSRobert Mustacchi idp->id_pci_bus = bus; 5239d26e4fcSRobert Mustacchi idp->id_pci_device = device; 5249d26e4fcSRobert Mustacchi idp->id_nfuncs = hw->num_ports * hw->num_partitions; 5259d26e4fcSRobert Mustacchi idp->id_nreg = 1; 5269d26e4fcSRobert Mustacchi idp->id_rsrcs_alloc = i40e->i40e_switch_rsrc_alloc; 5279d26e4fcSRobert Mustacchi idp->id_rsrcs_act = i40e->i40e_switch_rsrc_actual; 5289d26e4fcSRobert Mustacchi idp->id_rsrcs = kmem_alloc(sizeof (i40e_switch_rsrc_t) * 5299d26e4fcSRobert Mustacchi idp->id_rsrcs_alloc, KM_SLEEP); 5309d26e4fcSRobert Mustacchi bcopy(i40e->i40e_switch_rsrcs, idp->id_rsrcs, 5319d26e4fcSRobert Mustacchi sizeof (i40e_switch_rsrc_t) * idp->id_rsrcs_alloc); 5329d26e4fcSRobert Mustacchi list_create(&idp->id_i40e_list, sizeof (i40e_t), 5339d26e4fcSRobert Mustacchi offsetof(i40e_t, i40e_dlink)); 5349d26e4fcSRobert Mustacchi 5359d26e4fcSRobert Mustacchi list_insert_tail(&i40e_dlist, idp); 5369d26e4fcSRobert Mustacchi } 5379d26e4fcSRobert Mustacchi 5389d26e4fcSRobert Mustacchi list_insert_tail(&idp->id_i40e_list, i40e); 5399d26e4fcSRobert Mustacchi mutex_exit(&i40e_glock); 5409d26e4fcSRobert Mustacchi 5419d26e4fcSRobert Mustacchi return (idp); 5429d26e4fcSRobert Mustacchi } 5439d26e4fcSRobert Mustacchi 5449d26e4fcSRobert Mustacchi static void 5459d26e4fcSRobert Mustacchi i40e_link_state_set(i40e_t *i40e, link_state_t state) 5469d26e4fcSRobert Mustacchi { 5479d26e4fcSRobert Mustacchi if (i40e->i40e_link_state == state) 5489d26e4fcSRobert Mustacchi return; 5499d26e4fcSRobert Mustacchi 5509d26e4fcSRobert Mustacchi i40e->i40e_link_state = state; 5519d26e4fcSRobert Mustacchi mac_link_update(i40e->i40e_mac_hdl, i40e->i40e_link_state); 5529d26e4fcSRobert Mustacchi } 5539d26e4fcSRobert Mustacchi 5549d26e4fcSRobert Mustacchi /* 5559d26e4fcSRobert Mustacchi * This is a basic link check routine. Mostly we're using this just to see 5569d26e4fcSRobert Mustacchi * if we can get any accurate information about the state of the link being 5579d26e4fcSRobert Mustacchi * up or down, as well as updating the link state, speed, etc. information. 5589d26e4fcSRobert Mustacchi */ 5599d26e4fcSRobert Mustacchi void 5609d26e4fcSRobert Mustacchi i40e_link_check(i40e_t *i40e) 5619d26e4fcSRobert Mustacchi { 5629d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 5639d26e4fcSRobert Mustacchi boolean_t ls; 5649d26e4fcSRobert Mustacchi int ret; 5659d26e4fcSRobert Mustacchi 5669d26e4fcSRobert Mustacchi ASSERT(MUTEX_HELD(&i40e->i40e_general_lock)); 5679d26e4fcSRobert Mustacchi 5689d26e4fcSRobert Mustacchi hw->phy.get_link_info = B_TRUE; 5699d26e4fcSRobert Mustacchi if ((ret = i40e_get_link_status(hw, &ls)) != I40E_SUCCESS) { 5709d26e4fcSRobert Mustacchi i40e->i40e_s_link_status_errs++; 5719d26e4fcSRobert Mustacchi i40e->i40e_s_link_status_lasterr = ret; 5729d26e4fcSRobert Mustacchi return; 5739d26e4fcSRobert Mustacchi } 5749d26e4fcSRobert Mustacchi 5759d26e4fcSRobert Mustacchi /* 5769d26e4fcSRobert Mustacchi * Firmware abstracts all of the mac and phy information for us, so we 5779d26e4fcSRobert Mustacchi * can use i40e_get_link_status to determine the current state. 5789d26e4fcSRobert Mustacchi */ 5799d26e4fcSRobert Mustacchi if (ls == B_TRUE) { 5809d26e4fcSRobert Mustacchi enum i40e_aq_link_speed speed; 5819d26e4fcSRobert Mustacchi 5829d26e4fcSRobert Mustacchi speed = i40e_get_link_speed(hw); 5839d26e4fcSRobert Mustacchi 5849d26e4fcSRobert Mustacchi /* 5859d26e4fcSRobert Mustacchi * Translate from an i40e value to a value in Mbits/s. 5869d26e4fcSRobert Mustacchi */ 5879d26e4fcSRobert Mustacchi switch (speed) { 5889d26e4fcSRobert Mustacchi case I40E_LINK_SPEED_100MB: 5899d26e4fcSRobert Mustacchi i40e->i40e_link_speed = 100; 5909d26e4fcSRobert Mustacchi break; 5919d26e4fcSRobert Mustacchi case I40E_LINK_SPEED_1GB: 5929d26e4fcSRobert Mustacchi i40e->i40e_link_speed = 1000; 5939d26e4fcSRobert Mustacchi break; 594*df36e06dSRobert Mustacchi case I40E_LINK_SPEED_2_5GB: 595*df36e06dSRobert Mustacchi i40e->i40e_link_speed = 2500; 596*df36e06dSRobert Mustacchi break; 597*df36e06dSRobert Mustacchi case I40E_LINK_SPEED_5GB: 598*df36e06dSRobert Mustacchi i40e->i40e_link_speed = 5000; 599*df36e06dSRobert Mustacchi break; 6009d26e4fcSRobert Mustacchi case I40E_LINK_SPEED_10GB: 6019d26e4fcSRobert Mustacchi i40e->i40e_link_speed = 10000; 6029d26e4fcSRobert Mustacchi break; 6039d26e4fcSRobert Mustacchi case I40E_LINK_SPEED_20GB: 6049d26e4fcSRobert Mustacchi i40e->i40e_link_speed = 20000; 6059d26e4fcSRobert Mustacchi break; 6069d26e4fcSRobert Mustacchi case I40E_LINK_SPEED_40GB: 6079d26e4fcSRobert Mustacchi i40e->i40e_link_speed = 40000; 6089d26e4fcSRobert Mustacchi break; 6093d75a287SRobert Mustacchi case I40E_LINK_SPEED_25GB: 6103d75a287SRobert Mustacchi i40e->i40e_link_speed = 25000; 6113d75a287SRobert Mustacchi break; 6129d26e4fcSRobert Mustacchi default: 6139d26e4fcSRobert Mustacchi i40e->i40e_link_speed = 0; 6149d26e4fcSRobert Mustacchi break; 6159d26e4fcSRobert Mustacchi } 6169d26e4fcSRobert Mustacchi 6179d26e4fcSRobert Mustacchi /* 6189d26e4fcSRobert Mustacchi * At this time, hardware does not support half-duplex 6199d26e4fcSRobert Mustacchi * operation, hence why we don't ask the hardware about our 6209d26e4fcSRobert Mustacchi * current speed. 6219d26e4fcSRobert Mustacchi */ 6229d26e4fcSRobert Mustacchi i40e->i40e_link_duplex = LINK_DUPLEX_FULL; 6239d26e4fcSRobert Mustacchi i40e_link_state_set(i40e, LINK_STATE_UP); 6249d26e4fcSRobert Mustacchi } else { 6259d26e4fcSRobert Mustacchi i40e->i40e_link_speed = 0; 6269d26e4fcSRobert Mustacchi i40e->i40e_link_duplex = 0; 6279d26e4fcSRobert Mustacchi i40e_link_state_set(i40e, LINK_STATE_DOWN); 6289d26e4fcSRobert Mustacchi } 6299d26e4fcSRobert Mustacchi } 6309d26e4fcSRobert Mustacchi 6319d26e4fcSRobert Mustacchi static void 6329d26e4fcSRobert Mustacchi i40e_rem_intrs(i40e_t *i40e) 6339d26e4fcSRobert Mustacchi { 6349d26e4fcSRobert Mustacchi int i, rc; 6359d26e4fcSRobert Mustacchi 6369d26e4fcSRobert Mustacchi for (i = 0; i < i40e->i40e_intr_count; i++) { 6379d26e4fcSRobert Mustacchi rc = ddi_intr_free(i40e->i40e_intr_handles[i]); 6389d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 6399d26e4fcSRobert Mustacchi i40e_log(i40e, "failed to free interrupt %d: %d", 6409d26e4fcSRobert Mustacchi i, rc); 6419d26e4fcSRobert Mustacchi } 6429d26e4fcSRobert Mustacchi } 6439d26e4fcSRobert Mustacchi 6449d26e4fcSRobert Mustacchi kmem_free(i40e->i40e_intr_handles, i40e->i40e_intr_size); 6459d26e4fcSRobert Mustacchi i40e->i40e_intr_handles = NULL; 6469d26e4fcSRobert Mustacchi } 6479d26e4fcSRobert Mustacchi 6489d26e4fcSRobert Mustacchi static void 6499d26e4fcSRobert Mustacchi i40e_rem_intr_handlers(i40e_t *i40e) 6509d26e4fcSRobert Mustacchi { 6519d26e4fcSRobert Mustacchi int i, rc; 6529d26e4fcSRobert Mustacchi 6539d26e4fcSRobert Mustacchi for (i = 0; i < i40e->i40e_intr_count; i++) { 6549d26e4fcSRobert Mustacchi rc = ddi_intr_remove_handler(i40e->i40e_intr_handles[i]); 6559d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 6569d26e4fcSRobert Mustacchi i40e_log(i40e, "failed to remove interrupt %d: %d", 6579d26e4fcSRobert Mustacchi i, rc); 6589d26e4fcSRobert Mustacchi } 6599d26e4fcSRobert Mustacchi } 6609d26e4fcSRobert Mustacchi } 6619d26e4fcSRobert Mustacchi 6629d26e4fcSRobert Mustacchi /* 6639d26e4fcSRobert Mustacchi * illumos Fault Management Architecture (FMA) support. 6649d26e4fcSRobert Mustacchi */ 6659d26e4fcSRobert Mustacchi 6669d26e4fcSRobert Mustacchi int 6679d26e4fcSRobert Mustacchi i40e_check_acc_handle(ddi_acc_handle_t handle) 6689d26e4fcSRobert Mustacchi { 6699d26e4fcSRobert Mustacchi ddi_fm_error_t de; 6709d26e4fcSRobert Mustacchi 6719d26e4fcSRobert Mustacchi ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION); 6729d26e4fcSRobert Mustacchi ddi_fm_acc_err_clear(handle, DDI_FME_VERSION); 6739d26e4fcSRobert Mustacchi return (de.fme_status); 6749d26e4fcSRobert Mustacchi } 6759d26e4fcSRobert Mustacchi 6769d26e4fcSRobert Mustacchi int 6779d26e4fcSRobert Mustacchi i40e_check_dma_handle(ddi_dma_handle_t handle) 6789d26e4fcSRobert Mustacchi { 6799d26e4fcSRobert Mustacchi ddi_fm_error_t de; 6809d26e4fcSRobert Mustacchi 6819d26e4fcSRobert Mustacchi ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION); 6829d26e4fcSRobert Mustacchi return (de.fme_status); 6839d26e4fcSRobert Mustacchi } 6849d26e4fcSRobert Mustacchi 6859d26e4fcSRobert Mustacchi /* 6869d26e4fcSRobert Mustacchi * Fault service error handling callback function. 6879d26e4fcSRobert Mustacchi */ 6889d26e4fcSRobert Mustacchi /* ARGSUSED */ 6899d26e4fcSRobert Mustacchi static int 6909d26e4fcSRobert Mustacchi i40e_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data) 6919d26e4fcSRobert Mustacchi { 6929d26e4fcSRobert Mustacchi pci_ereport_post(dip, err, NULL); 6939d26e4fcSRobert Mustacchi return (err->fme_status); 6949d26e4fcSRobert Mustacchi } 6959d26e4fcSRobert Mustacchi 6969d26e4fcSRobert Mustacchi static void 6979d26e4fcSRobert Mustacchi i40e_fm_init(i40e_t *i40e) 6989d26e4fcSRobert Mustacchi { 6999d26e4fcSRobert Mustacchi ddi_iblock_cookie_t iblk; 7009d26e4fcSRobert Mustacchi 7019d26e4fcSRobert Mustacchi i40e->i40e_fm_capabilities = ddi_prop_get_int(DDI_DEV_T_ANY, 7029d26e4fcSRobert Mustacchi i40e->i40e_dip, DDI_PROP_DONTPASS, "fm_capable", 7039d26e4fcSRobert Mustacchi DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE | 7049d26e4fcSRobert Mustacchi DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE); 7059d26e4fcSRobert Mustacchi 7069d26e4fcSRobert Mustacchi if (i40e->i40e_fm_capabilities < 0) { 7079d26e4fcSRobert Mustacchi i40e->i40e_fm_capabilities = 0; 7089d26e4fcSRobert Mustacchi } else if (i40e->i40e_fm_capabilities > 0xf) { 7099d26e4fcSRobert Mustacchi i40e->i40e_fm_capabilities = DDI_FM_EREPORT_CAPABLE | 7109d26e4fcSRobert Mustacchi DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE | 7119d26e4fcSRobert Mustacchi DDI_FM_ERRCB_CAPABLE; 7129d26e4fcSRobert Mustacchi } 7139d26e4fcSRobert Mustacchi 7149d26e4fcSRobert Mustacchi /* 7159d26e4fcSRobert Mustacchi * Only register with IO Fault Services if we have some capability 7169d26e4fcSRobert Mustacchi */ 7179d26e4fcSRobert Mustacchi if (i40e->i40e_fm_capabilities & DDI_FM_ACCCHK_CAPABLE) { 7189d26e4fcSRobert Mustacchi i40e_regs_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; 7199d26e4fcSRobert Mustacchi } else { 7209d26e4fcSRobert Mustacchi i40e_regs_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; 7219d26e4fcSRobert Mustacchi } 7229d26e4fcSRobert Mustacchi 7239d26e4fcSRobert Mustacchi if (i40e->i40e_fm_capabilities) { 7249d26e4fcSRobert Mustacchi ddi_fm_init(i40e->i40e_dip, &i40e->i40e_fm_capabilities, &iblk); 7259d26e4fcSRobert Mustacchi 7269d26e4fcSRobert Mustacchi if (DDI_FM_EREPORT_CAP(i40e->i40e_fm_capabilities) || 7279d26e4fcSRobert Mustacchi DDI_FM_ERRCB_CAP(i40e->i40e_fm_capabilities)) { 7289d26e4fcSRobert Mustacchi pci_ereport_setup(i40e->i40e_dip); 7299d26e4fcSRobert Mustacchi } 7309d26e4fcSRobert Mustacchi 7319d26e4fcSRobert Mustacchi if (DDI_FM_ERRCB_CAP(i40e->i40e_fm_capabilities)) { 7329d26e4fcSRobert Mustacchi ddi_fm_handler_register(i40e->i40e_dip, 7339d26e4fcSRobert Mustacchi i40e_fm_error_cb, (void*)i40e); 7349d26e4fcSRobert Mustacchi } 7359d26e4fcSRobert Mustacchi } 7369d26e4fcSRobert Mustacchi 7379d26e4fcSRobert Mustacchi if (i40e->i40e_fm_capabilities & DDI_FM_DMACHK_CAPABLE) { 7389d26e4fcSRobert Mustacchi i40e_init_dma_attrs(i40e, B_TRUE); 7399d26e4fcSRobert Mustacchi } else { 7409d26e4fcSRobert Mustacchi i40e_init_dma_attrs(i40e, B_FALSE); 7419d26e4fcSRobert Mustacchi } 7429d26e4fcSRobert Mustacchi } 7439d26e4fcSRobert Mustacchi 7449d26e4fcSRobert Mustacchi static void 7459d26e4fcSRobert Mustacchi i40e_fm_fini(i40e_t *i40e) 7469d26e4fcSRobert Mustacchi { 7479d26e4fcSRobert Mustacchi if (i40e->i40e_fm_capabilities) { 7489d26e4fcSRobert Mustacchi 7499d26e4fcSRobert Mustacchi if (DDI_FM_EREPORT_CAP(i40e->i40e_fm_capabilities) || 7509d26e4fcSRobert Mustacchi DDI_FM_ERRCB_CAP(i40e->i40e_fm_capabilities)) 7519d26e4fcSRobert Mustacchi pci_ereport_teardown(i40e->i40e_dip); 7529d26e4fcSRobert Mustacchi 7539d26e4fcSRobert Mustacchi if (DDI_FM_ERRCB_CAP(i40e->i40e_fm_capabilities)) 7549d26e4fcSRobert Mustacchi ddi_fm_handler_unregister(i40e->i40e_dip); 7559d26e4fcSRobert Mustacchi 7569d26e4fcSRobert Mustacchi ddi_fm_fini(i40e->i40e_dip); 7579d26e4fcSRobert Mustacchi } 7589d26e4fcSRobert Mustacchi } 7599d26e4fcSRobert Mustacchi 7609d26e4fcSRobert Mustacchi void 7619d26e4fcSRobert Mustacchi i40e_fm_ereport(i40e_t *i40e, char *detail) 7629d26e4fcSRobert Mustacchi { 7639d26e4fcSRobert Mustacchi uint64_t ena; 7649d26e4fcSRobert Mustacchi char buf[FM_MAX_CLASS]; 7659d26e4fcSRobert Mustacchi 7669d26e4fcSRobert Mustacchi (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail); 7679d26e4fcSRobert Mustacchi ena = fm_ena_generate(0, FM_ENA_FMT1); 7689d26e4fcSRobert Mustacchi if (DDI_FM_EREPORT_CAP(i40e->i40e_fm_capabilities)) { 7699d26e4fcSRobert Mustacchi ddi_fm_ereport_post(i40e->i40e_dip, buf, ena, DDI_NOSLEEP, 7709d26e4fcSRobert Mustacchi FM_VERSION, DATA_TYPE_UINT8, FM_EREPORT_VERS0, NULL); 7719d26e4fcSRobert Mustacchi } 7729d26e4fcSRobert Mustacchi } 7739d26e4fcSRobert Mustacchi 7749d26e4fcSRobert Mustacchi /* 77509aee612SRyan Zezeski * Here we're trying to set the SEID of the default VSI. In general, 77609aee612SRyan Zezeski * when we come through and look at this shortly after attach, we 77709aee612SRyan Zezeski * expect there to only be a single element present, which is the 77809aee612SRyan Zezeski * default VSI. Importantly, each PF seems to not see any other 77909aee612SRyan Zezeski * devices, in part because of the simple switch mode that we're 78009aee612SRyan Zezeski * using. If for some reason, we see more artifacts, we'll need to 78109aee612SRyan Zezeski * revisit what we're doing here. 7829d26e4fcSRobert Mustacchi */ 78309aee612SRyan Zezeski static boolean_t 78409aee612SRyan Zezeski i40e_set_def_vsi_seid(i40e_t *i40e) 7859d26e4fcSRobert Mustacchi { 7869d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 7879d26e4fcSRobert Mustacchi struct i40e_aqc_get_switch_config_resp *sw_config; 7889d26e4fcSRobert Mustacchi uint8_t aq_buf[I40E_AQ_LARGE_BUF]; 7899d26e4fcSRobert Mustacchi uint16_t next = 0; 7909d26e4fcSRobert Mustacchi int rc; 7919d26e4fcSRobert Mustacchi 7929d26e4fcSRobert Mustacchi /* LINTED: E_BAD_PTR_CAST_ALIGN */ 7939d26e4fcSRobert Mustacchi sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; 7949d26e4fcSRobert Mustacchi rc = i40e_aq_get_switch_config(hw, sw_config, sizeof (aq_buf), &next, 7959d26e4fcSRobert Mustacchi NULL); 7969d26e4fcSRobert Mustacchi if (rc != I40E_SUCCESS) { 7979d26e4fcSRobert Mustacchi i40e_error(i40e, "i40e_aq_get_switch_config() failed %d: %d", 7989d26e4fcSRobert Mustacchi rc, hw->aq.asq_last_status); 79909aee612SRyan Zezeski return (B_FALSE); 8009d26e4fcSRobert Mustacchi } 8019d26e4fcSRobert Mustacchi 8029d26e4fcSRobert Mustacchi if (LE_16(sw_config->header.num_reported) != 1) { 8039d26e4fcSRobert Mustacchi i40e_error(i40e, "encountered multiple (%d) switching units " 8049d26e4fcSRobert Mustacchi "during attach, not proceeding", 8059d26e4fcSRobert Mustacchi LE_16(sw_config->header.num_reported)); 80609aee612SRyan Zezeski return (B_FALSE); 80709aee612SRyan Zezeski } 80809aee612SRyan Zezeski 80909aee612SRyan Zezeski I40E_DEF_VSI_SEID(i40e) = sw_config->element[0].seid; 81009aee612SRyan Zezeski return (B_TRUE); 81109aee612SRyan Zezeski } 81209aee612SRyan Zezeski 81309aee612SRyan Zezeski /* 81409aee612SRyan Zezeski * Get the SEID of the uplink MAC. 81509aee612SRyan Zezeski */ 81609aee612SRyan Zezeski static int 81709aee612SRyan Zezeski i40e_get_mac_seid(i40e_t *i40e) 81809aee612SRyan Zezeski { 81909aee612SRyan Zezeski i40e_hw_t *hw = &i40e->i40e_hw_space; 82009aee612SRyan Zezeski struct i40e_aqc_get_switch_config_resp *sw_config; 82109aee612SRyan Zezeski uint8_t aq_buf[I40E_AQ_LARGE_BUF]; 82209aee612SRyan Zezeski uint16_t next = 0; 82309aee612SRyan Zezeski int rc; 82409aee612SRyan Zezeski 82509aee612SRyan Zezeski /* LINTED: E_BAD_PTR_CAST_ALIGN */ 82609aee612SRyan Zezeski sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; 82709aee612SRyan Zezeski rc = i40e_aq_get_switch_config(hw, sw_config, sizeof (aq_buf), &next, 82809aee612SRyan Zezeski NULL); 82909aee612SRyan Zezeski if (rc != I40E_SUCCESS) { 83009aee612SRyan Zezeski i40e_error(i40e, "i40e_aq_get_switch_config() failed %d: %d", 83109aee612SRyan Zezeski rc, hw->aq.asq_last_status); 8329d26e4fcSRobert Mustacchi return (-1); 8339d26e4fcSRobert Mustacchi } 8349d26e4fcSRobert Mustacchi 83509aee612SRyan Zezeski return (LE_16(sw_config->element[0].uplink_seid)); 8369d26e4fcSRobert Mustacchi } 8379d26e4fcSRobert Mustacchi 8389d26e4fcSRobert Mustacchi /* 8399d26e4fcSRobert Mustacchi * We need to fill the i40e_hw_t structure with the capabilities of this PF. We 8409d26e4fcSRobert Mustacchi * must also provide the memory for it; however, we don't need to keep it around 8419d26e4fcSRobert Mustacchi * to the call to the common code. It takes it and parses it into an internal 8429d26e4fcSRobert Mustacchi * structure. 8439d26e4fcSRobert Mustacchi */ 8449d26e4fcSRobert Mustacchi static boolean_t 8459d26e4fcSRobert Mustacchi i40e_get_hw_capabilities(i40e_t *i40e, i40e_hw_t *hw) 8469d26e4fcSRobert Mustacchi { 8479d26e4fcSRobert Mustacchi struct i40e_aqc_list_capabilities_element_resp *buf; 8489d26e4fcSRobert Mustacchi int rc; 8499d26e4fcSRobert Mustacchi size_t len; 8509d26e4fcSRobert Mustacchi uint16_t needed; 8519d26e4fcSRobert Mustacchi int nelems = I40E_HW_CAP_DEFAULT; 8529d26e4fcSRobert Mustacchi 8539d26e4fcSRobert Mustacchi len = nelems * sizeof (*buf); 8549d26e4fcSRobert Mustacchi 8559d26e4fcSRobert Mustacchi for (;;) { 8569d26e4fcSRobert Mustacchi ASSERT(len > 0); 8579d26e4fcSRobert Mustacchi buf = kmem_alloc(len, KM_SLEEP); 8589d26e4fcSRobert Mustacchi rc = i40e_aq_discover_capabilities(hw, buf, len, 8599d26e4fcSRobert Mustacchi &needed, i40e_aqc_opc_list_func_capabilities, NULL); 8609d26e4fcSRobert Mustacchi kmem_free(buf, len); 8619d26e4fcSRobert Mustacchi 8629d26e4fcSRobert Mustacchi if (hw->aq.asq_last_status == I40E_AQ_RC_ENOMEM && 8639d26e4fcSRobert Mustacchi nelems == I40E_HW_CAP_DEFAULT) { 8649d26e4fcSRobert Mustacchi if (nelems == needed) { 8659d26e4fcSRobert Mustacchi i40e_error(i40e, "Capability discovery failed " 8669d26e4fcSRobert Mustacchi "due to byzantine common code"); 8679d26e4fcSRobert Mustacchi return (B_FALSE); 8689d26e4fcSRobert Mustacchi } 8699d26e4fcSRobert Mustacchi len = needed; 8709d26e4fcSRobert Mustacchi continue; 8719d26e4fcSRobert Mustacchi } else if (rc != I40E_SUCCESS || 8729d26e4fcSRobert Mustacchi hw->aq.asq_last_status != I40E_AQ_RC_OK) { 8739d26e4fcSRobert Mustacchi i40e_error(i40e, "Capability discovery failed: %d", rc); 8749d26e4fcSRobert Mustacchi return (B_FALSE); 8759d26e4fcSRobert Mustacchi } 8769d26e4fcSRobert Mustacchi 8779d26e4fcSRobert Mustacchi break; 8789d26e4fcSRobert Mustacchi } 8799d26e4fcSRobert Mustacchi 8809d26e4fcSRobert Mustacchi return (B_TRUE); 8819d26e4fcSRobert Mustacchi } 8829d26e4fcSRobert Mustacchi 8839d26e4fcSRobert Mustacchi /* 8849d26e4fcSRobert Mustacchi * Obtain the switch's capabilities as seen by this PF and keep it around for 8859d26e4fcSRobert Mustacchi * our later use. 8869d26e4fcSRobert Mustacchi */ 8879d26e4fcSRobert Mustacchi static boolean_t 8889d26e4fcSRobert Mustacchi i40e_get_switch_resources(i40e_t *i40e) 8899d26e4fcSRobert Mustacchi { 8909d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 8919d26e4fcSRobert Mustacchi uint8_t cnt = 2; 8929d26e4fcSRobert Mustacchi uint8_t act; 8939d26e4fcSRobert Mustacchi size_t size; 8949d26e4fcSRobert Mustacchi i40e_switch_rsrc_t *buf; 8959d26e4fcSRobert Mustacchi 8969d26e4fcSRobert Mustacchi for (;;) { 8979d26e4fcSRobert Mustacchi enum i40e_status_code ret; 8989d26e4fcSRobert Mustacchi size = cnt * sizeof (i40e_switch_rsrc_t); 8999d26e4fcSRobert Mustacchi ASSERT(size > 0); 9009d26e4fcSRobert Mustacchi if (size > UINT16_MAX) 9019d26e4fcSRobert Mustacchi return (B_FALSE); 9029d26e4fcSRobert Mustacchi buf = kmem_alloc(size, KM_SLEEP); 9039d26e4fcSRobert Mustacchi 9049d26e4fcSRobert Mustacchi ret = i40e_aq_get_switch_resource_alloc(hw, &act, buf, 9059d26e4fcSRobert Mustacchi cnt, NULL); 9069d26e4fcSRobert Mustacchi if (ret == I40E_ERR_ADMIN_QUEUE_ERROR && 9079d26e4fcSRobert Mustacchi hw->aq.asq_last_status == I40E_AQ_RC_EINVAL) { 9089d26e4fcSRobert Mustacchi kmem_free(buf, size); 9099d26e4fcSRobert Mustacchi cnt += I40E_SWITCH_CAP_DEFAULT; 9109d26e4fcSRobert Mustacchi continue; 9119d26e4fcSRobert Mustacchi } else if (ret != I40E_SUCCESS) { 9129d26e4fcSRobert Mustacchi kmem_free(buf, size); 9139d26e4fcSRobert Mustacchi i40e_error(i40e, 9149d26e4fcSRobert Mustacchi "failed to retrieve switch statistics: %d", ret); 9159d26e4fcSRobert Mustacchi return (B_FALSE); 9169d26e4fcSRobert Mustacchi } 9179d26e4fcSRobert Mustacchi 9189d26e4fcSRobert Mustacchi break; 9199d26e4fcSRobert Mustacchi } 9209d26e4fcSRobert Mustacchi 9219d26e4fcSRobert Mustacchi i40e->i40e_switch_rsrc_alloc = cnt; 9229d26e4fcSRobert Mustacchi i40e->i40e_switch_rsrc_actual = act; 9239d26e4fcSRobert Mustacchi i40e->i40e_switch_rsrcs = buf; 9249d26e4fcSRobert Mustacchi 9259d26e4fcSRobert Mustacchi return (B_TRUE); 9269d26e4fcSRobert Mustacchi } 9279d26e4fcSRobert Mustacchi 9289d26e4fcSRobert Mustacchi static void 9299d26e4fcSRobert Mustacchi i40e_cleanup_resources(i40e_t *i40e) 9309d26e4fcSRobert Mustacchi { 9319d26e4fcSRobert Mustacchi if (i40e->i40e_uaddrs != NULL) { 9329d26e4fcSRobert Mustacchi kmem_free(i40e->i40e_uaddrs, sizeof (i40e_uaddr_t) * 9339d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmacfilt); 9349d26e4fcSRobert Mustacchi i40e->i40e_uaddrs = NULL; 9359d26e4fcSRobert Mustacchi } 9369d26e4fcSRobert Mustacchi 9379d26e4fcSRobert Mustacchi if (i40e->i40e_maddrs != NULL) { 9389d26e4fcSRobert Mustacchi kmem_free(i40e->i40e_maddrs, sizeof (i40e_maddr_t) * 9399d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmcastfilt); 9409d26e4fcSRobert Mustacchi i40e->i40e_maddrs = NULL; 9419d26e4fcSRobert Mustacchi } 9429d26e4fcSRobert Mustacchi 9439d26e4fcSRobert Mustacchi if (i40e->i40e_switch_rsrcs != NULL) { 9449d26e4fcSRobert Mustacchi size_t sz = sizeof (i40e_switch_rsrc_t) * 9459d26e4fcSRobert Mustacchi i40e->i40e_switch_rsrc_alloc; 9469d26e4fcSRobert Mustacchi ASSERT(sz > 0); 9479d26e4fcSRobert Mustacchi kmem_free(i40e->i40e_switch_rsrcs, sz); 9489d26e4fcSRobert Mustacchi i40e->i40e_switch_rsrcs = NULL; 9499d26e4fcSRobert Mustacchi } 9509d26e4fcSRobert Mustacchi 9519d26e4fcSRobert Mustacchi if (i40e->i40e_device != NULL) 9529d26e4fcSRobert Mustacchi i40e_device_rele(i40e); 9539d26e4fcSRobert Mustacchi } 9549d26e4fcSRobert Mustacchi 9559d26e4fcSRobert Mustacchi static boolean_t 9569d26e4fcSRobert Mustacchi i40e_get_available_resources(i40e_t *i40e) 9579d26e4fcSRobert Mustacchi { 9589d26e4fcSRobert Mustacchi dev_info_t *parent; 9599d26e4fcSRobert Mustacchi uint16_t bus, device, func; 9609d26e4fcSRobert Mustacchi uint_t nregs; 9619d26e4fcSRobert Mustacchi int *regs, i; 9629d26e4fcSRobert Mustacchi i40e_device_t *idp; 9639d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 9649d26e4fcSRobert Mustacchi 9659d26e4fcSRobert Mustacchi parent = ddi_get_parent(i40e->i40e_dip); 9669d26e4fcSRobert Mustacchi 9679d26e4fcSRobert Mustacchi if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, i40e->i40e_dip, 0, "reg", 9689d26e4fcSRobert Mustacchi ®s, &nregs) != DDI_PROP_SUCCESS) { 9699d26e4fcSRobert Mustacchi return (B_FALSE); 9709d26e4fcSRobert Mustacchi } 9719d26e4fcSRobert Mustacchi 9729d26e4fcSRobert Mustacchi if (nregs < 1) { 9739d26e4fcSRobert Mustacchi ddi_prop_free(regs); 9749d26e4fcSRobert Mustacchi return (B_FALSE); 9759d26e4fcSRobert Mustacchi } 9769d26e4fcSRobert Mustacchi 9779d26e4fcSRobert Mustacchi bus = PCI_REG_BUS_G(regs[0]); 9789d26e4fcSRobert Mustacchi device = PCI_REG_DEV_G(regs[0]); 9799d26e4fcSRobert Mustacchi func = PCI_REG_FUNC_G(regs[0]); 9809d26e4fcSRobert Mustacchi ddi_prop_free(regs); 9819d26e4fcSRobert Mustacchi 9829d26e4fcSRobert Mustacchi i40e->i40e_hw_space.bus.func = func; 9839d26e4fcSRobert Mustacchi i40e->i40e_hw_space.bus.device = device; 9849d26e4fcSRobert Mustacchi 9859d26e4fcSRobert Mustacchi if (i40e_get_switch_resources(i40e) == B_FALSE) { 9869d26e4fcSRobert Mustacchi return (B_FALSE); 9879d26e4fcSRobert Mustacchi } 9889d26e4fcSRobert Mustacchi 9899d26e4fcSRobert Mustacchi /* 9909d26e4fcSRobert Mustacchi * To calculate the total amount of a resource we have available, we 9919d26e4fcSRobert Mustacchi * need to add how many our i40e_t thinks it has guaranteed, if any, and 9929d26e4fcSRobert Mustacchi * then we need to go through and divide the number of available on the 9939d26e4fcSRobert Mustacchi * device, which was snapshotted before anyone should have allocated 9949d26e4fcSRobert Mustacchi * anything, and use that to derive how many are available from the 9959d26e4fcSRobert Mustacchi * pool. Longer term, we may want to turn this into something that's 9969d26e4fcSRobert Mustacchi * more of a pool-like resource that everything can share (though that 9979d26e4fcSRobert Mustacchi * may require some more assistance from MAC). 9989d26e4fcSRobert Mustacchi * 9999d26e4fcSRobert Mustacchi * Though for transmit and receive queue pairs, we just have to ask 10009d26e4fcSRobert Mustacchi * firmware instead. 10019d26e4fcSRobert Mustacchi */ 10029d26e4fcSRobert Mustacchi idp = i40e_device_find(i40e, parent, bus, device); 10039d26e4fcSRobert Mustacchi i40e->i40e_device = idp; 10049d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nvsis = 0; 10059d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nvsis_used = 0; 10069d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmacfilt = 0; 10079d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmacfilt_used = 0; 10089d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmcastfilt = 0; 10099d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmcastfilt_used = 0; 10109d26e4fcSRobert Mustacchi 10119d26e4fcSRobert Mustacchi for (i = 0; i < i40e->i40e_switch_rsrc_actual; i++) { 10129d26e4fcSRobert Mustacchi i40e_switch_rsrc_t *srp = &i40e->i40e_switch_rsrcs[i]; 10139d26e4fcSRobert Mustacchi 10149d26e4fcSRobert Mustacchi switch (srp->resource_type) { 10159d26e4fcSRobert Mustacchi case I40E_AQ_RESOURCE_TYPE_VSI: 10169d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nvsis += 10179d26e4fcSRobert Mustacchi LE_16(srp->guaranteed); 10189d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nvsis_used = LE_16(srp->used); 10199d26e4fcSRobert Mustacchi break; 10209d26e4fcSRobert Mustacchi case I40E_AQ_RESOURCE_TYPE_MACADDR: 10219d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmacfilt += 10229d26e4fcSRobert Mustacchi LE_16(srp->guaranteed); 10239d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmacfilt_used = 10249d26e4fcSRobert Mustacchi LE_16(srp->used); 10259d26e4fcSRobert Mustacchi break; 10269d26e4fcSRobert Mustacchi case I40E_AQ_RESOURCE_TYPE_MULTICAST_HASH: 10279d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmcastfilt += 10289d26e4fcSRobert Mustacchi LE_16(srp->guaranteed); 10299d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmcastfilt_used = 10309d26e4fcSRobert Mustacchi LE_16(srp->used); 10319d26e4fcSRobert Mustacchi break; 10329d26e4fcSRobert Mustacchi default: 10339d26e4fcSRobert Mustacchi break; 10349d26e4fcSRobert Mustacchi } 10359d26e4fcSRobert Mustacchi } 10369d26e4fcSRobert Mustacchi 10379d26e4fcSRobert Mustacchi for (i = 0; i < idp->id_rsrcs_act; i++) { 10389d26e4fcSRobert Mustacchi i40e_switch_rsrc_t *srp = &i40e->i40e_switch_rsrcs[i]; 10399d26e4fcSRobert Mustacchi switch (srp->resource_type) { 10409d26e4fcSRobert Mustacchi case I40E_AQ_RESOURCE_TYPE_VSI: 10419d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nvsis += 10429d26e4fcSRobert Mustacchi LE_16(srp->total_unalloced) / idp->id_nfuncs; 10439d26e4fcSRobert Mustacchi break; 10449d26e4fcSRobert Mustacchi case I40E_AQ_RESOURCE_TYPE_MACADDR: 10459d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmacfilt += 10469d26e4fcSRobert Mustacchi LE_16(srp->total_unalloced) / idp->id_nfuncs; 10479d26e4fcSRobert Mustacchi break; 10489d26e4fcSRobert Mustacchi case I40E_AQ_RESOURCE_TYPE_MULTICAST_HASH: 10499d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmcastfilt += 10509d26e4fcSRobert Mustacchi LE_16(srp->total_unalloced) / idp->id_nfuncs; 10519d26e4fcSRobert Mustacchi default: 10529d26e4fcSRobert Mustacchi break; 10539d26e4fcSRobert Mustacchi } 10549d26e4fcSRobert Mustacchi } 10559d26e4fcSRobert Mustacchi 10569d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nrx_queue = hw->func_caps.num_rx_qp; 10579d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_ntx_queue = hw->func_caps.num_tx_qp; 10589d26e4fcSRobert Mustacchi 10599d26e4fcSRobert Mustacchi i40e->i40e_uaddrs = kmem_zalloc(sizeof (i40e_uaddr_t) * 10609d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmacfilt, KM_SLEEP); 10619d26e4fcSRobert Mustacchi i40e->i40e_maddrs = kmem_zalloc(sizeof (i40e_maddr_t) * 10629d26e4fcSRobert Mustacchi i40e->i40e_resources.ifr_nmcastfilt, KM_SLEEP); 10639d26e4fcSRobert Mustacchi 10649d26e4fcSRobert Mustacchi /* 10659d26e4fcSRobert Mustacchi * Initialize these as multicast addresses to indicate it's invalid for 10669d26e4fcSRobert Mustacchi * sanity purposes. Think of it like 0xdeadbeef. 10679d26e4fcSRobert Mustacchi */ 10689d26e4fcSRobert Mustacchi for (i = 0; i < i40e->i40e_resources.ifr_nmacfilt; i++) 10699d26e4fcSRobert Mustacchi i40e->i40e_uaddrs[i].iua_mac[0] = 0x01; 10709d26e4fcSRobert Mustacchi 10719d26e4fcSRobert Mustacchi return (B_TRUE); 10729d26e4fcSRobert Mustacchi } 10739d26e4fcSRobert Mustacchi 10749d26e4fcSRobert Mustacchi static boolean_t 10759d26e4fcSRobert Mustacchi i40e_enable_interrupts(i40e_t *i40e) 10769d26e4fcSRobert Mustacchi { 10779d26e4fcSRobert Mustacchi int i, rc; 10789d26e4fcSRobert Mustacchi 10799d26e4fcSRobert Mustacchi if (i40e->i40e_intr_cap & DDI_INTR_FLAG_BLOCK) { 10809d26e4fcSRobert Mustacchi rc = ddi_intr_block_enable(i40e->i40e_intr_handles, 10819d26e4fcSRobert Mustacchi i40e->i40e_intr_count); 10829d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 10839d26e4fcSRobert Mustacchi i40e_error(i40e, "Interrupt block-enable failed: %d", 10849d26e4fcSRobert Mustacchi rc); 10859d26e4fcSRobert Mustacchi return (B_FALSE); 10869d26e4fcSRobert Mustacchi } 10879d26e4fcSRobert Mustacchi } else { 10889d26e4fcSRobert Mustacchi for (i = 0; i < i40e->i40e_intr_count; i++) { 10899d26e4fcSRobert Mustacchi rc = ddi_intr_enable(i40e->i40e_intr_handles[i]); 10909d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 10919d26e4fcSRobert Mustacchi i40e_error(i40e, 10929d26e4fcSRobert Mustacchi "Failed to enable interrupt %d: %d", i, rc); 10939d26e4fcSRobert Mustacchi while (--i >= 0) { 10949d26e4fcSRobert Mustacchi (void) ddi_intr_disable( 10959d26e4fcSRobert Mustacchi i40e->i40e_intr_handles[i]); 10969d26e4fcSRobert Mustacchi } 10979d26e4fcSRobert Mustacchi return (B_FALSE); 10989d26e4fcSRobert Mustacchi } 10999d26e4fcSRobert Mustacchi } 11009d26e4fcSRobert Mustacchi } 11019d26e4fcSRobert Mustacchi 11029d26e4fcSRobert Mustacchi return (B_TRUE); 11039d26e4fcSRobert Mustacchi } 11049d26e4fcSRobert Mustacchi 11059d26e4fcSRobert Mustacchi static boolean_t 11069d26e4fcSRobert Mustacchi i40e_disable_interrupts(i40e_t *i40e) 11079d26e4fcSRobert Mustacchi { 11089d26e4fcSRobert Mustacchi int i, rc; 11099d26e4fcSRobert Mustacchi 11109d26e4fcSRobert Mustacchi if (i40e->i40e_intr_cap & DDI_INTR_FLAG_BLOCK) { 11119d26e4fcSRobert Mustacchi rc = ddi_intr_block_disable(i40e->i40e_intr_handles, 11129d26e4fcSRobert Mustacchi i40e->i40e_intr_count); 11139d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 11149d26e4fcSRobert Mustacchi i40e_error(i40e, 11159d26e4fcSRobert Mustacchi "Interrupt block-disabled failed: %d", rc); 11169d26e4fcSRobert Mustacchi return (B_FALSE); 11179d26e4fcSRobert Mustacchi } 11189d26e4fcSRobert Mustacchi } else { 11199d26e4fcSRobert Mustacchi for (i = 0; i < i40e->i40e_intr_count; i++) { 11209d26e4fcSRobert Mustacchi rc = ddi_intr_disable(i40e->i40e_intr_handles[i]); 11219d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 11229d26e4fcSRobert Mustacchi i40e_error(i40e, 11239d26e4fcSRobert Mustacchi "Failed to disable interrupt %d: %d", 11249d26e4fcSRobert Mustacchi i, rc); 11259d26e4fcSRobert Mustacchi return (B_FALSE); 11269d26e4fcSRobert Mustacchi } 11279d26e4fcSRobert Mustacchi } 11289d26e4fcSRobert Mustacchi } 11299d26e4fcSRobert Mustacchi 11309d26e4fcSRobert Mustacchi return (B_TRUE); 11319d26e4fcSRobert Mustacchi } 11329d26e4fcSRobert Mustacchi 11339d26e4fcSRobert Mustacchi /* 11349d26e4fcSRobert Mustacchi * Free receive & transmit rings. 11359d26e4fcSRobert Mustacchi */ 11369d26e4fcSRobert Mustacchi static void 11379d26e4fcSRobert Mustacchi i40e_free_trqpairs(i40e_t *i40e) 11389d26e4fcSRobert Mustacchi { 11399d26e4fcSRobert Mustacchi i40e_trqpair_t *itrq; 11409d26e4fcSRobert Mustacchi 114109aee612SRyan Zezeski if (i40e->i40e_rx_groups != NULL) { 114209aee612SRyan Zezeski kmem_free(i40e->i40e_rx_groups, 114309aee612SRyan Zezeski sizeof (i40e_rx_group_t) * i40e->i40e_num_rx_groups); 114409aee612SRyan Zezeski i40e->i40e_rx_groups = NULL; 114509aee612SRyan Zezeski } 114609aee612SRyan Zezeski 11479d26e4fcSRobert Mustacchi if (i40e->i40e_trqpairs != NULL) { 114809aee612SRyan Zezeski for (uint_t i = 0; i < i40e->i40e_num_trqpairs; i++) { 11499d26e4fcSRobert Mustacchi itrq = &i40e->i40e_trqpairs[i]; 1150aa2a44afSPaul Winder mutex_destroy(&itrq->itrq_intr_lock); 11519d26e4fcSRobert Mustacchi mutex_destroy(&itrq->itrq_rx_lock); 11529d26e4fcSRobert Mustacchi mutex_destroy(&itrq->itrq_tx_lock); 11539d26e4fcSRobert Mustacchi mutex_destroy(&itrq->itrq_tcb_lock); 1154aa2a44afSPaul Winder cv_destroy(&itrq->itrq_intr_cv); 1155aa2a44afSPaul Winder cv_destroy(&itrq->itrq_tx_cv); 11569d26e4fcSRobert Mustacchi 1157aa2a44afSPaul Winder i40e_stats_trqpair_fini(itrq); 11589d26e4fcSRobert Mustacchi } 11599d26e4fcSRobert Mustacchi 11609d26e4fcSRobert Mustacchi kmem_free(i40e->i40e_trqpairs, 11619d26e4fcSRobert Mustacchi sizeof (i40e_trqpair_t) * i40e->i40e_num_trqpairs); 11629d26e4fcSRobert Mustacchi i40e->i40e_trqpairs = NULL; 11639d26e4fcSRobert Mustacchi } 11649d26e4fcSRobert Mustacchi 11659d26e4fcSRobert Mustacchi cv_destroy(&i40e->i40e_rx_pending_cv); 11669d26e4fcSRobert Mustacchi mutex_destroy(&i40e->i40e_rx_pending_lock); 11679d26e4fcSRobert Mustacchi mutex_destroy(&i40e->i40e_general_lock); 11689d26e4fcSRobert Mustacchi } 11699d26e4fcSRobert Mustacchi 11709d26e4fcSRobert Mustacchi /* 11719d26e4fcSRobert Mustacchi * Allocate transmit and receive rings, as well as other data structures that we 11729d26e4fcSRobert Mustacchi * need. 11739d26e4fcSRobert Mustacchi */ 11749d26e4fcSRobert Mustacchi static boolean_t 11759d26e4fcSRobert Mustacchi i40e_alloc_trqpairs(i40e_t *i40e) 11769d26e4fcSRobert Mustacchi { 11779d26e4fcSRobert Mustacchi void *mutexpri = DDI_INTR_PRI(i40e->i40e_intr_pri); 11789d26e4fcSRobert Mustacchi 11799d26e4fcSRobert Mustacchi /* 11809d26e4fcSRobert Mustacchi * Now that we have the priority for the interrupts, initialize 11819d26e4fcSRobert Mustacchi * all relevant locks. 11829d26e4fcSRobert Mustacchi */ 11839d26e4fcSRobert Mustacchi mutex_init(&i40e->i40e_general_lock, NULL, MUTEX_DRIVER, mutexpri); 11849d26e4fcSRobert Mustacchi mutex_init(&i40e->i40e_rx_pending_lock, NULL, MUTEX_DRIVER, mutexpri); 11859d26e4fcSRobert Mustacchi cv_init(&i40e->i40e_rx_pending_cv, NULL, CV_DRIVER, NULL); 11869d26e4fcSRobert Mustacchi 11879d26e4fcSRobert Mustacchi i40e->i40e_trqpairs = kmem_zalloc(sizeof (i40e_trqpair_t) * 11889d26e4fcSRobert Mustacchi i40e->i40e_num_trqpairs, KM_SLEEP); 118909aee612SRyan Zezeski for (uint_t i = 0; i < i40e->i40e_num_trqpairs; i++) { 11909d26e4fcSRobert Mustacchi i40e_trqpair_t *itrq = &i40e->i40e_trqpairs[i]; 11919d26e4fcSRobert Mustacchi 11929d26e4fcSRobert Mustacchi itrq->itrq_i40e = i40e; 1193aa2a44afSPaul Winder mutex_init(&itrq->itrq_intr_lock, NULL, MUTEX_DRIVER, mutexpri); 11949d26e4fcSRobert Mustacchi mutex_init(&itrq->itrq_rx_lock, NULL, MUTEX_DRIVER, mutexpri); 11959d26e4fcSRobert Mustacchi mutex_init(&itrq->itrq_tx_lock, NULL, MUTEX_DRIVER, mutexpri); 11969d26e4fcSRobert Mustacchi mutex_init(&itrq->itrq_tcb_lock, NULL, MUTEX_DRIVER, mutexpri); 1197aa2a44afSPaul Winder cv_init(&itrq->itrq_intr_cv, NULL, CV_DRIVER, NULL); 1198aa2a44afSPaul Winder cv_init(&itrq->itrq_tx_cv, NULL, CV_DRIVER, NULL); 11999d26e4fcSRobert Mustacchi itrq->itrq_index = i; 1200aa2a44afSPaul Winder itrq->itrq_intr_quiesce = B_TRUE; 1201aa2a44afSPaul Winder itrq->itrq_tx_quiesce = B_TRUE; 1202aa2a44afSPaul Winder } 1203aa2a44afSPaul Winder 1204aa2a44afSPaul Winder for (uint_t i = 0; i < i40e->i40e_num_trqpairs; i++) { 1205aa2a44afSPaul Winder /* 1206aa2a44afSPaul Winder * Keeping this in a separate iteration makes the 1207aa2a44afSPaul Winder * clean up path safe. 1208aa2a44afSPaul Winder */ 1209aa2a44afSPaul Winder if (!i40e_stats_trqpair_init(&i40e->i40e_trqpairs[i])) { 1210aa2a44afSPaul Winder i40e_free_trqpairs(i40e); 1211aa2a44afSPaul Winder return (B_FALSE); 1212aa2a44afSPaul Winder } 12139d26e4fcSRobert Mustacchi } 12149d26e4fcSRobert Mustacchi 121509aee612SRyan Zezeski i40e->i40e_rx_groups = kmem_zalloc(sizeof (i40e_rx_group_t) * 121609aee612SRyan Zezeski i40e->i40e_num_rx_groups, KM_SLEEP); 121709aee612SRyan Zezeski 121809aee612SRyan Zezeski for (uint_t i = 0; i < i40e->i40e_num_rx_groups; i++) { 121909aee612SRyan Zezeski i40e_rx_group_t *rxg = &i40e->i40e_rx_groups[i]; 122009aee612SRyan Zezeski 122109aee612SRyan Zezeski rxg->irg_index = i; 122209aee612SRyan Zezeski rxg->irg_i40e = i40e; 122309aee612SRyan Zezeski } 122409aee612SRyan Zezeski 12259d26e4fcSRobert Mustacchi return (B_TRUE); 12269d26e4fcSRobert Mustacchi } 12279d26e4fcSRobert Mustacchi 12289d26e4fcSRobert Mustacchi 12299d26e4fcSRobert Mustacchi 12309d26e4fcSRobert Mustacchi /* 12319d26e4fcSRobert Mustacchi * Unless a .conf file already overrode i40e_t structure values, they will 12329d26e4fcSRobert Mustacchi * be 0, and need to be set in conjunction with the now-available HW report. 12339d26e4fcSRobert Mustacchi */ 12349d26e4fcSRobert Mustacchi /* ARGSUSED */ 12359d26e4fcSRobert Mustacchi static void 12369d26e4fcSRobert Mustacchi i40e_hw_to_instance(i40e_t *i40e, i40e_hw_t *hw) 12379d26e4fcSRobert Mustacchi { 123809aee612SRyan Zezeski if (i40e->i40e_num_trqpairs_per_vsi == 0) { 123909aee612SRyan Zezeski if (i40e_is_x722(i40e)) { 124009aee612SRyan Zezeski i40e->i40e_num_trqpairs_per_vsi = 124109aee612SRyan Zezeski I40E_722_MAX_TC_QUEUES; 124209aee612SRyan Zezeski } else { 124309aee612SRyan Zezeski i40e->i40e_num_trqpairs_per_vsi = 124409aee612SRyan Zezeski I40E_710_MAX_TC_QUEUES; 124509aee612SRyan Zezeski } 12469d26e4fcSRobert Mustacchi } 12479d26e4fcSRobert Mustacchi 12489d26e4fcSRobert Mustacchi if (i40e->i40e_num_rx_groups == 0) { 124988628b1bSRyan Zezeski i40e->i40e_num_rx_groups = I40E_DEF_NUM_RX_GROUPS; 12509d26e4fcSRobert Mustacchi } 12519d26e4fcSRobert Mustacchi } 12529d26e4fcSRobert Mustacchi 12539d26e4fcSRobert Mustacchi /* 12549d26e4fcSRobert Mustacchi * Free any resources required by, or setup by, the Intel common code. 12559d26e4fcSRobert Mustacchi */ 12569d26e4fcSRobert Mustacchi static void 12579d26e4fcSRobert Mustacchi i40e_common_code_fini(i40e_t *i40e) 12589d26e4fcSRobert Mustacchi { 12599d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 12609d26e4fcSRobert Mustacchi int rc; 12619d26e4fcSRobert Mustacchi 12629d26e4fcSRobert Mustacchi rc = i40e_shutdown_lan_hmc(hw); 12639d26e4fcSRobert Mustacchi if (rc != I40E_SUCCESS) 12649d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to shutdown LAN hmc: %d", rc); 12659d26e4fcSRobert Mustacchi 12669d26e4fcSRobert Mustacchi rc = i40e_shutdown_adminq(hw); 12679d26e4fcSRobert Mustacchi if (rc != I40E_SUCCESS) 12689d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to shutdown admin queue: %d", rc); 12699d26e4fcSRobert Mustacchi } 12709d26e4fcSRobert Mustacchi 12719d26e4fcSRobert Mustacchi /* 12729d26e4fcSRobert Mustacchi * Initialize and call Intel common-code routines, includes some setup 12739d26e4fcSRobert Mustacchi * the common code expects from the driver. Also prints on failure, so 12749d26e4fcSRobert Mustacchi * the caller doesn't have to. 12759d26e4fcSRobert Mustacchi */ 12769d26e4fcSRobert Mustacchi static boolean_t 12779d26e4fcSRobert Mustacchi i40e_common_code_init(i40e_t *i40e, i40e_hw_t *hw) 12789d26e4fcSRobert Mustacchi { 12799d26e4fcSRobert Mustacchi int rc; 12809d26e4fcSRobert Mustacchi 12819d26e4fcSRobert Mustacchi i40e_clear_hw(hw); 12829d26e4fcSRobert Mustacchi rc = i40e_pf_reset(hw); 12839d26e4fcSRobert Mustacchi if (rc != 0) { 12849d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to reset hardware: %d", rc); 12859d26e4fcSRobert Mustacchi i40e_fm_ereport(i40e, DDI_FM_DEVICE_NO_RESPONSE); 12869d26e4fcSRobert Mustacchi return (B_FALSE); 12879d26e4fcSRobert Mustacchi } 12889d26e4fcSRobert Mustacchi 12899d26e4fcSRobert Mustacchi rc = i40e_init_shared_code(hw); 12909d26e4fcSRobert Mustacchi if (rc != 0) { 12919d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to initialize i40e core: %d", rc); 12929d26e4fcSRobert Mustacchi return (B_FALSE); 12939d26e4fcSRobert Mustacchi } 12949d26e4fcSRobert Mustacchi 12959d26e4fcSRobert Mustacchi hw->aq.num_arq_entries = I40E_DEF_ADMINQ_SIZE; 12969d26e4fcSRobert Mustacchi hw->aq.num_asq_entries = I40E_DEF_ADMINQ_SIZE; 12979d26e4fcSRobert Mustacchi hw->aq.arq_buf_size = I40E_ADMINQ_BUFSZ; 12989d26e4fcSRobert Mustacchi hw->aq.asq_buf_size = I40E_ADMINQ_BUFSZ; 12999d26e4fcSRobert Mustacchi 13009d26e4fcSRobert Mustacchi rc = i40e_init_adminq(hw); 13019d26e4fcSRobert Mustacchi if (rc != 0) { 13029d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to initialize firmware admin queue: " 13039d26e4fcSRobert Mustacchi "%d, potential firmware version mismatch", rc); 13049d26e4fcSRobert Mustacchi i40e_fm_ereport(i40e, DDI_FM_DEVICE_INVAL_STATE); 13059d26e4fcSRobert Mustacchi return (B_FALSE); 13069d26e4fcSRobert Mustacchi } 13079d26e4fcSRobert Mustacchi 13089d26e4fcSRobert Mustacchi if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && 130993f1cac5SPaul Winder hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw)) { 13103d75a287SRobert Mustacchi i40e_log(i40e, "The driver for the device detected a newer " 13119d26e4fcSRobert Mustacchi "version of the NVM image (%d.%d) than expected (%d.%d).\n" 13129d26e4fcSRobert Mustacchi "Please install the most recent version of the network " 13139d26e4fcSRobert Mustacchi "driver.\n", hw->aq.api_maj_ver, hw->aq.api_min_ver, 131493f1cac5SPaul Winder I40E_FW_API_VERSION_MAJOR, I40E_FW_MINOR_VERSION(hw)); 13159d26e4fcSRobert Mustacchi } else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR || 131693f1cac5SPaul Winder hw->aq.api_min_ver < (I40E_FW_MINOR_VERSION(hw) - 1)) { 13173d75a287SRobert Mustacchi i40e_log(i40e, "The driver for the device detected an older" 13189d26e4fcSRobert Mustacchi " version of the NVM image (%d.%d) than expected (%d.%d)." 13199d26e4fcSRobert Mustacchi "\nPlease update the NVM image.\n", 13209d26e4fcSRobert Mustacchi hw->aq.api_maj_ver, hw->aq.api_min_ver, 132193f1cac5SPaul Winder I40E_FW_API_VERSION_MAJOR, I40E_FW_MINOR_VERSION(hw) - 1); 13229d26e4fcSRobert Mustacchi } 13239d26e4fcSRobert Mustacchi 13249d26e4fcSRobert Mustacchi i40e_clear_pxe_mode(hw); 13259d26e4fcSRobert Mustacchi 13269d26e4fcSRobert Mustacchi /* 13279d26e4fcSRobert Mustacchi * We need to call this so that the common code can discover 13289d26e4fcSRobert Mustacchi * capabilities of the hardware, which it uses throughout the rest. 13299d26e4fcSRobert Mustacchi */ 13309d26e4fcSRobert Mustacchi if (!i40e_get_hw_capabilities(i40e, hw)) { 13319d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to obtain hardware capabilities"); 13329d26e4fcSRobert Mustacchi return (B_FALSE); 13339d26e4fcSRobert Mustacchi } 13349d26e4fcSRobert Mustacchi 13359d26e4fcSRobert Mustacchi if (i40e_get_available_resources(i40e) == B_FALSE) { 13369d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to obtain hardware resources"); 13379d26e4fcSRobert Mustacchi return (B_FALSE); 13389d26e4fcSRobert Mustacchi } 13399d26e4fcSRobert Mustacchi 13409d26e4fcSRobert Mustacchi i40e_hw_to_instance(i40e, hw); 13419d26e4fcSRobert Mustacchi 13429d26e4fcSRobert Mustacchi rc = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, 13439d26e4fcSRobert Mustacchi hw->func_caps.num_rx_qp, 0, 0); 13449d26e4fcSRobert Mustacchi if (rc != 0) { 13459d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to initialize hardware memory cache: " 13469d26e4fcSRobert Mustacchi "%d", rc); 13479d26e4fcSRobert Mustacchi return (B_FALSE); 13489d26e4fcSRobert Mustacchi } 13499d26e4fcSRobert Mustacchi 13509d26e4fcSRobert Mustacchi rc = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); 13519d26e4fcSRobert Mustacchi if (rc != 0) { 13529d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to configure hardware memory cache: " 13539d26e4fcSRobert Mustacchi "%d", rc); 13549d26e4fcSRobert Mustacchi return (B_FALSE); 13559d26e4fcSRobert Mustacchi } 13569d26e4fcSRobert Mustacchi 1357*df36e06dSRobert Mustacchi (void) i40e_aq_stop_lldp(hw, TRUE, FALSE, NULL); 13589d26e4fcSRobert Mustacchi 13599d26e4fcSRobert Mustacchi rc = i40e_get_mac_addr(hw, hw->mac.addr); 13609d26e4fcSRobert Mustacchi if (rc != I40E_SUCCESS) { 13619d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to retrieve hardware mac address: %d", 13629d26e4fcSRobert Mustacchi rc); 13639d26e4fcSRobert Mustacchi return (B_FALSE); 13649d26e4fcSRobert Mustacchi } 13659d26e4fcSRobert Mustacchi 13669d26e4fcSRobert Mustacchi rc = i40e_validate_mac_addr(hw->mac.addr); 13679d26e4fcSRobert Mustacchi if (rc != 0) { 13689d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to validate internal mac address: " 13699d26e4fcSRobert Mustacchi "%d", rc); 13709d26e4fcSRobert Mustacchi return (B_FALSE); 13719d26e4fcSRobert Mustacchi } 13729d26e4fcSRobert Mustacchi bcopy(hw->mac.addr, hw->mac.perm_addr, ETHERADDRL); 13739d26e4fcSRobert Mustacchi if ((rc = i40e_get_port_mac_addr(hw, hw->mac.port_addr)) != 13749d26e4fcSRobert Mustacchi I40E_SUCCESS) { 13759d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to retrieve port mac address: %d", 13769d26e4fcSRobert Mustacchi rc); 13779d26e4fcSRobert Mustacchi return (B_FALSE); 13789d26e4fcSRobert Mustacchi } 13799d26e4fcSRobert Mustacchi 13809d26e4fcSRobert Mustacchi /* 138109aee612SRyan Zezeski * We need to obtain the Default Virtual Station SEID (VSI) 138209aee612SRyan Zezeski * before we can perform other operations on the device. 13839d26e4fcSRobert Mustacchi */ 138409aee612SRyan Zezeski if (!i40e_set_def_vsi_seid(i40e)) { 138509aee612SRyan Zezeski i40e_error(i40e, "failed to obtain Default VSI SEID"); 13869d26e4fcSRobert Mustacchi return (B_FALSE); 13879d26e4fcSRobert Mustacchi } 13889d26e4fcSRobert Mustacchi 13899d26e4fcSRobert Mustacchi return (B_TRUE); 13909d26e4fcSRobert Mustacchi } 13919d26e4fcSRobert Mustacchi 13929d26e4fcSRobert Mustacchi static void 13939d26e4fcSRobert Mustacchi i40e_unconfigure(dev_info_t *devinfo, i40e_t *i40e) 13949d26e4fcSRobert Mustacchi { 13959d26e4fcSRobert Mustacchi int rc; 13969d26e4fcSRobert Mustacchi 13979d26e4fcSRobert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_ENABLE_INTR) 13989d26e4fcSRobert Mustacchi (void) i40e_disable_interrupts(i40e); 13999d26e4fcSRobert Mustacchi 14009d26e4fcSRobert Mustacchi if ((i40e->i40e_attach_progress & I40E_ATTACH_LINK_TIMER) && 14019d26e4fcSRobert Mustacchi i40e->i40e_periodic_id != 0) { 14029d26e4fcSRobert Mustacchi ddi_periodic_delete(i40e->i40e_periodic_id); 14039d26e4fcSRobert Mustacchi i40e->i40e_periodic_id = 0; 14049d26e4fcSRobert Mustacchi } 14059d26e4fcSRobert Mustacchi 140644b0ba91SRobert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_UFM_INIT) 140744b0ba91SRobert Mustacchi ddi_ufm_fini(i40e->i40e_ufmh); 140844b0ba91SRobert Mustacchi 14099d26e4fcSRobert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_MAC) { 14109d26e4fcSRobert Mustacchi rc = mac_unregister(i40e->i40e_mac_hdl); 14119d26e4fcSRobert Mustacchi if (rc != 0) { 14129d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to unregister from mac: %d", 14139d26e4fcSRobert Mustacchi rc); 14149d26e4fcSRobert Mustacchi } 14159d26e4fcSRobert Mustacchi } 14169d26e4fcSRobert Mustacchi 14179d26e4fcSRobert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_STATS) { 14189d26e4fcSRobert Mustacchi i40e_stats_fini(i40e); 14199d26e4fcSRobert Mustacchi } 14209d26e4fcSRobert Mustacchi 14219d26e4fcSRobert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_ADD_INTR) 14229d26e4fcSRobert Mustacchi i40e_rem_intr_handlers(i40e); 14239d26e4fcSRobert Mustacchi 14249d26e4fcSRobert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_ALLOC_RINGSLOCKS) 14259d26e4fcSRobert Mustacchi i40e_free_trqpairs(i40e); 14269d26e4fcSRobert Mustacchi 14279d26e4fcSRobert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_ALLOC_INTR) 14289d26e4fcSRobert Mustacchi i40e_rem_intrs(i40e); 14299d26e4fcSRobert Mustacchi 14309d26e4fcSRobert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_COMMON_CODE) 14319d26e4fcSRobert Mustacchi i40e_common_code_fini(i40e); 14329d26e4fcSRobert Mustacchi 14339d26e4fcSRobert Mustacchi i40e_cleanup_resources(i40e); 14349d26e4fcSRobert Mustacchi 14359d26e4fcSRobert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_PROPS) 14369d26e4fcSRobert Mustacchi (void) ddi_prop_remove_all(devinfo); 14379d26e4fcSRobert Mustacchi 14389d26e4fcSRobert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_REGS_MAP && 14399d26e4fcSRobert Mustacchi i40e->i40e_osdep_space.ios_reg_handle != NULL) { 14409d26e4fcSRobert Mustacchi ddi_regs_map_free(&i40e->i40e_osdep_space.ios_reg_handle); 14419d26e4fcSRobert Mustacchi i40e->i40e_osdep_space.ios_reg_handle = NULL; 14429d26e4fcSRobert Mustacchi } 14439d26e4fcSRobert Mustacchi 14449d26e4fcSRobert Mustacchi if ((i40e->i40e_attach_progress & I40E_ATTACH_PCI_CONFIG) && 14459d26e4fcSRobert Mustacchi i40e->i40e_osdep_space.ios_cfg_handle != NULL) { 14469d26e4fcSRobert Mustacchi pci_config_teardown(&i40e->i40e_osdep_space.ios_cfg_handle); 14479d26e4fcSRobert Mustacchi i40e->i40e_osdep_space.ios_cfg_handle = NULL; 14489d26e4fcSRobert Mustacchi } 14499d26e4fcSRobert Mustacchi 14509d26e4fcSRobert Mustacchi if (i40e->i40e_attach_progress & I40E_ATTACH_FM_INIT) 14519d26e4fcSRobert Mustacchi i40e_fm_fini(i40e); 14529d26e4fcSRobert Mustacchi 14539d26e4fcSRobert Mustacchi kmem_free(i40e->i40e_aqbuf, I40E_ADMINQ_BUFSZ); 14549d26e4fcSRobert Mustacchi kmem_free(i40e, sizeof (i40e_t)); 14559d26e4fcSRobert Mustacchi 14569d26e4fcSRobert Mustacchi ddi_set_driver_private(devinfo, NULL); 14579d26e4fcSRobert Mustacchi } 14589d26e4fcSRobert Mustacchi 14599d26e4fcSRobert Mustacchi static boolean_t 14609d26e4fcSRobert Mustacchi i40e_final_init(i40e_t *i40e) 14619d26e4fcSRobert Mustacchi { 14629d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 14639d26e4fcSRobert Mustacchi struct i40e_osdep *osdep = OS_DEP(hw); 14649d26e4fcSRobert Mustacchi uint8_t pbanum[I40E_PBANUM_STRLEN]; 14659d26e4fcSRobert Mustacchi enum i40e_status_code irc; 14669d26e4fcSRobert Mustacchi char buf[I40E_DDI_PROP_LEN]; 14679d26e4fcSRobert Mustacchi 14689d26e4fcSRobert Mustacchi pbanum[0] = '\0'; 14699d26e4fcSRobert Mustacchi irc = i40e_read_pba_string(hw, pbanum, sizeof (pbanum)); 14709d26e4fcSRobert Mustacchi if (irc != I40E_SUCCESS) { 14719d26e4fcSRobert Mustacchi i40e_log(i40e, "failed to read PBA string: %d", irc); 14729d26e4fcSRobert Mustacchi } else { 14739d26e4fcSRobert Mustacchi (void) ddi_prop_update_string(DDI_DEV_T_NONE, i40e->i40e_dip, 14749d26e4fcSRobert Mustacchi "printed-board-assembly", (char *)pbanum); 14759d26e4fcSRobert Mustacchi } 14769d26e4fcSRobert Mustacchi 14779d26e4fcSRobert Mustacchi #ifdef DEBUG 14789d26e4fcSRobert Mustacchi ASSERT(snprintf(NULL, 0, "%d.%d", hw->aq.fw_maj_ver, 14799d26e4fcSRobert Mustacchi hw->aq.fw_min_ver) < sizeof (buf)); 14809d26e4fcSRobert Mustacchi ASSERT(snprintf(NULL, 0, "%x", hw->aq.fw_build) < sizeof (buf)); 14819d26e4fcSRobert Mustacchi ASSERT(snprintf(NULL, 0, "%d.%d", hw->aq.api_maj_ver, 14829d26e4fcSRobert Mustacchi hw->aq.api_min_ver) < sizeof (buf)); 14839d26e4fcSRobert Mustacchi #endif 14849d26e4fcSRobert Mustacchi 14859d26e4fcSRobert Mustacchi (void) snprintf(buf, sizeof (buf), "%d.%d", hw->aq.fw_maj_ver, 14869d26e4fcSRobert Mustacchi hw->aq.fw_min_ver); 14879d26e4fcSRobert Mustacchi (void) ddi_prop_update_string(DDI_DEV_T_NONE, i40e->i40e_dip, 14889d26e4fcSRobert Mustacchi "firmware-version", buf); 14899d26e4fcSRobert Mustacchi (void) snprintf(buf, sizeof (buf), "%x", hw->aq.fw_build); 14909d26e4fcSRobert Mustacchi (void) ddi_prop_update_string(DDI_DEV_T_NONE, i40e->i40e_dip, 14919d26e4fcSRobert Mustacchi "firmware-build", buf); 14929d26e4fcSRobert Mustacchi (void) snprintf(buf, sizeof (buf), "%d.%d", hw->aq.api_maj_ver, 14939d26e4fcSRobert Mustacchi hw->aq.api_min_ver); 14949d26e4fcSRobert Mustacchi (void) ddi_prop_update_string(DDI_DEV_T_NONE, i40e->i40e_dip, 14959d26e4fcSRobert Mustacchi "api-version", buf); 14969d26e4fcSRobert Mustacchi 14979d26e4fcSRobert Mustacchi if (!i40e_set_hw_bus_info(hw)) 14989d26e4fcSRobert Mustacchi return (B_FALSE); 14999d26e4fcSRobert Mustacchi 15009d26e4fcSRobert Mustacchi if (i40e_check_acc_handle(osdep->ios_reg_handle) != DDI_FM_OK) { 15019d26e4fcSRobert Mustacchi ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST); 15029d26e4fcSRobert Mustacchi return (B_FALSE); 15039d26e4fcSRobert Mustacchi } 15049d26e4fcSRobert Mustacchi 15059d26e4fcSRobert Mustacchi return (B_TRUE); 15069d26e4fcSRobert Mustacchi } 15079d26e4fcSRobert Mustacchi 15083d75a287SRobert Mustacchi static void 15099d26e4fcSRobert Mustacchi i40e_identify_hardware(i40e_t *i40e) 15109d26e4fcSRobert Mustacchi { 15119d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 15129d26e4fcSRobert Mustacchi struct i40e_osdep *osdep = &i40e->i40e_osdep_space; 15139d26e4fcSRobert Mustacchi 15149d26e4fcSRobert Mustacchi hw->vendor_id = pci_config_get16(osdep->ios_cfg_handle, PCI_CONF_VENID); 15159d26e4fcSRobert Mustacchi hw->device_id = pci_config_get16(osdep->ios_cfg_handle, PCI_CONF_DEVID); 15169d26e4fcSRobert Mustacchi hw->revision_id = pci_config_get8(osdep->ios_cfg_handle, 15179d26e4fcSRobert Mustacchi PCI_CONF_REVID); 15189d26e4fcSRobert Mustacchi hw->subsystem_device_id = 15199d26e4fcSRobert Mustacchi pci_config_get16(osdep->ios_cfg_handle, PCI_CONF_SUBSYSID); 15209d26e4fcSRobert Mustacchi hw->subsystem_vendor_id = 15219d26e4fcSRobert Mustacchi pci_config_get16(osdep->ios_cfg_handle, PCI_CONF_SUBVENID); 15229d26e4fcSRobert Mustacchi 15239d26e4fcSRobert Mustacchi /* 15249d26e4fcSRobert Mustacchi * Note that we set the hardware's bus information later on, in 15259d26e4fcSRobert Mustacchi * i40e_get_available_resources(). The common code doesn't seem to 15269d26e4fcSRobert Mustacchi * require that it be set in any ways, it seems to be mostly for 15279d26e4fcSRobert Mustacchi * book-keeping. 15289d26e4fcSRobert Mustacchi */ 15299d26e4fcSRobert Mustacchi } 15309d26e4fcSRobert Mustacchi 15319d26e4fcSRobert Mustacchi static boolean_t 15329d26e4fcSRobert Mustacchi i40e_regs_map(i40e_t *i40e) 15339d26e4fcSRobert Mustacchi { 15349d26e4fcSRobert Mustacchi dev_info_t *devinfo = i40e->i40e_dip; 15359d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 15369d26e4fcSRobert Mustacchi struct i40e_osdep *osdep = &i40e->i40e_osdep_space; 15379d26e4fcSRobert Mustacchi off_t memsize; 15389d26e4fcSRobert Mustacchi int ret; 15399d26e4fcSRobert Mustacchi 15409d26e4fcSRobert Mustacchi if (ddi_dev_regsize(devinfo, I40E_ADAPTER_REGSET, &memsize) != 15419d26e4fcSRobert Mustacchi DDI_SUCCESS) { 15429d26e4fcSRobert Mustacchi i40e_error(i40e, "Used invalid register set to map PCIe regs"); 15439d26e4fcSRobert Mustacchi return (B_FALSE); 15449d26e4fcSRobert Mustacchi } 15459d26e4fcSRobert Mustacchi 15469d26e4fcSRobert Mustacchi if ((ret = ddi_regs_map_setup(devinfo, I40E_ADAPTER_REGSET, 15479d26e4fcSRobert Mustacchi (caddr_t *)&hw->hw_addr, 0, memsize, &i40e_regs_acc_attr, 15489d26e4fcSRobert Mustacchi &osdep->ios_reg_handle)) != DDI_SUCCESS) { 15499d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to map device registers: %d", ret); 15509d26e4fcSRobert Mustacchi return (B_FALSE); 15519d26e4fcSRobert Mustacchi } 15529d26e4fcSRobert Mustacchi 15539d26e4fcSRobert Mustacchi osdep->ios_reg_size = memsize; 15549d26e4fcSRobert Mustacchi return (B_TRUE); 15559d26e4fcSRobert Mustacchi } 15569d26e4fcSRobert Mustacchi 15579d26e4fcSRobert Mustacchi /* 15589d26e4fcSRobert Mustacchi * Update parameters required when a new MTU has been configured. Calculate the 15599d26e4fcSRobert Mustacchi * maximum frame size, as well as, size our DMA buffers which we size in 15609d26e4fcSRobert Mustacchi * increments of 1K. 15619d26e4fcSRobert Mustacchi */ 15629d26e4fcSRobert Mustacchi void 15639d26e4fcSRobert Mustacchi i40e_update_mtu(i40e_t *i40e) 15649d26e4fcSRobert Mustacchi { 15659d26e4fcSRobert Mustacchi uint32_t rx, tx; 15669d26e4fcSRobert Mustacchi 15679d26e4fcSRobert Mustacchi i40e->i40e_frame_max = i40e->i40e_sdu + 15689d26e4fcSRobert Mustacchi sizeof (struct ether_vlan_header) + ETHERFCSL; 15699d26e4fcSRobert Mustacchi 15709d26e4fcSRobert Mustacchi rx = i40e->i40e_frame_max + I40E_BUF_IPHDR_ALIGNMENT; 15719d26e4fcSRobert Mustacchi i40e->i40e_rx_buf_size = ((rx >> 10) + 15729d26e4fcSRobert Mustacchi ((rx & (((uint32_t)1 << 10) -1)) > 0 ? 1 : 0)) << 10; 15739d26e4fcSRobert Mustacchi 15749d26e4fcSRobert Mustacchi tx = i40e->i40e_frame_max; 15759d26e4fcSRobert Mustacchi i40e->i40e_tx_buf_size = ((tx >> 10) + 15769d26e4fcSRobert Mustacchi ((tx & (((uint32_t)1 << 10) -1)) > 0 ? 1 : 0)) << 10; 15779d26e4fcSRobert Mustacchi } 15789d26e4fcSRobert Mustacchi 15799d26e4fcSRobert Mustacchi static int 15809d26e4fcSRobert Mustacchi i40e_get_prop(i40e_t *i40e, char *prop, int min, int max, int def) 15819d26e4fcSRobert Mustacchi { 15829d26e4fcSRobert Mustacchi int val; 15839d26e4fcSRobert Mustacchi 15849d26e4fcSRobert Mustacchi val = ddi_prop_get_int(DDI_DEV_T_ANY, i40e->i40e_dip, DDI_PROP_DONTPASS, 15859d26e4fcSRobert Mustacchi prop, def); 15869d26e4fcSRobert Mustacchi if (val > max) 15879d26e4fcSRobert Mustacchi val = max; 15889d26e4fcSRobert Mustacchi if (val < min) 15899d26e4fcSRobert Mustacchi val = min; 15909d26e4fcSRobert Mustacchi return (val); 15919d26e4fcSRobert Mustacchi } 15929d26e4fcSRobert Mustacchi 15939d26e4fcSRobert Mustacchi static void 15949d26e4fcSRobert Mustacchi i40e_init_properties(i40e_t *i40e) 15959d26e4fcSRobert Mustacchi { 15969d26e4fcSRobert Mustacchi i40e->i40e_sdu = i40e_get_prop(i40e, "default_mtu", 15979d26e4fcSRobert Mustacchi I40E_MIN_MTU, I40E_MAX_MTU, I40E_DEF_MTU); 15989d26e4fcSRobert Mustacchi 15999d26e4fcSRobert Mustacchi i40e->i40e_intr_force = i40e_get_prop(i40e, "intr_force", 16009d26e4fcSRobert Mustacchi I40E_INTR_NONE, I40E_INTR_LEGACY, I40E_INTR_NONE); 16019d26e4fcSRobert Mustacchi 16029d26e4fcSRobert Mustacchi i40e->i40e_mr_enable = i40e_get_prop(i40e, "mr_enable", 16039d26e4fcSRobert Mustacchi B_FALSE, B_TRUE, B_TRUE); 16049d26e4fcSRobert Mustacchi 16059d26e4fcSRobert Mustacchi i40e->i40e_tx_ring_size = i40e_get_prop(i40e, "tx_ring_size", 16069d26e4fcSRobert Mustacchi I40E_MIN_TX_RING_SIZE, I40E_MAX_TX_RING_SIZE, 16079d26e4fcSRobert Mustacchi I40E_DEF_TX_RING_SIZE); 16089d26e4fcSRobert Mustacchi if ((i40e->i40e_tx_ring_size % I40E_DESC_ALIGN) != 0) { 16099d26e4fcSRobert Mustacchi i40e->i40e_tx_ring_size = P2ROUNDUP(i40e->i40e_tx_ring_size, 16109d26e4fcSRobert Mustacchi I40E_DESC_ALIGN); 16119d26e4fcSRobert Mustacchi } 16129d26e4fcSRobert Mustacchi 16139d26e4fcSRobert Mustacchi i40e->i40e_tx_block_thresh = i40e_get_prop(i40e, "tx_resched_threshold", 16149d26e4fcSRobert Mustacchi I40E_MIN_TX_BLOCK_THRESH, 16159d26e4fcSRobert Mustacchi i40e->i40e_tx_ring_size - I40E_TX_MAX_COOKIE, 16169d26e4fcSRobert Mustacchi I40E_DEF_TX_BLOCK_THRESH); 16179d26e4fcSRobert Mustacchi 161888628b1bSRyan Zezeski i40e->i40e_num_rx_groups = i40e_get_prop(i40e, "rx_num_groups", 161988628b1bSRyan Zezeski I40E_MIN_NUM_RX_GROUPS, I40E_MAX_NUM_RX_GROUPS, 162088628b1bSRyan Zezeski I40E_DEF_NUM_RX_GROUPS); 162188628b1bSRyan Zezeski 16229d26e4fcSRobert Mustacchi i40e->i40e_rx_ring_size = i40e_get_prop(i40e, "rx_ring_size", 16239d26e4fcSRobert Mustacchi I40E_MIN_RX_RING_SIZE, I40E_MAX_RX_RING_SIZE, 16249d26e4fcSRobert Mustacchi I40E_DEF_RX_RING_SIZE); 16259d26e4fcSRobert Mustacchi if ((i40e->i40e_rx_ring_size % I40E_DESC_ALIGN) != 0) { 16269d26e4fcSRobert Mustacchi i40e->i40e_rx_ring_size = P2ROUNDUP(i40e->i40e_rx_ring_size, 16279d26e4fcSRobert Mustacchi I40E_DESC_ALIGN); 16289d26e4fcSRobert Mustacchi } 16299d26e4fcSRobert Mustacchi 16309d26e4fcSRobert Mustacchi i40e->i40e_rx_limit_per_intr = i40e_get_prop(i40e, "rx_limit_per_intr", 16319d26e4fcSRobert Mustacchi I40E_MIN_RX_LIMIT_PER_INTR, I40E_MAX_RX_LIMIT_PER_INTR, 16329d26e4fcSRobert Mustacchi I40E_DEF_RX_LIMIT_PER_INTR); 16339d26e4fcSRobert Mustacchi 16349d26e4fcSRobert Mustacchi i40e->i40e_tx_hcksum_enable = i40e_get_prop(i40e, "tx_hcksum_enable", 16359d26e4fcSRobert Mustacchi B_FALSE, B_TRUE, B_TRUE); 16369d26e4fcSRobert Mustacchi 163709aee612SRyan Zezeski i40e->i40e_tx_lso_enable = i40e_get_prop(i40e, "tx_lso_enable", 163809aee612SRyan Zezeski B_FALSE, B_TRUE, B_TRUE); 163909aee612SRyan Zezeski 16409d26e4fcSRobert Mustacchi i40e->i40e_rx_hcksum_enable = i40e_get_prop(i40e, "rx_hcksum_enable", 16419d26e4fcSRobert Mustacchi B_FALSE, B_TRUE, B_TRUE); 16429d26e4fcSRobert Mustacchi 16439d26e4fcSRobert Mustacchi i40e->i40e_rx_dma_min = i40e_get_prop(i40e, "rx_dma_threshold", 16449d26e4fcSRobert Mustacchi I40E_MIN_RX_DMA_THRESH, I40E_MAX_RX_DMA_THRESH, 16459d26e4fcSRobert Mustacchi I40E_DEF_RX_DMA_THRESH); 16469d26e4fcSRobert Mustacchi 16479d26e4fcSRobert Mustacchi i40e->i40e_tx_dma_min = i40e_get_prop(i40e, "tx_dma_threshold", 16489d26e4fcSRobert Mustacchi I40E_MIN_TX_DMA_THRESH, I40E_MAX_TX_DMA_THRESH, 16499d26e4fcSRobert Mustacchi I40E_DEF_TX_DMA_THRESH); 16509d26e4fcSRobert Mustacchi 16519d26e4fcSRobert Mustacchi i40e->i40e_tx_itr = i40e_get_prop(i40e, "tx_intr_throttle", 16529d26e4fcSRobert Mustacchi I40E_MIN_ITR, I40E_MAX_ITR, I40E_DEF_TX_ITR); 16539d26e4fcSRobert Mustacchi 16549d26e4fcSRobert Mustacchi i40e->i40e_rx_itr = i40e_get_prop(i40e, "rx_intr_throttle", 16559d26e4fcSRobert Mustacchi I40E_MIN_ITR, I40E_MAX_ITR, I40E_DEF_RX_ITR); 16569d26e4fcSRobert Mustacchi 16579d26e4fcSRobert Mustacchi i40e->i40e_other_itr = i40e_get_prop(i40e, "other_intr_throttle", 16589d26e4fcSRobert Mustacchi I40E_MIN_ITR, I40E_MAX_ITR, I40E_DEF_OTHER_ITR); 16599d26e4fcSRobert Mustacchi 16609d26e4fcSRobert Mustacchi if (!i40e->i40e_mr_enable) { 16619d26e4fcSRobert Mustacchi i40e->i40e_num_trqpairs = I40E_TRQPAIR_NOMSIX; 16629d26e4fcSRobert Mustacchi i40e->i40e_num_rx_groups = I40E_GROUP_NOMSIX; 16639d26e4fcSRobert Mustacchi } 16649d26e4fcSRobert Mustacchi 16659d26e4fcSRobert Mustacchi i40e_update_mtu(i40e); 16669d26e4fcSRobert Mustacchi } 16679d26e4fcSRobert Mustacchi 16689d26e4fcSRobert Mustacchi /* 16699d26e4fcSRobert Mustacchi * There are a few constraints on interrupts that we're currently imposing, some 16709d26e4fcSRobert Mustacchi * of which are restrictions from hardware. For a fuller treatment, see 16719d26e4fcSRobert Mustacchi * i40e_intr.c. 16729d26e4fcSRobert Mustacchi * 16739d26e4fcSRobert Mustacchi * Currently, to use MSI-X we require two interrupts be available though in 16749d26e4fcSRobert Mustacchi * theory we should participate in IRM and happily use more interrupts. 16759d26e4fcSRobert Mustacchi * 16769d26e4fcSRobert Mustacchi * Hardware only supports a single MSI being programmed and therefore if we 16779d26e4fcSRobert Mustacchi * don't have MSI-X interrupts available at this time, then we ratchet down the 16789d26e4fcSRobert Mustacchi * number of rings and groups available. Obviously, we only bother with a single 16799d26e4fcSRobert Mustacchi * fixed interrupt. 16809d26e4fcSRobert Mustacchi */ 16819d26e4fcSRobert Mustacchi static boolean_t 16829d26e4fcSRobert Mustacchi i40e_alloc_intr_handles(i40e_t *i40e, dev_info_t *devinfo, int intr_type) 16839d26e4fcSRobert Mustacchi { 1684396505afSPaul Winder i40e_hw_t *hw = &i40e->i40e_hw_space; 1685396505afSPaul Winder ddi_acc_handle_t rh = i40e->i40e_osdep_space.ios_reg_handle; 16869d26e4fcSRobert Mustacchi int request, count, actual, rc, min; 1687396505afSPaul Winder uint32_t reg; 16889d26e4fcSRobert Mustacchi 16899d26e4fcSRobert Mustacchi switch (intr_type) { 16909d26e4fcSRobert Mustacchi case DDI_INTR_TYPE_FIXED: 16919d26e4fcSRobert Mustacchi case DDI_INTR_TYPE_MSI: 16929d26e4fcSRobert Mustacchi request = 1; 16939d26e4fcSRobert Mustacchi min = 1; 16949d26e4fcSRobert Mustacchi break; 16959d26e4fcSRobert Mustacchi case DDI_INTR_TYPE_MSIX: 1696396505afSPaul Winder min = 2; 1697396505afSPaul Winder if (!i40e->i40e_mr_enable) { 1698396505afSPaul Winder request = 2; 1699396505afSPaul Winder break; 1700396505afSPaul Winder } 1701396505afSPaul Winder reg = I40E_READ_REG(hw, I40E_GLPCI_CNF2); 17029d26e4fcSRobert Mustacchi /* 1703396505afSPaul Winder * Should this read fail, we will drop back to using 1704396505afSPaul Winder * MSI or fixed interrupts. 17059d26e4fcSRobert Mustacchi */ 1706396505afSPaul Winder if (i40e_check_acc_handle(rh) != DDI_FM_OK) { 1707396505afSPaul Winder ddi_fm_service_impact(i40e->i40e_dip, 1708396505afSPaul Winder DDI_SERVICE_DEGRADED); 1709396505afSPaul Winder return (B_FALSE); 1710396505afSPaul Winder } 1711396505afSPaul Winder request = (reg & I40E_GLPCI_CNF2_MSI_X_PF_N_MASK) >> 1712396505afSPaul Winder I40E_GLPCI_CNF2_MSI_X_PF_N_SHIFT; 1713396505afSPaul Winder request++; /* the register value is n - 1 */ 17149d26e4fcSRobert Mustacchi break; 17159d26e4fcSRobert Mustacchi default: 17169d26e4fcSRobert Mustacchi panic("bad interrupt type passed to i40e_alloc_intr_handles: " 17179d26e4fcSRobert Mustacchi "%d", intr_type); 17189d26e4fcSRobert Mustacchi } 17199d26e4fcSRobert Mustacchi 17209d26e4fcSRobert Mustacchi rc = ddi_intr_get_nintrs(devinfo, intr_type, &count); 17219d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS || count < min) { 17229d26e4fcSRobert Mustacchi i40e_log(i40e, "Get interrupt number failed, " 17239d26e4fcSRobert Mustacchi "returned %d, count %d", rc, count); 17249d26e4fcSRobert Mustacchi return (B_FALSE); 17259d26e4fcSRobert Mustacchi } 17269d26e4fcSRobert Mustacchi 17279d26e4fcSRobert Mustacchi rc = ddi_intr_get_navail(devinfo, intr_type, &count); 17289d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS || count < min) { 17299d26e4fcSRobert Mustacchi i40e_log(i40e, "Get AVAILABLE interrupt number failed, " 17309d26e4fcSRobert Mustacchi "returned %d, count %d", rc, count); 17319d26e4fcSRobert Mustacchi return (B_FALSE); 17329d26e4fcSRobert Mustacchi } 17339d26e4fcSRobert Mustacchi 17349d26e4fcSRobert Mustacchi actual = 0; 17359d26e4fcSRobert Mustacchi i40e->i40e_intr_count = 0; 17369d26e4fcSRobert Mustacchi i40e->i40e_intr_count_max = 0; 17379d26e4fcSRobert Mustacchi i40e->i40e_intr_count_min = 0; 17389d26e4fcSRobert Mustacchi 17399d26e4fcSRobert Mustacchi i40e->i40e_intr_size = request * sizeof (ddi_intr_handle_t); 17409d26e4fcSRobert Mustacchi ASSERT(i40e->i40e_intr_size != 0); 17419d26e4fcSRobert Mustacchi i40e->i40e_intr_handles = kmem_alloc(i40e->i40e_intr_size, KM_SLEEP); 17429d26e4fcSRobert Mustacchi 17439d26e4fcSRobert Mustacchi rc = ddi_intr_alloc(devinfo, i40e->i40e_intr_handles, intr_type, 0, 17449d26e4fcSRobert Mustacchi min(request, count), &actual, DDI_INTR_ALLOC_NORMAL); 17459d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 17469d26e4fcSRobert Mustacchi i40e_log(i40e, "Interrupt allocation failed with %d.", rc); 17479d26e4fcSRobert Mustacchi goto alloc_handle_fail; 17489d26e4fcSRobert Mustacchi } 17499d26e4fcSRobert Mustacchi 17509d26e4fcSRobert Mustacchi i40e->i40e_intr_count = actual; 17519d26e4fcSRobert Mustacchi i40e->i40e_intr_count_max = request; 17529d26e4fcSRobert Mustacchi i40e->i40e_intr_count_min = min; 17539d26e4fcSRobert Mustacchi 17549d26e4fcSRobert Mustacchi if (actual < min) { 17559d26e4fcSRobert Mustacchi i40e_log(i40e, "actual (%d) is less than minimum (%d).", 17569d26e4fcSRobert Mustacchi actual, min); 17579d26e4fcSRobert Mustacchi goto alloc_handle_fail; 17589d26e4fcSRobert Mustacchi } 17599d26e4fcSRobert Mustacchi 17609d26e4fcSRobert Mustacchi /* 17619d26e4fcSRobert Mustacchi * Record the priority and capabilities for our first vector. Once 17629d26e4fcSRobert Mustacchi * we have it, that's our priority until detach time. Even if we 17639d26e4fcSRobert Mustacchi * eventually participate in IRM, our priority shouldn't change. 17649d26e4fcSRobert Mustacchi */ 17659d26e4fcSRobert Mustacchi rc = ddi_intr_get_pri(i40e->i40e_intr_handles[0], &i40e->i40e_intr_pri); 17669d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 17679d26e4fcSRobert Mustacchi i40e_log(i40e, 17689d26e4fcSRobert Mustacchi "Getting interrupt priority failed with %d.", rc); 17699d26e4fcSRobert Mustacchi goto alloc_handle_fail; 17709d26e4fcSRobert Mustacchi } 17719d26e4fcSRobert Mustacchi 17729d26e4fcSRobert Mustacchi rc = ddi_intr_get_cap(i40e->i40e_intr_handles[0], &i40e->i40e_intr_cap); 17739d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 17749d26e4fcSRobert Mustacchi i40e_log(i40e, 17759d26e4fcSRobert Mustacchi "Getting interrupt capabilities failed with %d.", rc); 17769d26e4fcSRobert Mustacchi goto alloc_handle_fail; 17779d26e4fcSRobert Mustacchi } 17789d26e4fcSRobert Mustacchi 17799d26e4fcSRobert Mustacchi i40e->i40e_intr_type = intr_type; 17809d26e4fcSRobert Mustacchi return (B_TRUE); 17819d26e4fcSRobert Mustacchi 17829d26e4fcSRobert Mustacchi alloc_handle_fail: 17839d26e4fcSRobert Mustacchi 17849d26e4fcSRobert Mustacchi i40e_rem_intrs(i40e); 17859d26e4fcSRobert Mustacchi return (B_FALSE); 17869d26e4fcSRobert Mustacchi } 17879d26e4fcSRobert Mustacchi 17889d26e4fcSRobert Mustacchi static boolean_t 17899d26e4fcSRobert Mustacchi i40e_alloc_intrs(i40e_t *i40e, dev_info_t *devinfo) 17909d26e4fcSRobert Mustacchi { 1791234a3cfbSPaul Winder i40e_hw_t *hw = &i40e->i40e_hw_space; 17929d26e4fcSRobert Mustacchi int intr_types, rc; 1793b9d34b9dSRobert Mustacchi uint_t max_trqpairs; 1794b9d34b9dSRobert Mustacchi 1795b9d34b9dSRobert Mustacchi if (i40e_is_x722(i40e)) { 1796b9d34b9dSRobert Mustacchi max_trqpairs = I40E_722_MAX_TC_QUEUES; 1797b9d34b9dSRobert Mustacchi } else { 1798b9d34b9dSRobert Mustacchi max_trqpairs = I40E_710_MAX_TC_QUEUES; 1799b9d34b9dSRobert Mustacchi } 18009d26e4fcSRobert Mustacchi 18019d26e4fcSRobert Mustacchi rc = ddi_intr_get_supported_types(devinfo, &intr_types); 18029d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 18039d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to get supported interrupt types: %d", 18049d26e4fcSRobert Mustacchi rc); 18059d26e4fcSRobert Mustacchi return (B_FALSE); 18069d26e4fcSRobert Mustacchi } 18079d26e4fcSRobert Mustacchi 18089d26e4fcSRobert Mustacchi i40e->i40e_intr_type = 0; 18099d26e4fcSRobert Mustacchi 181009aee612SRyan Zezeski /* 181109aee612SRyan Zezeski * We need to determine the number of queue pairs per traffic 181209aee612SRyan Zezeski * class. We only have one traffic class (TC0), so we'll base 181309aee612SRyan Zezeski * this off the number of interrupts provided. Furthermore, 181409aee612SRyan Zezeski * since we only use one traffic class, the number of queues 181509aee612SRyan Zezeski * per traffic class and per VSI are the same. 181609aee612SRyan Zezeski */ 18179d26e4fcSRobert Mustacchi if ((intr_types & DDI_INTR_TYPE_MSIX) && 181809aee612SRyan Zezeski (i40e->i40e_intr_force <= I40E_INTR_MSIX) && 181909aee612SRyan Zezeski (i40e_alloc_intr_handles(i40e, devinfo, DDI_INTR_TYPE_MSIX))) { 1820234a3cfbSPaul Winder uint32_t n, qp_cap, num_trqpairs; 182109aee612SRyan Zezeski 182209aee612SRyan Zezeski /* 182309aee612SRyan Zezeski * While we want the number of queue pairs to match 182409aee612SRyan Zezeski * the number of interrupts, we must keep stay in 182509aee612SRyan Zezeski * bounds of the maximum number of queues per traffic 182609aee612SRyan Zezeski * class. We subtract one from i40e_intr_count to 182709aee612SRyan Zezeski * account for interrupt zero; which is currently 182809aee612SRyan Zezeski * restricted to admin queue commands and other 182909aee612SRyan Zezeski * interrupt causes. 183009aee612SRyan Zezeski */ 183109aee612SRyan Zezeski n = MIN(i40e->i40e_intr_count - 1, max_trqpairs); 183209aee612SRyan Zezeski ASSERT3U(n, >, 0); 183309aee612SRyan Zezeski 183409aee612SRyan Zezeski /* 183509aee612SRyan Zezeski * Round up to the nearest power of two to ensure that 183609aee612SRyan Zezeski * the QBASE aligns with the TC size which must be 183709aee612SRyan Zezeski * programmed as a power of two. See the queue mapping 183809aee612SRyan Zezeski * description in section 7.4.9.5.5.1. 183909aee612SRyan Zezeski * 184009aee612SRyan Zezeski * If i40e_intr_count - 1 is not a power of two then 184109aee612SRyan Zezeski * some queue pairs on the same VSI will have to share 184209aee612SRyan Zezeski * an interrupt. 184309aee612SRyan Zezeski * 184409aee612SRyan Zezeski * We may want to revisit this logic in a future where 184509aee612SRyan Zezeski * we have more interrupts and more VSIs. Otherwise, 184609aee612SRyan Zezeski * each VSI will use as many interrupts as possible. 184709aee612SRyan Zezeski * Using more QPs per VSI means better RSS for each 184809aee612SRyan Zezeski * group, but at the same time may require more 184909aee612SRyan Zezeski * sharing of interrupts across VSIs. This may be a 185009aee612SRyan Zezeski * good candidate for a .conf tunable. 185109aee612SRyan Zezeski */ 185209aee612SRyan Zezeski n = 0x1 << ddi_fls(n); 185309aee612SRyan Zezeski i40e->i40e_num_trqpairs_per_vsi = n; 1854234a3cfbSPaul Winder 1855234a3cfbSPaul Winder /* 1856234a3cfbSPaul Winder * Make sure the number of tx/rx qpairs does not exceed 1857234a3cfbSPaul Winder * the device's capabilities. 1858234a3cfbSPaul Winder */ 185909aee612SRyan Zezeski ASSERT3U(i40e->i40e_num_rx_groups, >, 0); 1860234a3cfbSPaul Winder qp_cap = MIN(hw->func_caps.num_rx_qp, hw->func_caps.num_tx_qp); 1861234a3cfbSPaul Winder num_trqpairs = i40e->i40e_num_trqpairs_per_vsi * 186209aee612SRyan Zezeski i40e->i40e_num_rx_groups; 1863234a3cfbSPaul Winder if (num_trqpairs > qp_cap) { 1864234a3cfbSPaul Winder i40e->i40e_num_rx_groups = MAX(1, qp_cap / 1865234a3cfbSPaul Winder i40e->i40e_num_trqpairs_per_vsi); 1866234a3cfbSPaul Winder num_trqpairs = i40e->i40e_num_trqpairs_per_vsi * 1867234a3cfbSPaul Winder i40e->i40e_num_rx_groups; 1868234a3cfbSPaul Winder i40e_log(i40e, "Rx groups restricted to %u", 1869234a3cfbSPaul Winder i40e->i40e_num_rx_groups); 1870234a3cfbSPaul Winder } 1871234a3cfbSPaul Winder ASSERT3U(num_trqpairs, >, 0); 1872234a3cfbSPaul Winder i40e->i40e_num_trqpairs = num_trqpairs; 187309aee612SRyan Zezeski return (B_TRUE); 18749d26e4fcSRobert Mustacchi } 18759d26e4fcSRobert Mustacchi 18769d26e4fcSRobert Mustacchi /* 18779d26e4fcSRobert Mustacchi * We only use multiple transmit/receive pairs when MSI-X interrupts are 18789d26e4fcSRobert Mustacchi * available due to the fact that the device basically only supports a 18799d26e4fcSRobert Mustacchi * single MSI interrupt. 18809d26e4fcSRobert Mustacchi */ 18819d26e4fcSRobert Mustacchi i40e->i40e_num_trqpairs = I40E_TRQPAIR_NOMSIX; 188209aee612SRyan Zezeski i40e->i40e_num_trqpairs_per_vsi = i40e->i40e_num_trqpairs; 18839d26e4fcSRobert Mustacchi i40e->i40e_num_rx_groups = I40E_GROUP_NOMSIX; 18849d26e4fcSRobert Mustacchi 18859d26e4fcSRobert Mustacchi if ((intr_types & DDI_INTR_TYPE_MSI) && 18869d26e4fcSRobert Mustacchi (i40e->i40e_intr_force <= I40E_INTR_MSI)) { 18879d26e4fcSRobert Mustacchi if (i40e_alloc_intr_handles(i40e, devinfo, DDI_INTR_TYPE_MSI)) 18889d26e4fcSRobert Mustacchi return (B_TRUE); 18899d26e4fcSRobert Mustacchi } 18909d26e4fcSRobert Mustacchi 18919d26e4fcSRobert Mustacchi if (intr_types & DDI_INTR_TYPE_FIXED) { 18929d26e4fcSRobert Mustacchi if (i40e_alloc_intr_handles(i40e, devinfo, DDI_INTR_TYPE_FIXED)) 18939d26e4fcSRobert Mustacchi return (B_TRUE); 18949d26e4fcSRobert Mustacchi } 18959d26e4fcSRobert Mustacchi 18969d26e4fcSRobert Mustacchi return (B_FALSE); 18979d26e4fcSRobert Mustacchi } 18989d26e4fcSRobert Mustacchi 18999d26e4fcSRobert Mustacchi /* 19009d26e4fcSRobert Mustacchi * Map different interrupts to MSI-X vectors. 19019d26e4fcSRobert Mustacchi */ 19029d26e4fcSRobert Mustacchi static boolean_t 19039d26e4fcSRobert Mustacchi i40e_map_intrs_to_vectors(i40e_t *i40e) 19049d26e4fcSRobert Mustacchi { 19059d26e4fcSRobert Mustacchi if (i40e->i40e_intr_type != DDI_INTR_TYPE_MSIX) { 19069d26e4fcSRobert Mustacchi return (B_TRUE); 19079d26e4fcSRobert Mustacchi } 19089d26e4fcSRobert Mustacchi 19099d26e4fcSRobert Mustacchi /* 191009aee612SRyan Zezeski * Each queue pair is mapped to a single interrupt, so 191109aee612SRyan Zezeski * transmit and receive interrupts for a given queue share the 191209aee612SRyan Zezeski * same vector. Vector zero is reserved for the admin queue. 19139d26e4fcSRobert Mustacchi */ 191409aee612SRyan Zezeski for (uint_t i = 0; i < i40e->i40e_num_trqpairs; i++) { 191509aee612SRyan Zezeski uint_t vector = i % (i40e->i40e_intr_count - 1); 19169d26e4fcSRobert Mustacchi 191709aee612SRyan Zezeski i40e->i40e_trqpairs[i].itrq_rx_intrvec = vector + 1; 191809aee612SRyan Zezeski i40e->i40e_trqpairs[i].itrq_tx_intrvec = vector + 1; 1919396505afSPaul Winder } 19209d26e4fcSRobert Mustacchi 19219d26e4fcSRobert Mustacchi return (B_TRUE); 19229d26e4fcSRobert Mustacchi } 19239d26e4fcSRobert Mustacchi 19249d26e4fcSRobert Mustacchi static boolean_t 19259d26e4fcSRobert Mustacchi i40e_add_intr_handlers(i40e_t *i40e) 19269d26e4fcSRobert Mustacchi { 19279d26e4fcSRobert Mustacchi int rc, vector; 19289d26e4fcSRobert Mustacchi 19299d26e4fcSRobert Mustacchi switch (i40e->i40e_intr_type) { 19309d26e4fcSRobert Mustacchi case DDI_INTR_TYPE_MSIX: 19319d26e4fcSRobert Mustacchi for (vector = 0; vector < i40e->i40e_intr_count; vector++) { 19329d26e4fcSRobert Mustacchi rc = ddi_intr_add_handler( 19339d26e4fcSRobert Mustacchi i40e->i40e_intr_handles[vector], 19349d26e4fcSRobert Mustacchi (ddi_intr_handler_t *)i40e_intr_msix, i40e, 19359d26e4fcSRobert Mustacchi (void *)(uintptr_t)vector); 19369d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 19379d26e4fcSRobert Mustacchi i40e_log(i40e, "Add interrupt handler (MSI-X) " 19389d26e4fcSRobert Mustacchi "failed: return %d, vector %d", rc, vector); 19399d26e4fcSRobert Mustacchi for (vector--; vector >= 0; vector--) { 19409d26e4fcSRobert Mustacchi (void) ddi_intr_remove_handler( 19419d26e4fcSRobert Mustacchi i40e->i40e_intr_handles[vector]); 19429d26e4fcSRobert Mustacchi } 19439d26e4fcSRobert Mustacchi return (B_FALSE); 19449d26e4fcSRobert Mustacchi } 19459d26e4fcSRobert Mustacchi } 19469d26e4fcSRobert Mustacchi break; 19479d26e4fcSRobert Mustacchi case DDI_INTR_TYPE_MSI: 19489d26e4fcSRobert Mustacchi rc = ddi_intr_add_handler(i40e->i40e_intr_handles[0], 19499d26e4fcSRobert Mustacchi (ddi_intr_handler_t *)i40e_intr_msi, i40e, NULL); 19509d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 19519d26e4fcSRobert Mustacchi i40e_log(i40e, "Add interrupt handler (MSI) failed: " 19529d26e4fcSRobert Mustacchi "return %d", rc); 19539d26e4fcSRobert Mustacchi return (B_FALSE); 19549d26e4fcSRobert Mustacchi } 19559d26e4fcSRobert Mustacchi break; 19569d26e4fcSRobert Mustacchi case DDI_INTR_TYPE_FIXED: 19579d26e4fcSRobert Mustacchi rc = ddi_intr_add_handler(i40e->i40e_intr_handles[0], 19589d26e4fcSRobert Mustacchi (ddi_intr_handler_t *)i40e_intr_legacy, i40e, NULL); 19599d26e4fcSRobert Mustacchi if (rc != DDI_SUCCESS) { 19609d26e4fcSRobert Mustacchi i40e_log(i40e, "Add interrupt handler (legacy) failed:" 19619d26e4fcSRobert Mustacchi " return %d", rc); 19629d26e4fcSRobert Mustacchi return (B_FALSE); 19639d26e4fcSRobert Mustacchi } 19649d26e4fcSRobert Mustacchi break; 19659d26e4fcSRobert Mustacchi default: 19669d26e4fcSRobert Mustacchi /* Cast to pacify lint */ 19679d26e4fcSRobert Mustacchi panic("i40e_intr_type %p contains an unknown type: %d", 19689d26e4fcSRobert Mustacchi (void *)i40e, i40e->i40e_intr_type); 19699d26e4fcSRobert Mustacchi } 19709d26e4fcSRobert Mustacchi 19719d26e4fcSRobert Mustacchi return (B_TRUE); 19729d26e4fcSRobert Mustacchi } 19739d26e4fcSRobert Mustacchi 19749d26e4fcSRobert Mustacchi /* 19759d26e4fcSRobert Mustacchi * Perform periodic checks. Longer term, we should be thinking about additional 19769d26e4fcSRobert Mustacchi * things here: 19779d26e4fcSRobert Mustacchi * 19789d26e4fcSRobert Mustacchi * o Stall Detection 19799d26e4fcSRobert Mustacchi * o Temperature sensor detection 19809d26e4fcSRobert Mustacchi * o Device resetting 19819d26e4fcSRobert Mustacchi * o Statistics updating to avoid wraparound 19829d26e4fcSRobert Mustacchi */ 19839d26e4fcSRobert Mustacchi static void 19849d26e4fcSRobert Mustacchi i40e_timer(void *arg) 19859d26e4fcSRobert Mustacchi { 19869d26e4fcSRobert Mustacchi i40e_t *i40e = arg; 19879d26e4fcSRobert Mustacchi 19889d26e4fcSRobert Mustacchi mutex_enter(&i40e->i40e_general_lock); 19899d26e4fcSRobert Mustacchi i40e_link_check(i40e); 19909d26e4fcSRobert Mustacchi mutex_exit(&i40e->i40e_general_lock); 19919d26e4fcSRobert Mustacchi } 19929d26e4fcSRobert Mustacchi 19939d26e4fcSRobert Mustacchi /* 19949d26e4fcSRobert Mustacchi * Get the hardware state, and scribble away anything that needs scribbling. 19959d26e4fcSRobert Mustacchi */ 19969d26e4fcSRobert Mustacchi static void 19979d26e4fcSRobert Mustacchi i40e_get_hw_state(i40e_t *i40e, i40e_hw_t *hw) 19989d26e4fcSRobert Mustacchi { 19999d26e4fcSRobert Mustacchi int rc; 20009d26e4fcSRobert Mustacchi 20019d26e4fcSRobert Mustacchi ASSERT(MUTEX_HELD(&i40e->i40e_general_lock)); 20029d26e4fcSRobert Mustacchi 20039d26e4fcSRobert Mustacchi (void) i40e_aq_get_link_info(hw, TRUE, NULL, NULL); 20049d26e4fcSRobert Mustacchi i40e_link_check(i40e); 20059d26e4fcSRobert Mustacchi 20069d26e4fcSRobert Mustacchi /* 20079d26e4fcSRobert Mustacchi * Try and determine our PHY. Note that we may have to retry to and 20089d26e4fcSRobert Mustacchi * delay to detect fiber correctly. 20099d26e4fcSRobert Mustacchi */ 20109d26e4fcSRobert Mustacchi rc = i40e_aq_get_phy_capabilities(hw, B_FALSE, B_TRUE, &i40e->i40e_phy, 20119d26e4fcSRobert Mustacchi NULL); 20129d26e4fcSRobert Mustacchi if (rc == I40E_ERR_UNKNOWN_PHY) { 20139d26e4fcSRobert Mustacchi i40e_msec_delay(200); 20149d26e4fcSRobert Mustacchi rc = i40e_aq_get_phy_capabilities(hw, B_FALSE, B_TRUE, 20159d26e4fcSRobert Mustacchi &i40e->i40e_phy, NULL); 20169d26e4fcSRobert Mustacchi } 20179d26e4fcSRobert Mustacchi 20189d26e4fcSRobert Mustacchi if (rc != I40E_SUCCESS) { 20199d26e4fcSRobert Mustacchi if (rc == I40E_ERR_UNKNOWN_PHY) { 20209d26e4fcSRobert Mustacchi i40e_error(i40e, "encountered unknown PHY type, " 20219d26e4fcSRobert Mustacchi "not attaching."); 20229d26e4fcSRobert Mustacchi } else { 20239d26e4fcSRobert Mustacchi i40e_error(i40e, "error getting physical capabilities: " 20249d26e4fcSRobert Mustacchi "%d, %d", rc, hw->aq.asq_last_status); 20259d26e4fcSRobert Mustacchi } 20269d26e4fcSRobert Mustacchi } 20279d26e4fcSRobert Mustacchi 20289d26e4fcSRobert Mustacchi rc = i40e_update_link_info(hw); 20299d26e4fcSRobert Mustacchi if (rc != I40E_SUCCESS) { 20309d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to update link information: %d", rc); 20319d26e4fcSRobert Mustacchi } 20329d26e4fcSRobert Mustacchi 20339d26e4fcSRobert Mustacchi /* 20349d26e4fcSRobert Mustacchi * In general, we don't want to mask off (as in stop from being a cause) 20359d26e4fcSRobert Mustacchi * any of the interrupts that the phy might be able to generate. 20369d26e4fcSRobert Mustacchi */ 20379d26e4fcSRobert Mustacchi rc = i40e_aq_set_phy_int_mask(hw, 0, NULL); 20389d26e4fcSRobert Mustacchi if (rc != I40E_SUCCESS) { 20399d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to update phy link mask: %d", rc); 20409d26e4fcSRobert Mustacchi } 20419d26e4fcSRobert Mustacchi } 20429d26e4fcSRobert Mustacchi 20439d26e4fcSRobert Mustacchi /* 20449d26e4fcSRobert Mustacchi * Go through and re-initialize any existing filters that we may have set up for 20459d26e4fcSRobert Mustacchi * this device. Note that we would only expect them to exist if hardware had 20469d26e4fcSRobert Mustacchi * already been initialized and we had just reset it. While we're not 20479d26e4fcSRobert Mustacchi * implementing this yet, we're keeping this around for when we add reset 20489d26e4fcSRobert Mustacchi * capabilities, so this isn't forgotten. 20499d26e4fcSRobert Mustacchi */ 20509d26e4fcSRobert Mustacchi /* ARGSUSED */ 20519d26e4fcSRobert Mustacchi static void 20529d26e4fcSRobert Mustacchi i40e_init_macaddrs(i40e_t *i40e, i40e_hw_t *hw) 20539d26e4fcSRobert Mustacchi { 20549d26e4fcSRobert Mustacchi } 20559d26e4fcSRobert Mustacchi 20569d26e4fcSRobert Mustacchi /* 205709aee612SRyan Zezeski * Set the properties which have common values across all the VSIs. 205809aee612SRyan Zezeski * Consult the "Add VSI" command section (7.4.9.5.5.1) for a 205909aee612SRyan Zezeski * complete description of these properties. 20609d26e4fcSRobert Mustacchi */ 206109aee612SRyan Zezeski static void 206209aee612SRyan Zezeski i40e_set_shared_vsi_props(i40e_t *i40e, 206309aee612SRyan Zezeski struct i40e_aqc_vsi_properties_data *info, uint_t vsi_idx) 20649d26e4fcSRobert Mustacchi { 206509aee612SRyan Zezeski uint_t tc_queues; 206609aee612SRyan Zezeski uint16_t vsi_qp_base; 20679d26e4fcSRobert Mustacchi 206809aee612SRyan Zezeski /* 206909aee612SRyan Zezeski * It's important that we use bitwise-OR here; callers to this 207009aee612SRyan Zezeski * function might enable other sections before calling this 207109aee612SRyan Zezeski * function. 207209aee612SRyan Zezeski */ 207309aee612SRyan Zezeski info->valid_sections |= LE_16(I40E_AQ_VSI_PROP_QUEUE_MAP_VALID | 207409aee612SRyan Zezeski I40E_AQ_VSI_PROP_VLAN_VALID); 2075396505afSPaul Winder 20769d26e4fcSRobert Mustacchi /* 207709aee612SRyan Zezeski * Calculate the starting QP index for this VSI. This base is 207809aee612SRyan Zezeski * relative to the PF queue space; so a value of 0 for PF#1 207909aee612SRyan Zezeski * represents the absolute index PFLAN_QALLOC_FIRSTQ for PF#1. 20809d26e4fcSRobert Mustacchi */ 208109aee612SRyan Zezeski vsi_qp_base = vsi_idx * i40e->i40e_num_trqpairs_per_vsi; 208209aee612SRyan Zezeski info->mapping_flags = LE_16(I40E_AQ_VSI_QUE_MAP_CONTIG); 208309aee612SRyan Zezeski info->queue_mapping[0] = 208409aee612SRyan Zezeski LE_16((vsi_qp_base << I40E_AQ_VSI_QUEUE_SHIFT) & 2085508a0e8cSRob Johnston I40E_AQ_VSI_QUEUE_MASK); 2086396505afSPaul Winder 2087396505afSPaul Winder /* 208809aee612SRyan Zezeski * tc_queues determines the size of the traffic class, where 208909aee612SRyan Zezeski * the size is 2^^tc_queues to a maximum of 64 for the X710 209009aee612SRyan Zezeski * and 128 for the X722. 2091b9d34b9dSRobert Mustacchi * 2092396505afSPaul Winder * Some examples: 2093508a0e8cSRob Johnston * i40e_num_trqpairs_per_vsi == 1 => tc_queues = 0, 2^^0 = 1. 2094508a0e8cSRob Johnston * i40e_num_trqpairs_per_vsi == 7 => tc_queues = 3, 2^^3 = 8. 2095508a0e8cSRob Johnston * i40e_num_trqpairs_per_vsi == 8 => tc_queues = 3, 2^^3 = 8. 2096508a0e8cSRob Johnston * i40e_num_trqpairs_per_vsi == 9 => tc_queues = 4, 2^^4 = 16. 2097508a0e8cSRob Johnston * i40e_num_trqpairs_per_vsi == 17 => tc_queues = 5, 2^^5 = 32. 2098508a0e8cSRob Johnston * i40e_num_trqpairs_per_vsi == 64 => tc_queues = 6, 2^^6 = 64. 2099396505afSPaul Winder */ 210009aee612SRyan Zezeski tc_queues = ddi_fls(i40e->i40e_num_trqpairs_per_vsi - 1); 2101396505afSPaul Winder 210209aee612SRyan Zezeski /* 210309aee612SRyan Zezeski * The TC queue mapping is in relation to the VSI queue space. 210409aee612SRyan Zezeski * Since we are only using one traffic class (TC0) we always 210509aee612SRyan Zezeski * start at queue offset 0. 210609aee612SRyan Zezeski */ 210709aee612SRyan Zezeski info->tc_mapping[0] = 210809aee612SRyan Zezeski LE_16(((0 << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) & 2109508a0e8cSRob Johnston I40E_AQ_VSI_TC_QUE_OFFSET_MASK) | 2110508a0e8cSRob Johnston ((tc_queues << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT) & 2111508a0e8cSRob Johnston I40E_AQ_VSI_TC_QUE_NUMBER_MASK)); 21129d26e4fcSRobert Mustacchi 211309aee612SRyan Zezeski /* 211409aee612SRyan Zezeski * I40E_AQ_VSI_PVLAN_MODE_ALL ("VLAN driver insertion mode") 211509aee612SRyan Zezeski * 211609aee612SRyan Zezeski * Allow tagged and untagged packets to be sent to this 211709aee612SRyan Zezeski * VSI from the host. 211809aee612SRyan Zezeski * 211909aee612SRyan Zezeski * I40E_AQ_VSI_PVLAN_EMOD_NOTHING ("VLAN and UP expose mode") 212009aee612SRyan Zezeski * 212109aee612SRyan Zezeski * Leave the tag on the frame and place no VLAN 212209aee612SRyan Zezeski * information in the descriptor. We want this mode 212309aee612SRyan Zezeski * because our MAC layer will take care of the VLAN tag, 212409aee612SRyan Zezeski * if there is one. 212509aee612SRyan Zezeski */ 212609aee612SRyan Zezeski info->port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | 21279d26e4fcSRobert Mustacchi I40E_AQ_VSI_PVLAN_EMOD_NOTHING; 212809aee612SRyan Zezeski } 21299d26e4fcSRobert Mustacchi 213009aee612SRyan Zezeski /* 213109aee612SRyan Zezeski * Delete the VSI at this index, if one exists. We assume there is no 213209aee612SRyan Zezeski * action we can take if this command fails but to log the failure. 213309aee612SRyan Zezeski */ 213409aee612SRyan Zezeski static void 213509aee612SRyan Zezeski i40e_delete_vsi(i40e_t *i40e, uint_t idx) 213609aee612SRyan Zezeski { 213709aee612SRyan Zezeski i40e_hw_t *hw = &i40e->i40e_hw_space; 213809aee612SRyan Zezeski uint16_t seid = i40e->i40e_vsis[idx].iv_seid; 21399d26e4fcSRobert Mustacchi 214009aee612SRyan Zezeski if (seid != 0) { 214109aee612SRyan Zezeski int rc; 21429d26e4fcSRobert Mustacchi 214309aee612SRyan Zezeski rc = i40e_aq_delete_element(hw, seid, NULL); 214409aee612SRyan Zezeski 214509aee612SRyan Zezeski if (rc != I40E_SUCCESS) { 214609aee612SRyan Zezeski i40e_error(i40e, "Failed to delete VSI %d: %d", 214709aee612SRyan Zezeski rc, hw->aq.asq_last_status); 214809aee612SRyan Zezeski } 214909aee612SRyan Zezeski 215009aee612SRyan Zezeski i40e->i40e_vsis[idx].iv_seid = 0; 215109aee612SRyan Zezeski } 215209aee612SRyan Zezeski } 215309aee612SRyan Zezeski 215409aee612SRyan Zezeski /* 215509aee612SRyan Zezeski * Add a new VSI. 215609aee612SRyan Zezeski */ 215709aee612SRyan Zezeski static boolean_t 215809aee612SRyan Zezeski i40e_add_vsi(i40e_t *i40e, i40e_hw_t *hw, uint_t idx) 215909aee612SRyan Zezeski { 216009aee612SRyan Zezeski struct i40e_vsi_context ctx; 216109aee612SRyan Zezeski i40e_rx_group_t *rxg; 216209aee612SRyan Zezeski int rc; 216309aee612SRyan Zezeski 216409aee612SRyan Zezeski /* 216509aee612SRyan Zezeski * The default VSI is created by the controller. This function 216609aee612SRyan Zezeski * creates new, non-defualt VSIs only. 216709aee612SRyan Zezeski */ 216809aee612SRyan Zezeski ASSERT3U(idx, !=, 0); 216909aee612SRyan Zezeski 217009aee612SRyan Zezeski bzero(&ctx, sizeof (struct i40e_vsi_context)); 217109aee612SRyan Zezeski ctx.uplink_seid = i40e->i40e_veb_seid; 217209aee612SRyan Zezeski ctx.pf_num = hw->pf_id; 217309aee612SRyan Zezeski ctx.flags = I40E_AQ_VSI_TYPE_PF; 217409aee612SRyan Zezeski ctx.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL; 217509aee612SRyan Zezeski i40e_set_shared_vsi_props(i40e, &ctx.info, idx); 217609aee612SRyan Zezeski 217709aee612SRyan Zezeski rc = i40e_aq_add_vsi(hw, &ctx, NULL); 217809aee612SRyan Zezeski if (rc != I40E_SUCCESS) { 217909aee612SRyan Zezeski i40e_error(i40e, "i40e_aq_add_vsi() failed %d: %d", rc, 218009aee612SRyan Zezeski hw->aq.asq_last_status); 21819d26e4fcSRobert Mustacchi return (B_FALSE); 21829d26e4fcSRobert Mustacchi } 21839d26e4fcSRobert Mustacchi 218409aee612SRyan Zezeski rxg = &i40e->i40e_rx_groups[idx]; 218509aee612SRyan Zezeski rxg->irg_vsi_seid = ctx.seid; 218609aee612SRyan Zezeski i40e->i40e_vsis[idx].iv_number = ctx.vsi_number; 218709aee612SRyan Zezeski i40e->i40e_vsis[idx].iv_seid = ctx.seid; 218809aee612SRyan Zezeski i40e->i40e_vsis[idx].iv_stats_id = LE_16(ctx.info.stat_counter_idx); 218909aee612SRyan Zezeski 219009aee612SRyan Zezeski if (i40e_stat_vsi_init(i40e, idx) == B_FALSE) 219109aee612SRyan Zezeski return (B_FALSE); 21929d26e4fcSRobert Mustacchi 21939d26e4fcSRobert Mustacchi return (B_TRUE); 21949d26e4fcSRobert Mustacchi } 21959d26e4fcSRobert Mustacchi 2196b9d34b9dSRobert Mustacchi /* 219709aee612SRyan Zezeski * Configure the hardware for the Default Virtual Station Interface (VSI). 2198b9d34b9dSRobert Mustacchi */ 2199b9d34b9dSRobert Mustacchi static boolean_t 220009aee612SRyan Zezeski i40e_config_def_vsi(i40e_t *i40e, i40e_hw_t *hw) 2201b9d34b9dSRobert Mustacchi { 220209aee612SRyan Zezeski struct i40e_vsi_context ctx; 220309aee612SRyan Zezeski i40e_rx_group_t *def_rxg; 220409aee612SRyan Zezeski int err; 220509aee612SRyan Zezeski struct i40e_aqc_remove_macvlan_element_data filt; 2206b9d34b9dSRobert Mustacchi 220709aee612SRyan Zezeski bzero(&ctx, sizeof (struct i40e_vsi_context)); 220809aee612SRyan Zezeski ctx.seid = I40E_DEF_VSI_SEID(i40e); 220909aee612SRyan Zezeski ctx.pf_num = hw->pf_id; 221009aee612SRyan Zezeski err = i40e_aq_get_vsi_params(hw, &ctx, NULL); 221109aee612SRyan Zezeski if (err != I40E_SUCCESS) { 221209aee612SRyan Zezeski i40e_error(i40e, "get VSI params failed with %d", err); 221309aee612SRyan Zezeski return (B_FALSE); 221409aee612SRyan Zezeski } 2215b9d34b9dSRobert Mustacchi 221609aee612SRyan Zezeski ctx.info.valid_sections = 0; 221709aee612SRyan Zezeski i40e->i40e_vsis[0].iv_number = ctx.vsi_number; 221809aee612SRyan Zezeski i40e->i40e_vsis[0].iv_stats_id = LE_16(ctx.info.stat_counter_idx); 221909aee612SRyan Zezeski if (i40e_stat_vsi_init(i40e, 0) == B_FALSE) 222009aee612SRyan Zezeski return (B_FALSE); 222109aee612SRyan Zezeski 222209aee612SRyan Zezeski i40e_set_shared_vsi_props(i40e, &ctx.info, I40E_DEF_VSI_IDX); 222309aee612SRyan Zezeski 222409aee612SRyan Zezeski err = i40e_aq_update_vsi_params(hw, &ctx, NULL); 222509aee612SRyan Zezeski if (err != I40E_SUCCESS) { 222609aee612SRyan Zezeski i40e_error(i40e, "Update VSI params failed with %d", err); 222709aee612SRyan Zezeski return (B_FALSE); 222809aee612SRyan Zezeski } 222909aee612SRyan Zezeski 223009aee612SRyan Zezeski def_rxg = &i40e->i40e_rx_groups[0]; 223109aee612SRyan Zezeski def_rxg->irg_vsi_seid = I40E_DEF_VSI_SEID(i40e); 223209aee612SRyan Zezeski 223309aee612SRyan Zezeski /* 223435c41becSRyan Zezeski * We have seen three different behaviors in regards to the 223535c41becSRyan Zezeski * Default VSI and its implicit L2 MAC+VLAN filter. 223635c41becSRyan Zezeski * 223735c41becSRyan Zezeski * 1. It has an implicit filter for the factory MAC address 223835c41becSRyan Zezeski * and this filter counts against 'ifr_nmacfilt_used'. 223935c41becSRyan Zezeski * 224035c41becSRyan Zezeski * 2. It has an implicit filter for the factory MAC address 224135c41becSRyan Zezeski * and this filter DOES NOT count against 'ifr_nmacfilt_used'. 224235c41becSRyan Zezeski * 224335c41becSRyan Zezeski * 3. It DOES NOT have an implicit filter. 224435c41becSRyan Zezeski * 224535c41becSRyan Zezeski * All three of these cases are accounted for below. If we 224635c41becSRyan Zezeski * fail to remove the L2 filter (ENOENT) then we assume there 224735c41becSRyan Zezeski * wasn't one. Otherwise, if we successfully remove the 224835c41becSRyan Zezeski * filter, we make sure to update the 'ifr_nmacfilt_used' 224935c41becSRyan Zezeski * count accordingly. 225035c41becSRyan Zezeski * 225135c41becSRyan Zezeski * We remove this filter to prevent duplicate delivery of 225235c41becSRyan Zezeski * packets destined for the primary MAC address as DLS will 225335c41becSRyan Zezeski * create the same filter on a non-default VSI for the primary 225435c41becSRyan Zezeski * MAC client. 225535c41becSRyan Zezeski * 225635c41becSRyan Zezeski * If you change the following code please test it across as 225735c41becSRyan Zezeski * many X700 series controllers and firmware revisions as you 225835c41becSRyan Zezeski * can. 225909aee612SRyan Zezeski */ 226009aee612SRyan Zezeski bzero(&filt, sizeof (filt)); 226109aee612SRyan Zezeski bcopy(hw->mac.port_addr, filt.mac_addr, ETHERADDRL); 226209aee612SRyan Zezeski filt.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; 226309aee612SRyan Zezeski filt.vlan_tag = 0; 226409aee612SRyan Zezeski 226509aee612SRyan Zezeski ASSERT3U(i40e->i40e_resources.ifr_nmacfilt_used, <=, 1); 226635c41becSRyan Zezeski i40e_log(i40e, "Num L2 filters: %u", 226735c41becSRyan Zezeski i40e->i40e_resources.ifr_nmacfilt_used); 226809aee612SRyan Zezeski 226909aee612SRyan Zezeski err = i40e_aq_remove_macvlan(hw, I40E_DEF_VSI_SEID(i40e), &filt, 1, 227009aee612SRyan Zezeski NULL); 227135c41becSRyan Zezeski if (err == I40E_SUCCESS) { 227235c41becSRyan Zezeski i40e_log(i40e, 227335c41becSRyan Zezeski "Removed L2 filter from Default VSI with SEID %u", 227435c41becSRyan Zezeski I40E_DEF_VSI_SEID(i40e)); 227535c41becSRyan Zezeski } else if (hw->aq.asq_last_status == ENOENT) { 227635c41becSRyan Zezeski i40e_log(i40e, 227735c41becSRyan Zezeski "No L2 filter for Default VSI with SEID %u", 227835c41becSRyan Zezeski I40E_DEF_VSI_SEID(i40e)); 227935c41becSRyan Zezeski } else { 228035c41becSRyan Zezeski i40e_error(i40e, "Failed to remove L2 filter from" 228135c41becSRyan Zezeski " Default VSI with SEID %u: %d (%d)", 228235c41becSRyan Zezeski I40E_DEF_VSI_SEID(i40e), err, hw->aq.asq_last_status); 228335c41becSRyan Zezeski 228409aee612SRyan Zezeski return (B_FALSE); 228509aee612SRyan Zezeski } 228609aee612SRyan Zezeski 228709aee612SRyan Zezeski /* 228809aee612SRyan Zezeski * As mentioned above, the controller created an implicit L2 228909aee612SRyan Zezeski * filter for the primary MAC. We want to remove both the 229009aee612SRyan Zezeski * filter and decrement the filter count. However, not all 229109aee612SRyan Zezeski * controllers count this implicit filter against the total 229209aee612SRyan Zezeski * MAC filter count. So here we are making sure it is either 229309aee612SRyan Zezeski * one or zero. If it is one, then we know it is for the 229409aee612SRyan Zezeski * implicit filter and we should decrement since we just 229509aee612SRyan Zezeski * removed the filter above. If it is zero then we know the 229609aee612SRyan Zezeski * controller that does not count the implicit filter, and it 229709aee612SRyan Zezeski * was enough to just remove it; we leave the count alone. 229809aee612SRyan Zezeski * But if it is neither, then we have never seen a controller 229909aee612SRyan Zezeski * like this before and we should fail to attach. 230009aee612SRyan Zezeski * 230109aee612SRyan Zezeski * It is unfortunate that this code must exist but the 230209aee612SRyan Zezeski * behavior of this implicit L2 filter and its corresponding 230309aee612SRyan Zezeski * count were dicovered through empirical testing. The 230409aee612SRyan Zezeski * programming manuals hint at this filter but do not 230509aee612SRyan Zezeski * explicitly call out the exact behavior. 230609aee612SRyan Zezeski */ 230709aee612SRyan Zezeski if (i40e->i40e_resources.ifr_nmacfilt_used == 1) { 230809aee612SRyan Zezeski i40e->i40e_resources.ifr_nmacfilt_used--; 230909aee612SRyan Zezeski } else { 231009aee612SRyan Zezeski if (i40e->i40e_resources.ifr_nmacfilt_used != 0) { 231135c41becSRyan Zezeski i40e_error(i40e, "Unexpected L2 filter count: %u" 231209aee612SRyan Zezeski " (expected 0)", 231309aee612SRyan Zezeski i40e->i40e_resources.ifr_nmacfilt_used); 231435c41becSRyan Zezeski return (B_FALSE); 231509aee612SRyan Zezeski } 231609aee612SRyan Zezeski } 231709aee612SRyan Zezeski 231809aee612SRyan Zezeski return (B_TRUE); 231909aee612SRyan Zezeski } 232009aee612SRyan Zezeski 232109aee612SRyan Zezeski static boolean_t 232209aee612SRyan Zezeski i40e_config_rss_key_x722(i40e_t *i40e, i40e_hw_t *hw) 232309aee612SRyan Zezeski { 232409aee612SRyan Zezeski for (uint_t i = 0; i < i40e->i40e_num_rx_groups; i++) { 232509aee612SRyan Zezeski uint32_t seed[I40E_PFQF_HKEY_MAX_INDEX + 1]; 2326b9d34b9dSRobert Mustacchi struct i40e_aqc_get_set_rss_key_data key; 232709aee612SRyan Zezeski const char *u8seed; 2328b9d34b9dSRobert Mustacchi enum i40e_status_code status; 232909aee612SRyan Zezeski uint16_t vsi_number = i40e->i40e_vsis[i].iv_number; 233009aee612SRyan Zezeski 233109aee612SRyan Zezeski (void) random_get_pseudo_bytes((uint8_t *)seed, sizeof (seed)); 233209aee612SRyan Zezeski u8seed = (char *)seed; 2333b9d34b9dSRobert Mustacchi 2334b9d34b9dSRobert Mustacchi CTASSERT(sizeof (key) >= (sizeof (key.standard_rss_key) + 2335b9d34b9dSRobert Mustacchi sizeof (key.extended_hash_key))); 2336b9d34b9dSRobert Mustacchi 2337b9d34b9dSRobert Mustacchi bcopy(u8seed, key.standard_rss_key, 2338b9d34b9dSRobert Mustacchi sizeof (key.standard_rss_key)); 2339b9d34b9dSRobert Mustacchi bcopy(&u8seed[sizeof (key.standard_rss_key)], 2340b9d34b9dSRobert Mustacchi key.extended_hash_key, sizeof (key.extended_hash_key)); 2341b9d34b9dSRobert Mustacchi 234209aee612SRyan Zezeski ASSERT3U(vsi_number, !=, 0); 234309aee612SRyan Zezeski status = i40e_aq_set_rss_key(hw, vsi_number, &key); 234409aee612SRyan Zezeski 2345b9d34b9dSRobert Mustacchi if (status != I40E_SUCCESS) { 234609aee612SRyan Zezeski i40e_error(i40e, "failed to set RSS key for VSI %u: %d", 234709aee612SRyan Zezeski vsi_number, status); 2348b9d34b9dSRobert Mustacchi return (B_FALSE); 2349b9d34b9dSRobert Mustacchi } 235009aee612SRyan Zezeski } 235109aee612SRyan Zezeski 235209aee612SRyan Zezeski return (B_TRUE); 235309aee612SRyan Zezeski } 235409aee612SRyan Zezeski 235509aee612SRyan Zezeski /* 235609aee612SRyan Zezeski * Configure the RSS key. For the X710 controller family, this is set on a 235709aee612SRyan Zezeski * per-PF basis via registers. For the X722, this is done on a per-VSI basis 235809aee612SRyan Zezeski * through the admin queue. 235909aee612SRyan Zezeski */ 236009aee612SRyan Zezeski static boolean_t 236109aee612SRyan Zezeski i40e_config_rss_key(i40e_t *i40e, i40e_hw_t *hw) 236209aee612SRyan Zezeski { 236309aee612SRyan Zezeski if (i40e_is_x722(i40e)) { 236409aee612SRyan Zezeski if (!i40e_config_rss_key_x722(i40e, hw)) 236509aee612SRyan Zezeski return (B_FALSE); 2366b9d34b9dSRobert Mustacchi } else { 236709aee612SRyan Zezeski uint32_t seed[I40E_PFQF_HKEY_MAX_INDEX + 1]; 236809aee612SRyan Zezeski 236909aee612SRyan Zezeski (void) random_get_pseudo_bytes((uint8_t *)seed, sizeof (seed)); 237009aee612SRyan Zezeski for (uint_t i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) 2371b9d34b9dSRobert Mustacchi i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i), seed[i]); 2372b9d34b9dSRobert Mustacchi } 2373b9d34b9dSRobert Mustacchi 2374b9d34b9dSRobert Mustacchi return (B_TRUE); 2375b9d34b9dSRobert Mustacchi } 2376b9d34b9dSRobert Mustacchi 2377b9d34b9dSRobert Mustacchi /* 2378b9d34b9dSRobert Mustacchi * Populate the LUT. The size of each entry in the LUT depends on the controller 2379b9d34b9dSRobert Mustacchi * family, with the X722 using a known 7-bit width. On the X710 controller, this 2380b9d34b9dSRobert Mustacchi * is programmed through its control registers where as on the X722 this is 2381b9d34b9dSRobert Mustacchi * configured through the admin queue. Also of note, the X722 allows the LUT to 238209aee612SRyan Zezeski * be set on a per-PF or VSI basis. At this time we use the PF setting. If we 238309aee612SRyan Zezeski * decide to use the per-VSI LUT in the future, then we will need to modify the 238409aee612SRyan Zezeski * i40e_add_vsi() function to set the RSS LUT bits in the queueing section. 2385b9d34b9dSRobert Mustacchi * 2386b9d34b9dSRobert Mustacchi * We populate the LUT in a round robin fashion with the rx queue indices from 0 238709aee612SRyan Zezeski * to i40e_num_trqpairs_per_vsi - 1. 2388b9d34b9dSRobert Mustacchi */ 2389b9d34b9dSRobert Mustacchi static boolean_t 2390b9d34b9dSRobert Mustacchi i40e_config_rss_hlut(i40e_t *i40e, i40e_hw_t *hw) 2391b9d34b9dSRobert Mustacchi { 2392b9d34b9dSRobert Mustacchi uint32_t *hlut; 2393b9d34b9dSRobert Mustacchi uint8_t lut_mask; 2394b9d34b9dSRobert Mustacchi uint_t i; 2395b9d34b9dSRobert Mustacchi boolean_t ret = B_FALSE; 2396b9d34b9dSRobert Mustacchi 2397b9d34b9dSRobert Mustacchi /* 2398b9d34b9dSRobert Mustacchi * We always configure the PF with a table size of 512 bytes in 2399b9d34b9dSRobert Mustacchi * i40e_chip_start(). 2400b9d34b9dSRobert Mustacchi */ 2401b9d34b9dSRobert Mustacchi hlut = kmem_alloc(I40E_HLUT_TABLE_SIZE, KM_NOSLEEP); 2402b9d34b9dSRobert Mustacchi if (hlut == NULL) { 2403b9d34b9dSRobert Mustacchi i40e_error(i40e, "i40e_config_rss() buffer allocation failed"); 2404b9d34b9dSRobert Mustacchi return (B_FALSE); 2405b9d34b9dSRobert Mustacchi } 2406b9d34b9dSRobert Mustacchi 2407b9d34b9dSRobert Mustacchi /* 2408b9d34b9dSRobert Mustacchi * The width of the X722 is apparently defined to be 7 bits, regardless 2409b9d34b9dSRobert Mustacchi * of the capability. 2410b9d34b9dSRobert Mustacchi */ 2411b9d34b9dSRobert Mustacchi if (i40e_is_x722(i40e)) { 2412b9d34b9dSRobert Mustacchi lut_mask = (1 << 7) - 1; 2413b9d34b9dSRobert Mustacchi } else { 2414b9d34b9dSRobert Mustacchi lut_mask = (1 << hw->func_caps.rss_table_entry_width) - 1; 2415b9d34b9dSRobert Mustacchi } 2416b9d34b9dSRobert Mustacchi 241709aee612SRyan Zezeski for (i = 0; i < I40E_HLUT_TABLE_SIZE; i++) { 241809aee612SRyan Zezeski ((uint8_t *)hlut)[i] = 241909aee612SRyan Zezeski (i % i40e->i40e_num_trqpairs_per_vsi) & lut_mask; 242009aee612SRyan Zezeski } 2421b9d34b9dSRobert Mustacchi 2422b9d34b9dSRobert Mustacchi if (i40e_is_x722(i40e)) { 2423b9d34b9dSRobert Mustacchi enum i40e_status_code status; 242409aee612SRyan Zezeski 242509aee612SRyan Zezeski status = i40e_aq_set_rss_lut(hw, 0, B_TRUE, (uint8_t *)hlut, 242609aee612SRyan Zezeski I40E_HLUT_TABLE_SIZE); 242709aee612SRyan Zezeski 2428b9d34b9dSRobert Mustacchi if (status != I40E_SUCCESS) { 242909aee612SRyan Zezeski i40e_error(i40e, "failed to set RSS LUT %d: %d", 243009aee612SRyan Zezeski status, hw->aq.asq_last_status); 2431b9d34b9dSRobert Mustacchi goto out; 2432b9d34b9dSRobert Mustacchi } 2433b9d34b9dSRobert Mustacchi } else { 2434b9d34b9dSRobert Mustacchi for (i = 0; i < I40E_HLUT_TABLE_SIZE >> 2; i++) { 2435b9d34b9dSRobert Mustacchi I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i), hlut[i]); 2436b9d34b9dSRobert Mustacchi } 2437b9d34b9dSRobert Mustacchi } 2438b9d34b9dSRobert Mustacchi ret = B_TRUE; 2439b9d34b9dSRobert Mustacchi out: 2440b9d34b9dSRobert Mustacchi kmem_free(hlut, I40E_HLUT_TABLE_SIZE); 2441b9d34b9dSRobert Mustacchi return (ret); 2442b9d34b9dSRobert Mustacchi } 2443b9d34b9dSRobert Mustacchi 2444396505afSPaul Winder /* 2445396505afSPaul Winder * Set up RSS. 2446508a0e8cSRob Johnston * 1. Seed the hash key. 2447396505afSPaul Winder * 2. Enable PCTYPEs for the hash filter. 2448396505afSPaul Winder * 3. Populate the LUT. 2449396505afSPaul Winder */ 2450396505afSPaul Winder static boolean_t 2451396505afSPaul Winder i40e_config_rss(i40e_t *i40e, i40e_hw_t *hw) 2452396505afSPaul Winder { 2453396505afSPaul Winder uint64_t hena; 2454396505afSPaul Winder 2455396505afSPaul Winder /* 2456396505afSPaul Winder * 1. Seed the hash key 2457396505afSPaul Winder */ 2458b9d34b9dSRobert Mustacchi if (!i40e_config_rss_key(i40e, hw)) 2459b9d34b9dSRobert Mustacchi return (B_FALSE); 2460396505afSPaul Winder 2461396505afSPaul Winder /* 2462396505afSPaul Winder * 2. Configure PCTYPES 2463396505afSPaul Winder */ 2464396505afSPaul Winder hena = (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | 2465396505afSPaul Winder (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | 2466b9d34b9dSRobert Mustacchi (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | 2467396505afSPaul Winder (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | 2468396505afSPaul Winder (1ULL << I40E_FILTER_PCTYPE_FRAG_IPV4) | 2469396505afSPaul Winder (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | 2470396505afSPaul Winder (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | 2471b9d34b9dSRobert Mustacchi (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | 2472396505afSPaul Winder (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | 2473396505afSPaul Winder (1ULL << I40E_FILTER_PCTYPE_FRAG_IPV6) | 2474396505afSPaul Winder (1ULL << I40E_FILTER_PCTYPE_L2_PAYLOAD); 2475396505afSPaul Winder 2476b9d34b9dSRobert Mustacchi /* 2477b9d34b9dSRobert Mustacchi * Add additional types supported by the X722 controller. 2478b9d34b9dSRobert Mustacchi */ 2479b9d34b9dSRobert Mustacchi if (i40e_is_x722(i40e)) { 2480b9d34b9dSRobert Mustacchi hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | 2481b9d34b9dSRobert Mustacchi (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | 2482b9d34b9dSRobert Mustacchi (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | 2483b9d34b9dSRobert Mustacchi (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | 2484b9d34b9dSRobert Mustacchi (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) | 2485b9d34b9dSRobert Mustacchi (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); 2486b9d34b9dSRobert Mustacchi } 2487b9d34b9dSRobert Mustacchi 2488396505afSPaul Winder i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (uint32_t)hena); 2489396505afSPaul Winder i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (uint32_t)(hena >> 32)); 2490396505afSPaul Winder 2491396505afSPaul Winder /* 2492396505afSPaul Winder * 3. Populate LUT 2493396505afSPaul Winder */ 2494b9d34b9dSRobert Mustacchi return (i40e_config_rss_hlut(i40e, hw)); 2495396505afSPaul Winder } 2496396505afSPaul Winder 24979d26e4fcSRobert Mustacchi /* 24989d26e4fcSRobert Mustacchi * Wrapper to kick the chipset on. 24999d26e4fcSRobert Mustacchi */ 25009d26e4fcSRobert Mustacchi static boolean_t 25019d26e4fcSRobert Mustacchi i40e_chip_start(i40e_t *i40e) 25029d26e4fcSRobert Mustacchi { 25039d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 25049d26e4fcSRobert Mustacchi struct i40e_filter_control_settings filter; 25059d26e4fcSRobert Mustacchi int rc; 25062f79f42cSRyan Zezeski uint8_t err; 25079d26e4fcSRobert Mustacchi 25089d26e4fcSRobert Mustacchi if (((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver < 33)) || 25099d26e4fcSRobert Mustacchi (hw->aq.fw_maj_ver < 4)) { 25109d26e4fcSRobert Mustacchi i40e_msec_delay(75); 25119d26e4fcSRobert Mustacchi if (i40e_aq_set_link_restart_an(hw, TRUE, NULL) != 25129d26e4fcSRobert Mustacchi I40E_SUCCESS) { 25139d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to restart link: admin queue " 25149d26e4fcSRobert Mustacchi "error: %d", hw->aq.asq_last_status); 25159d26e4fcSRobert Mustacchi return (B_FALSE); 25169d26e4fcSRobert Mustacchi } 25179d26e4fcSRobert Mustacchi } 25189d26e4fcSRobert Mustacchi 25199d26e4fcSRobert Mustacchi /* Determine hardware state */ 25209d26e4fcSRobert Mustacchi i40e_get_hw_state(i40e, hw); 25219d26e4fcSRobert Mustacchi 25222f79f42cSRyan Zezeski /* For now, we always disable Ethernet Flow Control. */ 25232f79f42cSRyan Zezeski hw->fc.requested_mode = I40E_FC_NONE; 25242f79f42cSRyan Zezeski rc = i40e_set_fc(hw, &err, B_TRUE); 25252f79f42cSRyan Zezeski if (rc != I40E_SUCCESS) { 25262f79f42cSRyan Zezeski i40e_error(i40e, "Setting flow control failed, returned %d" 25272f79f42cSRyan Zezeski " with error: 0x%x", rc, err); 25282f79f42cSRyan Zezeski return (B_FALSE); 25292f79f42cSRyan Zezeski } 25302f79f42cSRyan Zezeski 25319d26e4fcSRobert Mustacchi /* Initialize mac addresses. */ 25329d26e4fcSRobert Mustacchi i40e_init_macaddrs(i40e, hw); 25339d26e4fcSRobert Mustacchi 25349d26e4fcSRobert Mustacchi /* 2535b9d34b9dSRobert Mustacchi * Set up the filter control. If the hash lut size is changed from 2536b9d34b9dSRobert Mustacchi * I40E_HASH_LUT_SIZE_512 then I40E_HLUT_TABLE_SIZE and 2537b9d34b9dSRobert Mustacchi * i40e_config_rss_hlut() will need to be updated. 25389d26e4fcSRobert Mustacchi */ 25399d26e4fcSRobert Mustacchi bzero(&filter, sizeof (filter)); 25409d26e4fcSRobert Mustacchi filter.enable_ethtype = TRUE; 25419d26e4fcSRobert Mustacchi filter.enable_macvlan = TRUE; 2542396505afSPaul Winder filter.hash_lut_size = I40E_HASH_LUT_SIZE_512; 25439d26e4fcSRobert Mustacchi 25449d26e4fcSRobert Mustacchi rc = i40e_set_filter_control(hw, &filter); 25459d26e4fcSRobert Mustacchi if (rc != I40E_SUCCESS) { 25469d26e4fcSRobert Mustacchi i40e_error(i40e, "i40e_set_filter_control() returned %d", rc); 25479d26e4fcSRobert Mustacchi return (B_FALSE); 25489d26e4fcSRobert Mustacchi } 25499d26e4fcSRobert Mustacchi 25509d26e4fcSRobert Mustacchi i40e_intr_chip_init(i40e); 25519d26e4fcSRobert Mustacchi 255209aee612SRyan Zezeski rc = i40e_get_mac_seid(i40e); 255309aee612SRyan Zezeski if (rc == -1) { 255409aee612SRyan Zezeski i40e_error(i40e, "failed to obtain MAC Uplink SEID"); 25559d26e4fcSRobert Mustacchi return (B_FALSE); 255609aee612SRyan Zezeski } 255709aee612SRyan Zezeski i40e->i40e_mac_seid = (uint16_t)rc; 255809aee612SRyan Zezeski 255909aee612SRyan Zezeski /* 256009aee612SRyan Zezeski * Create a VEB in order to support multiple VSIs. Each VSI 256109aee612SRyan Zezeski * functions as a MAC group. This call sets the PF's MAC as 256209aee612SRyan Zezeski * the uplink port and the PF's default VSI as the default 256309aee612SRyan Zezeski * downlink port. 256409aee612SRyan Zezeski */ 256509aee612SRyan Zezeski rc = i40e_aq_add_veb(hw, i40e->i40e_mac_seid, I40E_DEF_VSI_SEID(i40e), 256609aee612SRyan Zezeski 0x1, B_TRUE, &i40e->i40e_veb_seid, B_FALSE, NULL); 256709aee612SRyan Zezeski if (rc != I40E_SUCCESS) { 256809aee612SRyan Zezeski i40e_error(i40e, "i40e_aq_add_veb() failed %d: %d", rc, 256909aee612SRyan Zezeski hw->aq.asq_last_status); 257009aee612SRyan Zezeski return (B_FALSE); 257109aee612SRyan Zezeski } 257209aee612SRyan Zezeski 257309aee612SRyan Zezeski if (!i40e_config_def_vsi(i40e, hw)) 257409aee612SRyan Zezeski return (B_FALSE); 257509aee612SRyan Zezeski 257609aee612SRyan Zezeski for (uint_t i = 1; i < i40e->i40e_num_rx_groups; i++) { 257709aee612SRyan Zezeski if (!i40e_add_vsi(i40e, hw, i)) 257809aee612SRyan Zezeski return (B_FALSE); 257909aee612SRyan Zezeski } 25809d26e4fcSRobert Mustacchi 2581396505afSPaul Winder if (!i40e_config_rss(i40e, hw)) 2582396505afSPaul Winder return (B_FALSE); 2583396505afSPaul Winder 25849d26e4fcSRobert Mustacchi i40e_flush(hw); 25859d26e4fcSRobert Mustacchi 25869d26e4fcSRobert Mustacchi return (B_TRUE); 25879d26e4fcSRobert Mustacchi } 25889d26e4fcSRobert Mustacchi 25899d26e4fcSRobert Mustacchi /* 25909d26e4fcSRobert Mustacchi * Take care of tearing down the rx ring. See 8.3.3.1.2 for more information. 25919d26e4fcSRobert Mustacchi */ 25929d26e4fcSRobert Mustacchi static void 2593aa2a44afSPaul Winder i40e_shutdown_rx_ring(i40e_trqpair_t *itrq) 25949d26e4fcSRobert Mustacchi { 2595aa2a44afSPaul Winder i40e_t *i40e = itrq->itrq_i40e; 25969d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 2597aa2a44afSPaul Winder uint32_t reg; 25989d26e4fcSRobert Mustacchi 25999d26e4fcSRobert Mustacchi /* 2600aa2a44afSPaul Winder * Step 1. 8.3.3.1.2 suggests the interrupt is removed from the 2601aa2a44afSPaul Winder * hardware interrupt linked list (see i40e_intr.c) but for 2602aa2a44afSPaul Winder * simplicity we keep this list immutable until the device 2603aa2a44afSPaul Winder * (distinct from an individual ring) is stopped. 26049d26e4fcSRobert Mustacchi */ 26059d26e4fcSRobert Mustacchi 2606aa2a44afSPaul Winder /* 2607aa2a44afSPaul Winder * Step 2. Request the queue by clearing QENA_REQ. It may not be 2608aa2a44afSPaul Winder * set due to unwinding from failures and a partially enabled 2609aa2a44afSPaul Winder * ring set. 2610aa2a44afSPaul Winder */ 2611aa2a44afSPaul Winder reg = I40E_READ_REG(hw, I40E_QRX_ENA(itrq->itrq_index)); 2612aa2a44afSPaul Winder if (!(reg & I40E_QRX_ENA_QENA_REQ_MASK)) 2613aa2a44afSPaul Winder return; 2614aa2a44afSPaul Winder VERIFY((reg & I40E_QRX_ENA_QENA_REQ_MASK) == 2615aa2a44afSPaul Winder I40E_QRX_ENA_QENA_REQ_MASK); 2616aa2a44afSPaul Winder reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; 2617aa2a44afSPaul Winder I40E_WRITE_REG(hw, I40E_QRX_ENA(itrq->itrq_index), reg); 26189d26e4fcSRobert Mustacchi 26199d26e4fcSRobert Mustacchi /* 2620aa2a44afSPaul Winder * Step 3. Wait for the disable to take, by having QENA_STAT in the FPM 26219d26e4fcSRobert Mustacchi * be cleared. Note that we could still receive data in the queue during 26229d26e4fcSRobert Mustacchi * this time. We don't actually wait for this now and instead defer this 2623aa2a44afSPaul Winder * to i40e_shutdown_ring_wait(), after we've interleaved disabling the 2624aa2a44afSPaul Winder * TX queue as well. 26259d26e4fcSRobert Mustacchi */ 26269d26e4fcSRobert Mustacchi } 26279d26e4fcSRobert Mustacchi 26289d26e4fcSRobert Mustacchi static void 2629aa2a44afSPaul Winder i40e_shutdown_tx_ring(i40e_trqpair_t *itrq) 26309d26e4fcSRobert Mustacchi { 2631aa2a44afSPaul Winder i40e_t *i40e = itrq->itrq_i40e; 26329d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 2633aa2a44afSPaul Winder uint32_t reg; 26349d26e4fcSRobert Mustacchi 26359d26e4fcSRobert Mustacchi /* 2636aa2a44afSPaul Winder * Step 2. Set the SET_QDIS flag for the queue. 26379d26e4fcSRobert Mustacchi */ 2638aa2a44afSPaul Winder i40e_pre_tx_queue_cfg(hw, itrq->itrq_index, B_FALSE); 26399d26e4fcSRobert Mustacchi 26409d26e4fcSRobert Mustacchi /* 2641aa2a44afSPaul Winder * Step 3. Wait at least 400 usec. 26429d26e4fcSRobert Mustacchi */ 26439d26e4fcSRobert Mustacchi drv_usecwait(500); 26449d26e4fcSRobert Mustacchi 2645aa2a44afSPaul Winder /* 2646aa2a44afSPaul Winder * Step 4. Clear the QENA_REQ flag which tells hardware to 2647aa2a44afSPaul Winder * quiesce. If QENA_REQ is not already set then that means that 2648aa2a44afSPaul Winder * we likely already tried to disable this queue. 2649aa2a44afSPaul Winder */ 2650aa2a44afSPaul Winder reg = I40E_READ_REG(hw, I40E_QTX_ENA(itrq->itrq_index)); 2651aa2a44afSPaul Winder if ((reg & I40E_QTX_ENA_QENA_REQ_MASK) != 0) { 26529d26e4fcSRobert Mustacchi reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; 2653aa2a44afSPaul Winder I40E_WRITE_REG(hw, I40E_QTX_ENA(itrq->itrq_index), reg); 26549d26e4fcSRobert Mustacchi } 26559d26e4fcSRobert Mustacchi 26569d26e4fcSRobert Mustacchi /* 2657aa2a44afSPaul Winder * Step 5. Wait for the drain to finish. This will be done by the 26589d26e4fcSRobert Mustacchi * hardware removing the QENA_STAT flag from the queue. Rather than 2659aa2a44afSPaul Winder * waiting here, we interleave it with the receive shutdown in 2660aa2a44afSPaul Winder * i40e_shutdown_ring_wait(). 26619d26e4fcSRobert Mustacchi */ 26629d26e4fcSRobert Mustacchi } 26639d26e4fcSRobert Mustacchi 26649d26e4fcSRobert Mustacchi /* 2665aa2a44afSPaul Winder * Wait for a ring to be shut down. e.g. Steps 2 and 5 from the above 26669d26e4fcSRobert Mustacchi * functions. 26679d26e4fcSRobert Mustacchi */ 26689d26e4fcSRobert Mustacchi static boolean_t 2669aa2a44afSPaul Winder i40e_shutdown_ring_wait(i40e_trqpair_t *itrq) 26709d26e4fcSRobert Mustacchi { 2671aa2a44afSPaul Winder i40e_t *i40e = itrq->itrq_i40e; 26729d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 2673aa2a44afSPaul Winder uint32_t reg; 2674aa2a44afSPaul Winder int try; 26759d26e4fcSRobert Mustacchi 2676aa2a44afSPaul Winder for (try = 0; try < I40E_RING_WAIT_NTRIES; try++) { 2677aa2a44afSPaul Winder reg = I40E_READ_REG(hw, I40E_QRX_ENA(itrq->itrq_index)); 2678aa2a44afSPaul Winder if ((reg & I40E_QRX_ENA_QENA_STAT_MASK) == 0) 2679aa2a44afSPaul Winder break; 2680aa2a44afSPaul Winder i40e_msec_delay(I40E_RING_WAIT_PAUSE); 2681aa2a44afSPaul Winder } 26829d26e4fcSRobert Mustacchi 2683aa2a44afSPaul Winder if ((reg & I40E_QRX_ENA_QENA_STAT_MASK) != 0) { 2684aa2a44afSPaul Winder i40e_error(i40e, "timed out disabling rx queue %d", 2685aa2a44afSPaul Winder itrq->itrq_index); 2686aa2a44afSPaul Winder return (B_FALSE); 2687aa2a44afSPaul Winder } 26889d26e4fcSRobert Mustacchi 2689aa2a44afSPaul Winder for (try = 0; try < I40E_RING_WAIT_NTRIES; try++) { 2690aa2a44afSPaul Winder reg = I40E_READ_REG(hw, I40E_QTX_ENA(itrq->itrq_index)); 2691aa2a44afSPaul Winder if ((reg & I40E_QTX_ENA_QENA_STAT_MASK) == 0) 2692aa2a44afSPaul Winder break; 2693aa2a44afSPaul Winder i40e_msec_delay(I40E_RING_WAIT_PAUSE); 2694aa2a44afSPaul Winder } 26959d26e4fcSRobert Mustacchi 2696aa2a44afSPaul Winder if ((reg & I40E_QTX_ENA_QENA_STAT_MASK) != 0) { 2697aa2a44afSPaul Winder i40e_error(i40e, "timed out disabling tx queue %d", 2698aa2a44afSPaul Winder itrq->itrq_index); 2699aa2a44afSPaul Winder return (B_FALSE); 27009d26e4fcSRobert Mustacchi } 27019d26e4fcSRobert Mustacchi 27029d26e4fcSRobert Mustacchi return (B_TRUE); 27039d26e4fcSRobert Mustacchi } 27049d26e4fcSRobert Mustacchi 2705aa2a44afSPaul Winder 2706aa2a44afSPaul Winder /* 2707aa2a44afSPaul Winder * Shutdown an individual ring and release any memory. 2708aa2a44afSPaul Winder */ 2709aa2a44afSPaul Winder boolean_t 2710aa2a44afSPaul Winder i40e_shutdown_ring(i40e_trqpair_t *itrq) 2711aa2a44afSPaul Winder { 2712aa2a44afSPaul Winder boolean_t rv = B_TRUE; 2713aa2a44afSPaul Winder 2714aa2a44afSPaul Winder /* 2715aa2a44afSPaul Winder * Tell transmit path to quiesce, and wait until done. 2716aa2a44afSPaul Winder */ 2717aa2a44afSPaul Winder if (i40e_ring_tx_quiesce(itrq)) { 2718aa2a44afSPaul Winder /* Already quiesced. */ 2719aa2a44afSPaul Winder return (B_TRUE); 2720aa2a44afSPaul Winder } 2721aa2a44afSPaul Winder 2722aa2a44afSPaul Winder i40e_shutdown_rx_ring(itrq); 2723aa2a44afSPaul Winder i40e_shutdown_tx_ring(itrq); 2724aa2a44afSPaul Winder if (!i40e_shutdown_ring_wait(itrq)) 2725aa2a44afSPaul Winder rv = B_FALSE; 2726aa2a44afSPaul Winder 2727aa2a44afSPaul Winder /* 2728aa2a44afSPaul Winder * After the ring has stopped, we need to wait 50ms before 2729aa2a44afSPaul Winder * programming it again. Rather than wait here, we'll record 2730aa2a44afSPaul Winder * the time the ring was stopped. When the ring is started, we'll 2731aa2a44afSPaul Winder * check if enough time has expired and then wait if necessary. 2732aa2a44afSPaul Winder */ 2733aa2a44afSPaul Winder itrq->irtq_time_stopped = gethrtime(); 2734aa2a44afSPaul Winder 2735aa2a44afSPaul Winder /* 2736aa2a44afSPaul Winder * The rings have been stopped in the hardware, now wait for 2737aa2a44afSPaul Winder * a possibly active interrupt thread. 2738aa2a44afSPaul Winder */ 2739aa2a44afSPaul Winder i40e_intr_quiesce(itrq); 2740aa2a44afSPaul Winder 2741aa2a44afSPaul Winder mutex_enter(&itrq->itrq_tx_lock); 2742aa2a44afSPaul Winder i40e_tx_cleanup_ring(itrq); 2743aa2a44afSPaul Winder mutex_exit(&itrq->itrq_tx_lock); 2744aa2a44afSPaul Winder 2745aa2a44afSPaul Winder i40e_free_ring_mem(itrq, B_FALSE); 2746aa2a44afSPaul Winder 2747aa2a44afSPaul Winder return (rv); 2748aa2a44afSPaul Winder } 2749aa2a44afSPaul Winder 2750aa2a44afSPaul Winder /* 2751aa2a44afSPaul Winder * Shutdown all the rings. 2752aa2a44afSPaul Winder * Called from i40e_stop(), and hopefully the mac layer has already 2753aa2a44afSPaul Winder * called ring stop for each ring, which would make this almost a no-op. 2754aa2a44afSPaul Winder */ 27559d26e4fcSRobert Mustacchi static boolean_t 27569d26e4fcSRobert Mustacchi i40e_shutdown_rings(i40e_t *i40e) 27579d26e4fcSRobert Mustacchi { 2758aa2a44afSPaul Winder boolean_t rv = B_TRUE; 2759aa2a44afSPaul Winder int i; 2760aa2a44afSPaul Winder 2761aa2a44afSPaul Winder for (i = 0; i < i40e->i40e_num_trqpairs; i++) { 2762aa2a44afSPaul Winder if (!i40e_shutdown_ring(&i40e->i40e_trqpairs[i])) 2763aa2a44afSPaul Winder rv = B_FALSE; 2764aa2a44afSPaul Winder } 2765aa2a44afSPaul Winder 2766aa2a44afSPaul Winder return (rv); 27679d26e4fcSRobert Mustacchi } 27689d26e4fcSRobert Mustacchi 27699d26e4fcSRobert Mustacchi static void 27709d26e4fcSRobert Mustacchi i40e_setup_rx_descs(i40e_trqpair_t *itrq) 27719d26e4fcSRobert Mustacchi { 27729d26e4fcSRobert Mustacchi int i; 27739d26e4fcSRobert Mustacchi i40e_rx_data_t *rxd = itrq->itrq_rxdata; 27749d26e4fcSRobert Mustacchi 27759d26e4fcSRobert Mustacchi for (i = 0; i < rxd->rxd_ring_size; i++) { 27769d26e4fcSRobert Mustacchi i40e_rx_control_block_t *rcb; 27779d26e4fcSRobert Mustacchi i40e_rx_desc_t *rdesc; 27789d26e4fcSRobert Mustacchi 27799d26e4fcSRobert Mustacchi rcb = rxd->rxd_work_list[i]; 27809d26e4fcSRobert Mustacchi rdesc = &rxd->rxd_desc_ring[i]; 27819d26e4fcSRobert Mustacchi 27829d26e4fcSRobert Mustacchi rdesc->read.pkt_addr = 27839d26e4fcSRobert Mustacchi CPU_TO_LE64((uintptr_t)rcb->rcb_dma.dmab_dma_address); 27849d26e4fcSRobert Mustacchi rdesc->read.hdr_addr = 0; 27859d26e4fcSRobert Mustacchi } 27869d26e4fcSRobert Mustacchi } 27879d26e4fcSRobert Mustacchi 27889d26e4fcSRobert Mustacchi static boolean_t 27899d26e4fcSRobert Mustacchi i40e_setup_rx_hmc(i40e_trqpair_t *itrq) 27909d26e4fcSRobert Mustacchi { 27919d26e4fcSRobert Mustacchi i40e_rx_data_t *rxd = itrq->itrq_rxdata; 27929d26e4fcSRobert Mustacchi i40e_t *i40e = itrq->itrq_i40e; 27939d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 27949d26e4fcSRobert Mustacchi 27959d26e4fcSRobert Mustacchi struct i40e_hmc_obj_rxq rctx; 27969d26e4fcSRobert Mustacchi int err; 27979d26e4fcSRobert Mustacchi 27989d26e4fcSRobert Mustacchi bzero(&rctx, sizeof (struct i40e_hmc_obj_rxq)); 27999d26e4fcSRobert Mustacchi rctx.base = rxd->rxd_desc_area.dmab_dma_address / 28009d26e4fcSRobert Mustacchi I40E_HMC_RX_CTX_UNIT; 28019d26e4fcSRobert Mustacchi rctx.qlen = rxd->rxd_ring_size; 28029d26e4fcSRobert Mustacchi VERIFY(i40e->i40e_rx_buf_size >= I40E_HMC_RX_DBUFF_MIN); 28039d26e4fcSRobert Mustacchi VERIFY(i40e->i40e_rx_buf_size <= I40E_HMC_RX_DBUFF_MAX); 28049d26e4fcSRobert Mustacchi rctx.dbuff = i40e->i40e_rx_buf_size >> I40E_RXQ_CTX_DBUFF_SHIFT; 28059d26e4fcSRobert Mustacchi rctx.hbuff = 0 >> I40E_RXQ_CTX_HBUFF_SHIFT; 28069d26e4fcSRobert Mustacchi rctx.dtype = I40E_HMC_RX_DTYPE_NOSPLIT; 28079d26e4fcSRobert Mustacchi rctx.dsize = I40E_HMC_RX_DSIZE_32BYTE; 28089d26e4fcSRobert Mustacchi rctx.crcstrip = I40E_HMC_RX_CRCSTRIP_ENABLE; 28099d26e4fcSRobert Mustacchi rctx.fc_ena = I40E_HMC_RX_FC_DISABLE; 28109d26e4fcSRobert Mustacchi rctx.l2tsel = I40E_HMC_RX_L2TAGORDER; 28119d26e4fcSRobert Mustacchi rctx.hsplit_0 = I40E_HMC_RX_HDRSPLIT_DISABLE; 28129d26e4fcSRobert Mustacchi rctx.hsplit_1 = I40E_HMC_RX_HDRSPLIT_DISABLE; 28139d26e4fcSRobert Mustacchi rctx.showiv = I40E_HMC_RX_INVLAN_DONTSTRIP; 28149d26e4fcSRobert Mustacchi rctx.rxmax = i40e->i40e_frame_max; 28159d26e4fcSRobert Mustacchi rctx.tphrdesc_ena = I40E_HMC_RX_TPH_DISABLE; 28169d26e4fcSRobert Mustacchi rctx.tphwdesc_ena = I40E_HMC_RX_TPH_DISABLE; 28179d26e4fcSRobert Mustacchi rctx.tphdata_ena = I40E_HMC_RX_TPH_DISABLE; 28189d26e4fcSRobert Mustacchi rctx.tphhead_ena = I40E_HMC_RX_TPH_DISABLE; 28199d26e4fcSRobert Mustacchi rctx.lrxqthresh = I40E_HMC_RX_LOWRXQ_NOINTR; 28209d26e4fcSRobert Mustacchi 28219d26e4fcSRobert Mustacchi /* 28229d26e4fcSRobert Mustacchi * This must be set to 0x1, see Table 8-12 in section 8.3.3.2.2. 28239d26e4fcSRobert Mustacchi */ 28249d26e4fcSRobert Mustacchi rctx.prefena = I40E_HMC_RX_PREFENA; 28259d26e4fcSRobert Mustacchi 28269d26e4fcSRobert Mustacchi err = i40e_clear_lan_rx_queue_context(hw, itrq->itrq_index); 28279d26e4fcSRobert Mustacchi if (err != I40E_SUCCESS) { 28289d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to clear rx queue %d context: %d", 28299d26e4fcSRobert Mustacchi itrq->itrq_index, err); 28309d26e4fcSRobert Mustacchi return (B_FALSE); 28319d26e4fcSRobert Mustacchi } 28329d26e4fcSRobert Mustacchi 28339d26e4fcSRobert Mustacchi err = i40e_set_lan_rx_queue_context(hw, itrq->itrq_index, &rctx); 28349d26e4fcSRobert Mustacchi if (err != I40E_SUCCESS) { 28359d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to set rx queue %d context: %d", 28369d26e4fcSRobert Mustacchi itrq->itrq_index, err); 28379d26e4fcSRobert Mustacchi return (B_FALSE); 28389d26e4fcSRobert Mustacchi } 28399d26e4fcSRobert Mustacchi 28409d26e4fcSRobert Mustacchi return (B_TRUE); 28419d26e4fcSRobert Mustacchi } 28429d26e4fcSRobert Mustacchi 28439d26e4fcSRobert Mustacchi /* 2844aa2a44afSPaul Winder * Take care of setting up the descriptor ring and actually programming the 28459d26e4fcSRobert Mustacchi * device. See 8.3.3.1.1 for the full list of steps we need to do to enable the 28469d26e4fcSRobert Mustacchi * rx rings. 28479d26e4fcSRobert Mustacchi */ 28489d26e4fcSRobert Mustacchi static boolean_t 2849aa2a44afSPaul Winder i40e_setup_rx_ring(i40e_trqpair_t *itrq) 28509d26e4fcSRobert Mustacchi { 2851aa2a44afSPaul Winder i40e_t *i40e = itrq->itrq_i40e; 28529d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 2853aa2a44afSPaul Winder i40e_rx_data_t *rxd = itrq->itrq_rxdata; 2854aa2a44afSPaul Winder uint32_t reg; 2855aa2a44afSPaul Winder int i; 28569d26e4fcSRobert Mustacchi 2857aa2a44afSPaul Winder /* 2858aa2a44afSPaul Winder * Step 1. Program all receive ring descriptors. 2859aa2a44afSPaul Winder */ 2860aa2a44afSPaul Winder i40e_setup_rx_descs(itrq); 28619d26e4fcSRobert Mustacchi 2862aa2a44afSPaul Winder /* 2863aa2a44afSPaul Winder * Step 2. Program the queue's FPM/HMC context. 2864aa2a44afSPaul Winder */ 2865aa2a44afSPaul Winder if (!i40e_setup_rx_hmc(itrq)) 2866aa2a44afSPaul Winder return (B_FALSE); 28679d26e4fcSRobert Mustacchi 2868aa2a44afSPaul Winder /* 2869aa2a44afSPaul Winder * Step 3. Clear the queue's tail pointer and set it to the end 2870aa2a44afSPaul Winder * of the space. 2871aa2a44afSPaul Winder */ 2872aa2a44afSPaul Winder I40E_WRITE_REG(hw, I40E_QRX_TAIL(itrq->itrq_index), 0); 2873aa2a44afSPaul Winder I40E_WRITE_REG(hw, I40E_QRX_TAIL(itrq->itrq_index), 2874aa2a44afSPaul Winder rxd->rxd_ring_size - 1); 28759d26e4fcSRobert Mustacchi 28769d26e4fcSRobert Mustacchi /* 2877aa2a44afSPaul Winder * Step 4. Enable the queue via the QENA_REQ. 28789d26e4fcSRobert Mustacchi */ 2879aa2a44afSPaul Winder reg = I40E_READ_REG(hw, I40E_QRX_ENA(itrq->itrq_index)); 2880aa2a44afSPaul Winder VERIFY0(reg & (I40E_QRX_ENA_QENA_REQ_MASK | 2881aa2a44afSPaul Winder I40E_QRX_ENA_QENA_STAT_MASK)); 2882aa2a44afSPaul Winder reg |= I40E_QRX_ENA_QENA_REQ_MASK; 2883aa2a44afSPaul Winder I40E_WRITE_REG(hw, I40E_QRX_ENA(itrq->itrq_index), reg); 28849d26e4fcSRobert Mustacchi 2885aa2a44afSPaul Winder /* 2886aa2a44afSPaul Winder * Step 5. Verify that QENA_STAT has been set. It's promised 2887aa2a44afSPaul Winder * that this should occur within about 10 us, but like other 2888aa2a44afSPaul Winder * systems, we give the card a bit more time. 2889aa2a44afSPaul Winder */ 2890aa2a44afSPaul Winder for (i = 0; i < I40E_RING_WAIT_NTRIES; i++) { 2891aa2a44afSPaul Winder reg = I40E_READ_REG(hw, I40E_QRX_ENA(itrq->itrq_index)); 28929d26e4fcSRobert Mustacchi 2893aa2a44afSPaul Winder if (reg & I40E_QRX_ENA_QENA_STAT_MASK) 2894aa2a44afSPaul Winder break; 2895aa2a44afSPaul Winder i40e_msec_delay(I40E_RING_WAIT_PAUSE); 2896aa2a44afSPaul Winder } 28979d26e4fcSRobert Mustacchi 2898aa2a44afSPaul Winder if ((reg & I40E_QRX_ENA_QENA_STAT_MASK) == 0) { 2899aa2a44afSPaul Winder i40e_error(i40e, "failed to enable rx queue %d, timed " 2900aa2a44afSPaul Winder "out.", itrq->itrq_index); 2901aa2a44afSPaul Winder return (B_FALSE); 29029d26e4fcSRobert Mustacchi } 29039d26e4fcSRobert Mustacchi 29049d26e4fcSRobert Mustacchi return (B_TRUE); 29059d26e4fcSRobert Mustacchi } 29069d26e4fcSRobert Mustacchi 29079d26e4fcSRobert Mustacchi static boolean_t 29089d26e4fcSRobert Mustacchi i40e_setup_tx_hmc(i40e_trqpair_t *itrq) 29099d26e4fcSRobert Mustacchi { 29109d26e4fcSRobert Mustacchi i40e_t *i40e = itrq->itrq_i40e; 29119d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 29129d26e4fcSRobert Mustacchi 29139d26e4fcSRobert Mustacchi struct i40e_hmc_obj_txq tctx; 29149d26e4fcSRobert Mustacchi struct i40e_vsi_context context; 29159d26e4fcSRobert Mustacchi int err; 29169d26e4fcSRobert Mustacchi 29179d26e4fcSRobert Mustacchi bzero(&tctx, sizeof (struct i40e_hmc_obj_txq)); 29189d26e4fcSRobert Mustacchi tctx.new_context = I40E_HMC_TX_NEW_CONTEXT; 29199d26e4fcSRobert Mustacchi tctx.base = itrq->itrq_desc_area.dmab_dma_address / 29209d26e4fcSRobert Mustacchi I40E_HMC_TX_CTX_UNIT; 29219d26e4fcSRobert Mustacchi tctx.fc_ena = I40E_HMC_TX_FC_DISABLE; 29229d26e4fcSRobert Mustacchi tctx.timesync_ena = I40E_HMC_TX_TS_DISABLE; 29239d26e4fcSRobert Mustacchi tctx.fd_ena = I40E_HMC_TX_FD_DISABLE; 29249d26e4fcSRobert Mustacchi tctx.alt_vlan_ena = I40E_HMC_TX_ALT_VLAN_DISABLE; 29259d26e4fcSRobert Mustacchi tctx.head_wb_ena = I40E_HMC_TX_WB_ENABLE; 29269d26e4fcSRobert Mustacchi tctx.qlen = itrq->itrq_tx_ring_size; 29279d26e4fcSRobert Mustacchi tctx.tphrdesc_ena = I40E_HMC_TX_TPH_DISABLE; 29289d26e4fcSRobert Mustacchi tctx.tphrpacket_ena = I40E_HMC_TX_TPH_DISABLE; 29299d26e4fcSRobert Mustacchi tctx.tphwdesc_ena = I40E_HMC_TX_TPH_DISABLE; 29309d26e4fcSRobert Mustacchi tctx.head_wb_addr = itrq->itrq_desc_area.dmab_dma_address + 29319d26e4fcSRobert Mustacchi sizeof (i40e_tx_desc_t) * itrq->itrq_tx_ring_size; 29329d26e4fcSRobert Mustacchi 29339d26e4fcSRobert Mustacchi /* 29349d26e4fcSRobert Mustacchi * This field isn't actually documented, like crc, but it suggests that 29359d26e4fcSRobert Mustacchi * it should be zeroed. We leave both of these here because of that for 29369d26e4fcSRobert Mustacchi * now. We should check with Intel on why these are here even. 29379d26e4fcSRobert Mustacchi */ 29389d26e4fcSRobert Mustacchi tctx.crc = 0; 29399d26e4fcSRobert Mustacchi tctx.rdylist_act = 0; 29409d26e4fcSRobert Mustacchi 29419d26e4fcSRobert Mustacchi /* 29429d26e4fcSRobert Mustacchi * We're supposed to assign the rdylist field with the value of the 29439d26e4fcSRobert Mustacchi * traffic class index for the first device. We query the VSI parameters 29449d26e4fcSRobert Mustacchi * again to get what the handle is. Note that every queue is always 29459d26e4fcSRobert Mustacchi * assigned to traffic class zero, because we don't actually use them. 29469d26e4fcSRobert Mustacchi */ 29479d26e4fcSRobert Mustacchi bzero(&context, sizeof (struct i40e_vsi_context)); 294809aee612SRyan Zezeski context.seid = I40E_DEF_VSI_SEID(i40e); 29499d26e4fcSRobert Mustacchi context.pf_num = hw->pf_id; 29509d26e4fcSRobert Mustacchi err = i40e_aq_get_vsi_params(hw, &context, NULL); 29519d26e4fcSRobert Mustacchi if (err != I40E_SUCCESS) { 29529d26e4fcSRobert Mustacchi i40e_error(i40e, "get VSI params failed with %d", err); 29539d26e4fcSRobert Mustacchi return (B_FALSE); 29549d26e4fcSRobert Mustacchi } 29559d26e4fcSRobert Mustacchi tctx.rdylist = LE_16(context.info.qs_handle[0]); 29569d26e4fcSRobert Mustacchi 29579d26e4fcSRobert Mustacchi err = i40e_clear_lan_tx_queue_context(hw, itrq->itrq_index); 29589d26e4fcSRobert Mustacchi if (err != I40E_SUCCESS) { 29599d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to clear tx queue %d context: %d", 29609d26e4fcSRobert Mustacchi itrq->itrq_index, err); 29619d26e4fcSRobert Mustacchi return (B_FALSE); 29629d26e4fcSRobert Mustacchi } 29639d26e4fcSRobert Mustacchi 29649d26e4fcSRobert Mustacchi err = i40e_set_lan_tx_queue_context(hw, itrq->itrq_index, &tctx); 29659d26e4fcSRobert Mustacchi if (err != I40E_SUCCESS) { 29669d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to set tx queue %d context: %d", 29679d26e4fcSRobert Mustacchi itrq->itrq_index, err); 29689d26e4fcSRobert Mustacchi return (B_FALSE); 29699d26e4fcSRobert Mustacchi } 29709d26e4fcSRobert Mustacchi 29719d26e4fcSRobert Mustacchi return (B_TRUE); 29729d26e4fcSRobert Mustacchi } 29739d26e4fcSRobert Mustacchi 29749d26e4fcSRobert Mustacchi /* 2975aa2a44afSPaul Winder * Take care of setting up the descriptor ring and actually programming the 29769d26e4fcSRobert Mustacchi * device. See 8.4.3.1.1 for what we need to do here. 29779d26e4fcSRobert Mustacchi */ 29789d26e4fcSRobert Mustacchi static boolean_t 2979aa2a44afSPaul Winder i40e_setup_tx_ring(i40e_trqpair_t *itrq) 29809d26e4fcSRobert Mustacchi { 2981aa2a44afSPaul Winder i40e_t *i40e = itrq->itrq_i40e; 29829d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 2983aa2a44afSPaul Winder uint32_t reg; 2984aa2a44afSPaul Winder int i; 29859d26e4fcSRobert Mustacchi 2986aa2a44afSPaul Winder /* 2987aa2a44afSPaul Winder * Step 1. Clear the queue disable flag and verify that the 2988aa2a44afSPaul Winder * index is set correctly. 2989aa2a44afSPaul Winder */ 2990aa2a44afSPaul Winder i40e_pre_tx_queue_cfg(hw, itrq->itrq_index, B_TRUE); 29919d26e4fcSRobert Mustacchi 2992aa2a44afSPaul Winder /* 2993aa2a44afSPaul Winder * Step 2. Prepare the queue's FPM/HMC context. 2994aa2a44afSPaul Winder */ 2995aa2a44afSPaul Winder if (!i40e_setup_tx_hmc(itrq)) 2996aa2a44afSPaul Winder return (B_FALSE); 29979d26e4fcSRobert Mustacchi 2998aa2a44afSPaul Winder /* 2999aa2a44afSPaul Winder * Step 3. Verify that it's clear that this PF owns this queue. 3000aa2a44afSPaul Winder */ 3001aa2a44afSPaul Winder reg = I40E_QTX_CTL_PF_QUEUE; 3002aa2a44afSPaul Winder reg |= (hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & 3003aa2a44afSPaul Winder I40E_QTX_CTL_PF_INDX_MASK; 3004aa2a44afSPaul Winder I40E_WRITE_REG(hw, I40E_QTX_CTL(itrq->itrq_index), reg); 3005aa2a44afSPaul Winder i40e_flush(hw); 30069d26e4fcSRobert Mustacchi 3007aa2a44afSPaul Winder /* 3008aa2a44afSPaul Winder * Step 4. Set the QENA_REQ flag. 3009aa2a44afSPaul Winder */ 3010aa2a44afSPaul Winder reg = I40E_READ_REG(hw, I40E_QTX_ENA(itrq->itrq_index)); 3011aa2a44afSPaul Winder VERIFY0(reg & (I40E_QTX_ENA_QENA_REQ_MASK | 3012aa2a44afSPaul Winder I40E_QTX_ENA_QENA_STAT_MASK)); 3013aa2a44afSPaul Winder reg |= I40E_QTX_ENA_QENA_REQ_MASK; 3014aa2a44afSPaul Winder I40E_WRITE_REG(hw, I40E_QTX_ENA(itrq->itrq_index), reg); 30159d26e4fcSRobert Mustacchi 3016aa2a44afSPaul Winder /* 3017aa2a44afSPaul Winder * Step 5. Verify that QENA_STAT has been set. It's promised 3018aa2a44afSPaul Winder * that this should occur within about 10 us, but like BSD, 3019aa2a44afSPaul Winder * we'll try for up to 100 ms for this queue. 3020aa2a44afSPaul Winder */ 3021aa2a44afSPaul Winder for (i = 0; i < I40E_RING_WAIT_NTRIES; i++) { 3022aa2a44afSPaul Winder reg = I40E_READ_REG(hw, I40E_QTX_ENA(itrq->itrq_index)); 3023aa2a44afSPaul Winder 3024aa2a44afSPaul Winder if (reg & I40E_QTX_ENA_QENA_STAT_MASK) 3025aa2a44afSPaul Winder break; 3026aa2a44afSPaul Winder i40e_msec_delay(I40E_RING_WAIT_PAUSE); 3027aa2a44afSPaul Winder } 3028aa2a44afSPaul Winder 3029aa2a44afSPaul Winder if ((reg & I40E_QTX_ENA_QENA_STAT_MASK) == 0) { 3030aa2a44afSPaul Winder i40e_error(i40e, "failed to enable tx queue %d, timed " 3031aa2a44afSPaul Winder "out", itrq->itrq_index); 3032aa2a44afSPaul Winder return (B_FALSE); 3033aa2a44afSPaul Winder } 3034aa2a44afSPaul Winder 3035aa2a44afSPaul Winder return (B_TRUE); 3036aa2a44afSPaul Winder } 3037aa2a44afSPaul Winder 3038aa2a44afSPaul Winder int 3039aa2a44afSPaul Winder i40e_setup_ring(i40e_trqpair_t *itrq) 3040aa2a44afSPaul Winder { 3041aa2a44afSPaul Winder i40e_t *i40e = itrq->itrq_i40e; 3042aa2a44afSPaul Winder hrtime_t now, gap; 3043aa2a44afSPaul Winder 3044aa2a44afSPaul Winder if (!i40e_alloc_ring_mem(itrq)) { 3045aa2a44afSPaul Winder i40e_error(i40e, "Failed to allocate ring memory"); 3046aa2a44afSPaul Winder return (ENOMEM); 30479d26e4fcSRobert Mustacchi } 30489d26e4fcSRobert Mustacchi 30499d26e4fcSRobert Mustacchi /* 3050aa2a44afSPaul Winder * 8.3.3.1.1 Receive Queue Enable Flow states software should 3051aa2a44afSPaul Winder * wait at least 50ms between ring disable and enable. See how 3052aa2a44afSPaul Winder * long we need to wait, and wait only if required. 30539d26e4fcSRobert Mustacchi */ 3054aa2a44afSPaul Winder now = gethrtime(); 3055aa2a44afSPaul Winder gap = NSEC2MSEC(now - itrq->irtq_time_stopped); 3056aa2a44afSPaul Winder if (gap < I40E_RING_ENABLE_GAP && gap != 0) 3057aa2a44afSPaul Winder delay(drv_usectohz(gap * 1000)); 30589d26e4fcSRobert Mustacchi 3059aa2a44afSPaul Winder mutex_enter(&itrq->itrq_intr_lock); 3060aa2a44afSPaul Winder if (!i40e_setup_rx_ring(itrq)) 3061aa2a44afSPaul Winder goto failed; 30629d26e4fcSRobert Mustacchi 3063aa2a44afSPaul Winder if (!i40e_setup_tx_ring(itrq)) 3064aa2a44afSPaul Winder goto failed; 30659d26e4fcSRobert Mustacchi 3066aa2a44afSPaul Winder if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_reg_handle) != 3067aa2a44afSPaul Winder DDI_FM_OK) 3068aa2a44afSPaul Winder goto failed; 30699d26e4fcSRobert Mustacchi 3070aa2a44afSPaul Winder itrq->itrq_intr_quiesce = B_FALSE; 3071aa2a44afSPaul Winder mutex_exit(&itrq->itrq_intr_lock); 3072aa2a44afSPaul Winder 3073aa2a44afSPaul Winder mutex_enter(&itrq->itrq_tx_lock); 3074aa2a44afSPaul Winder itrq->itrq_tx_quiesce = B_FALSE; 3075aa2a44afSPaul Winder mutex_exit(&itrq->itrq_tx_lock); 3076aa2a44afSPaul Winder 3077aa2a44afSPaul Winder return (0); 3078aa2a44afSPaul Winder 3079aa2a44afSPaul Winder failed: 3080aa2a44afSPaul Winder mutex_exit(&itrq->itrq_intr_lock); 3081aa2a44afSPaul Winder i40e_free_ring_mem(itrq, B_TRUE); 3082aa2a44afSPaul Winder ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST); 3083aa2a44afSPaul Winder 3084aa2a44afSPaul Winder return (EIO); 30859d26e4fcSRobert Mustacchi } 30869d26e4fcSRobert Mustacchi 30879d26e4fcSRobert Mustacchi void 3088aa2a44afSPaul Winder i40e_stop(i40e_t *i40e) 30899d26e4fcSRobert Mustacchi { 309009aee612SRyan Zezeski uint_t i; 309109aee612SRyan Zezeski i40e_hw_t *hw = &i40e->i40e_hw_space; 30929d26e4fcSRobert Mustacchi 30939d26e4fcSRobert Mustacchi ASSERT(MUTEX_HELD(&i40e->i40e_general_lock)); 30949d26e4fcSRobert Mustacchi 30959d26e4fcSRobert Mustacchi /* 30969d26e4fcSRobert Mustacchi * Shutdown and drain the tx and rx pipeline. We do this using the 30979d26e4fcSRobert Mustacchi * following steps. 30989d26e4fcSRobert Mustacchi * 30999d26e4fcSRobert Mustacchi * 1) Shutdown interrupts to all the queues (trying to keep the admin 31009d26e4fcSRobert Mustacchi * queue alive). 31019d26e4fcSRobert Mustacchi * 31029d26e4fcSRobert Mustacchi * 2) Remove all of the interrupt tx and rx causes by setting the 31039d26e4fcSRobert Mustacchi * interrupt linked lists to zero. 31049d26e4fcSRobert Mustacchi * 31059d26e4fcSRobert Mustacchi * 2) Shutdown the tx and rx rings. Because i40e_shutdown_rings() should 31069d26e4fcSRobert Mustacchi * wait for all the queues to be disabled, once we reach that point 31079d26e4fcSRobert Mustacchi * it should be safe to free associated data. 31089d26e4fcSRobert Mustacchi * 31099d26e4fcSRobert Mustacchi * 4) Wait 50ms after all that is done. This ensures that the rings are 31109d26e4fcSRobert Mustacchi * ready for programming again and we don't have to think about this 31119d26e4fcSRobert Mustacchi * in other parts of the driver. 31129d26e4fcSRobert Mustacchi * 31139d26e4fcSRobert Mustacchi * 5) Disable remaining chip interrupts, (admin queue, etc.) 31149d26e4fcSRobert Mustacchi * 31159d26e4fcSRobert Mustacchi * 6) Verify that FM is happy with all the register accesses we 31169d26e4fcSRobert Mustacchi * performed. 31179d26e4fcSRobert Mustacchi */ 31189d26e4fcSRobert Mustacchi i40e_intr_io_disable_all(i40e); 31199d26e4fcSRobert Mustacchi i40e_intr_io_clear_cause(i40e); 31209d26e4fcSRobert Mustacchi 3121aa2a44afSPaul Winder if (!i40e_shutdown_rings(i40e)) 31229d26e4fcSRobert Mustacchi ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST); 31239d26e4fcSRobert Mustacchi 312409aee612SRyan Zezeski /* 312509aee612SRyan Zezeski * We don't delete the default VSI because it replaces the VEB 312609aee612SRyan Zezeski * after VEB deletion (see the "Delete Element" section). 312709aee612SRyan Zezeski * Furthermore, since the default VSI is provided by the 312809aee612SRyan Zezeski * firmware, we never attempt to delete it. 312909aee612SRyan Zezeski */ 313009aee612SRyan Zezeski for (i = 1; i < i40e->i40e_num_rx_groups; i++) { 313109aee612SRyan Zezeski i40e_delete_vsi(i40e, i); 313209aee612SRyan Zezeski } 313309aee612SRyan Zezeski 313409aee612SRyan Zezeski if (i40e->i40e_veb_seid != 0) { 313509aee612SRyan Zezeski int rc = i40e_aq_delete_element(hw, i40e->i40e_veb_seid, NULL); 313609aee612SRyan Zezeski 313709aee612SRyan Zezeski if (rc != I40E_SUCCESS) { 313809aee612SRyan Zezeski i40e_error(i40e, "Failed to delete VEB %d: %d", rc, 313909aee612SRyan Zezeski hw->aq.asq_last_status); 314009aee612SRyan Zezeski } 314109aee612SRyan Zezeski 314209aee612SRyan Zezeski i40e->i40e_veb_seid = 0; 314309aee612SRyan Zezeski } 314409aee612SRyan Zezeski 31459d26e4fcSRobert Mustacchi i40e_intr_chip_fini(i40e); 31469d26e4fcSRobert Mustacchi 31479d26e4fcSRobert Mustacchi if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_cfg_handle) != 31489d26e4fcSRobert Mustacchi DDI_FM_OK) { 31499d26e4fcSRobert Mustacchi ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST); 31509d26e4fcSRobert Mustacchi } 31519d26e4fcSRobert Mustacchi 315209aee612SRyan Zezeski for (i = 0; i < i40e->i40e_num_rx_groups; i++) { 315309aee612SRyan Zezeski i40e_stat_vsi_fini(i40e, i); 315409aee612SRyan Zezeski } 31559d26e4fcSRobert Mustacchi 31569d26e4fcSRobert Mustacchi i40e->i40e_link_speed = 0; 31579d26e4fcSRobert Mustacchi i40e->i40e_link_duplex = 0; 31589d26e4fcSRobert Mustacchi i40e_link_state_set(i40e, LINK_STATE_UNKNOWN); 31599d26e4fcSRobert Mustacchi } 31609d26e4fcSRobert Mustacchi 31619d26e4fcSRobert Mustacchi boolean_t 3162aa2a44afSPaul Winder i40e_start(i40e_t *i40e) 31639d26e4fcSRobert Mustacchi { 31649d26e4fcSRobert Mustacchi i40e_hw_t *hw = &i40e->i40e_hw_space; 31659d26e4fcSRobert Mustacchi boolean_t rc = B_TRUE; 3166aa2a44afSPaul Winder int err; 31679d26e4fcSRobert Mustacchi 31689d26e4fcSRobert Mustacchi ASSERT(MUTEX_HELD(&i40e->i40e_general_lock)); 31699d26e4fcSRobert Mustacchi 31709d26e4fcSRobert Mustacchi if (!i40e_chip_start(i40e)) { 31719d26e4fcSRobert Mustacchi i40e_fm_ereport(i40e, DDI_FM_DEVICE_INVAL_STATE); 31729d26e4fcSRobert Mustacchi rc = B_FALSE; 31739d26e4fcSRobert Mustacchi goto done; 31749d26e4fcSRobert Mustacchi } 31759d26e4fcSRobert Mustacchi 31769d26e4fcSRobert Mustacchi /* 31779d26e4fcSRobert Mustacchi * Enable broadcast traffic; however, do not enable multicast traffic. 31789d26e4fcSRobert Mustacchi * That's handle exclusively through MAC's mc_multicst routines. 31799d26e4fcSRobert Mustacchi */ 318009aee612SRyan Zezeski err = i40e_aq_set_vsi_broadcast(hw, I40E_DEF_VSI_SEID(i40e), B_TRUE, 318109aee612SRyan Zezeski NULL); 31829d26e4fcSRobert Mustacchi if (err != I40E_SUCCESS) { 31839d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to set default VSI: %d", err); 31849d26e4fcSRobert Mustacchi rc = B_FALSE; 31859d26e4fcSRobert Mustacchi goto done; 31869d26e4fcSRobert Mustacchi } 31879d26e4fcSRobert Mustacchi 3188*df36e06dSRobert Mustacchi err = i40e_aq_set_mac_config(hw, i40e->i40e_frame_max, B_TRUE, 0, 3189*df36e06dSRobert Mustacchi B_FALSE, NULL); 31909d26e4fcSRobert Mustacchi if (err != I40E_SUCCESS) { 31919d26e4fcSRobert Mustacchi i40e_error(i40e, "failed to set MAC config: %d", err); 31929d26e4fcSRobert Mustacchi rc = B_FALSE; 31939d26e4fcSRobert Mustacchi goto done; 31949d26e4fcSRobert Mustacchi } 31959d26e4fcSRobert Mustacchi 31969d26e4fcSRobert Mustacchi /* 31979d26e4fcSRobert Mustacchi * Finally, make sure that we're happy from an FM perspective. 31989d26e4fcSRobert Mustacchi */ 31999d26e4fcSRobert Mustacchi if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_reg_handle) != 32009d26e4fcSRobert Mustacchi DDI_FM_OK) { 32019d26e4fcSRobert Mustacchi rc = B_FALSE; 32029d26e4fcSRobert Mustacchi goto done; 32039d26e4fcSRobert Mustacchi } 32049d26e4fcSRobert Mustacchi 32059d26e4fcSRobert Mustacchi /* Clear state bits prior to final interrupt enabling. */ 32069d26e4fcSRobert Mustacchi atomic_and_32(&i40e->i40e_state, 32079d26e4fcSRobert Mustacchi ~(I40E_ERROR | I40E_STALL | I40E_OVERTEMP)); 32089d26e4fcSRobert Mustacchi 32099d26e4fcSRobert Mustacchi i40e_intr_io_enable_all(i40e); 32109d26e4fcSRobert Mustacchi 32119d26e4fcSRobert Mustacchi done: 32129d26e4fcSRobert Mustacchi if (rc == B_FALSE) { 3213aa2a44afSPaul Winder i40e_stop(i40e); 32149d26e4fcSRobert Mustacchi ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST); 32159d26e4fcSRobert Mustacchi } 32169d26e4fcSRobert Mustacchi 32179d26e4fcSRobert Mustacchi return (rc); 32189d26e4fcSRobert Mustacchi } 32199d26e4fcSRobert Mustacchi 32209d26e4fcSRobert Mustacchi /* 32219d26e4fcSRobert Mustacchi * We may have loaned up descriptors to the stack. As such, if we still have 32229d26e4fcSRobert Mustacchi * them outstanding, then we will not continue with detach. 32239d26e4fcSRobert Mustacchi */ 32249d26e4fcSRobert Mustacchi static boolean_t 32259d26e4fcSRobert Mustacchi i40e_drain_rx(i40e_t *i40e) 32269d26e4fcSRobert Mustacchi { 32279d26e4fcSRobert Mustacchi mutex_enter(&i40e->i40e_rx_pending_lock); 32289d26e4fcSRobert Mustacchi while (i40e->i40e_rx_pending > 0) { 32299d26e4fcSRobert Mustacchi if (cv_reltimedwait(&i40e->i40e_rx_pending_cv, 32309d26e4fcSRobert Mustacchi &i40e->i40e_rx_pending_lock, 32319d26e4fcSRobert Mustacchi drv_usectohz(I40E_DRAIN_RX_WAIT), TR_CLOCK_TICK) == -1) { 32329d26e4fcSRobert Mustacchi mutex_exit(&i40e->i40e_rx_pending_lock); 32339d26e4fcSRobert Mustacchi return (B_FALSE); 32349d26e4fcSRobert Mustacchi } 32359d26e4fcSRobert Mustacchi } 32369d26e4fcSRobert Mustacchi mutex_exit(&i40e->i40e_rx_pending_lock); 32379d26e4fcSRobert Mustacchi 32389d26e4fcSRobert Mustacchi return (B_TRUE); 32399d26e4fcSRobert Mustacchi } 32409d26e4fcSRobert Mustacchi 3241508a0e8cSRob Johnston /* 3242508a0e8cSRob Johnston * DDI UFM Callbacks 3243508a0e8cSRob Johnston */ 3244508a0e8cSRob Johnston static int 3245508a0e8cSRob Johnston i40e_ufm_fill_image(ddi_ufm_handle_t *ufmh, void *arg, uint_t imgno, 3246508a0e8cSRob Johnston ddi_ufm_image_t *img) 3247508a0e8cSRob Johnston { 3248508a0e8cSRob Johnston if (imgno != 0) 3249508a0e8cSRob Johnston return (EINVAL); 3250508a0e8cSRob Johnston 3251508a0e8cSRob Johnston ddi_ufm_image_set_desc(img, "Firmware"); 3252508a0e8cSRob Johnston ddi_ufm_image_set_nslots(img, 1); 3253508a0e8cSRob Johnston 3254508a0e8cSRob Johnston return (0); 3255508a0e8cSRob Johnston } 3256508a0e8cSRob Johnston 3257508a0e8cSRob Johnston static int 3258508a0e8cSRob Johnston i40e_ufm_fill_slot(ddi_ufm_handle_t *ufmh, void *arg, uint_t imgno, 3259508a0e8cSRob Johnston uint_t slotno, ddi_ufm_slot_t *slot) 3260508a0e8cSRob Johnston { 3261508a0e8cSRob Johnston i40e_t *i40e = (i40e_t *)arg; 3262508a0e8cSRob Johnston char *fw_ver = NULL, *fw_bld = NULL, *api_ver = NULL; 3263508a0e8cSRob Johnston nvlist_t *misc = NULL; 3264508a0e8cSRob Johnston uint_t flags = DDI_PROP_DONTPASS; 3265508a0e8cSRob Johnston int err; 3266508a0e8cSRob Johnston 3267508a0e8cSRob Johnston if (imgno != 0 || slotno != 0 || 3268508a0e8cSRob Johnston ddi_prop_lookup_string(DDI_DEV_T_ANY, i40e->i40e_dip, flags, 3269508a0e8cSRob Johnston "firmware-version", &fw_ver) != DDI_PROP_SUCCESS || 3270508a0e8cSRob Johnston ddi_prop_lookup_string(DDI_DEV_T_ANY, i40e->i40e_dip, flags, 3271508a0e8cSRob Johnston "firmware-build", &fw_bld) != DDI_PROP_SUCCESS || 3272508a0e8cSRob Johnston ddi_prop_lookup_string(DDI_DEV_T_ANY, i40e->i40e_dip, flags, 3273508a0e8cSRob Johnston "api-version", &api_ver) != DDI_PROP_SUCCESS) { 3274508a0e8cSRob Johnston err = EINVAL; 3275508a0e8cSRob Johnston goto err; 3276508a0e8cSRob Johnston } 3277508a0e8cSRob Johnston 3278508a0e8cSRob Johnston ddi_ufm_slot_set_attrs(slot, DDI_UFM_ATTR_ACTIVE); 3279508a0e8cSRob Johnston ddi_ufm_slot_set_version(slot, fw_ver); 3280508a0e8cSRob Johnston 3281508a0e8cSRob Johnston (void) nvlist_alloc(&misc, NV_UNIQUE_NAME, KM_SLEEP); 3282508a0e8cSRob Johnston if ((err = nvlist_add_string(misc, "firmware-build", fw_bld)) != 0 || 3283508a0e8cSRob Johnston (err = nvlist_add_string(misc, "api-version", api_ver)) != 0) { 3284508a0e8cSRob Johnston goto err; 3285508a0e8cSRob Johnston } 3286508a0e8cSRob Johnston ddi_ufm_slot_set_misc(slot, misc); 3287508a0e8cSRob Johnston 3288508a0e8cSRob Johnston ddi_prop_free(fw_ver); 3289508a0e8cSRob Johnston ddi_prop_free(fw_bld); 3290508a0e8cSRob Johnston ddi_prop_free(api_ver); 3291508a0e8cSRob Johnston 3292508a0e8cSRob Johnston return (0); 3293508a0e8cSRob Johnston err: 3294508a0e8cSRob Johnston nvlist_free(misc); 3295508a0e8cSRob Johnston if (fw_ver != NULL) 3296508a0e8cSRob Johnston ddi_prop_free(fw_ver); 3297508a0e8cSRob Johnston if (fw_bld != NULL) 3298508a0e8cSRob Johnston ddi_prop_free(fw_bld); 3299508a0e8cSRob Johnston if (api_ver != NULL) 3300508a0e8cSRob Johnston ddi_prop_free(api_ver); 3301508a0e8cSRob Johnston 3302508a0e8cSRob Johnston return (err); 3303508a0e8cSRob Johnston } 3304508a0e8cSRob Johnston 3305508a0e8cSRob Johnston static int 3306508a0e8cSRob Johnston i40e_ufm_getcaps(ddi_ufm_handle_t *ufmh, void *arg, ddi_ufm_cap_t *caps) 3307508a0e8cSRob Johnston { 3308508a0e8cSRob Johnston *caps = DDI_UFM_CAP_REPORT; 3309508a0e8cSRob Johnston 3310508a0e8cSRob Johnston return (0); 3311508a0e8cSRob Johnston } 3312508a0e8cSRob Johnston 3313508a0e8cSRob Johnston static ddi_ufm_ops_t i40e_ufm_ops = { 3314508a0e8cSRob Johnston NULL, 3315508a0e8cSRob Johnston i40e_ufm_fill_image, 3316508a0e8cSRob Johnston i40e_ufm_fill_slot, 3317508a0e8cSRob Johnston i40e_ufm_getcaps 3318508a0e8cSRob Johnston }; 3319508a0e8cSRob Johnston 33209d26e4fcSRobert Mustacchi static int 33219d26e4fcSRobert Mustacchi i40e_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd) 33229d26e4fcSRobert Mustacchi { 33239d26e4fcSRobert Mustacchi i40e_t *i40e; 33249d26e4fcSRobert Mustacchi struct i40e_osdep *osdep; 33259d26e4fcSRobert Mustacchi i40e_hw_t *hw; 33269d26e4fcSRobert Mustacchi int instance; 33279d26e4fcSRobert Mustacchi 33289d26e4fcSRobert Mustacchi if (cmd != DDI_ATTACH) 33299d26e4fcSRobert Mustacchi return (DDI_FAILURE); 33309d26e4fcSRobert Mustacchi 33319d26e4fcSRobert Mustacchi instance = ddi_get_instance(devinfo); 33329d26e4fcSRobert Mustacchi i40e = kmem_zalloc(sizeof (i40e_t), KM_SLEEP); 33339d26e4fcSRobert Mustacchi 33349d26e4fcSRobert Mustacchi i40e->i40e_aqbuf = kmem_zalloc(I40E_ADMINQ_BUFSZ, KM_SLEEP); 33359d26e4fcSRobert Mustacchi i40e->i40e_instance = instance; 33369d26e4fcSRobert Mustacchi i40e->i40e_dip = devinfo; 33379d26e4fcSRobert Mustacchi 33389d26e4fcSRobert Mustacchi hw = &i40e->i40e_hw_space; 33399d26e4fcSRobert Mustacchi osdep = &i40e->i40e_osdep_space; 33409d26e4fcSRobert Mustacchi hw->back = osdep; 33419d26e4fcSRobert Mustacchi osdep->ios_i40e = i40e; 33429d26e4fcSRobert Mustacchi 33439d26e4fcSRobert Mustacchi ddi_set_driver_private(devinfo, i40e); 33449d26e4fcSRobert Mustacchi 33459d26e4fcSRobert Mustacchi i40e_fm_init(i40e); 33469d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_FM_INIT; 33479d26e4fcSRobert Mustacchi 33489d26e4fcSRobert Mustacchi if (pci_config_setup(devinfo, &osdep->ios_cfg_handle) != DDI_SUCCESS) { 33499d26e4fcSRobert Mustacchi i40e_error(i40e, "Failed to map PCI configurations."); 33509d26e4fcSRobert Mustacchi goto attach_fail; 33519d26e4fcSRobert Mustacchi } 33529d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_PCI_CONFIG; 33539d26e4fcSRobert Mustacchi 33543d75a287SRobert Mustacchi i40e_identify_hardware(i40e); 33559d26e4fcSRobert Mustacchi 33569d26e4fcSRobert Mustacchi if (!i40e_regs_map(i40e)) { 33579d26e4fcSRobert Mustacchi i40e_error(i40e, "Failed to map device registers."); 33589d26e4fcSRobert Mustacchi goto attach_fail; 33599d26e4fcSRobert Mustacchi } 33609d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_REGS_MAP; 33619d26e4fcSRobert Mustacchi 33629d26e4fcSRobert Mustacchi i40e_init_properties(i40e); 33639d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_PROPS; 33649d26e4fcSRobert Mustacchi 33659d26e4fcSRobert Mustacchi if (!i40e_common_code_init(i40e, hw)) 33669d26e4fcSRobert Mustacchi goto attach_fail; 33679d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_COMMON_CODE; 33689d26e4fcSRobert Mustacchi 33699d26e4fcSRobert Mustacchi /* 33709d26e4fcSRobert Mustacchi * When we participate in IRM, we should make sure that we register 33719d26e4fcSRobert Mustacchi * ourselves with it before callbacks. 33729d26e4fcSRobert Mustacchi */ 33739d26e4fcSRobert Mustacchi if (!i40e_alloc_intrs(i40e, devinfo)) { 33749d26e4fcSRobert Mustacchi i40e_error(i40e, "Failed to allocate interrupts."); 33759d26e4fcSRobert Mustacchi goto attach_fail; 33769d26e4fcSRobert Mustacchi } 33779d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_ALLOC_INTR; 33789d26e4fcSRobert Mustacchi 33799d26e4fcSRobert Mustacchi if (!i40e_alloc_trqpairs(i40e)) { 33809d26e4fcSRobert Mustacchi i40e_error(i40e, 33819d26e4fcSRobert Mustacchi "Failed to allocate receive & transmit rings."); 33829d26e4fcSRobert Mustacchi goto attach_fail; 33839d26e4fcSRobert Mustacchi } 33849d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_ALLOC_RINGSLOCKS; 33859d26e4fcSRobert Mustacchi 33869d26e4fcSRobert Mustacchi if (!i40e_map_intrs_to_vectors(i40e)) { 33879d26e4fcSRobert Mustacchi i40e_error(i40e, "Failed to map interrupts to vectors."); 33889d26e4fcSRobert Mustacchi goto attach_fail; 33899d26e4fcSRobert Mustacchi } 33909d26e4fcSRobert Mustacchi 33919d26e4fcSRobert Mustacchi if (!i40e_add_intr_handlers(i40e)) { 33929d26e4fcSRobert Mustacchi i40e_error(i40e, "Failed to add the interrupt handlers."); 33939d26e4fcSRobert Mustacchi goto attach_fail; 33949d26e4fcSRobert Mustacchi } 33959d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_ADD_INTR; 33969d26e4fcSRobert Mustacchi 33979d26e4fcSRobert Mustacchi if (!i40e_final_init(i40e)) { 33989d26e4fcSRobert Mustacchi i40e_error(i40e, "Final initialization failed."); 33999d26e4fcSRobert Mustacchi goto attach_fail; 34009d26e4fcSRobert Mustacchi } 34019d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_INIT; 34029d26e4fcSRobert Mustacchi 34039d26e4fcSRobert Mustacchi if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_cfg_handle) != 34049d26e4fcSRobert Mustacchi DDI_FM_OK) { 34059d26e4fcSRobert Mustacchi ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST); 34069d26e4fcSRobert Mustacchi goto attach_fail; 34079d26e4fcSRobert Mustacchi } 34089d26e4fcSRobert Mustacchi 34099d26e4fcSRobert Mustacchi if (!i40e_stats_init(i40e)) { 34109d26e4fcSRobert Mustacchi i40e_error(i40e, "Stats initialization failed."); 34119d26e4fcSRobert Mustacchi goto attach_fail; 34129d26e4fcSRobert Mustacchi } 34139d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_STATS; 34149d26e4fcSRobert Mustacchi 34159d26e4fcSRobert Mustacchi if (!i40e_register_mac(i40e)) { 34169d26e4fcSRobert Mustacchi i40e_error(i40e, "Failed to register to MAC/GLDv3"); 34179d26e4fcSRobert Mustacchi goto attach_fail; 34189d26e4fcSRobert Mustacchi } 34199d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_MAC; 34209d26e4fcSRobert Mustacchi 34219d26e4fcSRobert Mustacchi i40e->i40e_periodic_id = ddi_periodic_add(i40e_timer, i40e, 34229d26e4fcSRobert Mustacchi I40E_CYCLIC_PERIOD, DDI_IPL_0); 34239d26e4fcSRobert Mustacchi if (i40e->i40e_periodic_id == 0) { 34249d26e4fcSRobert Mustacchi i40e_error(i40e, "Failed to add the link-check timer"); 34259d26e4fcSRobert Mustacchi goto attach_fail; 34269d26e4fcSRobert Mustacchi } 34279d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_LINK_TIMER; 34289d26e4fcSRobert Mustacchi 34299d26e4fcSRobert Mustacchi if (!i40e_enable_interrupts(i40e)) { 34309d26e4fcSRobert Mustacchi i40e_error(i40e, "Failed to enable DDI interrupts"); 34319d26e4fcSRobert Mustacchi goto attach_fail; 34329d26e4fcSRobert Mustacchi } 34339d26e4fcSRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_ENABLE_INTR; 34349d26e4fcSRobert Mustacchi 343544b0ba91SRobert Mustacchi if (i40e->i40e_hw_space.bus.func == 0) { 343644b0ba91SRobert Mustacchi if (ddi_ufm_init(i40e->i40e_dip, DDI_UFM_CURRENT_VERSION, 343744b0ba91SRobert Mustacchi &i40e_ufm_ops, &i40e->i40e_ufmh, i40e) != 0) { 343844b0ba91SRobert Mustacchi i40e_error(i40e, "failed to initialize UFM subsystem"); 343944b0ba91SRobert Mustacchi goto attach_fail; 344044b0ba91SRobert Mustacchi } 344144b0ba91SRobert Mustacchi ddi_ufm_update(i40e->i40e_ufmh); 344244b0ba91SRobert Mustacchi i40e->i40e_attach_progress |= I40E_ATTACH_UFM_INIT; 3443508a0e8cSRob Johnston } 3444508a0e8cSRob Johnston 34459d26e4fcSRobert Mustacchi atomic_or_32(&i40e->i40e_state, I40E_INITIALIZED); 34469d26e4fcSRobert Mustacchi 34479d26e4fcSRobert Mustacchi mutex_enter(&i40e_glock); 34489d26e4fcSRobert Mustacchi list_insert_tail(&i40e_glist, i40e); 34499d26e4fcSRobert Mustacchi mutex_exit(&i40e_glock); 34509d26e4fcSRobert Mustacchi 34519d26e4fcSRobert Mustacchi return (DDI_SUCCESS); 34529d26e4fcSRobert Mustacchi 34539d26e4fcSRobert Mustacchi attach_fail: 34549d26e4fcSRobert Mustacchi i40e_unconfigure(devinfo, i40e); 34559d26e4fcSRobert Mustacchi return (DDI_FAILURE); 34569d26e4fcSRobert Mustacchi } 34579d26e4fcSRobert Mustacchi 34589d26e4fcSRobert Mustacchi static int 34599d26e4fcSRobert Mustacchi i40e_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd) 34609d26e4fcSRobert Mustacchi { 34619d26e4fcSRobert Mustacchi i40e_t *i40e; 34629d26e4fcSRobert Mustacchi 34639d26e4fcSRobert Mustacchi if (cmd != DDI_DETACH) 34649d26e4fcSRobert Mustacchi return (DDI_FAILURE); 34659d26e4fcSRobert Mustacchi 34669d26e4fcSRobert Mustacchi i40e = (i40e_t *)ddi_get_driver_private(devinfo); 34679d26e4fcSRobert Mustacchi if (i40e == NULL) { 34689d26e4fcSRobert Mustacchi i40e_log(NULL, "i40e_detach() called with no i40e pointer!"); 34699d26e4fcSRobert Mustacchi return (DDI_FAILURE); 34709d26e4fcSRobert Mustacchi } 34719d26e4fcSRobert Mustacchi 34729d26e4fcSRobert Mustacchi if (i40e_drain_rx(i40e) == B_FALSE) { 34739d26e4fcSRobert Mustacchi i40e_log(i40e, "timed out draining DMA resources, %d buffers " 34749d26e4fcSRobert Mustacchi "remain", i40e->i40e_rx_pending); 34759d26e4fcSRobert Mustacchi return (DDI_FAILURE); 34769d26e4fcSRobert Mustacchi } 34779d26e4fcSRobert Mustacchi 34789d26e4fcSRobert Mustacchi mutex_enter(&i40e_glock); 34799d26e4fcSRobert Mustacchi list_remove(&i40e_glist, i40e); 34809d26e4fcSRobert Mustacchi mutex_exit(&i40e_glock); 34819d26e4fcSRobert Mustacchi 34829d26e4fcSRobert Mustacchi i40e_unconfigure(devinfo, i40e); 34839d26e4fcSRobert Mustacchi 34849d26e4fcSRobert Mustacchi return (DDI_SUCCESS); 34859d26e4fcSRobert Mustacchi } 34869d26e4fcSRobert Mustacchi 34879d26e4fcSRobert Mustacchi static struct cb_ops i40e_cb_ops = { 34889d26e4fcSRobert Mustacchi nulldev, /* cb_open */ 34899d26e4fcSRobert Mustacchi nulldev, /* cb_close */ 34909d26e4fcSRobert Mustacchi nodev, /* cb_strategy */ 34919d26e4fcSRobert Mustacchi nodev, /* cb_print */ 34929d26e4fcSRobert Mustacchi nodev, /* cb_dump */ 34939d26e4fcSRobert Mustacchi nodev, /* cb_read */ 34949d26e4fcSRobert Mustacchi nodev, /* cb_write */ 34959d26e4fcSRobert Mustacchi nodev, /* cb_ioctl */ 34969d26e4fcSRobert Mustacchi nodev, /* cb_devmap */ 34979d26e4fcSRobert Mustacchi nodev, /* cb_mmap */ 34989d26e4fcSRobert Mustacchi nodev, /* cb_segmap */ 34999d26e4fcSRobert Mustacchi nochpoll, /* cb_chpoll */ 35009d26e4fcSRobert Mustacchi ddi_prop_op, /* cb_prop_op */ 35019d26e4fcSRobert Mustacchi NULL, /* cb_stream */ 35029d26e4fcSRobert Mustacchi D_MP | D_HOTPLUG, /* cb_flag */ 35039d26e4fcSRobert Mustacchi CB_REV, /* cb_rev */ 35049d26e4fcSRobert Mustacchi nodev, /* cb_aread */ 35059d26e4fcSRobert Mustacchi nodev /* cb_awrite */ 35069d26e4fcSRobert Mustacchi }; 35079d26e4fcSRobert Mustacchi 35089d26e4fcSRobert Mustacchi static struct dev_ops i40e_dev_ops = { 35099d26e4fcSRobert Mustacchi DEVO_REV, /* devo_rev */ 35109d26e4fcSRobert Mustacchi 0, /* devo_refcnt */ 35119d26e4fcSRobert Mustacchi NULL, /* devo_getinfo */ 35129d26e4fcSRobert Mustacchi nulldev, /* devo_identify */ 35139d26e4fcSRobert Mustacchi nulldev, /* devo_probe */ 35149d26e4fcSRobert Mustacchi i40e_attach, /* devo_attach */ 35159d26e4fcSRobert Mustacchi i40e_detach, /* devo_detach */ 35169d26e4fcSRobert Mustacchi nodev, /* devo_reset */ 35179d26e4fcSRobert Mustacchi &i40e_cb_ops, /* devo_cb_ops */ 35189d26e4fcSRobert Mustacchi NULL, /* devo_bus_ops */ 3519aa2a44afSPaul Winder nulldev, /* devo_power */ 35209d26e4fcSRobert Mustacchi ddi_quiesce_not_supported /* devo_quiesce */ 35219d26e4fcSRobert Mustacchi }; 35229d26e4fcSRobert Mustacchi 35239d26e4fcSRobert Mustacchi static struct modldrv i40e_modldrv = { 35249d26e4fcSRobert Mustacchi &mod_driverops, 35259d26e4fcSRobert Mustacchi i40e_ident, 35269d26e4fcSRobert Mustacchi &i40e_dev_ops 35279d26e4fcSRobert Mustacchi }; 35289d26e4fcSRobert Mustacchi 35299d26e4fcSRobert Mustacchi static struct modlinkage i40e_modlinkage = { 35309d26e4fcSRobert Mustacchi MODREV_1, 35319d26e4fcSRobert Mustacchi &i40e_modldrv, 35329d26e4fcSRobert Mustacchi NULL 35339d26e4fcSRobert Mustacchi }; 35349d26e4fcSRobert Mustacchi 35359d26e4fcSRobert Mustacchi /* 35369d26e4fcSRobert Mustacchi * Module Initialization Functions. 35379d26e4fcSRobert Mustacchi */ 35389d26e4fcSRobert Mustacchi int 35399d26e4fcSRobert Mustacchi _init(void) 35409d26e4fcSRobert Mustacchi { 35419d26e4fcSRobert Mustacchi int status; 35429d26e4fcSRobert Mustacchi 35439d26e4fcSRobert Mustacchi list_create(&i40e_glist, sizeof (i40e_t), offsetof(i40e_t, i40e_glink)); 35449d26e4fcSRobert Mustacchi list_create(&i40e_dlist, sizeof (i40e_device_t), 35459d26e4fcSRobert Mustacchi offsetof(i40e_device_t, id_link)); 35469d26e4fcSRobert Mustacchi mutex_init(&i40e_glock, NULL, MUTEX_DRIVER, NULL); 35479d26e4fcSRobert Mustacchi mac_init_ops(&i40e_dev_ops, I40E_MODULE_NAME); 35489d26e4fcSRobert Mustacchi 35499d26e4fcSRobert Mustacchi status = mod_install(&i40e_modlinkage); 35509d26e4fcSRobert Mustacchi if (status != DDI_SUCCESS) { 35519d26e4fcSRobert Mustacchi mac_fini_ops(&i40e_dev_ops); 35529d26e4fcSRobert Mustacchi mutex_destroy(&i40e_glock); 35539d26e4fcSRobert Mustacchi list_destroy(&i40e_dlist); 35549d26e4fcSRobert Mustacchi list_destroy(&i40e_glist); 35559d26e4fcSRobert Mustacchi } 35569d26e4fcSRobert Mustacchi 35579d26e4fcSRobert Mustacchi return (status); 35589d26e4fcSRobert Mustacchi } 35599d26e4fcSRobert Mustacchi 35609d26e4fcSRobert Mustacchi int 35619d26e4fcSRobert Mustacchi _info(struct modinfo *modinfop) 35629d26e4fcSRobert Mustacchi { 35639d26e4fcSRobert Mustacchi return (mod_info(&i40e_modlinkage, modinfop)); 35649d26e4fcSRobert Mustacchi } 35659d26e4fcSRobert Mustacchi 35669d26e4fcSRobert Mustacchi int 35679d26e4fcSRobert Mustacchi _fini(void) 35689d26e4fcSRobert Mustacchi { 35699d26e4fcSRobert Mustacchi int status; 35709d26e4fcSRobert Mustacchi 35719d26e4fcSRobert Mustacchi status = mod_remove(&i40e_modlinkage); 35729d26e4fcSRobert Mustacchi if (status == DDI_SUCCESS) { 35739d26e4fcSRobert Mustacchi mac_fini_ops(&i40e_dev_ops); 35749d26e4fcSRobert Mustacchi mutex_destroy(&i40e_glock); 35759d26e4fcSRobert Mustacchi list_destroy(&i40e_dlist); 35769d26e4fcSRobert Mustacchi list_destroy(&i40e_glist); 35779d26e4fcSRobert Mustacchi } 35789d26e4fcSRobert Mustacchi 35799d26e4fcSRobert Mustacchi return (status); 35809d26e4fcSRobert Mustacchi } 3581