13dec9fcdSqs /*
23dec9fcdSqs * CDDL HEADER START
33dec9fcdSqs *
43dec9fcdSqs * The contents of this file are subject to the terms of the
53dec9fcdSqs * Common Development and Distribution License (the "License").
63dec9fcdSqs * You may not use this file except in compliance with the License.
73dec9fcdSqs *
83dec9fcdSqs * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
93dec9fcdSqs * or http://www.opensolaris.org/os/licensing.
103dec9fcdSqs * See the License for the specific language governing permissions
113dec9fcdSqs * and limitations under the License.
123dec9fcdSqs *
133dec9fcdSqs * When distributing Covered Code, include this CDDL HEADER in each
143dec9fcdSqs * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
153dec9fcdSqs * If applicable, add the following below this CDDL HEADER, with the
163dec9fcdSqs * fields enclosed by brackets "[]" replaced with your own identifying
173dec9fcdSqs * information: Portions Copyright [yyyy] [name of copyright owner]
183dec9fcdSqs *
193dec9fcdSqs * CDDL HEADER END
203dec9fcdSqs */
213dec9fcdSqs /*
223dec9fcdSqs * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
233dec9fcdSqs * Use is subject to license terms.
243dec9fcdSqs */
253dec9fcdSqs
263dec9fcdSqs #include <hxge_impl.h>
273dec9fcdSqs #include <inet/common.h>
283dec9fcdSqs #include <inet/mi.h>
293dec9fcdSqs #include <inet/nd.h>
303dec9fcdSqs
313dec9fcdSqs extern uint64_t hpi_debug_level;
323dec9fcdSqs
333dec9fcdSqs #define HXGE_PARAM_MAC_RW \
343dec9fcdSqs HXGE_PARAM_RW | HXGE_PARAM_MAC | \
353dec9fcdSqs HXGE_PARAM_NDD_WR_OK | HXGE_PARAM_READ_PROP
363dec9fcdSqs
373dec9fcdSqs #define HXGE_PARAM_RXDMA_RW HXGE_PARAM_RWP | HXGE_PARAM_RXDMA | \
383dec9fcdSqs HXGE_PARAM_NDD_WR_OK | HXGE_PARAM_READ_PROP
393dec9fcdSqs
403dec9fcdSqs #define HXGE_PARAM_L2CLASS_CFG \
413dec9fcdSqs HXGE_PARAM_RW | HXGE_PARAM_PROP_ARR32 | \
423dec9fcdSqs HXGE_PARAM_READ_PROP | HXGE_PARAM_NDD_WR_OK
433dec9fcdSqs
443dec9fcdSqs #define HXGE_PARAM_CLASS_RWS \
453dec9fcdSqs HXGE_PARAM_RWS | HXGE_PARAM_READ_PROP
463dec9fcdSqs
473dec9fcdSqs #define HXGE_PARAM_ARRAY_INIT_SIZE 0x20ULL
483dec9fcdSqs
493dec9fcdSqs #define BASE_ANY 0
503dec9fcdSqs #define BASE_BINARY 2
513dec9fcdSqs #define BASE_HEX 16
523dec9fcdSqs #define BASE_DECIMAL 10
533dec9fcdSqs #define ALL_FF_64 0xFFFFFFFFFFFFFFFFULL
543dec9fcdSqs #define ALL_FF_32 0xFFFFFFFFUL
553dec9fcdSqs
563dec9fcdSqs #define HXGE_NDD_INFODUMP_BUFF_SIZE 2048 /* is 2k enough? */
573dec9fcdSqs #define HXGE_NDD_INFODUMP_BUFF_8K 8192
583dec9fcdSqs #define HXGE_NDD_INFODUMP_BUFF_16K 0x2000
593dec9fcdSqs #define HXGE_NDD_INFODUMP_BUFF_64K 0x8000
603dec9fcdSqs
613dec9fcdSqs #define PARAM_OUTOF_RANGE(vptr, eptr, rval, pa) \
623dec9fcdSqs ((vptr == eptr) || (rval < pa->minimum) || (rval > pa->maximum))
633dec9fcdSqs
643dec9fcdSqs #define ADVANCE_PRINT_BUFFER(pmp, plen, rlen) { \
653dec9fcdSqs ((mblk_t *)pmp)->b_wptr += plen; \
663dec9fcdSqs rlen -= plen; \
673dec9fcdSqs }
683dec9fcdSqs
69a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States int hxge_param_rx_intr_pkts(p_hxge_t hxgep, queue_t *,
703dec9fcdSqs mblk_t *, char *, caddr_t);
71a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States int hxge_param_rx_intr_time(p_hxge_t hxgep, queue_t *,
723dec9fcdSqs mblk_t *, char *, caddr_t);
733dec9fcdSqs static int hxge_param_set_mac(p_hxge_t, queue_t *,
743dec9fcdSqs mblk_t *, char *, caddr_t);
753dec9fcdSqs static int hxge_param_set_ether_usr(p_hxge_t hxgep, queue_t *, mblk_t *,
763dec9fcdSqs char *, caddr_t);
77a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States int hxge_param_set_ip_opt(p_hxge_t hxgep,
783dec9fcdSqs queue_t *, mblk_t *, char *, caddr_t);
793dec9fcdSqs static int hxge_param_pfc_hash_init(p_hxge_t hxgep,
803dec9fcdSqs queue_t *, mblk_t *, char *, caddr_t);
813dec9fcdSqs static int hxge_param_tcam_enable(p_hxge_t hxgep, queue_t *,
823dec9fcdSqs mblk_t *, char *, caddr_t);
833dec9fcdSqs static int hxge_param_get_rxdma_info(p_hxge_t hxgep, queue_t *q,
843dec9fcdSqs p_mblk_t mp, caddr_t cp);
853dec9fcdSqs static int hxge_param_set_vlan_ids(p_hxge_t hxgep, queue_t *q,
863dec9fcdSqs mblk_t *mp, char *value, caddr_t cp);
873dec9fcdSqs static int hxge_param_get_vlan_ids(p_hxge_t hxgep, queue_t *q,
883dec9fcdSqs p_mblk_t mp, caddr_t cp);
89a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States int hxge_param_get_ip_opt(p_hxge_t hxgep,
903dec9fcdSqs queue_t *, mblk_t *, caddr_t);
913dec9fcdSqs static int hxge_param_get_mac(p_hxge_t hxgep, queue_t *q, p_mblk_t mp,
923dec9fcdSqs caddr_t cp);
933dec9fcdSqs static int hxge_param_get_debug_flag(p_hxge_t hxgep, queue_t *q,
943dec9fcdSqs p_mblk_t mp, caddr_t cp);
953dec9fcdSqs static int hxge_param_set_hxge_debug_flag(p_hxge_t hxgep,
963dec9fcdSqs queue_t *, mblk_t *, char *, caddr_t);
973dec9fcdSqs static int hxge_param_set_hpi_debug_flag(p_hxge_t hxgep,
983dec9fcdSqs queue_t *, mblk_t *, char *, caddr_t);
993dec9fcdSqs static int hxge_param_dump_ptrs(p_hxge_t hxgep, queue_t *q,
1003dec9fcdSqs p_mblk_t mp, caddr_t cp);
1013dec9fcdSqs
1023dec9fcdSqs /*
1033dec9fcdSqs * Global array of Hydra changable parameters.
1043dec9fcdSqs * This array is initialized to correspond to the default
1053dec9fcdSqs * Hydra configuration. This array would be copied
1063dec9fcdSqs * into the parameter structure and modifed per
1073dec9fcdSqs * fcode and hxge.conf configuration. Later, the parameters are
1083dec9fcdSqs * exported to ndd to display and run-time configuration (at least
1093dec9fcdSqs * some of them).
1103dec9fcdSqs */
1113dec9fcdSqs
1123dec9fcdSqs static hxge_param_t hxge_param_arr[] = {
113*86ef0a63SRichard Lowe /* min max value old hw-name conf-name */
1143dec9fcdSqs {hxge_param_get_generic, NULL, HXGE_PARAM_READ,
1153dec9fcdSqs 0, 999, 1000, 0, "instance", "instance"},
1163dec9fcdSqs
1173dec9fcdSqs /* MTU cannot be propagated to the stack from here, so don't show it */
1183dec9fcdSqs {hxge_param_get_mac, hxge_param_set_mac,
1193dec9fcdSqs HXGE_PARAM_MAC_RW | HXGE_PARAM_DONT_SHOW,
1203dec9fcdSqs 0, 1, 0, 0, "accept-jumbo", "accept_jumbo"},
1213dec9fcdSqs
1223dec9fcdSqs {hxge_param_get_rxdma_info, NULL,
1233dec9fcdSqs HXGE_PARAM_READ | HXGE_PARAM_DONT_SHOW,
1243dec9fcdSqs HXGE_RBR_RBB_MIN, HXGE_RBR_RBB_MAX, HXGE_RBR_RBB_DEFAULT, 0,
1253dec9fcdSqs "rx-rbr-size", "rx_rbr_size"},
1263dec9fcdSqs
1273dec9fcdSqs {hxge_param_get_rxdma_info, NULL,
1283dec9fcdSqs HXGE_PARAM_READ | HXGE_PARAM_DONT_SHOW,
1293dec9fcdSqs HXGE_RCR_MIN, HXGE_RCR_MAX, HXGE_RCR_DEFAULT, 0,
1303dec9fcdSqs "rx-rcr-size", "rx_rcr_size"},
1313dec9fcdSqs
1323dec9fcdSqs {hxge_param_get_generic, hxge_param_rx_intr_time,
1333dec9fcdSqs HXGE_PARAM_RXDMA_RW,
1343dec9fcdSqs HXGE_RDC_RCR_TIMEOUT_MIN, HXGE_RDC_RCR_TIMEOUT_MAX,
1353dec9fcdSqs RXDMA_RCR_TO_DEFAULT, 0, "rxdma-intr-time", "rxdma_intr_time"},
1363dec9fcdSqs
1373dec9fcdSqs {hxge_param_get_generic, hxge_param_rx_intr_pkts,
1383dec9fcdSqs HXGE_PARAM_RXDMA_RW,
1393dec9fcdSqs HXGE_RDC_RCR_THRESHOLD_MIN, HXGE_RDC_RCR_THRESHOLD_MAX,
1403dec9fcdSqs RXDMA_RCR_PTHRES_DEFAULT, 0,
1413dec9fcdSqs "rxdma-intr-pkts", "rxdma_intr_pkts"},
1423dec9fcdSqs
1433dec9fcdSqs /* Hardware VLAN is not used currently, so don't show it */
1443dec9fcdSqs {hxge_param_get_vlan_ids, hxge_param_set_vlan_ids,
1453dec9fcdSqs HXGE_PARAM_L2CLASS_CFG | HXGE_PARAM_DONT_SHOW,
1463dec9fcdSqs VLAN_ID_MIN, VLAN_ID_MAX, 0, 0, "vlan-ids", "vlan_ids"},
1473dec9fcdSqs
1483dec9fcdSqs /* Hardware VLAN is not used currently, so don't show it */
1493dec9fcdSqs {hxge_param_get_generic, hxge_param_set_generic,
1503dec9fcdSqs HXGE_PARAM_CLASS_RWS | HXGE_PARAM_DONT_SHOW,
1513dec9fcdSqs VLAN_ID_MIN, VLAN_ID_MAX, VLAN_ID_IMPLICIT, VLAN_ID_IMPLICIT,
1523dec9fcdSqs "implicit-vlan-id", "implicit_vlan_id"},
1533dec9fcdSqs
1543dec9fcdSqs {hxge_param_get_generic, hxge_param_tcam_enable,
1553dec9fcdSqs HXGE_PARAM_CLASS_RWS | HXGE_PARAM_DONT_SHOW,
1563dec9fcdSqs 0, 0x1, 0x0, 0, "tcam-enable", "tcam_enable"},
1573dec9fcdSqs
1583dec9fcdSqs {hxge_param_get_generic, hxge_param_pfc_hash_init,
1593dec9fcdSqs HXGE_PARAM_CLASS_RWS | HXGE_PARAM_DONT_SHOW,
1603dec9fcdSqs 0, ALL_FF_32, ALL_FF_32, 0,
1613dec9fcdSqs "hash-init-value", "hash_init_value"},
1623dec9fcdSqs
1633dec9fcdSqs {hxge_param_get_generic, hxge_param_set_ether_usr,
1643dec9fcdSqs HXGE_PARAM_CLASS_RWS | HXGE_PARAM_DONT_SHOW,
1653dec9fcdSqs 0, ALL_FF_32, 0x0, 0,
1663dec9fcdSqs "class-cfg-ether-usr1", "class_cfg_ether_usr1"},
1673dec9fcdSqs
1683dec9fcdSqs {hxge_param_get_generic, hxge_param_set_ether_usr,
1693dec9fcdSqs HXGE_PARAM_CLASS_RWS | HXGE_PARAM_DONT_SHOW,
1703dec9fcdSqs 0, ALL_FF_32, 0x0, 0,
1713dec9fcdSqs "class-cfg-ether-usr2", "class_cfg_ether_usr2"},
1723dec9fcdSqs
1733dec9fcdSqs {hxge_param_get_ip_opt, hxge_param_set_ip_opt, HXGE_PARAM_CLASS_RWS,
1743dec9fcdSqs 0, ALL_FF_32, HXGE_CLASS_TCAM_LOOKUP, 0,
1753dec9fcdSqs "class-opt-ipv4-tcp", "class_opt_ipv4_tcp"},
1763dec9fcdSqs
1773dec9fcdSqs {hxge_param_get_ip_opt, hxge_param_set_ip_opt, HXGE_PARAM_CLASS_RWS,
1783dec9fcdSqs 0, ALL_FF_32, HXGE_CLASS_TCAM_LOOKUP, 0,
1793dec9fcdSqs "class-opt-ipv4-udp", "class_opt_ipv4_udp"},
1803dec9fcdSqs
1813dec9fcdSqs {hxge_param_get_ip_opt, hxge_param_set_ip_opt, HXGE_PARAM_CLASS_RWS,
1823dec9fcdSqs 0, ALL_FF_32, HXGE_CLASS_TCAM_LOOKUP, 0,
1833dec9fcdSqs "class-opt-ipv4-ah", "class_opt_ipv4_ah"},
1843dec9fcdSqs
1853dec9fcdSqs {hxge_param_get_ip_opt, hxge_param_set_ip_opt, HXGE_PARAM_CLASS_RWS,
1863dec9fcdSqs 0, ALL_FF_32, HXGE_CLASS_TCAM_LOOKUP, 0,
1873dec9fcdSqs "class-opt-ipv4-sctp", "class_opt_ipv4_sctp"},
1883dec9fcdSqs
1893dec9fcdSqs {hxge_param_get_ip_opt, hxge_param_set_ip_opt, HXGE_PARAM_CLASS_RWS,
1903dec9fcdSqs 0, ALL_FF_32, HXGE_CLASS_TCAM_LOOKUP, 0,
1913dec9fcdSqs "class-opt-ipv6-tcp", "class_opt_ipv6_tcp"},
1923dec9fcdSqs
1933dec9fcdSqs {hxge_param_get_ip_opt, hxge_param_set_ip_opt, HXGE_PARAM_CLASS_RWS,
1943dec9fcdSqs 0, ALL_FF_32, HXGE_CLASS_TCAM_LOOKUP, 0,
1953dec9fcdSqs "class-opt-ipv6-udp", "class_opt_ipv6_udp"},
1963dec9fcdSqs
1973dec9fcdSqs {hxge_param_get_ip_opt, hxge_param_set_ip_opt, HXGE_PARAM_CLASS_RWS,
1983dec9fcdSqs 0, ALL_FF_32, HXGE_CLASS_TCAM_LOOKUP, 0,
1993dec9fcdSqs "class-opt-ipv6-ah", "class_opt_ipv6_ah"},
2003dec9fcdSqs
2013dec9fcdSqs {hxge_param_get_ip_opt, hxge_param_set_ip_opt, HXGE_PARAM_CLASS_RWS,
2023dec9fcdSqs 0, ALL_FF_32, HXGE_CLASS_TCAM_LOOKUP, 0,
2033dec9fcdSqs "class-opt-ipv6-sctp", "class_opt_ipv6_sctp"},
2043dec9fcdSqs
2053dec9fcdSqs {hxge_param_get_debug_flag, hxge_param_set_hxge_debug_flag,
2063dec9fcdSqs HXGE_PARAM_RW | HXGE_PARAM_DONT_SHOW,
2073dec9fcdSqs 0ULL, ALL_FF_64, 0ULL, 0ULL,
2083dec9fcdSqs "hxge-debug-flag", "hxge_debug_flag"},
2093dec9fcdSqs
2103dec9fcdSqs {hxge_param_get_debug_flag, hxge_param_set_hpi_debug_flag,
2113dec9fcdSqs HXGE_PARAM_RW | HXGE_PARAM_DONT_SHOW,
2123dec9fcdSqs 0ULL, ALL_FF_64, 0ULL, 0ULL,
2133dec9fcdSqs "hpi-debug-flag", "hpi_debug_flag"},
2143dec9fcdSqs
2153dec9fcdSqs {hxge_param_dump_ptrs, NULL, HXGE_PARAM_READ | HXGE_PARAM_DONT_SHOW,
2163dec9fcdSqs 0, 0x0fffffff, 0x0fffffff, 0, "dump-ptrs", "dump_ptrs"},
2173dec9fcdSqs
2183dec9fcdSqs {NULL, NULL, HXGE_PARAM_READ | HXGE_PARAM_DONT_SHOW,
2193dec9fcdSqs 0, 0x0fffffff, 0x0fffffff, 0, "end", "end"},
2203dec9fcdSqs };
2213dec9fcdSqs
2223dec9fcdSqs extern void *hxge_list;
2233dec9fcdSqs
2243dec9fcdSqs /*
2253dec9fcdSqs * Update the NDD array from the soft properties.
2263dec9fcdSqs */
2273dec9fcdSqs void
hxge_get_param_soft_properties(p_hxge_t hxgep)2283dec9fcdSqs hxge_get_param_soft_properties(p_hxge_t hxgep)
2293dec9fcdSqs {
2303dec9fcdSqs p_hxge_param_t param_arr;
2313dec9fcdSqs uint_t prop_len;
2323dec9fcdSqs int i, j;
2333dec9fcdSqs uint32_t param_count;
2343dec9fcdSqs uint32_t *int_prop_val;
2353dec9fcdSqs
2363dec9fcdSqs HXGE_DEBUG_MSG((hxgep, DDI_CTL, " ==> hxge_get_param_soft_properties"));
2373dec9fcdSqs
2383dec9fcdSqs param_arr = hxgep->param_arr;
2393dec9fcdSqs param_count = hxgep->param_count;
2403dec9fcdSqs for (i = 0; i < param_count; i++) {
2413dec9fcdSqs
2423dec9fcdSqs if ((param_arr[i].type & HXGE_PARAM_READ_PROP) == 0)
2433dec9fcdSqs continue;
2443dec9fcdSqs
2453dec9fcdSqs if ((param_arr[i].type & HXGE_PARAM_PROP_STR))
2463dec9fcdSqs continue;
2473dec9fcdSqs
2483dec9fcdSqs if ((param_arr[i].type & HXGE_PARAM_PROP_ARR32) ||
2493dec9fcdSqs (param_arr[i].type & HXGE_PARAM_PROP_ARR64)) {
2503dec9fcdSqs
2513dec9fcdSqs if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY,
2523dec9fcdSqs hxgep->dip, 0, param_arr[i].fcode_name,
2533dec9fcdSqs (int **)&int_prop_val, (uint_t *)&prop_len) ==
2543dec9fcdSqs DDI_PROP_SUCCESS) {
2553dec9fcdSqs uint64_t *cfg_value;
2563dec9fcdSqs uint64_t prop_count;
2573dec9fcdSqs
2583dec9fcdSqs if (prop_len > HXGE_PARAM_ARRAY_INIT_SIZE)
2593dec9fcdSqs prop_len = HXGE_PARAM_ARRAY_INIT_SIZE;
2603dec9fcdSqs cfg_value = (uint64_t *)param_arr[i].value;
2613dec9fcdSqs for (j = 0; j < prop_len; j++) {
2623dec9fcdSqs cfg_value[j] = int_prop_val[j];
2633dec9fcdSqs }
2643dec9fcdSqs prop_count = prop_len;
2653dec9fcdSqs param_arr[i].type |=
2663dec9fcdSqs (prop_count << HXGE_PARAM_ARRAY_CNT_SHIFT);
2673dec9fcdSqs
2683dec9fcdSqs ddi_prop_free(int_prop_val);
2693dec9fcdSqs }
2703dec9fcdSqs continue;
2713dec9fcdSqs }
2723dec9fcdSqs if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, hxgep->dip, 0,
2733dec9fcdSqs param_arr[i].fcode_name, (int **)&int_prop_val,
2743dec9fcdSqs &prop_len) == DDI_PROP_SUCCESS) {
2753dec9fcdSqs if ((*int_prop_val >= param_arr[i].minimum) &&
2763dec9fcdSqs (*int_prop_val <= param_arr[i].maximum))
2773dec9fcdSqs param_arr[i].value = *int_prop_val;
2783dec9fcdSqs ddi_prop_free(int_prop_val);
2793dec9fcdSqs }
2803dec9fcdSqs if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, hxgep->dip, 0,
2813dec9fcdSqs param_arr[i].name, (int **)&int_prop_val, &prop_len) ==
2823dec9fcdSqs DDI_PROP_SUCCESS) {
2833dec9fcdSqs if ((*int_prop_val >= param_arr[i].minimum) &&
2843dec9fcdSqs (*int_prop_val <= param_arr[i].maximum))
2853dec9fcdSqs param_arr[i].value = *int_prop_val;
2863dec9fcdSqs ddi_prop_free(int_prop_val);
2873dec9fcdSqs }
2883dec9fcdSqs }
2893dec9fcdSqs }
2903dec9fcdSqs
2913dec9fcdSqs static int
hxge_private_param_register(p_hxge_t hxgep,p_hxge_param_t param_arr)2923dec9fcdSqs hxge_private_param_register(p_hxge_t hxgep, p_hxge_param_t param_arr)
2933dec9fcdSqs {
2943dec9fcdSqs int status = B_TRUE;
2953dec9fcdSqs int channel;
2963dec9fcdSqs char *prop_name;
2973dec9fcdSqs char *end;
2983dec9fcdSqs uint32_t name_chars;
2993dec9fcdSqs
3003dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD2_CTL, " hxge_private_param_register %s",
3013dec9fcdSqs param_arr->name));
3023dec9fcdSqs
3033dec9fcdSqs if ((param_arr->type & HXGE_PARAM_PRIV) != HXGE_PARAM_PRIV)
3043dec9fcdSqs return (B_TRUE);
3053dec9fcdSqs prop_name = param_arr->name;
3063dec9fcdSqs if (param_arr->type & HXGE_PARAM_RXDMA) {
3073dec9fcdSqs if (strncmp("rxdma_intr", prop_name, 10) == 0)
3083dec9fcdSqs return (B_TRUE);
3093dec9fcdSqs else
3103dec9fcdSqs return (B_FALSE);
3113dec9fcdSqs }
3123dec9fcdSqs
3133dec9fcdSqs if (param_arr->type & HXGE_PARAM_TXDMA) {
3143dec9fcdSqs name_chars = strlen("txdma");
3153dec9fcdSqs if (strncmp("txdma", prop_name, name_chars) == 0) {
3163dec9fcdSqs prop_name += name_chars;
3173dec9fcdSqs channel = mi_strtol(prop_name, &end, 10);
3183dec9fcdSqs /* now check if this rdc is in config */
3193dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD2_CTL,
3203dec9fcdSqs " hxge_private_param_register: %d", channel));
3213dec9fcdSqs return (hxge_check_txdma_port_member(hxgep, channel));
3223dec9fcdSqs }
3233dec9fcdSqs return (B_FALSE);
3243dec9fcdSqs }
3253dec9fcdSqs
3263dec9fcdSqs status = B_FALSE;
3273dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD2_CTL, "<== hxge_private_param_register"));
3283dec9fcdSqs
3293dec9fcdSqs return (status);
3303dec9fcdSqs }
3313dec9fcdSqs
3323dec9fcdSqs void
hxge_setup_param(p_hxge_t hxgep)3333dec9fcdSqs hxge_setup_param(p_hxge_t hxgep)
3343dec9fcdSqs {
3353dec9fcdSqs p_hxge_param_t param_arr;
3363dec9fcdSqs int i;
3373dec9fcdSqs pfi_t set_pfi;
3383dec9fcdSqs
3393dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_setup_param"));
3403dec9fcdSqs /*
3413dec9fcdSqs * Make sure the param_instance is set to a valid device instance.
3423dec9fcdSqs */
3433dec9fcdSqs if (hxge_param_arr[param_instance].value == 1000)
3443dec9fcdSqs hxge_param_arr[param_instance].value = hxgep->instance;
3453dec9fcdSqs
3463dec9fcdSqs param_arr = hxgep->param_arr;
3473dec9fcdSqs param_arr[param_instance].value = hxgep->instance;
3483dec9fcdSqs
3493dec9fcdSqs for (i = 0; i < hxgep->param_count; i++) {
3503dec9fcdSqs if ((param_arr[i].type & HXGE_PARAM_PRIV) &&
3513dec9fcdSqs (hxge_private_param_register(hxgep, ¶m_arr[i]) ==
3523dec9fcdSqs B_FALSE)) {
3533dec9fcdSqs param_arr[i].setf = NULL;
3543dec9fcdSqs param_arr[i].getf = NULL;
3553dec9fcdSqs }
3563dec9fcdSqs if (param_arr[i].type & HXGE_PARAM_CMPLX)
3573dec9fcdSqs param_arr[i].setf = NULL;
3583dec9fcdSqs
3593dec9fcdSqs if (param_arr[i].type & HXGE_PARAM_DONT_SHOW) {
3603dec9fcdSqs param_arr[i].setf = NULL;
3613dec9fcdSqs param_arr[i].getf = NULL;
3623dec9fcdSqs }
3633dec9fcdSqs set_pfi = (pfi_t)param_arr[i].setf;
3643dec9fcdSqs
3653dec9fcdSqs if ((set_pfi) && (param_arr[i].type & HXGE_PARAM_INIT_ONLY)) {
3663dec9fcdSqs set_pfi = NULL;
3673dec9fcdSqs }
3683dec9fcdSqs if (!hxge_nd_load(&hxgep->param_list, param_arr[i].name,
3693dec9fcdSqs (pfi_t)param_arr[i].getf, set_pfi,
3703dec9fcdSqs (caddr_t)¶m_arr[i])) {
3713dec9fcdSqs (void) hxge_nd_free(&hxgep->param_list);
3723dec9fcdSqs break;
3733dec9fcdSqs }
3743dec9fcdSqs }
3753dec9fcdSqs
3763dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_setup_param"));
3773dec9fcdSqs }
3783dec9fcdSqs
3793dec9fcdSqs /*
3803dec9fcdSqs * Called from the attached function, it allocates memory for
3813dec9fcdSqs * the parameter array and some members.
3823dec9fcdSqs */
3833dec9fcdSqs void
hxge_init_param(p_hxge_t hxgep)3843dec9fcdSqs hxge_init_param(p_hxge_t hxgep)
3853dec9fcdSqs {
3863dec9fcdSqs p_hxge_param_t param_arr;
3873dec9fcdSqs int i, alloc_size;
3883dec9fcdSqs uint64_t alloc_count;
3893dec9fcdSqs
3903dec9fcdSqs HXGE_DEBUG_MSG((hxgep, DDI_CTL, "==> hxge_init_param"));
3913dec9fcdSqs /*
3923dec9fcdSqs * Make sure the param_instance is set to a valid device instance.
3933dec9fcdSqs */
3943dec9fcdSqs if (hxge_param_arr[param_instance].value == 1000)
3953dec9fcdSqs hxge_param_arr[param_instance].value = hxgep->instance;
3963dec9fcdSqs
3973dec9fcdSqs param_arr = hxgep->param_arr;
3983dec9fcdSqs if (param_arr == NULL) {
3993dec9fcdSqs param_arr = (p_hxge_param_t)KMEM_ZALLOC(
4003dec9fcdSqs sizeof (hxge_param_arr), KM_SLEEP);
4013dec9fcdSqs }
4023dec9fcdSqs for (i = 0; i < sizeof (hxge_param_arr) / sizeof (hxge_param_t); i++) {
4033dec9fcdSqs param_arr[i] = hxge_param_arr[i];
4043dec9fcdSqs if ((param_arr[i].type & HXGE_PARAM_PROP_ARR32) ||
4053dec9fcdSqs (param_arr[i].type & HXGE_PARAM_PROP_ARR64)) {
4063dec9fcdSqs alloc_count = HXGE_PARAM_ARRAY_INIT_SIZE;
4073dec9fcdSqs alloc_size = alloc_count * sizeof (uint64_t);
4083dec9fcdSqs param_arr[i].value =
4093dec9fcdSqs (uint64_t)KMEM_ZALLOC(alloc_size, KM_SLEEP);
4103dec9fcdSqs param_arr[i].old_value =
4113dec9fcdSqs (uint64_t)KMEM_ZALLOC(alloc_size, KM_SLEEP);
4123dec9fcdSqs param_arr[i].type |=
4133dec9fcdSqs (alloc_count << HXGE_PARAM_ARRAY_ALLOC_SHIFT);
4143dec9fcdSqs }
4153dec9fcdSqs }
4163dec9fcdSqs
4173dec9fcdSqs hxgep->param_arr = param_arr;
4183dec9fcdSqs hxgep->param_count = sizeof (hxge_param_arr) / sizeof (hxge_param_t);
4193dec9fcdSqs HXGE_DEBUG_MSG((hxgep, DDI_CTL, "<== hxge_init_param: count %d",
4203dec9fcdSqs hxgep->param_count));
4213dec9fcdSqs }
4223dec9fcdSqs
4233dec9fcdSqs /*
4243dec9fcdSqs * Called from the attached functions, it frees memory for the parameter array
4253dec9fcdSqs */
4263dec9fcdSqs void
hxge_destroy_param(p_hxge_t hxgep)4273dec9fcdSqs hxge_destroy_param(p_hxge_t hxgep)
4283dec9fcdSqs {
4293dec9fcdSqs int i;
4303dec9fcdSqs uint64_t free_size, free_count;
4313dec9fcdSqs
4323dec9fcdSqs HXGE_DEBUG_MSG((hxgep, DDI_CTL, "==> hxge_destroy_param"));
4333dec9fcdSqs /*
4343dec9fcdSqs * Make sure the param_instance is set to a valid device instance.
4353dec9fcdSqs */
4363dec9fcdSqs if (hxge_param_arr[param_instance].value == hxgep->instance) {
4373dec9fcdSqs for (i = 0; i <= hxge_param_arr[param_instance].maximum; i++) {
4383dec9fcdSqs if ((ddi_get_soft_state(hxge_list, i) != NULL) &&
4393dec9fcdSqs (i != hxgep->instance))
4403dec9fcdSqs break;
4413dec9fcdSqs }
4423dec9fcdSqs hxge_param_arr[param_instance].value = i;
4433dec9fcdSqs }
4443dec9fcdSqs if (hxgep->param_list)
4453dec9fcdSqs hxge_nd_free(&hxgep->param_list);
4463dec9fcdSqs for (i = 0; i < hxgep->param_count; i++) {
4473dec9fcdSqs if ((hxgep->param_arr[i].type & HXGE_PARAM_PROP_ARR32) ||
4483dec9fcdSqs (hxgep->param_arr[i].type & HXGE_PARAM_PROP_ARR64)) {
4493dec9fcdSqs free_count = ((hxgep->param_arr[i].type &
4503dec9fcdSqs HXGE_PARAM_ARRAY_ALLOC_MASK) >>
4513dec9fcdSqs HXGE_PARAM_ARRAY_ALLOC_SHIFT);
4523dec9fcdSqs free_count = HXGE_PARAM_ARRAY_INIT_SIZE;
4533dec9fcdSqs free_size = sizeof (uint64_t) * free_count;
4543dec9fcdSqs KMEM_FREE((void *) hxgep->param_arr[i].value,
4553dec9fcdSqs free_size);
4563dec9fcdSqs KMEM_FREE((void *) hxgep->param_arr[i].old_value,
4573dec9fcdSqs free_size);
4583dec9fcdSqs }
4593dec9fcdSqs }
4603dec9fcdSqs
4613dec9fcdSqs KMEM_FREE(hxgep->param_arr, sizeof (hxge_param_arr));
4623dec9fcdSqs HXGE_DEBUG_MSG((hxgep, DDI_CTL, "<== hxge_destroy_param"));
4633dec9fcdSqs }
4643dec9fcdSqs
4653dec9fcdSqs /*
4663dec9fcdSqs * Extracts the value from the 'hxge' parameter array and prints the
4673dec9fcdSqs * parameter value. cp points to the required parameter.
4683dec9fcdSqs */
4693dec9fcdSqs /* ARGSUSED */
4703dec9fcdSqs int
hxge_param_get_generic(p_hxge_t hxgep,queue_t * q,p_mblk_t mp,caddr_t cp)4713dec9fcdSqs hxge_param_get_generic(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp)
4723dec9fcdSqs {
4733dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
4743dec9fcdSqs
4753dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, " ==> hxge_param_get_generic name %s ",
4763dec9fcdSqs pa->name));
4773dec9fcdSqs
4783dec9fcdSqs if (pa->value > 0xffffffff)
4793dec9fcdSqs (void) mi_mpprintf(mp, "%x%x", (int)(pa->value >> 32),
4803dec9fcdSqs (int)(pa->value & 0xffffffff));
4813dec9fcdSqs else
4823dec9fcdSqs (void) mi_mpprintf(mp, "%x", (int)pa->value);
4833dec9fcdSqs
4843dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_generic"));
4853dec9fcdSqs return (0);
4863dec9fcdSqs }
4873dec9fcdSqs
4883dec9fcdSqs /* ARGSUSED */
4893dec9fcdSqs static int
hxge_param_get_mac(p_hxge_t hxgep,queue_t * q,p_mblk_t mp,caddr_t cp)4903dec9fcdSqs hxge_param_get_mac(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp)
4913dec9fcdSqs {
4923dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
4933dec9fcdSqs
4943dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_get_mac"));
4953dec9fcdSqs
4963dec9fcdSqs (void) mi_mpprintf(mp, "%d", (uint32_t)pa->value);
4973dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_mac"));
4983dec9fcdSqs return (0);
4993dec9fcdSqs }
5003dec9fcdSqs
5013dec9fcdSqs /* ARGSUSED */
5023dec9fcdSqs int
hxge_param_get_rxdma_info(p_hxge_t hxgep,queue_t * q,p_mblk_t mp,caddr_t cp)5033dec9fcdSqs hxge_param_get_rxdma_info(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp)
5043dec9fcdSqs {
5053dec9fcdSqs uint_t print_len, buf_len;
5063dec9fcdSqs p_mblk_t np;
5073dec9fcdSqs int rdc;
5083dec9fcdSqs p_hxge_dma_pt_cfg_t p_dma_cfgp;
5093dec9fcdSqs p_hxge_hw_pt_cfg_t p_cfgp;
5103dec9fcdSqs int buff_alloc_size = HXGE_NDD_INFODUMP_BUFF_SIZE;
5113dec9fcdSqs
5123dec9fcdSqs p_rx_rcr_rings_t rx_rcr_rings;
5133dec9fcdSqs p_rx_rcr_ring_t *rcr_rings;
5143dec9fcdSqs p_rx_rbr_rings_t rx_rbr_rings;
5153dec9fcdSqs p_rx_rbr_ring_t *rbr_rings;
5163dec9fcdSqs
5173dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_get_rxdma_info"));
5183dec9fcdSqs
5193dec9fcdSqs (void) mi_mpprintf(mp, "RXDMA Information\n");
5203dec9fcdSqs
5213dec9fcdSqs if ((np = allocb(buff_alloc_size, BPRI_HI)) == NULL) {
5223dec9fcdSqs /* The following may work even if we cannot get a large buf. */
5233dec9fcdSqs (void) mi_mpprintf(mp, "%s\n", "out of buffer");
5243dec9fcdSqs return (0);
5253dec9fcdSqs }
5263dec9fcdSqs buf_len = buff_alloc_size;
5273dec9fcdSqs
5283dec9fcdSqs mp->b_cont = np;
5293dec9fcdSqs
5303dec9fcdSqs p_dma_cfgp = (p_hxge_dma_pt_cfg_t)&hxgep->pt_config;
5313dec9fcdSqs p_cfgp = (p_hxge_hw_pt_cfg_t)&p_dma_cfgp->hw_config;
5323dec9fcdSqs
5333dec9fcdSqs rx_rcr_rings = hxgep->rx_rcr_rings;
5343dec9fcdSqs rcr_rings = rx_rcr_rings->rcr_rings;
5353dec9fcdSqs rx_rbr_rings = hxgep->rx_rbr_rings;
5363dec9fcdSqs rbr_rings = rx_rbr_rings->rbr_rings;
5373dec9fcdSqs
5383dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
5393dec9fcdSqs "Total RDCs\t %d\n", p_cfgp->max_rdcs);
5403dec9fcdSqs ((mblk_t *)np)->b_wptr += print_len;
5413dec9fcdSqs buf_len -= print_len;
5423dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
5433dec9fcdSqs "RDC\t HW RDC\t Timeout\t Packets RBR ptr \t"
5443dec9fcdSqs "chunks\t RCR ptr\n");
5453dec9fcdSqs ((mblk_t *)np)->b_wptr += print_len;
5463dec9fcdSqs buf_len -= print_len;
5473dec9fcdSqs for (rdc = 0; rdc < p_cfgp->max_rdcs; rdc++) {
5483dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
5493dec9fcdSqs " %d\t %d\t $%p\t 0x%x\t $%p\n",
5501667122dSMichael Speer rdc, hxgep->rdc[rdc], (void *)rbr_rings[rdc],
5511667122dSMichael Speer rbr_rings[rdc]->num_blocks, (void *)rcr_rings[rdc]);
5523dec9fcdSqs ((mblk_t *)np)->b_wptr += print_len;
5533dec9fcdSqs buf_len -= print_len;
5543dec9fcdSqs }
5553dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_rxdma_info"));
5563dec9fcdSqs return (0);
5573dec9fcdSqs }
5583dec9fcdSqs
5593dec9fcdSqs int
hxge_mk_mblk_tail_space(p_mblk_t mp,p_mblk_t * nmp,size_t size)5603dec9fcdSqs hxge_mk_mblk_tail_space(p_mblk_t mp, p_mblk_t *nmp, size_t size)
5613dec9fcdSqs {
5623dec9fcdSqs p_mblk_t tmp;
5633dec9fcdSqs
5643dec9fcdSqs tmp = mp;
5653dec9fcdSqs while (tmp->b_cont)
5663dec9fcdSqs tmp = tmp->b_cont;
5673dec9fcdSqs if ((tmp->b_wptr + size) >= tmp->b_datap->db_lim) {
5683dec9fcdSqs tmp->b_cont = allocb(1024, BPRI_HI);
5693dec9fcdSqs tmp = tmp->b_cont;
5703dec9fcdSqs if (!tmp)
5713dec9fcdSqs return (ENOMEM);
5723dec9fcdSqs }
5733dec9fcdSqs *nmp = tmp;
5743dec9fcdSqs return (0);
5753dec9fcdSqs }
5763dec9fcdSqs
5773dec9fcdSqs /*
5783dec9fcdSqs * Sets the ge parameter to the value in the hxge_param_register using
5793dec9fcdSqs * hxge_nd_load().
5803dec9fcdSqs */
5813dec9fcdSqs /* ARGSUSED */
5823dec9fcdSqs int
hxge_param_set_generic(p_hxge_t hxgep,queue_t * q,mblk_t * mp,char * value,caddr_t cp)5833dec9fcdSqs hxge_param_set_generic(p_hxge_t hxgep, queue_t *q, mblk_t *mp,
584*86ef0a63SRichard Lowe char *value, caddr_t cp)
5853dec9fcdSqs {
5863dec9fcdSqs char *end;
5873dec9fcdSqs uint32_t new_value;
5883dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
5893dec9fcdSqs
5903dec9fcdSqs HXGE_DEBUG_MSG((hxgep, IOC_CTL, " ==> hxge_param_set_generic"));
5913dec9fcdSqs new_value = (uint32_t)mi_strtol(value, &end, 10);
5923dec9fcdSqs if (end == value || new_value < pa->minimum ||
5933dec9fcdSqs new_value > pa->maximum) {
5943dec9fcdSqs return (EINVAL);
5953dec9fcdSqs }
5963dec9fcdSqs pa->value = new_value;
5973dec9fcdSqs HXGE_DEBUG_MSG((hxgep, IOC_CTL, " <== hxge_param_set_generic"));
5983dec9fcdSqs return (0);
5993dec9fcdSqs }
6003dec9fcdSqs
6013dec9fcdSqs /* ARGSUSED */
6023dec9fcdSqs int
hxge_param_set_mac(p_hxge_t hxgep,queue_t * q,mblk_t * mp,char * value,caddr_t cp)6033dec9fcdSqs hxge_param_set_mac(p_hxge_t hxgep, queue_t *q, mblk_t *mp,
604*86ef0a63SRichard Lowe char *value, caddr_t cp)
6053dec9fcdSqs {
6063dec9fcdSqs char *end;
6073dec9fcdSqs uint32_t new_value;
6083dec9fcdSqs int status = 0;
6093dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
6103dec9fcdSqs
6113dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_mac"));
6123dec9fcdSqs new_value = (uint32_t)mi_strtol(value, &end, BASE_DECIMAL);
6133dec9fcdSqs if (PARAM_OUTOF_RANGE(value, end, new_value, pa)) {
6143dec9fcdSqs return (EINVAL);
6153dec9fcdSqs }
6163dec9fcdSqs
6173dec9fcdSqs if (pa->value != new_value) {
6183dec9fcdSqs pa->old_value = pa->value;
6193dec9fcdSqs pa->value = new_value;
6203dec9fcdSqs }
6213dec9fcdSqs
6223dec9fcdSqs if (pa->value != pa->old_value) {
6233dec9fcdSqs RW_ENTER_WRITER(&hxgep->filter_lock);
6243dec9fcdSqs (void) hxge_rx_vmac_disable(hxgep);
6253dec9fcdSqs (void) hxge_tx_vmac_disable(hxgep);
6263dec9fcdSqs
6273dec9fcdSqs /*
6283dec9fcdSqs * Apply the new jumbo parameter here.
6293dec9fcdSqs * The order of the following two calls is important.
6303dec9fcdSqs */
6313dec9fcdSqs (void) hxge_tx_vmac_enable(hxgep);
6323dec9fcdSqs (void) hxge_rx_vmac_enable(hxgep);
6333dec9fcdSqs RW_EXIT(&hxgep->filter_lock);
6343dec9fcdSqs }
6353dec9fcdSqs
6363dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_mac"));
6373dec9fcdSqs return (status);
6383dec9fcdSqs }
6393dec9fcdSqs
6403dec9fcdSqs /* ARGSUSED */
641a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States int
hxge_param_rx_intr_pkts(p_hxge_t hxgep,queue_t * q,mblk_t * mp,char * value,caddr_t cp)6423dec9fcdSqs hxge_param_rx_intr_pkts(p_hxge_t hxgep, queue_t *q,
643*86ef0a63SRichard Lowe mblk_t *mp, char *value, caddr_t cp)
6443dec9fcdSqs {
6453dec9fcdSqs char *end;
6463dec9fcdSqs uint32_t cfg_value;
6473dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
6483dec9fcdSqs
6493dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_rx_intr_pkts"));
6503dec9fcdSqs
651a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States if (strncasecmp(value, "0x", 2) == 0)
652a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States value += 2;
653a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
654a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States cfg_value = (uint32_t)mi_strtol(value, &end, BASE_HEX);
6553dec9fcdSqs
6563dec9fcdSqs if ((cfg_value > HXGE_RDC_RCR_THRESHOLD_MAX) ||
6573dec9fcdSqs (cfg_value < HXGE_RDC_RCR_THRESHOLD_MIN)) {
6583dec9fcdSqs return (EINVAL);
6593dec9fcdSqs }
6603dec9fcdSqs
6613dec9fcdSqs if ((pa->value != cfg_value)) {
6623dec9fcdSqs pa->old_value = pa->value;
6633dec9fcdSqs pa->value = cfg_value;
6643dec9fcdSqs hxgep->intr_threshold = pa->value;
6653dec9fcdSqs }
6663dec9fcdSqs
6673dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_rx_intr_pkts"));
6683dec9fcdSqs return (0);
6693dec9fcdSqs }
6703dec9fcdSqs
6713dec9fcdSqs /* ARGSUSED */
672a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States int
hxge_param_rx_intr_time(p_hxge_t hxgep,queue_t * q,mblk_t * mp,char * value,caddr_t cp)6733dec9fcdSqs hxge_param_rx_intr_time(p_hxge_t hxgep, queue_t *q,
674*86ef0a63SRichard Lowe mblk_t *mp, char *value, caddr_t cp)
6753dec9fcdSqs {
6763dec9fcdSqs char *end;
6773dec9fcdSqs uint32_t cfg_value;
6783dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
6793dec9fcdSqs
6803dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_rx_intr_time"));
6813dec9fcdSqs
682a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States if (strncasecmp(value, "0x", 2) == 0)
683a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States value += 2;
684a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
685a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States cfg_value = (uint32_t)mi_strtol(value, &end, BASE_HEX);
6863dec9fcdSqs
6873dec9fcdSqs if ((cfg_value > HXGE_RDC_RCR_TIMEOUT_MAX) ||
6883dec9fcdSqs (cfg_value < HXGE_RDC_RCR_TIMEOUT_MIN)) {
6893dec9fcdSqs return (EINVAL);
6903dec9fcdSqs }
6913dec9fcdSqs
6923dec9fcdSqs if ((pa->value != cfg_value)) {
6933dec9fcdSqs pa->old_value = pa->value;
6943dec9fcdSqs pa->value = cfg_value;
6953dec9fcdSqs hxgep->intr_timeout = pa->value;
6963dec9fcdSqs }
6973dec9fcdSqs
6983dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_rx_intr_time"));
6993dec9fcdSqs return (0);
7003dec9fcdSqs }
7013dec9fcdSqs
7023dec9fcdSqs /* ARGSUSED */
7033dec9fcdSqs static int
hxge_param_set_vlan_ids(p_hxge_t hxgep,queue_t * q,mblk_t * mp,char * value,caddr_t cp)7043dec9fcdSqs hxge_param_set_vlan_ids(p_hxge_t hxgep, queue_t *q, mblk_t *mp, char *value,
7053dec9fcdSqs caddr_t cp)
7063dec9fcdSqs {
7073dec9fcdSqs char *end;
7083dec9fcdSqs uint32_t status = 0, cfg_value;
7093dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
7103dec9fcdSqs uint32_t cfg_it = B_FALSE;
7113dec9fcdSqs uint32_t *val_ptr, *old_val_ptr;
7123dec9fcdSqs hxge_param_map_t *vmap, *old_map;
713*86ef0a63SRichard Lowe p_hxge_class_pt_cfg_t p_class_cfgp;
7143dec9fcdSqs uint64_t cfgd_vlans;
7153dec9fcdSqs int i, inc = 0, cfg_position;
7163dec9fcdSqs hxge_mv_cfg_t *vlan_tbl;
7173dec9fcdSqs hpi_handle_t handle;
7183dec9fcdSqs
7193dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_vlan_ids "));
7203dec9fcdSqs
7213dec9fcdSqs p_class_cfgp = (p_hxge_class_pt_cfg_t)&hxgep->class_config;
7223dec9fcdSqs vlan_tbl = (hxge_mv_cfg_t *)&p_class_cfgp->vlan_tbl[0];
7233dec9fcdSqs handle = hxgep->hpi_reg_handle;
7243dec9fcdSqs
725a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States if (strncasecmp(value, "0x", 2) == 0)
726a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States value += 2;
727a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
7283dec9fcdSqs cfg_value = (uint32_t)mi_strtol(value, &end, BASE_HEX);
7293dec9fcdSqs
7303dec9fcdSqs /* now do decoding */
7313dec9fcdSqs cfgd_vlans = ((pa->type & HXGE_PARAM_ARRAY_CNT_MASK) >>
7323dec9fcdSqs HXGE_PARAM_ARRAY_CNT_SHIFT);
7333dec9fcdSqs
7343dec9fcdSqs if (cfgd_vlans >= HXGE_PARAM_ARRAY_INIT_SIZE) {
7353dec9fcdSqs /*
7363dec9fcdSqs * for now, we process only upto HXGE_PARAM_ARRAY_INIT_SIZE
7373dec9fcdSqs * parameters In the future, we may want to expand
7383dec9fcdSqs * the storage array and continue
7393dec9fcdSqs */
7403dec9fcdSqs return (EINVAL);
7413dec9fcdSqs }
7423dec9fcdSqs
7433dec9fcdSqs vmap = (hxge_param_map_t *)&cfg_value;
7443dec9fcdSqs if ((vmap->param_id == 0) || (vmap->param_id > VLAN_ID_MAX)) {
7453dec9fcdSqs return (EINVAL);
7463dec9fcdSqs }
7473dec9fcdSqs
7483dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, " hxge_param_set_vlan_ids id %d",
7493dec9fcdSqs vmap->param_id));
7503dec9fcdSqs val_ptr = (uint32_t *)pa->value;
7513dec9fcdSqs old_val_ptr = (uint32_t *)pa->old_value;
7523dec9fcdSqs
7533dec9fcdSqs /* Search to see if this vlan id is already configured */
7543dec9fcdSqs for (i = 0; i < cfgd_vlans; i++) {
7553dec9fcdSqs old_map = (hxge_param_map_t *)&val_ptr[i];
7563dec9fcdSqs if ((old_map->param_id == 0) ||
7573dec9fcdSqs (vmap->param_id == old_map->param_id) ||
7583dec9fcdSqs (vlan_tbl[vmap->param_id].flag)) {
7593dec9fcdSqs cfg_position = i;
7603dec9fcdSqs break;
7613dec9fcdSqs }
7623dec9fcdSqs }
7633dec9fcdSqs
7643dec9fcdSqs if (cfgd_vlans == 0) {
7653dec9fcdSqs cfg_position = 0;
7663dec9fcdSqs inc++;
7673dec9fcdSqs }
7683dec9fcdSqs
7693dec9fcdSqs if (i == cfgd_vlans) {
7703dec9fcdSqs cfg_position = i;
7713dec9fcdSqs inc++;
7723dec9fcdSqs }
7733dec9fcdSqs
7743dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD2_CTL,
7753dec9fcdSqs " set_vlan_ids mapping i %d cfgd_vlans %llx position %d ",
7763dec9fcdSqs i, cfgd_vlans, cfg_position));
7773dec9fcdSqs
7783dec9fcdSqs if (val_ptr[cfg_position] != cfg_value) {
7793dec9fcdSqs old_val_ptr[cfg_position] = val_ptr[cfg_position];
7803dec9fcdSqs val_ptr[cfg_position] = cfg_value;
7813dec9fcdSqs vlan_tbl[vmap->param_id].flag = 1;
7823dec9fcdSqs cfg_it = B_TRUE;
7833dec9fcdSqs if (inc) {
7843dec9fcdSqs cfgd_vlans++;
7853dec9fcdSqs pa->type &= ~HXGE_PARAM_ARRAY_CNT_MASK;
7863dec9fcdSqs pa->type |= (cfgd_vlans << HXGE_PARAM_ARRAY_CNT_SHIFT);
7873dec9fcdSqs
7883dec9fcdSqs }
7893dec9fcdSqs
7903dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD2_CTL,
7913dec9fcdSqs " after: param_set_vlan_ids cfg_vlans %llx position %d \n",
7923dec9fcdSqs cfgd_vlans, cfg_position));
7933dec9fcdSqs }
7943dec9fcdSqs
7953dec9fcdSqs if (cfg_it == B_TRUE) {
7963dec9fcdSqs status = hpi_pfc_cfg_vlan_table_entry_set(handle,
7973dec9fcdSqs (vlan_id_t)vmap->param_id);
7983dec9fcdSqs if (status != HPI_SUCCESS)
7993dec9fcdSqs return (EINVAL);
8003dec9fcdSqs }
8013dec9fcdSqs
8023dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_vlan_ids"));
8033dec9fcdSqs
8043dec9fcdSqs return (0);
8053dec9fcdSqs }
8063dec9fcdSqs
8073dec9fcdSqs
8083dec9fcdSqs /* ARGSUSED */
8093dec9fcdSqs static int
hxge_param_get_vlan_ids(p_hxge_t hxgep,queue_t * q,mblk_t * mp,caddr_t cp)8103dec9fcdSqs hxge_param_get_vlan_ids(p_hxge_t hxgep, queue_t *q, mblk_t *mp, caddr_t cp)
8113dec9fcdSqs {
8123dec9fcdSqs uint_t print_len, buf_len;
8133dec9fcdSqs p_mblk_t np;
8143dec9fcdSqs int i;
8153dec9fcdSqs uint32_t *val_ptr;
8163dec9fcdSqs hxge_param_map_t *vmap;
8173dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
818*86ef0a63SRichard Lowe p_hxge_class_pt_cfg_t p_class_cfgp;
8193dec9fcdSqs uint64_t cfgd_vlans = 0;
8203dec9fcdSqs int buff_alloc_size = HXGE_NDD_INFODUMP_BUFF_SIZE * 32;
8213dec9fcdSqs
8223dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_vlan_ids "));
8233dec9fcdSqs (void) mi_mpprintf(mp, "VLAN Information\n");
8243dec9fcdSqs
8253dec9fcdSqs if ((np = allocb(buff_alloc_size, BPRI_HI)) == NULL) {
8263dec9fcdSqs (void) mi_mpprintf(mp, "%s\n", "out of buffer");
8273dec9fcdSqs return (0);
8283dec9fcdSqs }
8293dec9fcdSqs
8303dec9fcdSqs buf_len = buff_alloc_size;
8313dec9fcdSqs mp->b_cont = np;
8323dec9fcdSqs cfgd_vlans = (pa->type & HXGE_PARAM_ARRAY_CNT_MASK) >>
8333dec9fcdSqs HXGE_PARAM_ARRAY_CNT_SHIFT;
8343dec9fcdSqs
8353dec9fcdSqs i = (int)cfgd_vlans;
8363dec9fcdSqs p_class_cfgp = (p_hxge_class_pt_cfg_t)&hxgep->class_config;
8373dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
8383dec9fcdSqs "Configured VLANs %d\n VLAN ID\n", i);
8393dec9fcdSqs ((mblk_t *)np)->b_wptr += print_len;
8403dec9fcdSqs buf_len -= print_len;
8413dec9fcdSqs
8423dec9fcdSqs val_ptr = (uint32_t *)pa->value;
8433dec9fcdSqs
8443dec9fcdSqs for (i = 0; i < cfgd_vlans; i++) {
8453dec9fcdSqs vmap = (hxge_param_map_t *)&val_ptr[i];
8463dec9fcdSqs if (p_class_cfgp->vlan_tbl[vmap->param_id].flag) {
8473dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr,
8483dec9fcdSqs buf_len, " %d\n", vmap->param_id);
8493dec9fcdSqs ((mblk_t *)np)->b_wptr += print_len;
8503dec9fcdSqs buf_len -= print_len;
8513dec9fcdSqs }
8523dec9fcdSqs }
8533dec9fcdSqs
8543dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_vlan_ids"));
8553dec9fcdSqs
8563dec9fcdSqs return (0);
8573dec9fcdSqs }
8583dec9fcdSqs
8593dec9fcdSqs /* ARGSUSED */
8603dec9fcdSqs static int
hxge_param_tcam_enable(p_hxge_t hxgep,queue_t * q,mblk_t * mp,char * value,caddr_t cp)8613dec9fcdSqs hxge_param_tcam_enable(p_hxge_t hxgep, queue_t *q,
862*86ef0a63SRichard Lowe mblk_t *mp, char *value, caddr_t cp)
8633dec9fcdSqs {
8643dec9fcdSqs uint32_t status = 0, cfg_value;
8653dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
8663dec9fcdSqs uint32_t cfg_it = B_FALSE;
8673dec9fcdSqs char *end;
8683dec9fcdSqs
8693dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_tcam_enable"));
8703dec9fcdSqs
8713dec9fcdSqs cfg_value = (uint32_t)mi_strtol(value, &end, BASE_BINARY);
8723dec9fcdSqs if (pa->value != cfg_value) {
8733dec9fcdSqs pa->old_value = pa->value;
8743dec9fcdSqs pa->value = cfg_value;
8753dec9fcdSqs cfg_it = B_TRUE;
8763dec9fcdSqs }
8773dec9fcdSqs if (cfg_it == B_TRUE) {
8783dec9fcdSqs if (pa->value)
8793dec9fcdSqs status = hxge_pfc_config_tcam_enable(hxgep);
8803dec9fcdSqs else
8813dec9fcdSqs status = hxge_pfc_config_tcam_disable(hxgep);
8823dec9fcdSqs if (status != HXGE_OK)
8833dec9fcdSqs return (EINVAL);
8843dec9fcdSqs }
8853dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, " <== hxge_param_tcam_enable"));
8863dec9fcdSqs return (0);
8873dec9fcdSqs }
8883dec9fcdSqs
8893dec9fcdSqs /* ARGSUSED */
8903dec9fcdSqs static int
hxge_param_set_ether_usr(p_hxge_t hxgep,queue_t * q,mblk_t * mp,char * value,caddr_t cp)8913dec9fcdSqs hxge_param_set_ether_usr(p_hxge_t hxgep, queue_t *q,
892*86ef0a63SRichard Lowe mblk_t *mp, char *value, caddr_t cp)
8933dec9fcdSqs {
8943dec9fcdSqs char *end;
8953dec9fcdSqs uint32_t status = 0, cfg_value;
8963dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
8973dec9fcdSqs
8983dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_ether_usr"));
8993dec9fcdSqs
900a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States if (strncasecmp(value, "0x", 2) == 0)
901a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States value += 2;
902a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
9033dec9fcdSqs cfg_value = (uint32_t)mi_strtol(value, &end, BASE_HEX);
9043dec9fcdSqs if (PARAM_OUTOF_RANGE(value, end, cfg_value, pa)) {
9053dec9fcdSqs return (EINVAL);
9063dec9fcdSqs }
9073dec9fcdSqs if (pa->value != cfg_value) {
9083dec9fcdSqs pa->old_value = pa->value;
9093dec9fcdSqs pa->value = cfg_value;
9103dec9fcdSqs }
9113dec9fcdSqs
9123dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_ether_usr"));
9133dec9fcdSqs return (status);
9143dec9fcdSqs }
9153dec9fcdSqs
9163dec9fcdSqs static int
hxge_class_name_2value(p_hxge_t hxgep,char * name)9173dec9fcdSqs hxge_class_name_2value(p_hxge_t hxgep, char *name)
9183dec9fcdSqs {
9193dec9fcdSqs int i;
9203dec9fcdSqs int class_instance = param_class_opt_ipv4_tcp;
9213dec9fcdSqs p_hxge_param_t param_arr;
9223dec9fcdSqs
9233dec9fcdSqs param_arr = hxgep->param_arr;
9243dec9fcdSqs for (i = TCAM_CLASS_TCP_IPV4; i <= TCAM_CLASS_SCTP_IPV6; i++) {
9253dec9fcdSqs if (strcmp(param_arr[class_instance].name, name) == 0)
9263dec9fcdSqs return (i);
9273dec9fcdSqs class_instance++;
9283dec9fcdSqs }
9293dec9fcdSqs return (-1);
9303dec9fcdSqs }
9313dec9fcdSqs
9323dec9fcdSqs /* ARGSUSED */
933a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States int
hxge_param_set_ip_opt(p_hxge_t hxgep,queue_t * q,mblk_t * mp,char * value,caddr_t cp)9343dec9fcdSqs hxge_param_set_ip_opt(p_hxge_t hxgep, queue_t *q,
935*86ef0a63SRichard Lowe mblk_t *mp, char *value, caddr_t cp)
9363dec9fcdSqs {
9373dec9fcdSqs char *end;
9383dec9fcdSqs uint32_t status, cfg_value;
9393dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
9403dec9fcdSqs tcam_class_t class;
9413dec9fcdSqs uint32_t cfg_it = B_FALSE;
9423dec9fcdSqs
9433dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_ip_opt"));
9443dec9fcdSqs
945a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States if (strncasecmp(value, "0x", 2) == 0)
946a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States value += 2;
947a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
9483dec9fcdSqs cfg_value = (uint32_t)mi_strtol(value, &end, BASE_HEX);
9493dec9fcdSqs if (PARAM_OUTOF_RANGE(value, end, cfg_value, pa)) {
9503dec9fcdSqs return (EINVAL);
9513dec9fcdSqs }
9523dec9fcdSqs if (pa->value != cfg_value) {
9533dec9fcdSqs pa->old_value = pa->value;
9543dec9fcdSqs pa->value = cfg_value;
9553dec9fcdSqs cfg_it = B_TRUE;
9563dec9fcdSqs }
9573dec9fcdSqs if (cfg_it == B_TRUE) {
9583dec9fcdSqs /* do the actual hw setup */
9593dec9fcdSqs class = hxge_class_name_2value(hxgep, pa->name);
9603dec9fcdSqs if (class == -1)
9613dec9fcdSqs return (EINVAL);
9623dec9fcdSqs
9633dec9fcdSqs status = hxge_pfc_ip_class_config(hxgep, class, pa->value);
9643dec9fcdSqs if (status != HXGE_OK)
9653dec9fcdSqs return (EINVAL);
9663dec9fcdSqs }
9673dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_ip_opt"));
9683dec9fcdSqs return (0);
9693dec9fcdSqs }
9703dec9fcdSqs
9713dec9fcdSqs /* ARGSUSED */
972a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States int
hxge_param_get_ip_opt(p_hxge_t hxgep,queue_t * q,mblk_t * mp,caddr_t cp)9733dec9fcdSqs hxge_param_get_ip_opt(p_hxge_t hxgep, queue_t *q, mblk_t *mp, caddr_t cp)
9743dec9fcdSqs {
9753dec9fcdSqs uint32_t status, cfg_value;
9763dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
9773dec9fcdSqs tcam_class_t class;
9783dec9fcdSqs
9793dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_get_ip_opt"));
9803dec9fcdSqs
9813dec9fcdSqs /* do the actual hw setup */
9823dec9fcdSqs class = hxge_class_name_2value(hxgep, pa->name);
9833dec9fcdSqs if (class == -1)
9843dec9fcdSqs return (EINVAL);
9853dec9fcdSqs cfg_value = 0;
9863dec9fcdSqs status = hxge_pfc_ip_class_config_get(hxgep, class, &cfg_value);
9873dec9fcdSqs if (status != HXGE_OK)
9883dec9fcdSqs return (EINVAL);
9893dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL,
9903dec9fcdSqs "hxge_param_get_ip_opt_get %x ", cfg_value));
9913dec9fcdSqs pa->value = cfg_value;
9923dec9fcdSqs
993a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States if (mp != NULL)
994a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States (void) mi_mpprintf(mp, "%x", cfg_value);
995a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
9963dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_ip_opt status "));
9973dec9fcdSqs return (0);
9983dec9fcdSqs }
9993dec9fcdSqs
10003dec9fcdSqs /* ARGSUSED */
10013dec9fcdSqs static int
hxge_param_pfc_hash_init(p_hxge_t hxgep,queue_t * q,mblk_t * mp,char * value,caddr_t cp)10023dec9fcdSqs hxge_param_pfc_hash_init(p_hxge_t hxgep, queue_t *q, mblk_t *mp,
1003*86ef0a63SRichard Lowe char *value, caddr_t cp)
10043dec9fcdSqs {
10053dec9fcdSqs char *end;
10063dec9fcdSqs uint32_t status, cfg_value;
10073dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
10083dec9fcdSqs uint32_t cfg_it = B_FALSE;
10093dec9fcdSqs
10103dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_pfc_hash_init"));
10113dec9fcdSqs
1012a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States if (strncasecmp(value, "0x", 2) == 0)
1013a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States value += 2;
1014a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
10153dec9fcdSqs cfg_value = (uint32_t)mi_strtol(value, &end, BASE_HEX);
10163dec9fcdSqs if (PARAM_OUTOF_RANGE(value, end, cfg_value, pa)) {
10173dec9fcdSqs return (EINVAL);
10183dec9fcdSqs }
10193dec9fcdSqs
10203dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL,
10213dec9fcdSqs " hxge_param_pfc_hash_init value %x", cfg_value));
10223dec9fcdSqs if (pa->value != cfg_value) {
10233dec9fcdSqs pa->old_value = pa->value;
10243dec9fcdSqs pa->value = cfg_value;
10253dec9fcdSqs cfg_it = B_TRUE;
10263dec9fcdSqs }
10273dec9fcdSqs
10283dec9fcdSqs if (cfg_it == B_TRUE) {
10293dec9fcdSqs status = hxge_pfc_set_hash(hxgep, (uint32_t)pa->value);
10303dec9fcdSqs if (status != HXGE_OK)
10313dec9fcdSqs return (EINVAL);
10323dec9fcdSqs }
10333dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, " <== hxge_param_pfc_hash_init"));
10343dec9fcdSqs return (0);
10353dec9fcdSqs }
10363dec9fcdSqs
10373dec9fcdSqs /* ARGSUSED */
10383dec9fcdSqs static int
hxge_param_set_hxge_debug_flag(p_hxge_t hxgep,queue_t * q,mblk_t * mp,char * value,caddr_t cp)10393dec9fcdSqs hxge_param_set_hxge_debug_flag(p_hxge_t hxgep, queue_t *q,
1040*86ef0a63SRichard Lowe mblk_t *mp, char *value, caddr_t cp)
10413dec9fcdSqs {
10423dec9fcdSqs char *end;
10433dec9fcdSqs uint32_t status = 0;
10443dec9fcdSqs uint64_t cfg_value = 0;
10453dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
10463dec9fcdSqs uint32_t cfg_it = B_FALSE;
10473dec9fcdSqs
10483dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_hxge_debug_flag"));
1049a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
1050a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States if (strncasecmp(value, "0x", 2) == 0)
1051a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States value += 2;
1052a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
10533dec9fcdSqs cfg_value = mi_strtol(value, &end, BASE_HEX);
10543dec9fcdSqs
10553dec9fcdSqs if (PARAM_OUTOF_RANGE(value, end, cfg_value, pa)) {
10563dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL,
10573dec9fcdSqs " hxge_param_set_hxge_debug_flag"
10583dec9fcdSqs " outof range %llx", cfg_value));
10593dec9fcdSqs return (EINVAL);
10603dec9fcdSqs }
10613dec9fcdSqs if (pa->value != cfg_value) {
10623dec9fcdSqs pa->old_value = pa->value;
10633dec9fcdSqs pa->value = cfg_value;
10643dec9fcdSqs cfg_it = B_TRUE;
10653dec9fcdSqs }
10663dec9fcdSqs if (cfg_it == B_TRUE)
10673dec9fcdSqs hxgep->hxge_debug_level = pa->value;
10683dec9fcdSqs
10693dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_hxge_debug_flag"));
10703dec9fcdSqs return (status);
10713dec9fcdSqs }
10723dec9fcdSqs
10733dec9fcdSqs /* ARGSUSED */
10743dec9fcdSqs static int
hxge_param_get_debug_flag(p_hxge_t hxgep,queue_t * q,p_mblk_t mp,caddr_t cp)10753dec9fcdSqs hxge_param_get_debug_flag(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp)
10763dec9fcdSqs {
10773dec9fcdSqs int status = 0;
10783dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
10793dec9fcdSqs
10803dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_get_debug_flag"));
10813dec9fcdSqs
10823dec9fcdSqs if (pa->value > 0xffffffff)
10833dec9fcdSqs (void) mi_mpprintf(mp, "%x%x", (int)(pa->value >> 32),
10843dec9fcdSqs (int)(pa->value & 0xffffffff));
10853dec9fcdSqs else
10863dec9fcdSqs (void) mi_mpprintf(mp, "%x", (int)pa->value);
10873dec9fcdSqs
10883dec9fcdSqs
10893dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_get_debug_flag"));
10903dec9fcdSqs return (status);
10913dec9fcdSqs }
10923dec9fcdSqs
10933dec9fcdSqs /* ARGSUSED */
10943dec9fcdSqs static int
hxge_param_set_hpi_debug_flag(p_hxge_t hxgep,queue_t * q,mblk_t * mp,char * value,caddr_t cp)10953dec9fcdSqs hxge_param_set_hpi_debug_flag(p_hxge_t hxgep, queue_t *q,
1096*86ef0a63SRichard Lowe mblk_t *mp, char *value, caddr_t cp)
10973dec9fcdSqs {
10983dec9fcdSqs char *end;
10993dec9fcdSqs uint32_t status = 0;
11003dec9fcdSqs uint64_t cfg_value = 0;
11013dec9fcdSqs p_hxge_param_t pa = (p_hxge_param_t)cp;
11023dec9fcdSqs uint32_t cfg_it = B_FALSE;
11033dec9fcdSqs
11043dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "==> hxge_param_set_hpi_debug_flag"));
1105a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
1106a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States if (strncasecmp(value, "0x", 2) == 0)
1107a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States value += 2;
1108a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
11093dec9fcdSqs cfg_value = mi_strtol(value, &end, BASE_HEX);
11103dec9fcdSqs
11113dec9fcdSqs if (PARAM_OUTOF_RANGE(value, end, cfg_value, pa)) {
11123dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, " hxge_param_set_hpi_debug_flag"
11133dec9fcdSqs " outof range %llx", cfg_value));
11143dec9fcdSqs return (EINVAL);
11153dec9fcdSqs }
11163dec9fcdSqs if (pa->value != cfg_value) {
11173dec9fcdSqs pa->old_value = pa->value;
11183dec9fcdSqs pa->value = cfg_value;
11193dec9fcdSqs cfg_it = B_TRUE;
11203dec9fcdSqs }
11213dec9fcdSqs if (cfg_it == B_TRUE) {
11223dec9fcdSqs hpi_debug_level = pa->value;
11233dec9fcdSqs }
11243dec9fcdSqs HXGE_DEBUG_MSG((hxgep, NDD_CTL, "<== hxge_param_set_debug_flag"));
11253dec9fcdSqs return (status);
11263dec9fcdSqs }
11273dec9fcdSqs
11283dec9fcdSqs typedef struct block_info {
11293dec9fcdSqs char *name;
11303dec9fcdSqs uint32_t offset;
11313dec9fcdSqs } block_info_t;
11323dec9fcdSqs
11333dec9fcdSqs block_info_t reg_block[] = {
11343dec9fcdSqs {"PIO", PIO_BASE_ADDR},
11353dec9fcdSqs {"PIO_LDSV", PIO_LDSV_BASE_ADDR},
11363dec9fcdSqs {"PIO_LDMASK", PIO_LDMASK_BASE_ADDR},
11373dec9fcdSqs {"PFC", PFC_BASE_ADDR},
11383dec9fcdSqs {"RDC", RDC_BASE_ADDR},
11393dec9fcdSqs {"TDC", TDC_BASE_ADDR},
11403dec9fcdSqs {"VMAC", VMAC_BASE_ADDR},
11413dec9fcdSqs {"END", ALL_FF_32},
11423dec9fcdSqs };
11433dec9fcdSqs
11443dec9fcdSqs /* ARGSUSED */
11453dec9fcdSqs static int
hxge_param_dump_ptrs(p_hxge_t hxgep,queue_t * q,p_mblk_t mp,caddr_t cp)11463dec9fcdSqs hxge_param_dump_ptrs(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t cp)
11473dec9fcdSqs {
11483dec9fcdSqs uint_t print_len, buf_len;
11493dec9fcdSqs p_mblk_t np;
11503dec9fcdSqs int rdc, tdc, block;
11513dec9fcdSqs uint64_t base;
11523dec9fcdSqs p_hxge_dma_pt_cfg_t p_dma_cfgp;
11533dec9fcdSqs p_hxge_hw_pt_cfg_t p_cfgp;
11543dec9fcdSqs int buff_alloc_size = HXGE_NDD_INFODUMP_BUFF_8K;
11553dec9fcdSqs p_tx_ring_t *tx_rings;
11563dec9fcdSqs p_rx_rcr_rings_t rx_rcr_rings;
11573dec9fcdSqs p_rx_rcr_ring_t *rcr_rings;
11583dec9fcdSqs p_rx_rbr_rings_t rx_rbr_rings;
11593dec9fcdSqs p_rx_rbr_ring_t *rbr_rings;
11603dec9fcdSqs
11613dec9fcdSqs HXGE_DEBUG_MSG((hxgep, IOC_CTL, "==> hxge_param_dump_ptrs"));
11623dec9fcdSqs
11633dec9fcdSqs (void) mi_mpprintf(mp, "ptr information\n");
11643dec9fcdSqs
11653dec9fcdSqs if ((np = allocb(buff_alloc_size, BPRI_HI)) == NULL) {
11663dec9fcdSqs /* The following may work even if we cannot get a large buf. */
11673dec9fcdSqs (void) mi_mpprintf(mp, "%s\n", "out of buffer");
11683dec9fcdSqs return (0);
11693dec9fcdSqs }
11703dec9fcdSqs buf_len = buff_alloc_size;
11713dec9fcdSqs
11723dec9fcdSqs mp->b_cont = np;
11733dec9fcdSqs p_dma_cfgp = (p_hxge_dma_pt_cfg_t)&hxgep->pt_config;
11743dec9fcdSqs p_cfgp = (p_hxge_hw_pt_cfg_t)&p_dma_cfgp->hw_config;
11753dec9fcdSqs
11763dec9fcdSqs rx_rcr_rings = hxgep->rx_rcr_rings;
11773dec9fcdSqs rcr_rings = rx_rcr_rings->rcr_rings;
11783dec9fcdSqs rx_rbr_rings = hxgep->rx_rbr_rings;
11793dec9fcdSqs rbr_rings = rx_rbr_rings->rbr_rings;
11803dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
11813dec9fcdSqs "hxgep (hxge_t) $%p\n dev_regs (dev_regs_t) $%p\n",
11821667122dSMichael Speer (void *)hxgep, (void *)hxgep->dev_regs);
11833dec9fcdSqs
11843dec9fcdSqs ADVANCE_PRINT_BUFFER(np, print_len, buf_len);
11853dec9fcdSqs /* do register pointers */
11863dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
11873dec9fcdSqs "reg base (hpi_reg_ptr_t) $%p\t pci reg (hpi_reg_ptr_t) $%p\n",
11881667122dSMichael Speer (void *)hxgep->dev_regs->hxge_regp,
11891667122dSMichael Speer (void *)hxgep->dev_regs->hxge_pciregp);
11903dec9fcdSqs
11913dec9fcdSqs ADVANCE_PRINT_BUFFER(np, print_len, buf_len);
11923dec9fcdSqs
11933dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
11943dec9fcdSqs "\nBlock \t Offset \n");
11953dec9fcdSqs
11963dec9fcdSqs ADVANCE_PRINT_BUFFER(np, print_len, buf_len);
11973dec9fcdSqs block = 0;
11983dec9fcdSqs base = (uint64_t)hxgep->dev_regs->hxge_regp;
11993dec9fcdSqs while (reg_block[block].offset != ALL_FF_32) {
12003dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
12013dec9fcdSqs "%9s\t 0x%llx\n", reg_block[block].name,
12023dec9fcdSqs (unsigned long long) (reg_block[block].offset + base));
12033dec9fcdSqs ADVANCE_PRINT_BUFFER(np, print_len, buf_len);
12043dec9fcdSqs block++;
12053dec9fcdSqs }
12063dec9fcdSqs
12073dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
12083dec9fcdSqs "\nRDC\t rcrp (rx_rcr_ring_t)\t rbrp (rx_rbr_ring_t)\n");
12093dec9fcdSqs
12103dec9fcdSqs ADVANCE_PRINT_BUFFER(np, print_len, buf_len);
12113dec9fcdSqs
12123dec9fcdSqs for (rdc = 0; rdc < p_cfgp->max_rdcs; rdc++) {
12133dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
12143dec9fcdSqs " %d\t $%p\t\t $%p\n",
12151667122dSMichael Speer rdc, (void *)rcr_rings[rdc], (void *)rbr_rings[rdc]);
12163dec9fcdSqs ADVANCE_PRINT_BUFFER(np, print_len, buf_len);
12173dec9fcdSqs }
12183dec9fcdSqs
12193dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
12203dec9fcdSqs "\nTDC\t tdcp (tx_ring_t)\n");
12213dec9fcdSqs
12223dec9fcdSqs ADVANCE_PRINT_BUFFER(np, print_len, buf_len);
12233dec9fcdSqs tx_rings = hxgep->tx_rings->rings;
12243dec9fcdSqs for (tdc = 0; tdc < p_cfgp->max_tdcs; tdc++) {
12253dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len,
12261667122dSMichael Speer " %d\t $%p\n", tdc, (void *)tx_rings[tdc]);
12273dec9fcdSqs ADVANCE_PRINT_BUFFER(np, print_len, buf_len);
12283dec9fcdSqs }
12293dec9fcdSqs
12303dec9fcdSqs print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len, "\n\n");
12313dec9fcdSqs
12323dec9fcdSqs ADVANCE_PRINT_BUFFER(np, print_len, buf_len);
12333dec9fcdSqs HXGE_DEBUG_MSG((hxgep, IOC_CTL, "<== hxge_param_dump_ptrs"));
12343dec9fcdSqs return (0);
12353dec9fcdSqs }
12363dec9fcdSqs
12373dec9fcdSqs /*
12383dec9fcdSqs * Load 'name' into the named dispatch table pointed to by 'ndp'.
12393dec9fcdSqs * 'ndp' should be the address of a char pointer cell. If the table
12403dec9fcdSqs * does not exist (*ndp == 0), a new table is allocated and 'ndp'
12413dec9fcdSqs * is stuffed. If there is not enough space in the table for a new
12423dec9fcdSqs * entry, more space is allocated.
12433dec9fcdSqs */
12443dec9fcdSqs boolean_t
hxge_nd_load(caddr_t * pparam,char * name,pfi_t get_pfi,pfi_t set_pfi,caddr_t data)12453dec9fcdSqs hxge_nd_load(caddr_t *pparam, char *name,
1246*86ef0a63SRichard Lowe pfi_t get_pfi, pfi_t set_pfi, caddr_t data)
12473dec9fcdSqs {
12483dec9fcdSqs ND *nd;
12493dec9fcdSqs NDE *nde;
12503dec9fcdSqs
12513dec9fcdSqs HXGE_DEBUG_MSG((NULL, NDD2_CTL, " ==> hxge_nd_load: %s", name));
12523dec9fcdSqs if (!pparam)
12533dec9fcdSqs return (B_FALSE);
12543dec9fcdSqs if ((nd = (ND *) * pparam) == NULL) {
12553dec9fcdSqs if ((nd = (ND *) KMEM_ZALLOC(sizeof (ND), KM_NOSLEEP)) == NULL)
12563dec9fcdSqs return (B_FALSE);
12573dec9fcdSqs *pparam = (caddr_t)nd;
12583dec9fcdSqs }
12593dec9fcdSqs if (nd->nd_tbl) {
12603dec9fcdSqs for (nde = nd->nd_tbl; nde->nde_name; nde++) {
12613dec9fcdSqs if (strcmp(name, nde->nde_name) == 0)
12623dec9fcdSqs goto fill_it;
12633dec9fcdSqs }
12643dec9fcdSqs }
12653dec9fcdSqs if (nd->nd_free_count <= 1) {
12663dec9fcdSqs if ((nde = (NDE *) KMEM_ZALLOC(nd->nd_size +
12673dec9fcdSqs NDE_ALLOC_SIZE, KM_NOSLEEP)) == NULL)
12683dec9fcdSqs return (B_FALSE);
12693dec9fcdSqs nd->nd_free_count += NDE_ALLOC_COUNT;
12703dec9fcdSqs if (nd->nd_tbl) {
12713dec9fcdSqs bcopy((char *)nd->nd_tbl, (char *)nde, nd->nd_size);
12723dec9fcdSqs KMEM_FREE((char *)nd->nd_tbl, nd->nd_size);
12733dec9fcdSqs } else {
12743dec9fcdSqs nd->nd_free_count--;
12753dec9fcdSqs nde->nde_name = "?";
12763dec9fcdSqs nde->nde_get_pfi = hxge_nd_get_names;
12773dec9fcdSqs nde->nde_set_pfi = hxge_set_default;
12783dec9fcdSqs }
12793dec9fcdSqs nde->nde_data = (caddr_t)nd;
12803dec9fcdSqs nd->nd_tbl = nde;
12813dec9fcdSqs nd->nd_size += NDE_ALLOC_SIZE;
12823dec9fcdSqs }
12833dec9fcdSqs for (nde = nd->nd_tbl; nde->nde_name; nde++)
12843dec9fcdSqs noop;
12853dec9fcdSqs nd->nd_free_count--;
12863dec9fcdSqs fill_it:
12873dec9fcdSqs nde->nde_name = name;
12883dec9fcdSqs nde->nde_get_pfi = get_pfi;
12893dec9fcdSqs nde->nde_set_pfi = set_pfi;
12903dec9fcdSqs nde->nde_data = data;
12913dec9fcdSqs HXGE_DEBUG_MSG((NULL, NDD2_CTL, " <== hxge_nd_load"));
12923dec9fcdSqs
12933dec9fcdSqs return (B_TRUE);
12943dec9fcdSqs }
12953dec9fcdSqs
12963dec9fcdSqs /*
12973dec9fcdSqs * Free the table pointed to by 'pparam'
12983dec9fcdSqs */
12993dec9fcdSqs void
hxge_nd_free(caddr_t * pparam)13003dec9fcdSqs hxge_nd_free(caddr_t *pparam)
13013dec9fcdSqs {
13023dec9fcdSqs ND *nd;
13033dec9fcdSqs
13043dec9fcdSqs if ((nd = (ND *)*pparam) != NULL) {
13053dec9fcdSqs if (nd->nd_tbl)
13063dec9fcdSqs KMEM_FREE((char *)nd->nd_tbl, nd->nd_size);
13073dec9fcdSqs KMEM_FREE((char *)nd, sizeof (ND));
13083dec9fcdSqs *pparam = nil(caddr_t);
13093dec9fcdSqs }
13103dec9fcdSqs }
13113dec9fcdSqs
13123dec9fcdSqs int
hxge_nd_getset(p_hxge_t hxgep,queue_t * q,caddr_t param,p_mblk_t mp)13133dec9fcdSqs hxge_nd_getset(p_hxge_t hxgep, queue_t *q, caddr_t param, p_mblk_t mp)
13143dec9fcdSqs {
13153dec9fcdSqs int err;
13163dec9fcdSqs IOCP iocp;
13173dec9fcdSqs p_mblk_t mp1, mp2;
13183dec9fcdSqs ND *nd;
13193dec9fcdSqs NDE *nde;
13203dec9fcdSqs char *valp;
13213dec9fcdSqs
13223dec9fcdSqs size_t avail;
13233dec9fcdSqs
13243dec9fcdSqs if (!param) {
13253dec9fcdSqs return (B_FALSE);
13263dec9fcdSqs }
13273dec9fcdSqs nd = (ND *) param;
13283dec9fcdSqs iocp = (IOCP) mp->b_rptr;
13293dec9fcdSqs if ((iocp->ioc_count == 0) || !(mp1 = mp->b_cont)) {
13303dec9fcdSqs mp->b_datap->db_type = M_IOCACK;
13313dec9fcdSqs iocp->ioc_count = 0;
13323dec9fcdSqs iocp->ioc_error = EINVAL;
13333dec9fcdSqs return (B_FALSE);
13343dec9fcdSqs }
13353dec9fcdSqs /*
13363dec9fcdSqs * NOTE - logic throughout nd_xxx assumes single data block for ioctl.
13373dec9fcdSqs * However, existing code sends in some big buffers.
13383dec9fcdSqs */
13393dec9fcdSqs avail = iocp->ioc_count;
13403dec9fcdSqs if (mp1->b_cont) {
13413dec9fcdSqs freemsg(mp1->b_cont);
13423dec9fcdSqs mp1->b_cont = NULL;
13433dec9fcdSqs }
13443dec9fcdSqs mp1->b_datap->db_lim[-1] = '\0'; /* Force null termination */
13453dec9fcdSqs for (valp = (char *)mp1->b_rptr; *valp != '\0'; valp++) {
13463dec9fcdSqs if (*valp == '-')
13473dec9fcdSqs *valp = '_';
13483dec9fcdSqs }
13493dec9fcdSqs
13503dec9fcdSqs valp = (char *)mp1->b_rptr;
13513dec9fcdSqs
13523dec9fcdSqs for (nde = nd->nd_tbl; /* */; nde++) {
13533dec9fcdSqs if (!nde->nde_name)
13543dec9fcdSqs return (B_FALSE);
13553dec9fcdSqs if (strcmp(nde->nde_name, valp) == 0)
13563dec9fcdSqs break;
13573dec9fcdSqs }
13583dec9fcdSqs err = EINVAL;
13593dec9fcdSqs while (*valp++)
13603dec9fcdSqs noop;
13613dec9fcdSqs if (!*valp || valp >= (char *)mp1->b_wptr)
13623dec9fcdSqs valp = nilp(char);
13633dec9fcdSqs switch (iocp->ioc_cmd) {
13643dec9fcdSqs case ND_GET:
1365a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States if (*nde->nde_get_pfi == NULL)
1366a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States return (B_FALSE);
1367a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States
13683dec9fcdSqs /*
13693dec9fcdSqs * (temporary) hack: "*valp" is size of user buffer for
13703dec9fcdSqs * copyout. If result of action routine is too big, free excess
13713dec9fcdSqs * and return ioc_rval as buffer size needed. Return as many
13723dec9fcdSqs * mblocks as will fit, free the rest. For backward
13733dec9fcdSqs * compatibility, assume size of original ioctl buffer if
13743dec9fcdSqs * "*valp" bad or not given.
13753dec9fcdSqs */
13763dec9fcdSqs if (valp)
13773dec9fcdSqs avail = mi_strtol(valp, (char **)0, 10);
13783dec9fcdSqs /*
13793dec9fcdSqs * We overwrite the name/value with the reply data
13803dec9fcdSqs */
13813dec9fcdSqs mp2 = mp1;
13823dec9fcdSqs while (mp2) {
13833dec9fcdSqs mp2->b_wptr = mp2->b_rptr;
13843dec9fcdSqs mp2 = mp2->b_cont;
13853dec9fcdSqs }
13863dec9fcdSqs
13873dec9fcdSqs err = (*nde->nde_get_pfi) (hxgep, q, mp1, nde->nde_data);
13883dec9fcdSqs
13893dec9fcdSqs if (!err) {
13903dec9fcdSqs size_t size_out = 0;
13913dec9fcdSqs ssize_t excess;
13923dec9fcdSqs
13933dec9fcdSqs iocp->ioc_rval = 0;
13943dec9fcdSqs
13953dec9fcdSqs /* Tack on the null */
13963dec9fcdSqs err = hxge_mk_mblk_tail_space(mp1, &mp2, 1);
13973dec9fcdSqs if (!err) {
13983dec9fcdSqs *mp2->b_wptr++ = '\0';
13993dec9fcdSqs size_out = msgdsize(mp1);
14003dec9fcdSqs excess = size_out - avail;
14013dec9fcdSqs if (excess > 0) {
14023dec9fcdSqs iocp->ioc_rval = (int)size_out;
14033dec9fcdSqs size_out -= excess;
14043dec9fcdSqs (void) adjmsg(mp1, -(excess + 1));
14053dec9fcdSqs err = hxge_mk_mblk_tail_space(
14063dec9fcdSqs mp1, &mp2, 1);
14073dec9fcdSqs if (!err)
14083dec9fcdSqs *mp2->b_wptr++ = '\0';
14093dec9fcdSqs else
14103dec9fcdSqs size_out = 0;
14113dec9fcdSqs }
14123dec9fcdSqs } else
14133dec9fcdSqs size_out = 0;
14143dec9fcdSqs iocp->ioc_count = size_out;
14153dec9fcdSqs }
14163dec9fcdSqs break;
14173dec9fcdSqs
14183dec9fcdSqs case ND_SET:
14193dec9fcdSqs if (valp) {
14203dec9fcdSqs if (nde->nde_set_pfi) {
14213dec9fcdSqs err = (*nde->nde_set_pfi) (hxgep, q, mp1, valp,
14223dec9fcdSqs nde->nde_data);
14233dec9fcdSqs iocp->ioc_count = 0;
14243dec9fcdSqs freemsg(mp1);
14253dec9fcdSqs mp->b_cont = NULL;
14263dec9fcdSqs }
14273dec9fcdSqs }
14283dec9fcdSqs break;
14293dec9fcdSqs
14303dec9fcdSqs default:
14313dec9fcdSqs break;
14323dec9fcdSqs }
14333dec9fcdSqs iocp->ioc_error = err;
14343dec9fcdSqs mp->b_datap->db_type = M_IOCACK;
14353dec9fcdSqs return (B_TRUE);
14363dec9fcdSqs }
14373dec9fcdSqs
14383dec9fcdSqs /* ARGSUSED */
14393dec9fcdSqs int
hxge_nd_get_names(p_hxge_t hxgep,queue_t * q,p_mblk_t mp,caddr_t param)14403dec9fcdSqs hxge_nd_get_names(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t param)
14413dec9fcdSqs {
14423dec9fcdSqs ND *nd;
14433dec9fcdSqs NDE *nde;
14443dec9fcdSqs char *rwtag;
14453dec9fcdSqs boolean_t get_ok, set_ok;
14463dec9fcdSqs size_t param_len;
14473dec9fcdSqs int status = 0;
14483dec9fcdSqs
14493dec9fcdSqs nd = (ND *) param;
14503dec9fcdSqs if (!nd)
14513dec9fcdSqs return (ENOENT);
14523dec9fcdSqs
14533dec9fcdSqs for (nde = nd->nd_tbl; nde->nde_name; nde++) {
14543dec9fcdSqs get_ok = (nde->nde_get_pfi != hxge_get_default) &&
14553dec9fcdSqs (nde->nde_get_pfi != NULL);
14563dec9fcdSqs set_ok = (nde->nde_set_pfi != hxge_set_default) &&
14573dec9fcdSqs (nde->nde_set_pfi != NULL);
14583dec9fcdSqs if (get_ok) {
14593dec9fcdSqs if (set_ok)
14603dec9fcdSqs rwtag = "read and write";
14613dec9fcdSqs else
14623dec9fcdSqs rwtag = "read only";
14633dec9fcdSqs } else if (set_ok)
14643dec9fcdSqs rwtag = "write only";
14653dec9fcdSqs else {
14663dec9fcdSqs continue;
14673dec9fcdSqs }
14683dec9fcdSqs param_len = strlen(rwtag);
14693dec9fcdSqs param_len += strlen(nde->nde_name);
14703dec9fcdSqs param_len += 4;
14713dec9fcdSqs
14723dec9fcdSqs (void) mi_mpprintf(mp, "%s (%s)", nde->nde_name, rwtag);
14733dec9fcdSqs }
14743dec9fcdSqs return (status);
14753dec9fcdSqs }
14763dec9fcdSqs
14773dec9fcdSqs /* ARGSUSED */
14783dec9fcdSqs int
hxge_get_default(p_hxge_t hxgep,queue_t * q,p_mblk_t mp,caddr_t data)14793dec9fcdSqs hxge_get_default(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, caddr_t data)
14803dec9fcdSqs {
14813dec9fcdSqs return (EACCES);
14823dec9fcdSqs }
14833dec9fcdSqs
14843dec9fcdSqs /* ARGSUSED */
14853dec9fcdSqs int
hxge_set_default(p_hxge_t hxgep,queue_t * q,p_mblk_t mp,char * value,caddr_t data)14863dec9fcdSqs hxge_set_default(p_hxge_t hxgep, queue_t *q, p_mblk_t mp, char *value,
1487*86ef0a63SRichard Lowe caddr_t data)
14883dec9fcdSqs {
14893dec9fcdSqs return (EACCES);
14903dec9fcdSqs }
14913dec9fcdSqs
14923dec9fcdSqs void
hxge_param_ioctl(p_hxge_t hxgep,queue_t * wq,mblk_t * mp,struct iocblk * iocp)14933dec9fcdSqs hxge_param_ioctl(p_hxge_t hxgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp)
14943dec9fcdSqs {
14953dec9fcdSqs int cmd;
14963dec9fcdSqs int status = B_FALSE;
14973dec9fcdSqs
14983dec9fcdSqs HXGE_DEBUG_MSG((hxgep, IOC_CTL, "==> hxge_param_ioctl"));
14993dec9fcdSqs cmd = iocp->ioc_cmd;
15003dec9fcdSqs switch (cmd) {
15013dec9fcdSqs default:
15023dec9fcdSqs HXGE_DEBUG_MSG((hxgep, IOC_CTL,
15033dec9fcdSqs "hxge_param_ioctl: bad cmd 0x%0x", cmd));
15043dec9fcdSqs break;
15053dec9fcdSqs
15063dec9fcdSqs case ND_GET:
15073dec9fcdSqs case ND_SET:
15083dec9fcdSqs HXGE_DEBUG_MSG((hxgep, IOC_CTL,
15093dec9fcdSqs "hxge_param_ioctl: cmd 0x%0x", cmd));
15103dec9fcdSqs if (!hxge_nd_getset(hxgep, wq, hxgep->param_list, mp)) {
15113dec9fcdSqs HXGE_DEBUG_MSG((hxgep, IOC_CTL,
15123dec9fcdSqs "false ret from hxge_nd_getset"));
15133dec9fcdSqs break;
15143dec9fcdSqs }
15153dec9fcdSqs status = B_TRUE;
15163dec9fcdSqs break;
15173dec9fcdSqs }
15183dec9fcdSqs
15193dec9fcdSqs if (status) {
15203dec9fcdSqs qreply(wq, mp);
15213dec9fcdSqs } else {
15223dec9fcdSqs miocnak(wq, mp, 0, EINVAL);
15233dec9fcdSqs }
15243dec9fcdSqs HXGE_DEBUG_MSG((hxgep, IOC_CTL, "<== hxge_param_ioctl"));
15253dec9fcdSqs }
1526