1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #include <hxge_impl.h> 27 #include <inet/mi.h> 28 #include <sys/cmn_err.h> 29 30 #define RDC_NAME_FORMAT1 "RDC_" 31 #define TDC_NAME_FORMAT1 "TDC_" 32 #define CH_NAME_FORMAT "%d" 33 34 void 35 hxge_init_statsp(p_hxge_t hxgep) 36 { 37 size_t stats_size; 38 39 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_init_statsp")); 40 41 stats_size = sizeof (hxge_stats_t); 42 hxgep->statsp = KMEM_ZALLOC(stats_size, KM_SLEEP); 43 hxgep->statsp->stats_size = stats_size; 44 45 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_init_statsp")); 46 } 47 48 typedef struct { 49 uint8_t index; 50 uint8_t type; 51 char *name; 52 } hxge_kstat_index_t; 53 54 typedef enum { 55 RDC_STAT_PACKETS = 0, 56 RDC_STAT_BYTES, 57 RDC_STAT_ERRORS, 58 RDC_STAT_JUMBO_PKTS, 59 RDC_STAT_RCR_UNKNOWN_ERR, 60 RDC_STAT_RCR_SHA_PAR_ERR, 61 RDC_STAT_RBR_PRE_PAR_ERR, 62 RDC_STAT_RBR_PRE_EMTY, 63 RDC_STAT_RCR_SHADOW_FULL, 64 RDC_STAT_RBR_TMOUT, 65 RDC_STAT_PEU_RESP_ERR, 66 RDC_STAT_CTRL_FIFO_ECC_ERR, 67 RDC_STAT_DATA_FIFO_ECC_ERR, 68 RDC_STAT_RCRFULL, 69 RDC_STAT_RBR_EMPTY, 70 RDC_STAT_RBR_FULL, 71 RDC_STAT_RCRTO, 72 RDC_STAT_RCRTHRES, 73 RDC_STAT_END 74 } hxge_rdc_stat_index_t; 75 76 hxge_kstat_index_t hxge_rdc_stats[] = { 77 {RDC_STAT_PACKETS, KSTAT_DATA_UINT64, "rdc_packets"}, 78 {RDC_STAT_BYTES, KSTAT_DATA_UINT64, "rdc_bytes"}, 79 {RDC_STAT_ERRORS, KSTAT_DATA_ULONG, "rdc_errors"}, 80 {RDC_STAT_JUMBO_PKTS, KSTAT_DATA_ULONG, "rdc_jumbo_pkts"}, 81 {RDC_STAT_RCR_UNKNOWN_ERR, KSTAT_DATA_ULONG, "rdc_rcr_unknown_err"}, 82 {RDC_STAT_RCR_SHA_PAR_ERR, KSTAT_DATA_ULONG, "rdc_rcr_sha_par_err"}, 83 {RDC_STAT_RBR_PRE_PAR_ERR, KSTAT_DATA_ULONG, "rdc_rbr_pre_par_err"}, 84 {RDC_STAT_RBR_PRE_EMTY, KSTAT_DATA_ULONG, "rdc_rbr_pre_empty"}, 85 {RDC_STAT_RCR_SHADOW_FULL, KSTAT_DATA_ULONG, "rdc_rcr_shadow_full"}, 86 {RDC_STAT_RBR_TMOUT, KSTAT_DATA_ULONG, "rdc_rbr_tmout"}, 87 {RDC_STAT_PEU_RESP_ERR, KSTAT_DATA_ULONG, "peu_resp_err"}, 88 {RDC_STAT_CTRL_FIFO_ECC_ERR, KSTAT_DATA_ULONG, "ctrl_fifo_ecc_err"}, 89 {RDC_STAT_DATA_FIFO_ECC_ERR, KSTAT_DATA_ULONG, "data_fifo_ecc_err"}, 90 {RDC_STAT_RCRFULL, KSTAT_DATA_ULONG, "rdc_rcrfull"}, 91 {RDC_STAT_RBR_EMPTY, KSTAT_DATA_ULONG, "rdc_rbr_empty"}, 92 {RDC_STAT_RBR_FULL, KSTAT_DATA_ULONG, "rdc_rbrfull"}, 93 {RDC_STAT_RCRTO, KSTAT_DATA_ULONG, "rdc_rcrto"}, 94 {RDC_STAT_RCRTHRES, KSTAT_DATA_ULONG, "rdc_rcrthres"}, 95 {RDC_STAT_END, NULL, NULL} 96 }; 97 98 typedef enum { 99 RDC_SYS_STAT_CTRL_FIFO_SEC = 0, 100 RDC_SYS_STAT_CTRL_FIFO_DED, 101 RDC_SYS_STAT_DATA_FIFO_SEC, 102 RDC_SYS_STAT_DATA_FIFO_DED, 103 RDC_SYS_STAT_END 104 } hxge_rdc_sys_stat_idx_t; 105 106 hxge_kstat_index_t hxge_rdc_sys_stats[] = { 107 {RDC_SYS_STAT_CTRL_FIFO_SEC, KSTAT_DATA_UINT64, "rdc_ctrl_fifo_sec"}, 108 {RDC_SYS_STAT_CTRL_FIFO_DED, KSTAT_DATA_UINT64, "rdc_ctrl_fifo_ded"}, 109 {RDC_SYS_STAT_DATA_FIFO_SEC, KSTAT_DATA_UINT64, "rdc_data_fifo_sec"}, 110 {RDC_SYS_STAT_DATA_FIFO_DED, KSTAT_DATA_UINT64, "tdc_data_fifo_ded"}, 111 {RDC_SYS_STAT_END, NULL, NULL} 112 }; 113 114 typedef enum { 115 TDC_STAT_PACKETS = 0, 116 TDC_STAT_BYTES, 117 TDC_STAT_BYTES_WITH_PAD, 118 TDC_STAT_ERRORS, 119 TDC_STAT_TX_INITS, 120 TDC_STAT_TX_NO_BUF, 121 TDC_STAT_PEU_RESP_ERR, 122 TDC_STAT_PKT_SIZE_ERR, 123 TDC_STAT_TX_RNG_OFLOW, 124 TDC_STAT_PKT_SIZE_HDR_ERR, 125 TDC_STAT_RUNT_PKT_DROP_ERR, 126 TDC_STAT_PREF_PAR_ERR, 127 TDC_STAT_TDR_PREF_CPL_TO, 128 TDC_STAT_PKT_CPL_TO, 129 TDC_STAT_INVALID_SOP, 130 TDC_STAT_UNEXPECTED_SOP, 131 TDC_STAT_COUNT_HDR_SIZE_ERR, 132 TDC_STAT_COUNT_RUNT, 133 TDC_STAT_COUNT_ABORT, 134 TDC_STAT_TX_STARTS, 135 TDC_STAT_TX_NO_DESC, 136 TDC_STAT_TX_DMA_BIND_FAIL, 137 TDC_STAT_TX_HDR_PKTS, 138 TDC_STAT_TX_DDI_PKTS, 139 TDC_STAT_TX_JUMBO_PKTS, 140 TDC_STAT_TX_MAX_PEND, 141 TDC_STAT_TX_MARKS, 142 TDC_STAT_END 143 } hxge_tdc_stats_index_t; 144 145 hxge_kstat_index_t hxge_tdc_stats[] = { 146 {TDC_STAT_PACKETS, KSTAT_DATA_UINT64, "tdc_packets"}, 147 {TDC_STAT_BYTES, KSTAT_DATA_UINT64, "tdc_bytes"}, 148 {TDC_STAT_BYTES_WITH_PAD, KSTAT_DATA_UINT64, "tdc_bytes_with_pad"}, 149 {TDC_STAT_ERRORS, KSTAT_DATA_UINT64, "tdc_errors"}, 150 {TDC_STAT_TX_INITS, KSTAT_DATA_ULONG, "tdc_tx_inits"}, 151 {TDC_STAT_TX_NO_BUF, KSTAT_DATA_ULONG, "tdc_tx_no_buf"}, 152 153 {TDC_STAT_PEU_RESP_ERR, KSTAT_DATA_ULONG, "tdc_peu_resp_err"}, 154 {TDC_STAT_PKT_SIZE_ERR, KSTAT_DATA_ULONG, "tdc_pkt_size_err"}, 155 {TDC_STAT_TX_RNG_OFLOW, KSTAT_DATA_ULONG, "tdc_tx_rng_oflow"}, 156 {TDC_STAT_PKT_SIZE_HDR_ERR, KSTAT_DATA_ULONG, "tdc_pkt_size_hdr_err"}, 157 {TDC_STAT_RUNT_PKT_DROP_ERR, KSTAT_DATA_ULONG, "tdc_runt_pkt_drop_err"}, 158 {TDC_STAT_PREF_PAR_ERR, KSTAT_DATA_ULONG, "tdc_pref_par_err"}, 159 {TDC_STAT_TDR_PREF_CPL_TO, KSTAT_DATA_ULONG, "tdc_tdr_pref_cpl_to"}, 160 {TDC_STAT_PKT_CPL_TO, KSTAT_DATA_ULONG, "tdc_pkt_cpl_to"}, 161 {TDC_STAT_INVALID_SOP, KSTAT_DATA_ULONG, "tdc_invalid_sop"}, 162 {TDC_STAT_UNEXPECTED_SOP, KSTAT_DATA_ULONG, "tdc_unexpected_sop"}, 163 164 {TDC_STAT_COUNT_HDR_SIZE_ERR, KSTAT_DATA_ULONG, 165 "tdc_count_hdr_size_err"}, 166 {TDC_STAT_COUNT_RUNT, KSTAT_DATA_ULONG, "tdc_count_runt"}, 167 {TDC_STAT_COUNT_ABORT, KSTAT_DATA_ULONG, "tdc_count_abort"}, 168 169 {TDC_STAT_TX_STARTS, KSTAT_DATA_ULONG, "tdc_tx_starts"}, 170 {TDC_STAT_TX_NO_DESC, KSTAT_DATA_ULONG, "tdc_tx_no_desc"}, 171 {TDC_STAT_TX_DMA_BIND_FAIL, KSTAT_DATA_ULONG, "tdc_tx_dma_bind_fail"}, 172 {TDC_STAT_TX_HDR_PKTS, KSTAT_DATA_ULONG, "tdc_tx_hdr_pkts"}, 173 {TDC_STAT_TX_DDI_PKTS, KSTAT_DATA_ULONG, "tdc_tx_ddi_pkts"}, 174 {TDC_STAT_TX_JUMBO_PKTS, KSTAT_DATA_ULONG, "tdc_tx_jumbo_pkts"}, 175 {TDC_STAT_TX_MAX_PEND, KSTAT_DATA_ULONG, "tdc_tx_max_pend"}, 176 {TDC_STAT_TX_MARKS, KSTAT_DATA_ULONG, "tdc_tx_marks"}, 177 {TDC_STAT_END, NULL, NULL} 178 }; 179 180 typedef enum { 181 REORD_TBL_PAR_ERR = 0, 182 REORD_BUF_DED_ERR, 183 REORD_BUF_SEC_ERR, 184 TDC_SYS_STAT_END 185 } hxge_tdc_sys_stat_idx_t; 186 187 hxge_kstat_index_t hxge_tdc_sys_stats[] = { 188 {REORD_TBL_PAR_ERR, KSTAT_DATA_UINT64, "reord_tbl_par_err"}, 189 {REORD_BUF_DED_ERR, KSTAT_DATA_UINT64, "reord_buf_ded_err"}, 190 {REORD_BUF_SEC_ERR, KSTAT_DATA_UINT64, "reord_buf_sec_err"}, 191 {TDC_SYS_STAT_END, NULL, NULL} 192 }; 193 194 typedef enum { 195 VMAC_STAT_TX_FRAME_CNT, /* vmac_tx_frame_cnt_t */ 196 VMAC_STAT_TX_BYTE_CNT, /* vmac_tx_byte_cnt_t */ 197 198 VMAC_STAT_RX_FRAME_CNT, /* vmac_rx_frame_cnt_t */ 199 VMAC_STAT_RX_BYTE_CNT, /* vmac_rx_byte_cnt_t */ 200 VMAC_STAT_RX_DROP_FRAME_CNT, /* vmac_rx_drop_fr_cnt_t */ 201 VMAC_STAT_RX_DROP_BYTE_CNT, /* vmac_rx_drop_byte_cnt_t */ 202 VMAC_STAT_RX_CRC_CNT, /* vmac_rx_crc_cnt_t */ 203 VMAC_STAT_RX_PAUSE_CNT, /* vmac_rx_pause_cnt_t */ 204 VMAC_STAT_RX_BCAST_FR_CNT, /* vmac_rx_bcast_fr_cnt_t */ 205 VMAC_STAT_RX_MCAST_FR_CNT, /* vmac_rx_mcast_fr_cnt_t */ 206 VMAC_STAT_END 207 } hxge_vmac_stat_index_t; 208 209 hxge_kstat_index_t hxge_vmac_stats[] = { 210 {VMAC_STAT_TX_FRAME_CNT, KSTAT_DATA_UINT64, "vmac_tx_frame_cnt"}, 211 {VMAC_STAT_TX_BYTE_CNT, KSTAT_DATA_UINT64, "vmac_tx_byte_cnt"}, 212 213 {VMAC_STAT_RX_FRAME_CNT, KSTAT_DATA_UINT64, "vmac_rx_frame_cnt"}, 214 {VMAC_STAT_RX_BYTE_CNT, KSTAT_DATA_UINT64, "vmac_rx_byte_cnt"}, 215 {VMAC_STAT_RX_DROP_FRAME_CNT, KSTAT_DATA_UINT64, 216 "vmac_rx_drop_frame_cnt"}, 217 {VMAC_STAT_RX_DROP_BYTE_CNT, KSTAT_DATA_UINT64, 218 "vmac_rx_drop_byte_cnt"}, 219 {VMAC_STAT_RX_CRC_CNT, KSTAT_DATA_UINT64, "vmac_rx_crc_cnt"}, 220 {VMAC_STAT_RX_PAUSE_CNT, KSTAT_DATA_UINT64, "vmac_rx_pause_cnt"}, 221 {VMAC_STAT_RX_BCAST_FR_CNT, KSTAT_DATA_UINT64, "vmac_rx_bcast_fr_cnt"}, 222 {VMAC_STAT_RX_MCAST_FR_CNT, KSTAT_DATA_UINT64, "vmac_rx_mcast_fr_cnt"}, 223 {VMAC_STAT_END, NULL, NULL} 224 }; 225 226 typedef enum { 227 PFC_STAT_PKT_DROP, 228 PFC_STAT_TCAM_PARITY_ERR, 229 PFC_STAT_VLAN_PARITY_ERR, 230 PFC_STAT_BAD_CS_COUNT, 231 PFC_STAT_DROP_COUNT, 232 PFC_STAT_TCP_CTRL_DROP, 233 PFC_STAT_L2_ADDR_DROP, 234 PFC_STAT_CLASS_CODE_DROP, 235 PFC_STAT_TCAM_DROP, 236 PFC_STAT_VLAN_DROP, 237 PFC_STAT_END 238 } hxge_pfc_stat_index_t; 239 240 hxge_kstat_index_t hxge_pfc_stats[] = { 241 {PFC_STAT_PKT_DROP, KSTAT_DATA_ULONG, "pfc_pkt_drop"}, 242 {PFC_STAT_TCAM_PARITY_ERR, KSTAT_DATA_ULONG, "pfc_tcam_parity_err"}, 243 {PFC_STAT_VLAN_PARITY_ERR, KSTAT_DATA_ULONG, "pfc_vlan_parity_err"}, 244 {PFC_STAT_BAD_CS_COUNT, KSTAT_DATA_ULONG, "pfc_bad_cs_count"}, 245 {PFC_STAT_DROP_COUNT, KSTAT_DATA_ULONG, "pfc_drop_count"}, 246 {PFC_STAT_TCP_CTRL_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_tcp_ctrl"}, 247 {PFC_STAT_L2_ADDR_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_l2_addr"}, 248 {PFC_STAT_CLASS_CODE_DROP, KSTAT_DATA_ULONG, 249 " pfc_pkt_drop_class_code"}, 250 {PFC_STAT_TCAM_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_tcam"}, 251 {PFC_STAT_VLAN_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_vlan"}, 252 {PFC_STAT_END, NULL, NULL} 253 }; 254 255 typedef enum { 256 MMAC_MAX_ADDR, 257 MMAC_AVAIL_ADDR, 258 MMAC_ADDR_POOL1, 259 MMAC_ADDR_POOL2, 260 MMAC_ADDR_POOL3, 261 MMAC_ADDR_POOL4, 262 MMAC_ADDR_POOL5, 263 MMAC_ADDR_POOL6, 264 MMAC_ADDR_POOL7, 265 MMAC_ADDR_POOL8, 266 MMAC_ADDR_POOL9, 267 MMAC_ADDR_POOL10, 268 MMAC_ADDR_POOL11, 269 MMAC_ADDR_POOL12, 270 MMAC_ADDR_POOL13, 271 MMAC_ADDR_POOL14, 272 MMAC_ADDR_POOL15, 273 MMAC_ADDR_POOL16, 274 MMAC_STATS_END 275 } hxge_mmac_stat_index_t; 276 277 hxge_kstat_index_t hxge_mmac_stats[] = { 278 {MMAC_MAX_ADDR, KSTAT_DATA_UINT64, "max_mmac_addr"}, 279 {MMAC_AVAIL_ADDR, KSTAT_DATA_UINT64, "avail_mmac_addr"}, 280 {MMAC_ADDR_POOL1, KSTAT_DATA_UINT64, "mmac_addr_1"}, 281 {MMAC_ADDR_POOL2, KSTAT_DATA_UINT64, "mmac_addr_2"}, 282 {MMAC_ADDR_POOL3, KSTAT_DATA_UINT64, "mmac_addr_3"}, 283 {MMAC_ADDR_POOL4, KSTAT_DATA_UINT64, "mmac_addr_4"}, 284 {MMAC_ADDR_POOL5, KSTAT_DATA_UINT64, "mmac_addr_5"}, 285 {MMAC_ADDR_POOL6, KSTAT_DATA_UINT64, "mmac_addr_6"}, 286 {MMAC_ADDR_POOL7, KSTAT_DATA_UINT64, "mmac_addr_7"}, 287 {MMAC_ADDR_POOL8, KSTAT_DATA_UINT64, "mmac_addr_8"}, 288 {MMAC_ADDR_POOL9, KSTAT_DATA_UINT64, "mmac_addr_9"}, 289 {MMAC_ADDR_POOL10, KSTAT_DATA_UINT64, "mmac_addr_10"}, 290 {MMAC_ADDR_POOL11, KSTAT_DATA_UINT64, "mmac_addr_11"}, 291 {MMAC_ADDR_POOL12, KSTAT_DATA_UINT64, "mmac_addr_12"}, 292 {MMAC_ADDR_POOL13, KSTAT_DATA_UINT64, "mmac_addr_13"}, 293 {MMAC_ADDR_POOL14, KSTAT_DATA_UINT64, "mmac_addr_14"}, 294 {MMAC_ADDR_POOL15, KSTAT_DATA_UINT64, "mmac_addr_15"}, 295 {MMAC_ADDR_POOL16, KSTAT_DATA_UINT64, "mmac_addr_16"}, 296 {MMAC_STATS_END, NULL, NULL}, 297 }; 298 299 typedef enum { 300 SPC_ACC_ERR = 0, 301 TDC_PIOACC_ERR, 302 RDC_PIOACC_ERR, 303 PFC_PIOACC_ERR, 304 VMAC_PIOACC_ERR, 305 CPL_HDRQ_PARERR, 306 CPL_DATAQ_PARERR, 307 RETRYRAM_XDLH_PARERR, 308 RETRYSOTRAM_XDLH_PARERR, 309 P_HDRQ_PARERR, 310 P_DATAQ_PARERR, 311 NP_HDRQ_PARERR, 312 NP_DATAQ_PARERR, 313 EIC_MSIX_PARERR, 314 HCR_PARERR, 315 PEU_SYS_STAT_END 316 } hxge_peu_sys_stat_idx_t; 317 318 hxge_kstat_index_t hxge_peu_sys_stats[] = { 319 {SPC_ACC_ERR, KSTAT_DATA_UINT64, "spc_acc_err"}, 320 {TDC_PIOACC_ERR, KSTAT_DATA_UINT64, "tdc_pioacc_err"}, 321 {RDC_PIOACC_ERR, KSTAT_DATA_UINT64, "rdc_pioacc_err"}, 322 {PFC_PIOACC_ERR, KSTAT_DATA_UINT64, "pfc_pioacc_err"}, 323 {VMAC_PIOACC_ERR, KSTAT_DATA_UINT64, "vmac_pioacc_err"}, 324 {CPL_HDRQ_PARERR, KSTAT_DATA_UINT64, "cpl_hdrq_parerr"}, 325 {CPL_DATAQ_PARERR, KSTAT_DATA_UINT64, "cpl_dataq_parerr"}, 326 {RETRYRAM_XDLH_PARERR, KSTAT_DATA_UINT64, "retryram_xdlh_parerr"}, 327 {RETRYSOTRAM_XDLH_PARERR, KSTAT_DATA_UINT64, "retrysotram_xdlh_parerr"}, 328 {P_HDRQ_PARERR, KSTAT_DATA_UINT64, "p_hdrq_parerr"}, 329 {P_DATAQ_PARERR, KSTAT_DATA_UINT64, "p_dataq_parerr"}, 330 {NP_HDRQ_PARERR, KSTAT_DATA_UINT64, "np_hdrq_parerr"}, 331 {NP_DATAQ_PARERR, KSTAT_DATA_UINT64, "np_dataq_parerr"}, 332 {EIC_MSIX_PARERR, KSTAT_DATA_UINT64, "eic_msix_parerr"}, 333 {HCR_PARERR, KSTAT_DATA_UINT64, "hcr_parerr"}, 334 {TDC_SYS_STAT_END, NULL, NULL} 335 }; 336 337 /* ARGSUSED */ 338 int 339 hxge_tdc_stat_update(kstat_t *ksp, int rw) 340 { 341 p_hxge_t hxgep; 342 p_hxge_tdc_kstat_t tdc_kstatsp; 343 p_hxge_tx_ring_stats_t statsp; 344 int channel; 345 char *ch_name, *end; 346 347 hxgep = (p_hxge_t)ksp->ks_private; 348 if (hxgep == NULL) 349 return (-1); 350 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rxstat_update")); 351 352 ch_name = ksp->ks_name; 353 ch_name += strlen(TDC_NAME_FORMAT1); 354 channel = mi_strtol(ch_name, &end, 10); 355 356 tdc_kstatsp = (p_hxge_tdc_kstat_t)ksp->ks_data; 357 statsp = (p_hxge_tx_ring_stats_t)&hxgep->statsp->tdc_stats[channel]; 358 359 HXGE_DEBUG_MSG((hxgep, KST_CTL, 360 "hxge_tdc_stat_update data $%p statsp $%p channel %d", 361 ksp->ks_data, statsp, channel)); 362 363 tdc_kstatsp->opackets.value.ull = statsp->opackets; 364 tdc_kstatsp->obytes.value.ull = statsp->obytes; 365 tdc_kstatsp->obytes_with_pad.value.ull = statsp->obytes_with_pad; 366 tdc_kstatsp->oerrors.value.ull = statsp->oerrors; 367 tdc_kstatsp->tx_hdr_pkts.value.ull = statsp->tx_hdr_pkts; 368 tdc_kstatsp->tx_ddi_pkts.value.ull = statsp->tx_ddi_pkts; 369 tdc_kstatsp->tx_jumbo_pkts.value.ull = statsp->tx_jumbo_pkts; 370 tdc_kstatsp->tx_max_pend.value.ull = statsp->tx_max_pend; 371 tdc_kstatsp->peu_resp_err.value.ul = statsp->peu_resp_err; 372 tdc_kstatsp->pkt_size_err.value.ul = statsp->pkt_size_err; 373 tdc_kstatsp->tx_rng_oflow.value.ul = statsp->tx_rng_oflow; 374 tdc_kstatsp->pkt_size_hdr_err.value.ul = statsp->pkt_size_hdr_err; 375 tdc_kstatsp->runt_pkt_drop_err.value.ul = statsp->runt_pkt_drop_err; 376 tdc_kstatsp->pref_par_err.value.ul = statsp->pref_par_err; 377 tdc_kstatsp->tdr_pref_cpl_to.value.ul = statsp->tdr_pref_cpl_to; 378 tdc_kstatsp->pkt_cpl_to.value.ul = statsp->pkt_cpl_to; 379 tdc_kstatsp->invalid_sop.value.ul = statsp->invalid_sop; 380 tdc_kstatsp->unexpected_sop.value.ul = statsp->unexpected_sop; 381 tdc_kstatsp->tx_starts.value.ul = statsp->tx_starts; 382 tdc_kstatsp->tx_no_desc.value.ul = statsp->tx_no_desc; 383 tdc_kstatsp->tx_dma_bind_fail.value.ul = statsp->tx_dma_bind_fail; 384 385 tdc_kstatsp->count_hdr_size_err.value.ul = 386 statsp->count_hdr_size_err; 387 tdc_kstatsp->count_runt.value.ul = statsp->count_runt; 388 tdc_kstatsp->count_abort.value.ul = statsp->count_abort; 389 tdc_kstatsp->tx_marks.value.ul = statsp->tx_marks; 390 391 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_tdc_stat_update")); 392 return (0); 393 } 394 395 /* ARGSUSED */ 396 int 397 hxge_tdc_sys_stat_update(kstat_t *ksp, int rw) 398 { 399 p_hxge_t hxgep; 400 p_hxge_tdc_sys_kstat_t tdc_sys_kstatsp; 401 p_hxge_tdc_sys_stats_t statsp; 402 403 hxgep = (p_hxge_t)ksp->ks_private; 404 if (hxgep == NULL) 405 return (-1); 406 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_tdc_sys_stat_update")); 407 408 tdc_sys_kstatsp = (p_hxge_tdc_sys_kstat_t)ksp->ks_data; 409 statsp = (p_hxge_tdc_sys_stats_t)&hxgep->statsp->tdc_sys_stats; 410 411 HXGE_DEBUG_MSG((hxgep, KST_CTL, "hxge_tdc_sys_stat_update %llx", 412 ksp->ks_data)); 413 414 tdc_sys_kstatsp->reord_tbl_par_err.value.ul = 415 statsp->reord_tbl_par_err; 416 tdc_sys_kstatsp->reord_buf_ded_err.value.ul = 417 statsp->reord_buf_ded_err; 418 tdc_sys_kstatsp->reord_buf_sec_err.value.ul = 419 statsp->reord_buf_sec_err; 420 421 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_tdc_sys_stat_update")); 422 return (0); 423 } 424 425 /* ARGSUSED */ 426 int 427 hxge_rdc_stat_update(kstat_t *ksp, int rw) 428 { 429 p_hxge_t hxgep; 430 p_hxge_rdc_kstat_t rdc_kstatsp; 431 p_hxge_rx_ring_stats_t statsp; 432 int channel; 433 char *ch_name, *end; 434 435 hxgep = (p_hxge_t)ksp->ks_private; 436 if (hxgep == NULL) 437 return (-1); 438 439 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rdc_stat_update")); 440 441 ch_name = ksp->ks_name; 442 ch_name += strlen(RDC_NAME_FORMAT1); 443 channel = mi_strtol(ch_name, &end, 10); 444 445 rdc_kstatsp = (p_hxge_rdc_kstat_t)ksp->ks_data; 446 statsp = (p_hxge_rx_ring_stats_t)&hxgep->statsp->rdc_stats[channel]; 447 448 HXGE_DEBUG_MSG((hxgep, KST_CTL, 449 "hxge_rdc_stat_update $%p statsp $%p channel %d", 450 ksp->ks_data, statsp, channel)); 451 452 rdc_kstatsp->ipackets.value.ull = statsp->ipackets; 453 rdc_kstatsp->rbytes.value.ull = statsp->ibytes; 454 rdc_kstatsp->jumbo_pkts.value.ul = statsp->jumbo_pkts; 455 rdc_kstatsp->rcr_unknown_err.value.ul = statsp->rcr_unknown_err; 456 rdc_kstatsp->errors.value.ul = statsp->ierrors; 457 rdc_kstatsp->rcr_sha_par_err.value.ul = statsp->rcr_sha_par; 458 rdc_kstatsp->rbr_pre_par_err.value.ul = statsp->rbr_pre_par; 459 rdc_kstatsp->rbr_pre_emty.value.ul = statsp->rbr_pre_empty; 460 rdc_kstatsp->rcr_shadow_full.value.ul = statsp->rcr_shadow_full; 461 rdc_kstatsp->rbr_tmout.value.ul = statsp->rbr_tmout; 462 rdc_kstatsp->peu_resp_err.value.ul = statsp->peu_resp_err; 463 rdc_kstatsp->ctrl_fifo_ecc_err.value.ul = statsp->ctrl_fifo_ecc_err; 464 rdc_kstatsp->data_fifo_ecc_err.value.ul = statsp->data_fifo_ecc_err; 465 rdc_kstatsp->rcrfull.value.ul = statsp->rcrfull; 466 rdc_kstatsp->rbr_empty.value.ul = statsp->rbr_empty; 467 rdc_kstatsp->rbrfull.value.ul = statsp->rbrfull; 468 rdc_kstatsp->rcr_to.value.ul = statsp->rcr_to; 469 rdc_kstatsp->rcr_thresh.value.ul = statsp->rcr_thres; 470 471 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_rdc_stat_update")); 472 return (0); 473 } 474 475 /* ARGSUSED */ 476 int 477 hxge_rdc_sys_stat_update(kstat_t *ksp, int rw) 478 { 479 p_hxge_t hxgep; 480 p_hxge_rdc_sys_kstat_t rdc_sys_kstatsp; 481 p_hxge_rdc_sys_stats_t statsp; 482 483 hxgep = (p_hxge_t)ksp->ks_private; 484 if (hxgep == NULL) 485 return (-1); 486 487 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rdc_sys_stat_update")); 488 489 rdc_sys_kstatsp = (p_hxge_rdc_sys_kstat_t)ksp->ks_data; 490 statsp = (p_hxge_rdc_sys_stats_t)&hxgep->statsp->rdc_sys_stats; 491 492 HXGE_DEBUG_MSG((hxgep, KST_CTL, "hxge_rdc_sys_stat_update %llx", 493 ksp->ks_data)); 494 495 rdc_sys_kstatsp->ctrl_fifo_sec.value.ul = statsp->ctrl_fifo_sec; 496 rdc_sys_kstatsp->ctrl_fifo_ded.value.ul = statsp->ctrl_fifo_ded; 497 rdc_sys_kstatsp->data_fifo_sec.value.ul = statsp->data_fifo_sec; 498 rdc_sys_kstatsp->data_fifo_ded.value.ul = statsp->data_fifo_ded; 499 500 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_rdc_sys_stat_update")); 501 return (0); 502 } 503 504 /* ARGSUSED */ 505 int 506 hxge_vmac_stat_update(kstat_t *ksp, int rw) 507 { 508 p_hxge_t hxgep; 509 p_hxge_vmac_kstat_t vmac_kstatsp; 510 p_hxge_vmac_stats_t statsp; 511 512 hxgep = (p_hxge_t)ksp->ks_private; 513 if (hxgep == NULL) 514 return (-1); 515 516 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_vmac_stat_update")); 517 518 hxge_save_cntrs(hxgep); 519 520 vmac_kstatsp = (p_hxge_vmac_kstat_t)ksp->ks_data; 521 statsp = (p_hxge_vmac_stats_t)&hxgep->statsp->vmac_stats; 522 523 vmac_kstatsp->tx_frame_cnt.value.ul = statsp->tx_frame_cnt; 524 vmac_kstatsp->tx_byte_cnt.value.ul = statsp->tx_byte_cnt; 525 526 vmac_kstatsp->rx_frame_cnt.value.ul = statsp->rx_frame_cnt; 527 vmac_kstatsp->rx_byte_cnt.value.ul = statsp->rx_byte_cnt; 528 vmac_kstatsp->rx_drop_frame_cnt.value.ul = statsp->rx_drop_frame_cnt; 529 vmac_kstatsp->rx_drop_byte_cnt.value.ul = statsp->rx_drop_byte_cnt; 530 vmac_kstatsp->rx_crc_cnt.value.ul = statsp->rx_crc_cnt; 531 vmac_kstatsp->rx_pause_cnt.value.ul = statsp->rx_pause_cnt; 532 vmac_kstatsp->rx_bcast_fr_cnt.value.ul = statsp->rx_bcast_fr_cnt; 533 vmac_kstatsp->rx_mcast_fr_cnt.value.ul = statsp->rx_mcast_fr_cnt; 534 535 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_vmac_stat_update")); 536 return (0); 537 } 538 539 /* ARGSUSED */ 540 int 541 hxge_pfc_stat_update(kstat_t *ksp, int rw) 542 { 543 p_hxge_t hxgep; 544 p_hxge_pfc_kstat_t kstatsp; 545 p_hxge_pfc_stats_t statsp; 546 547 hxgep = (p_hxge_t)ksp->ks_private; 548 if (hxgep == NULL) 549 return (-1); 550 551 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_pfc_stat_update")); 552 553 kstatsp = (p_hxge_pfc_kstat_t)ksp->ks_data; 554 statsp = (p_hxge_pfc_stats_t)&hxgep->statsp->pfc_stats; 555 556 kstatsp->pfc_pkt_drop.value.ul = statsp->pkt_drop; 557 kstatsp->pfc_tcam_parity_err.value.ul = statsp->tcam_parity_err; 558 kstatsp->pfc_vlan_parity_err.value.ul = statsp->vlan_parity_err; 559 kstatsp->pfc_bad_cs_count.value.ul = statsp->bad_cs_count; 560 kstatsp->pfc_drop_count.value.ul = statsp->drop_count; 561 kstatsp->pfc_tcp_ctrl_drop.value.ul = statsp->errlog.tcp_ctrl_drop; 562 kstatsp->pfc_l2_addr_drop.value.ul = statsp->errlog.l2_addr_drop; 563 kstatsp->pfc_class_code_drop.value.ul = statsp->errlog.class_code_drop; 564 kstatsp->pfc_tcam_drop.value.ul = statsp->errlog.tcam_drop; 565 kstatsp->pfc_vlan_drop.value.ul = statsp->errlog.vlan_drop; 566 567 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_pfc_stat_update")); 568 return (0); 569 } 570 571 static uint64_t 572 hxge_mac_octet_to_u64(struct ether_addr addr) 573 { 574 int i; 575 uint64_t addr64 = 0; 576 577 for (i = ETHERADDRL - 1; i >= 0; i--) { 578 addr64 <<= 8; 579 addr64 |= addr.ether_addr_octet[i]; 580 } 581 return (addr64); 582 } 583 584 /* ARGSUSED */ 585 int 586 hxge_mmac_stat_update(kstat_t *ksp, int rw) 587 { 588 p_hxge_t hxgep; 589 p_hxge_mmac_kstat_t mmac_kstatsp; 590 p_hxge_mmac_stats_t statsp; 591 592 hxgep = (p_hxge_t)ksp->ks_private; 593 if (hxgep == NULL) 594 return (-1); 595 596 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_mmac_stat_update")); 597 598 mmac_kstatsp = (p_hxge_mmac_kstat_t)ksp->ks_data; 599 statsp = (p_hxge_mmac_stats_t)&hxgep->statsp->mmac_stats; 600 601 mmac_kstatsp->mmac_max_addr_cnt.value.ul = statsp->mmac_max_cnt; 602 mmac_kstatsp->mmac_avail_addr_cnt.value.ul = statsp->mmac_avail_cnt; 603 mmac_kstatsp->mmac_addr1.value.ul = 604 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[0]); 605 mmac_kstatsp->mmac_addr2.value.ul = 606 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[1]); 607 mmac_kstatsp->mmac_addr3.value.ul = 608 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[2]); 609 mmac_kstatsp->mmac_addr4.value.ul = 610 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[3]); 611 mmac_kstatsp->mmac_addr5.value.ul = 612 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[4]); 613 mmac_kstatsp->mmac_addr6.value.ul = 614 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[5]); 615 mmac_kstatsp->mmac_addr7.value.ul = 616 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[6]); 617 mmac_kstatsp->mmac_addr8.value.ul = 618 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[7]); 619 mmac_kstatsp->mmac_addr9.value.ul = 620 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[8]); 621 mmac_kstatsp->mmac_addr10.value.ul = 622 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[9]); 623 mmac_kstatsp->mmac_addr11.value.ul = 624 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[10]); 625 mmac_kstatsp->mmac_addr12.value.ul = 626 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[11]); 627 mmac_kstatsp->mmac_addr13.value.ul = 628 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[12]); 629 mmac_kstatsp->mmac_addr14.value.ul = 630 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[13]); 631 mmac_kstatsp->mmac_addr15.value.ul = 632 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[14]); 633 mmac_kstatsp->mmac_addr16.value.ul = 634 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[15]); 635 636 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_mmac_stat_update")); 637 return (0); 638 } 639 640 /* ARGSUSED */ 641 int 642 hxge_peu_sys_stat_update(kstat_t *ksp, int rw) 643 { 644 p_hxge_t hxgep; 645 p_hxge_peu_sys_kstat_t peu_kstatsp; 646 p_hxge_peu_sys_stats_t statsp; 647 648 hxgep = (p_hxge_t)ksp->ks_private; 649 if (hxgep == NULL) 650 return (-1); 651 652 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_peu_sys_stat_update")); 653 654 peu_kstatsp = (p_hxge_peu_sys_kstat_t)ksp->ks_data; 655 statsp = (p_hxge_peu_sys_stats_t)&hxgep->statsp->peu_sys_stats; 656 657 peu_kstatsp->spc_acc_err.value.ul = statsp->spc_acc_err; 658 peu_kstatsp->tdc_pioacc_err.value.ul = statsp->tdc_pioacc_err; 659 peu_kstatsp->rdc_pioacc_err.value.ul = statsp->rdc_pioacc_err; 660 peu_kstatsp->pfc_pioacc_err.value.ul = statsp->pfc_pioacc_err; 661 peu_kstatsp->vmac_pioacc_err.value.ul = statsp->vmac_pioacc_err; 662 peu_kstatsp->cpl_hdrq_parerr.value.ul = statsp->cpl_hdrq_parerr; 663 peu_kstatsp->cpl_dataq_parerr.value.ul = statsp->cpl_dataq_parerr; 664 peu_kstatsp->retryram_xdlh_parerr.value.ul = 665 statsp->retryram_xdlh_parerr; 666 peu_kstatsp->retrysotram_xdlh_parerr.value.ul = 667 statsp->retrysotram_xdlh_parerr; 668 peu_kstatsp->p_hdrq_parerr.value.ul = statsp->p_hdrq_parerr; 669 peu_kstatsp->p_dataq_parerr.value.ul = statsp->p_dataq_parerr; 670 peu_kstatsp->np_hdrq_parerr.value.ul = statsp->np_hdrq_parerr; 671 peu_kstatsp->np_dataq_parerr.value.ul = statsp->np_dataq_parerr; 672 peu_kstatsp->eic_msix_parerr.value.ul = statsp->eic_msix_parerr; 673 peu_kstatsp->hcr_parerr.value.ul = statsp->hcr_parerr; 674 675 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_peu_sys_stat_update")); 676 return (0); 677 } 678 679 static kstat_t * 680 hxge_setup_local_kstat(p_hxge_t hxgep, int instance, char *name, 681 const hxge_kstat_index_t *ksip, size_t count, 682 int (*update) (kstat_t *, int)) 683 { 684 kstat_t *ksp; 685 kstat_named_t *knp; 686 int i; 687 688 ksp = kstat_create(HXGE_DRIVER_NAME, instance, name, "net", 689 KSTAT_TYPE_NAMED, count, 0); 690 if (ksp == NULL) 691 return (NULL); 692 693 ksp->ks_private = (void *) hxgep; 694 ksp->ks_update = update; 695 knp = ksp->ks_data; 696 697 for (i = 0; ksip[i].name != NULL; i++) { 698 kstat_named_init(&knp[i], ksip[i].name, ksip[i].type); 699 } 700 701 kstat_install(ksp); 702 703 return (ksp); 704 } 705 706 void 707 hxge_setup_kstats(p_hxge_t hxgep) 708 { 709 struct kstat *ksp; 710 p_hxge_port_kstat_t hxgekp; 711 size_t hxge_kstat_sz; 712 char stat_name[64]; 713 char mmac_name[64]; 714 int i; 715 716 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_setup_kstats")); 717 718 /* Setup RDC statistics */ 719 for (i = 0; i < hxgep->nrdc; i++) { 720 (void) sprintf(stat_name, "%s"CH_NAME_FORMAT, 721 RDC_NAME_FORMAT1, i); 722 hxgep->statsp->rdc_ksp[i] = hxge_setup_local_kstat(hxgep, 723 hxgep->instance, stat_name, &hxge_rdc_stats[0], 724 RDC_STAT_END, hxge_rdc_stat_update); 725 if (hxgep->statsp->rdc_ksp[i] == NULL) 726 cmn_err(CE_WARN, 727 "kstat_create failed for rdc channel %d", i); 728 } 729 730 /* Setup RDC System statistics */ 731 hxgep->statsp->rdc_sys_ksp = hxge_setup_local_kstat(hxgep, 732 hxgep->instance, "RDC_system", &hxge_rdc_sys_stats[0], 733 RDC_SYS_STAT_END, hxge_rdc_sys_stat_update); 734 if (hxgep->statsp->rdc_sys_ksp == NULL) 735 cmn_err(CE_WARN, "kstat_create failed for rdc_sys_ksp"); 736 737 /* Setup TDC statistics */ 738 for (i = 0; i < hxgep->ntdc; i++) { 739 (void) sprintf(stat_name, "%s"CH_NAME_FORMAT, 740 TDC_NAME_FORMAT1, i); 741 hxgep->statsp->tdc_ksp[i] = hxge_setup_local_kstat(hxgep, 742 hxgep->instance, stat_name, &hxge_tdc_stats[0], 743 TDC_STAT_END, hxge_tdc_stat_update); 744 if (hxgep->statsp->tdc_ksp[i] == NULL) 745 cmn_err(CE_WARN, 746 "kstat_create failed for tdc channel %d", i); 747 } 748 749 /* Setup TDC System statistics */ 750 hxgep->statsp->tdc_sys_ksp = hxge_setup_local_kstat(hxgep, 751 hxgep->instance, "TDC_system", &hxge_tdc_sys_stats[0], 752 RDC_SYS_STAT_END, hxge_tdc_sys_stat_update); 753 if (hxgep->statsp->tdc_sys_ksp == NULL) 754 cmn_err(CE_WARN, "kstat_create failed for tdc_sys_ksp"); 755 756 /* Setup PFC statistics */ 757 hxgep->statsp->pfc_ksp = hxge_setup_local_kstat(hxgep, 758 hxgep->instance, "PFC", &hxge_pfc_stats[0], 759 PFC_STAT_END, hxge_pfc_stat_update); 760 if (hxgep->statsp->pfc_ksp == NULL) 761 cmn_err(CE_WARN, "kstat_create failed for pfc"); 762 763 /* Setup VMAC statistics */ 764 hxgep->statsp->vmac_ksp = hxge_setup_local_kstat(hxgep, 765 hxgep->instance, "VMAC", &hxge_vmac_stats[0], 766 VMAC_STAT_END, hxge_vmac_stat_update); 767 if (hxgep->statsp->vmac_ksp == NULL) 768 cmn_err(CE_WARN, "kstat_create failed for vmac"); 769 770 /* Setup MMAC statistics */ 771 (void) sprintf(mmac_name, "MMAC Stats%d", hxgep->instance); 772 hxgep->statsp->mmac_ksp = hxge_setup_local_kstat(hxgep, 773 hxgep->instance, "MMAC", 774 &hxge_mmac_stats[0], MMAC_STATS_END, hxge_mmac_stat_update); 775 if (hxgep->statsp->mmac_ksp == NULL) 776 cmn_err(CE_WARN, "kstat_create failed for mmac"); 777 778 /* Setup PEU System statistics */ 779 hxgep->statsp->peu_sys_ksp = hxge_setup_local_kstat(hxgep, 780 hxgep->instance, "PEU", &hxge_peu_sys_stats[0], 781 PEU_SYS_STAT_END, hxge_peu_sys_stat_update); 782 if (hxgep->statsp->peu_sys_ksp == NULL) 783 cmn_err(CE_WARN, "kstat_create failed for peu sys"); 784 785 /* Port stats */ 786 hxge_kstat_sz = sizeof (hxge_port_kstat_t); 787 788 if ((ksp = kstat_create(HXGE_DRIVER_NAME, hxgep->instance, 789 "Port", "net", KSTAT_TYPE_NAMED, 790 hxge_kstat_sz / sizeof (kstat_named_t), 0)) == NULL) { 791 cmn_err(CE_WARN, "kstat_create failed for port stat"); 792 return; 793 } 794 795 hxgekp = (p_hxge_port_kstat_t)ksp->ks_data; 796 797 kstat_named_init(&hxgekp->cap_10gfdx, "cap_10gfdx", KSTAT_DATA_ULONG); 798 799 /* 800 * Link partner capabilities. 801 */ 802 kstat_named_init(&hxgekp->lp_cap_10gfdx, "lp_cap_10gfdx", 803 KSTAT_DATA_ULONG); 804 805 /* 806 * Shared link setup. 807 */ 808 kstat_named_init(&hxgekp->link_speed, "link_speed", KSTAT_DATA_ULONG); 809 kstat_named_init(&hxgekp->link_duplex, "link_duplex", KSTAT_DATA_CHAR); 810 kstat_named_init(&hxgekp->link_up, "link_up", KSTAT_DATA_ULONG); 811 812 /* 813 * Loopback statistics. 814 */ 815 kstat_named_init(&hxgekp->lb_mode, "lb_mode", KSTAT_DATA_ULONG); 816 817 /* General MAC statistics */ 818 819 kstat_named_init(&hxgekp->ifspeed, "ifspeed", KSTAT_DATA_UINT64); 820 kstat_named_init(&hxgekp->promisc, "promisc", KSTAT_DATA_CHAR); 821 822 ksp->ks_update = hxge_port_kstat_update; 823 ksp->ks_private = (void *) hxgep; 824 kstat_install(ksp); 825 hxgep->statsp->port_ksp = ksp; 826 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_setup_kstats")); 827 } 828 829 void 830 hxge_destroy_kstats(p_hxge_t hxgep) 831 { 832 int channel; 833 p_hxge_dma_pt_cfg_t p_dma_cfgp; 834 p_hxge_hw_pt_cfg_t p_cfgp; 835 836 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_destroy_kstats")); 837 if (hxgep->statsp == NULL) 838 return; 839 840 if (hxgep->statsp->ksp) 841 kstat_delete(hxgep->statsp->ksp); 842 843 p_dma_cfgp = (p_hxge_dma_pt_cfg_t)&hxgep->pt_config; 844 p_cfgp = (p_hxge_hw_pt_cfg_t)&p_dma_cfgp->hw_config; 845 846 for (channel = 0; channel < p_cfgp->max_rdcs; channel++) { 847 if (hxgep->statsp->rdc_ksp[channel]) { 848 kstat_delete(hxgep->statsp->rdc_ksp[channel]); 849 } 850 } 851 852 for (channel = 0; channel < p_cfgp->max_tdcs; channel++) { 853 if (hxgep->statsp->tdc_ksp[channel]) { 854 kstat_delete(hxgep->statsp->tdc_ksp[channel]); 855 } 856 } 857 858 if (hxgep->statsp->rdc_sys_ksp) 859 kstat_delete(hxgep->statsp->rdc_sys_ksp); 860 861 if (hxgep->statsp->tdc_sys_ksp) 862 kstat_delete(hxgep->statsp->tdc_sys_ksp); 863 864 if (hxgep->statsp->peu_sys_ksp) 865 kstat_delete(hxgep->statsp->peu_sys_ksp); 866 867 if (hxgep->statsp->mmac_ksp) 868 kstat_delete(hxgep->statsp->mmac_ksp); 869 870 if (hxgep->statsp->pfc_ksp) 871 kstat_delete(hxgep->statsp->pfc_ksp); 872 873 if (hxgep->statsp->vmac_ksp) 874 kstat_delete(hxgep->statsp->vmac_ksp); 875 876 if (hxgep->statsp->port_ksp) 877 kstat_delete(hxgep->statsp->port_ksp); 878 879 if (hxgep->statsp) 880 KMEM_FREE(hxgep->statsp, hxgep->statsp->stats_size); 881 882 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_destroy_kstats")); 883 } 884 885 /* ARGSUSED */ 886 int 887 hxge_port_kstat_update(kstat_t *ksp, int rw) 888 { 889 p_hxge_t hxgep; 890 p_hxge_stats_t statsp; 891 p_hxge_port_kstat_t hxgekp; 892 p_hxge_port_stats_t psp; 893 894 hxgep = (p_hxge_t)ksp->ks_private; 895 if (hxgep == NULL) 896 return (-1); 897 898 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_port_kstat_update")); 899 statsp = (p_hxge_stats_t)hxgep->statsp; 900 hxgekp = (p_hxge_port_kstat_t)ksp->ks_data; 901 psp = &statsp->port_stats; 902 903 if (hxgep->filter.all_phys_cnt) 904 (void) strcpy(hxgekp->promisc.value.c, "phys"); 905 else if (hxgep->filter.all_multicast_cnt) 906 (void) strcpy(hxgekp->promisc.value.c, "multi"); 907 else 908 (void) strcpy(hxgekp->promisc.value.c, "off"); 909 hxgekp->ifspeed.value.ul = statsp->mac_stats.link_speed * 1000000ULL; 910 911 /* 912 * transceiver state informations. 913 */ 914 hxgekp->cap_10gfdx.value.ul = statsp->mac_stats.cap_10gfdx; 915 916 /* 917 * Link partner capabilities. 918 */ 919 hxgekp->lp_cap_10gfdx.value.ul = statsp->mac_stats.lp_cap_10gfdx; 920 921 /* 922 * Physical link statistics. 923 */ 924 hxgekp->link_speed.value.ul = statsp->mac_stats.link_speed; 925 if (statsp->mac_stats.link_duplex == 2) 926 (void) strcpy(hxgekp->link_duplex.value.c, "full"); 927 else 928 (void) strcpy(hxgekp->link_duplex.value.c, "unknown"); 929 hxgekp->link_up.value.ul = statsp->mac_stats.link_up; 930 931 /* 932 * Loopback statistics. 933 */ 934 hxgekp->lb_mode.value.ul = psp->lb_mode; 935 936 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_port_kstat_update")); 937 return (0); 938 } 939 940 int 941 hxge_m_stat(void *arg, uint_t stat, uint64_t *value) 942 { 943 p_hxge_t hxgep = (p_hxge_t)arg; 944 p_hxge_stats_t statsp; 945 hxge_tx_ring_stats_t *tx_stats; 946 uint64_t val = 0; 947 int channel; 948 949 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_m_stat")); 950 statsp = (p_hxge_stats_t)hxgep->statsp; 951 952 switch (stat) { 953 case MAC_STAT_IFSPEED: 954 val = statsp->mac_stats.link_speed * 1000000ull; 955 break; 956 957 case MAC_STAT_MULTIRCV: 958 val = 0; 959 break; 960 961 case MAC_STAT_BRDCSTRCV: 962 val = 0; 963 break; 964 965 case MAC_STAT_MULTIXMT: 966 val = 0; 967 break; 968 969 case MAC_STAT_BRDCSTXMT: 970 val = 0; 971 break; 972 973 case MAC_STAT_NORCVBUF: 974 val = 0; 975 break; 976 977 case MAC_STAT_IERRORS: 978 case ETHER_STAT_MACRCV_ERRORS: 979 val = 0; 980 for (channel = 0; channel < hxgep->nrdc; channel++) { 981 val += statsp->rdc_stats[channel].ierrors; 982 } 983 break; 984 985 case MAC_STAT_NOXMTBUF: 986 val = 0; 987 break; 988 989 case MAC_STAT_OERRORS: 990 for (channel = 0; channel < hxgep->ntdc; channel++) { 991 val += statsp->tdc_stats[channel].oerrors; 992 } 993 break; 994 995 case MAC_STAT_COLLISIONS: 996 val = 0; 997 break; 998 999 case MAC_STAT_RBYTES: 1000 for (channel = 0; channel < hxgep->nrdc; channel++) { 1001 val += statsp->rdc_stats[channel].ibytes; 1002 } 1003 break; 1004 1005 case MAC_STAT_IPACKETS: 1006 for (channel = 0; channel < hxgep->nrdc; channel++) { 1007 val += statsp->rdc_stats[channel].ipackets; 1008 } 1009 break; 1010 1011 case MAC_STAT_OBYTES: 1012 for (channel = 0; channel < hxgep->ntdc; channel++) { 1013 val += statsp->tdc_stats[channel].obytes; 1014 } 1015 break; 1016 1017 case MAC_STAT_OPACKETS: 1018 for (channel = 0; channel < hxgep->ntdc; channel++) { 1019 val += statsp->tdc_stats[channel].opackets; 1020 } 1021 break; 1022 1023 case MAC_STAT_UNKNOWNS: 1024 val = 0; 1025 break; 1026 1027 case MAC_STAT_UNDERFLOWS: 1028 val = 0; 1029 break; 1030 1031 case MAC_STAT_OVERFLOWS: 1032 val = 0; 1033 break; 1034 1035 case MAC_STAT_LINK_STATE: 1036 val = statsp->mac_stats.link_duplex; 1037 break; 1038 case MAC_STAT_LINK_UP: 1039 val = statsp->mac_stats.link_up; 1040 break; 1041 case MAC_STAT_PROMISC: 1042 val = statsp->mac_stats.promisc; 1043 break; 1044 case ETHER_STAT_SQE_ERRORS: 1045 val = 0; 1046 break; 1047 1048 case ETHER_STAT_ALIGN_ERRORS: 1049 /* 1050 * No similar error in Hydra receive channels 1051 */ 1052 val = 0; 1053 break; 1054 1055 case ETHER_STAT_FCS_ERRORS: 1056 /* 1057 * No similar error in Hydra receive channels 1058 */ 1059 val = 0; 1060 break; 1061 1062 case ETHER_STAT_FIRST_COLLISIONS: 1063 val = 0; 1064 break; 1065 1066 case ETHER_STAT_MULTI_COLLISIONS: 1067 val = 0; 1068 break; 1069 1070 case ETHER_STAT_TX_LATE_COLLISIONS: 1071 val = 0; 1072 break; 1073 1074 case ETHER_STAT_EX_COLLISIONS: 1075 val = 0; 1076 break; 1077 1078 case ETHER_STAT_DEFER_XMTS: 1079 val = 0; 1080 break; 1081 1082 case ETHER_STAT_MACXMT_ERRORS: 1083 /* 1084 * A count of frames for which transmission on a 1085 * particular interface fails due to an internal 1086 * MAC sublayer transmit error 1087 */ 1088 for (channel = 0; channel < hxgep->ntdc; channel++) { 1089 tx_stats = &statsp->tdc_stats[channel]; 1090 val += tx_stats->pkt_size_hdr_err + 1091 tx_stats->pkt_size_err + 1092 tx_stats->tx_rng_oflow + 1093 tx_stats->peu_resp_err + 1094 tx_stats->runt_pkt_drop_err + 1095 tx_stats->pref_par_err + 1096 tx_stats->tdr_pref_cpl_to + 1097 tx_stats->pkt_cpl_to + 1098 tx_stats->invalid_sop + 1099 tx_stats->unexpected_sop; 1100 } 1101 break; 1102 1103 case ETHER_STAT_CARRIER_ERRORS: 1104 /* 1105 * The number of times that the carrier sense 1106 * condition was lost or never asserted when 1107 * attempting to transmit a frame on a particular interface 1108 */ 1109 for (channel = 0; channel < hxgep->ntdc; channel++) { 1110 tx_stats = &statsp->tdc_stats[channel]; 1111 val += tx_stats->tdr_pref_cpl_to + tx_stats->pkt_cpl_to; 1112 } 1113 break; 1114 1115 case ETHER_STAT_TOOLONG_ERRORS: 1116 /* 1117 * A count of frames received on a particular 1118 * interface that exceed the maximum permitted frame size 1119 */ 1120 for (channel = 0; channel < hxgep->ntdc; channel++) { 1121 tx_stats = &statsp->tdc_stats[channel]; 1122 val += tx_stats->pkt_size_err; 1123 } 1124 break; 1125 1126 case ETHER_STAT_XCVR_ADDR: 1127 val = 0; 1128 break; 1129 case ETHER_STAT_XCVR_ID: 1130 val = 0; 1131 break; 1132 1133 case ETHER_STAT_XCVR_INUSE: 1134 val = 0; 1135 break; 1136 1137 case ETHER_STAT_CAP_1000FDX: 1138 val = 0; 1139 break; 1140 1141 case ETHER_STAT_CAP_1000HDX: 1142 val = 0; 1143 break; 1144 1145 case ETHER_STAT_CAP_100FDX: 1146 val = 0; 1147 break; 1148 1149 case ETHER_STAT_CAP_100HDX: 1150 val = 0; 1151 break; 1152 1153 case ETHER_STAT_CAP_10FDX: 1154 val = 0; 1155 break; 1156 1157 case ETHER_STAT_CAP_10HDX: 1158 val = 0; 1159 break; 1160 1161 case ETHER_STAT_CAP_ASMPAUSE: 1162 val = 0; 1163 break; 1164 1165 case ETHER_STAT_CAP_PAUSE: 1166 val = 0; 1167 break; 1168 1169 case ETHER_STAT_CAP_AUTONEG: 1170 val = 0; 1171 break; 1172 1173 case ETHER_STAT_ADV_CAP_1000FDX: 1174 val = 0; 1175 break; 1176 1177 case ETHER_STAT_ADV_CAP_1000HDX: 1178 val = 0; 1179 break; 1180 1181 case ETHER_STAT_ADV_CAP_100FDX: 1182 val = 0; 1183 break; 1184 1185 case ETHER_STAT_ADV_CAP_100HDX: 1186 val = 0; 1187 break; 1188 1189 case ETHER_STAT_ADV_CAP_10FDX: 1190 val = 0; 1191 break; 1192 1193 case ETHER_STAT_ADV_CAP_10HDX: 1194 val = 0; 1195 break; 1196 1197 case ETHER_STAT_ADV_CAP_ASMPAUSE: 1198 val = 0; 1199 break; 1200 1201 case ETHER_STAT_ADV_CAP_PAUSE: 1202 val = 0; 1203 break; 1204 1205 case ETHER_STAT_ADV_CAP_AUTONEG: 1206 val = 0; 1207 break; 1208 1209 case ETHER_STAT_LP_CAP_1000FDX: 1210 val = 0; 1211 break; 1212 1213 case ETHER_STAT_LP_CAP_1000HDX: 1214 val = 0; 1215 break; 1216 1217 case ETHER_STAT_LP_CAP_100FDX: 1218 val = 0; 1219 break; 1220 1221 case ETHER_STAT_LP_CAP_100HDX: 1222 val = 0; 1223 break; 1224 1225 case ETHER_STAT_LP_CAP_10FDX: 1226 val = 0; 1227 break; 1228 1229 case ETHER_STAT_LP_CAP_10HDX: 1230 val = 0; 1231 break; 1232 1233 case ETHER_STAT_LP_CAP_ASMPAUSE: 1234 val = 0; 1235 break; 1236 1237 case ETHER_STAT_LP_CAP_PAUSE: 1238 val = 0; 1239 break; 1240 1241 case ETHER_STAT_LP_CAP_AUTONEG: 1242 val = 0; 1243 break; 1244 1245 case ETHER_STAT_LINK_ASMPAUSE: 1246 val = 0; 1247 break; 1248 1249 case ETHER_STAT_LINK_PAUSE: 1250 val = 0; 1251 break; 1252 1253 case ETHER_STAT_LINK_AUTONEG: 1254 val = 0; 1255 break; 1256 1257 case ETHER_STAT_LINK_DUPLEX: 1258 val = statsp->mac_stats.link_duplex; 1259 break; 1260 1261 case ETHER_STAT_TOOSHORT_ERRORS: 1262 val = 0; 1263 break; 1264 1265 case ETHER_STAT_CAP_REMFAULT: 1266 val = 0; 1267 break; 1268 1269 case ETHER_STAT_ADV_REMFAULT: 1270 val = 0; 1271 break; 1272 1273 case ETHER_STAT_LP_REMFAULT: 1274 val = 0; 1275 break; 1276 1277 case ETHER_STAT_JABBER_ERRORS: 1278 val = 0; 1279 break; 1280 1281 case ETHER_STAT_CAP_100T4: 1282 val = 0; 1283 break; 1284 1285 case ETHER_STAT_ADV_CAP_100T4: 1286 val = 0; 1287 break; 1288 1289 case ETHER_STAT_LP_CAP_100T4: 1290 val = 0; 1291 break; 1292 1293 default: 1294 /* 1295 * Shouldn't reach here... 1296 */ 1297 cmn_err(CE_WARN, 1298 "hxge_m_stat: unrecognized parameter value = 0x%x", stat); 1299 1300 return (ENOTSUP); 1301 } 1302 *value = val; 1303 return (0); 1304 } 1305