108057504Sxy /* 208057504Sxy * This file is provided under a CDDLv1 license. When using or 308057504Sxy * redistributing this file, you may do so under this license. 408057504Sxy * In redistributing this file this license must be included 508057504Sxy * and no other modification of this header file is permitted. 608057504Sxy * 708057504Sxy * CDDL LICENSE SUMMARY 808057504Sxy * 9592a4d85Scc * Copyright(c) 1999 - 2008 Intel Corporation. All rights reserved. 1008057504Sxy * 1108057504Sxy * The contents of this file are subject to the terms of Version 1208057504Sxy * 1.0 of the Common Development and Distribution License (the "License"). 1308057504Sxy * 1408057504Sxy * You should have received a copy of the License with this software. 1508057504Sxy * You can obtain a copy of the License at 1608057504Sxy * http://www.opensolaris.org/os/licensing. 1708057504Sxy * See the License for the specific language governing permissions 1808057504Sxy * and limitations under the License. 1908057504Sxy */ 2008057504Sxy 2108057504Sxy /* 22592a4d85Scc * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 2308057504Sxy * Use is subject to license terms of the CDDLv1. 2408057504Sxy */ 2508057504Sxy 2608057504Sxy #ifndef _E1000_OSDEP_H 2708057504Sxy #define _E1000_OSDEP_H 2808057504Sxy 2908057504Sxy #ifdef __cplusplus 3008057504Sxy extern "C" { 3108057504Sxy #endif 3208057504Sxy 3308057504Sxy #include <sys/types.h> 3408057504Sxy #include <sys/conf.h> 3508057504Sxy #include <sys/debug.h> 3608057504Sxy #include <sys/stropts.h> 3708057504Sxy #include <sys/stream.h> 3808057504Sxy #include <sys/strlog.h> 3908057504Sxy #include <sys/kmem.h> 4008057504Sxy #include <sys/stat.h> 4108057504Sxy #include <sys/kstat.h> 4208057504Sxy #include <sys/modctl.h> 4308057504Sxy #include <sys/errno.h> 4408057504Sxy #include <sys/ddi.h> 4508057504Sxy #include <sys/sunddi.h> 4608057504Sxy #include <sys/pci.h> 4725f2d433Sxy #include <sys/atomic.h> 48fe62dec3SChen-Liang Xu #include <sys/note.h> 4925f2d433Sxy #include "e1000g_debug.h" 5008057504Sxy 5108057504Sxy #define usec_delay(x) drv_usecwait(x) 5208057504Sxy #define msec_delay(x) drv_usecwait(x * 1000) 534d737963Sxiangtao you - Sun Microsystems - Beijing China #define msec_delay_irq msec_delay 5408057504Sxy 5525f2d433Sxy #ifdef E1000G_DEBUG 5625f2d433Sxy #define DEBUGOUT(S) \ 5725f2d433Sxy E1000G_DEBUGLOG_0(NULL, E1000G_INFO_LEVEL, S) 5825f2d433Sxy #define DEBUGOUT1(S, A) \ 5925f2d433Sxy E1000G_DEBUGLOG_1(NULL, E1000G_INFO_LEVEL, S, A) 6025f2d433Sxy #define DEBUGOUT2(S, A, B) \ 6125f2d433Sxy E1000G_DEBUGLOG_2(NULL, E1000G_INFO_LEVEL, S, A, B) 6225f2d433Sxy #define DEBUGOUT3(S, A, B, C) \ 6325f2d433Sxy E1000G_DEBUGLOG_3(NULL, E1000G_INFO_LEVEL, S, A, B, C) 6425f2d433Sxy #define DEBUGFUNC(F) \ 6525f2d433Sxy E1000G_DEBUGLOG_0(NULL, E1000G_TRACE_LEVEL, F) 6608057504Sxy #else 6708057504Sxy #define DEBUGOUT(S) 6808057504Sxy #define DEBUGOUT1(S, A) 6908057504Sxy #define DEBUGOUT2(S, A, B) 7008057504Sxy #define DEBUGOUT3(S, A, B, C) 7125f2d433Sxy #define DEBUGFUNC(F) 7208057504Sxy #endif 7308057504Sxy 7425f2d433Sxy #define OS_DEP(hw) ((struct e1000g_osdep *)((hw)->back)) 7508057504Sxy 764d737963Sxiangtao you - Sun Microsystems - Beijing China #define false 0 774d737963Sxiangtao you - Sun Microsystems - Beijing China #define true 1 7808057504Sxy #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */ 7908057504Sxy #define PCI_COMMAND_REGISTER 0x04 8025f2d433Sxy #define PCI_EX_CONF_CAP 0xE0 814d737963Sxiangtao you - Sun Microsystems - Beijing China #define ADAPTER_REG_SET 1 /* solaris mapping of adapter registers */ 8225f2d433Sxy #define ICH_FLASH_REG_SET 2 /* solaris mapping of flash memory */ 8325f2d433Sxy 8425f2d433Sxy #define RECEIVE_BUFFER_ALIGN_SIZE 256 85*ede5269eSchenlu chen - Sun Microsystems - Beijing China #define RECEIVE_BUFFER_ALIGN_SIZE_82546 65536 8625f2d433Sxy #define E1000_MDALIGN 4096 87*ede5269eSchenlu chen - Sun Microsystems - Beijing China #define E1000_MDALIGN_82546 65536 8825f2d433Sxy #define E1000_ERT_2048 0x100 8925f2d433Sxy 9025f2d433Sxy /* PHY Extended Status Register */ 9125f2d433Sxy #define IEEE_ESR_1000T_HD_CAPS 0x1000 /* 1000T HD capable */ 9225f2d433Sxy #define IEEE_ESR_1000T_FD_CAPS 0x2000 /* 1000T FD capable */ 9325f2d433Sxy #define IEEE_ESR_1000X_HD_CAPS 0x4000 /* 1000X HD capable */ 9425f2d433Sxy #define IEEE_ESR_1000X_FD_CAPS 0x8000 /* 1000X FD capable */ 9525f2d433Sxy 96592a4d85Scc /* 97592a4d85Scc * required by shared code 98592a4d85Scc */ 99fe62dec3SChen-Liang Xu #define E1000_WRITE_FLUSH(a) (void)E1000_READ_REG(a, E1000_STATUS) 10025f2d433Sxy 10125f2d433Sxy #define E1000_WRITE_REG(hw, reg, value) \ 10208057504Sxy {\ 10325f2d433Sxy if ((hw)->mac.type != e1000_82542) \ 10425f2d433Sxy ddi_put32((OS_DEP(hw))->reg_handle, \ 105fe62dec3SChen-Liang Xu (uint32_t *)((uintptr_t)(hw)->hw_addr + reg), \ 10608057504Sxy value); \ 10708057504Sxy else \ 10825f2d433Sxy ddi_put32((OS_DEP(hw))->reg_handle, \ 109fe62dec3SChen-Liang Xu (uint32_t *)((uintptr_t)(hw)->hw_addr + \ 11025f2d433Sxy e1000_translate_register_82542(reg)), \ 11108057504Sxy value); \ 11208057504Sxy } 11308057504Sxy 11425f2d433Sxy #define E1000_READ_REG(hw, reg) (\ 11525f2d433Sxy ((hw)->mac.type != e1000_82542) ? \ 11625f2d433Sxy ddi_get32((OS_DEP(hw))->reg_handle, \ 117fe62dec3SChen-Liang Xu (uint32_t *)((uintptr_t)(hw)->hw_addr + reg)) : \ 11825f2d433Sxy ddi_get32((OS_DEP(hw))->reg_handle, \ 119fe62dec3SChen-Liang Xu (uint32_t *)((uintptr_t)(hw)->hw_addr + \ 12025f2d433Sxy e1000_translate_register_82542(reg)))) 12108057504Sxy 12225f2d433Sxy #define E1000_WRITE_REG_ARRAY(hw, reg, offset, value) \ 12308057504Sxy {\ 12425f2d433Sxy if ((hw)->mac.type != e1000_82542) \ 12525f2d433Sxy ddi_put32((OS_DEP(hw))->reg_handle, \ 126fe62dec3SChen-Liang Xu (uint32_t *)((uintptr_t)(hw)->hw_addr + \ 127fe62dec3SChen-Liang Xu reg + ((offset) << 2)),\ 12808057504Sxy value); \ 12908057504Sxy else \ 13025f2d433Sxy ddi_put32((OS_DEP(hw))->reg_handle, \ 131fe62dec3SChen-Liang Xu (uint32_t *)((uintptr_t)(hw)->hw_addr + \ 13225f2d433Sxy e1000_translate_register_82542(reg) + \ 13308057504Sxy ((offset) << 2)), value); \ 13408057504Sxy } 13508057504Sxy 13625f2d433Sxy #define E1000_READ_REG_ARRAY(hw, reg, offset) (\ 13725f2d433Sxy ((hw)->mac.type != e1000_82542) ? \ 13825f2d433Sxy ddi_get32((OS_DEP(hw))->reg_handle, \ 139fe62dec3SChen-Liang Xu (uint32_t *)((uintptr_t)(hw)->hw_addr + reg + \ 140fe62dec3SChen-Liang Xu ((offset) << 2))) : \ 14125f2d433Sxy ddi_get32((OS_DEP(hw))->reg_handle, \ 142fe62dec3SChen-Liang Xu (uint32_t *)((uintptr_t)(hw)->hw_addr + \ 14325f2d433Sxy e1000_translate_register_82542(reg) + \ 14408057504Sxy ((offset) << 2)))) 14508057504Sxy 14608057504Sxy 147fe62dec3SChen-Liang Xu #define E1000_WRITE_REG_ARRAY_DWORD(a, reg, offset, value) \ 148fe62dec3SChen-Liang Xu E1000_WRITE_REG_ARRAY(a, reg, offset, value) 149fe62dec3SChen-Liang Xu #define E1000_READ_REG_ARRAY_DWORD(a, reg, offset) \ 150fe62dec3SChen-Liang Xu E1000_READ_REG_ARRAY(a, reg, offset) 15108057504Sxy 15208057504Sxy 15325f2d433Sxy #define E1000_READ_FLASH_REG(hw, reg) \ 15408057504Sxy ddi_get32((OS_DEP(hw))->ich_flash_handle, \ 155fe62dec3SChen-Liang Xu (uint32_t *)((uintptr_t)(hw)->flash_address + (reg))) 15608057504Sxy 15725f2d433Sxy #define E1000_READ_FLASH_REG16(hw, reg) \ 15808057504Sxy ddi_get16((OS_DEP(hw))->ich_flash_handle, \ 159fe62dec3SChen-Liang Xu (uint16_t *)((uintptr_t)(hw)->flash_address + (reg))) 16008057504Sxy 16125f2d433Sxy #define E1000_WRITE_FLASH_REG(hw, reg, value) \ 16208057504Sxy ddi_put32((OS_DEP(hw))->ich_flash_handle, \ 163fe62dec3SChen-Liang Xu (uint32_t *)((uintptr_t)(hw)->flash_address + (reg)), (value)) 16408057504Sxy 16525f2d433Sxy #define E1000_WRITE_FLASH_REG16(hw, reg, value) \ 16608057504Sxy ddi_put16((OS_DEP(hw))->ich_flash_handle, \ 167fe62dec3SChen-Liang Xu (uint16_t *)((uintptr_t)(hw)->flash_address + (reg)), (value)) 16808057504Sxy 169fe62dec3SChen-Liang Xu #define UNREFERENCED_1PARAMETER(_p) _NOTE(ARGUNUSED(_p)) 170fe62dec3SChen-Liang Xu #define UNREFERENCED_2PARAMETER(_p, _q) _NOTE(ARGUNUSED(_p, _q)) 171fe62dec3SChen-Liang Xu #define UNREFERENCED_3PARAMETER(_p, _q, _r) _NOTE(ARGUNUSED(_p, _q, _r)) 172fe62dec3SChen-Liang Xu #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) _NOTE(ARGUNUSED(_p, _q, _r, _s)) 173fe62dec3SChen-Liang Xu #define UNREFERENCED_5PARAMETER(_p, _q, _r, _s, _t) \ 174fe62dec3SChen-Liang Xu _NOTE(ARGUNUSED(_p, _q, _r, _s, _t)) 175fe62dec3SChen-Liang Xu 17625f2d433Sxy typedef int8_t s8; 17725f2d433Sxy typedef int16_t s16; 17825f2d433Sxy typedef int32_t s32; 17925f2d433Sxy typedef int64_t s64; 18025f2d433Sxy typedef uint8_t u8; 18125f2d433Sxy typedef uint16_t u16; 18225f2d433Sxy typedef uint32_t u32; 18325f2d433Sxy typedef uint64_t u64; 1844d737963Sxiangtao you - Sun Microsystems - Beijing China typedef boolean_t bool; 18508057504Sxy 18608057504Sxy struct e1000g_osdep { 18725f2d433Sxy ddi_acc_handle_t reg_handle; 18825f2d433Sxy ddi_acc_handle_t cfg_handle; 18908057504Sxy ddi_acc_handle_t ich_flash_handle; 19025f2d433Sxy struct e1000g *adapter; 19108057504Sxy }; 19208057504Sxy 19308057504Sxy #ifdef __sparc /* on SPARC, use only memory-mapped routines */ 19408057504Sxy #define E1000_WRITE_REG_IO E1000_WRITE_REG 19508057504Sxy #else /* on x86, use port io routines */ 19625f2d433Sxy #define E1000_WRITE_REG_IO(a, reg, val) { \ 19725f2d433Sxy outl(((a)->io_base), reg); \ 19825f2d433Sxy outl(((a)->io_base + 4), val); } 19908057504Sxy #endif /* __sparc */ 20008057504Sxy 20108057504Sxy #ifdef __cplusplus 20208057504Sxy } 20308057504Sxy #endif 20408057504Sxy 20508057504Sxy #endif /* _E1000_OSDEP_H */ 206