156b2bdd1SGireesh Nagabhushana /*
256b2bdd1SGireesh Nagabhushana  * This file and its contents are supplied under the terms of the
356b2bdd1SGireesh Nagabhushana  * Common Development and Distribution License ("CDDL"), version 1.0.
456b2bdd1SGireesh Nagabhushana  * You may only use this file in accordance with the terms of version
556b2bdd1SGireesh Nagabhushana  * 1.0 of the CDDL.
656b2bdd1SGireesh Nagabhushana  *
756b2bdd1SGireesh Nagabhushana  * A full copy of the text of the CDDL should have accompanied this
856b2bdd1SGireesh Nagabhushana  * source. A copy of the CDDL is also available via the Internet at
956b2bdd1SGireesh Nagabhushana  * http://www.illumos.org/license/CDDL.
1056b2bdd1SGireesh Nagabhushana  */
1156b2bdd1SGireesh Nagabhushana 
1256b2bdd1SGireesh Nagabhushana /*
1356b2bdd1SGireesh Nagabhushana  * This file is part of the Chelsio T4 support code.
1456b2bdd1SGireesh Nagabhushana  *
1556b2bdd1SGireesh Nagabhushana  * Copyright (C) 2010-2013 Chelsio Communications.  All rights reserved.
1656b2bdd1SGireesh Nagabhushana  *
1756b2bdd1SGireesh Nagabhushana  * This program is distributed in the hope that it will be useful, but WITHOUT
1856b2bdd1SGireesh Nagabhushana  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1956b2bdd1SGireesh Nagabhushana  * FITNESS FOR A PARTICULAR PURPOSE.  See the LICENSE file included in this
2056b2bdd1SGireesh Nagabhushana  * release for licensing terms and conditions.
2156b2bdd1SGireesh Nagabhushana  */
2256b2bdd1SGireesh Nagabhushana 
2356b2bdd1SGireesh Nagabhushana #ifndef __CXGBE_OSDEP_H
2456b2bdd1SGireesh Nagabhushana #define	__CXGBE_OSDEP_H
2556b2bdd1SGireesh Nagabhushana 
2656b2bdd1SGireesh Nagabhushana #include <sys/ddi.h>
2756b2bdd1SGireesh Nagabhushana #include <sys/sunddi.h>
2856b2bdd1SGireesh Nagabhushana #include <sys/byteorder.h>
2956b2bdd1SGireesh Nagabhushana #include <sys/cmn_err.h>
3056b2bdd1SGireesh Nagabhushana #include <sys/pcie.h>
3156b2bdd1SGireesh Nagabhushana #include <sys/sysmacros.h>
3256b2bdd1SGireesh Nagabhushana #include <sys/inttypes.h>
3356b2bdd1SGireesh Nagabhushana 
3456b2bdd1SGireesh Nagabhushana /* sys/user.h defines u, and that bothers us. */
3556b2bdd1SGireesh Nagabhushana #undef u
3656b2bdd1SGireesh Nagabhushana 
3756b2bdd1SGireesh Nagabhushana #define	isdigit(x) ((x) >= '0' && (x) <= '9')
3856b2bdd1SGireesh Nagabhushana #define	isspace(x) ((x) == ' ' || (x) == '\t')
3956b2bdd1SGireesh Nagabhushana #define	toupper(x) (((x) >= 'a' && (x) <= 'z') ? (x) - 'a' + 'A' : (x))
4056b2bdd1SGireesh Nagabhushana #define	fls(x) ddi_fls(x)
4156b2bdd1SGireesh Nagabhushana 
4256b2bdd1SGireesh Nagabhushana #define	CH_ERR(sc, ...)		cxgb_printf(sc->dip, CE_WARN, ##__VA_ARGS__)
4356b2bdd1SGireesh Nagabhushana #define	CH_WARN(sc, ...)	cxgb_printf(sc->dip, CE_WARN, ##__VA_ARGS__)
4456b2bdd1SGireesh Nagabhushana #define	CH_WARN_RATELIMIT(sc, ...) cxgb_printf(sc->dip, CE_WARN, ##__VA_ARGS__)
4556b2bdd1SGireesh Nagabhushana #define	CH_ALERT(sc, ...)	cxgb_printf(sc->dip, CE_NOTE, ##__VA_ARGS__)
4656b2bdd1SGireesh Nagabhushana 
4756b2bdd1SGireesh Nagabhushana #define	MII_BMCR	0x00
4856b2bdd1SGireesh Nagabhushana #define	MII_BMSR	0x01
4956b2bdd1SGireesh Nagabhushana #define	MII_PHYSID1	0x02
5056b2bdd1SGireesh Nagabhushana #define	MII_PHYSID2	0x03
5156b2bdd1SGireesh Nagabhushana #define	MII_ADVERTISE	0x04
5256b2bdd1SGireesh Nagabhushana #define	MII_LPA		0x05
5356b2bdd1SGireesh Nagabhushana #define	MII_EXPANSION	0x06
5456b2bdd1SGireesh Nagabhushana #define	MII_CTRL1000	0x09
5556b2bdd1SGireesh Nagabhushana #define	MII_DCOUNTER	0x12
5656b2bdd1SGireesh Nagabhushana #define	MII_FCSCOUNTER	0x13
5756b2bdd1SGireesh Nagabhushana #define	MII_NWAYTEST	0x14
5856b2bdd1SGireesh Nagabhushana #define	MII_RERRCOUNTER	0x15
5956b2bdd1SGireesh Nagabhushana #define	MII_SREVISION	0x16
6056b2bdd1SGireesh Nagabhushana #define	MII_RESV1	0x17
6156b2bdd1SGireesh Nagabhushana #define	MII_LBRERROR	0x18
6256b2bdd1SGireesh Nagabhushana #define	MII_PHYADDR	0x19
6356b2bdd1SGireesh Nagabhushana #define	MII_RESV2	0x1a
6456b2bdd1SGireesh Nagabhushana #define	MII_TPISTATUS	0x1b
6556b2bdd1SGireesh Nagabhushana #define	MII_NCONFIG	0x1c
6656b2bdd1SGireesh Nagabhushana 
6756b2bdd1SGireesh Nagabhushana #define	BMCR_RESV	0x007f
6856b2bdd1SGireesh Nagabhushana #define	BMCR_SPEED1000	0x0040
6956b2bdd1SGireesh Nagabhushana #define	BMCR_CTST	0x0080
7056b2bdd1SGireesh Nagabhushana #define	BMCR_FULLDPLX	0x0100
7156b2bdd1SGireesh Nagabhushana #define	BMCR_ANRESTART	0x0200
7256b2bdd1SGireesh Nagabhushana #define	BMCR_ISOLATE	0x0400
7356b2bdd1SGireesh Nagabhushana #define	BMCR_PDOWN	0x0800
7456b2bdd1SGireesh Nagabhushana #define	BMCR_ANENABLE	0x1000
7556b2bdd1SGireesh Nagabhushana #define	BMCR_SPEED100	0x2000
7656b2bdd1SGireesh Nagabhushana #define	BMCR_LOOPBACK	0x4000
7756b2bdd1SGireesh Nagabhushana #define	BMCR_RESET	0x8000
7856b2bdd1SGireesh Nagabhushana 
7956b2bdd1SGireesh Nagabhushana #define	BMSR_ERCAP		0x0001
8056b2bdd1SGireesh Nagabhushana #define	BMSR_JCD		0x0002
8156b2bdd1SGireesh Nagabhushana #define	BMSR_LSTATUS		0x0004
8256b2bdd1SGireesh Nagabhushana #define	BMSR_ANEGCAPABLE	0x0008
8356b2bdd1SGireesh Nagabhushana #define	BMSR_RFAULT		0x0010
8456b2bdd1SGireesh Nagabhushana #define	BMSR_ANEGCOMPLETE	0x0020
8556b2bdd1SGireesh Nagabhushana #define	BMSR_RESV		0x07c0
8656b2bdd1SGireesh Nagabhushana #define	BMSR_10HALF		0x0800
8756b2bdd1SGireesh Nagabhushana #define	BMSR_10FULL		0x1000
8856b2bdd1SGireesh Nagabhushana #define	BMSR_100HALF		0x2000
8956b2bdd1SGireesh Nagabhushana #define	BMSR_100FULL		0x4000
9056b2bdd1SGireesh Nagabhushana #define	BMSR_100BASE4		0x8000
9156b2bdd1SGireesh Nagabhushana 
9256b2bdd1SGireesh Nagabhushana #define	ADVERTISE_SLCT		0x001f
9356b2bdd1SGireesh Nagabhushana #define	ADVERTISE_CSMA		0x0001
9456b2bdd1SGireesh Nagabhushana #define	ADVERTISE_10HALF	0x0020
9556b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000XFULL	0x0020
9656b2bdd1SGireesh Nagabhushana #define	ADVERTISE_10FULL	0x0040
9756b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000XHALF	0x0040
9856b2bdd1SGireesh Nagabhushana #define	ADVERTISE_100HALF	0x0080
9956b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000XPAUSE	0x0080
10056b2bdd1SGireesh Nagabhushana #define	ADVERTISE_100FULL	0x0100
10156b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000XPSE_ASYM 0x0100
10256b2bdd1SGireesh Nagabhushana #define	ADVERTISE_100BASE4	0x0200
10356b2bdd1SGireesh Nagabhushana #define	ADVERTISE_PAUSE_CAP	0x0400
10456b2bdd1SGireesh Nagabhushana #define	ADVERTISE_PAUSE_ASYM	0x0800
10556b2bdd1SGireesh Nagabhushana #define	ADVERTISE_RESV		0x1c00
10656b2bdd1SGireesh Nagabhushana #define	ADVERTISE_RFAULT	0x2000
10756b2bdd1SGireesh Nagabhushana #define	ADVERTISE_LPACK		0x4000
10856b2bdd1SGireesh Nagabhushana #define	ADVERTISE_NPAGE		0x8000
10956b2bdd1SGireesh Nagabhushana 
11056b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000FULL	0x0200
11156b2bdd1SGireesh Nagabhushana #define	ADVERTISE_1000HALF	0x0100
11256b2bdd1SGireesh Nagabhushana 
11356b2bdd1SGireesh Nagabhushana #define	PCI_CAP_ID_EXP		PCI_CAP_ID_PCI_E
11456b2bdd1SGireesh Nagabhushana #define	PCI_EXP_DEVCTL		PCIE_DEVCTL
11556b2bdd1SGireesh Nagabhushana #define	PCI_EXP_DEVCTL_PAYLOAD	PCIE_DEVCTL_MAX_PAYLOAD_MASK
11656b2bdd1SGireesh Nagabhushana #define	PCI_EXP_DEVCTL_READRQ	PCIE_DEVCTL_MAX_READ_REQ_MASK
11756b2bdd1SGireesh Nagabhushana #define	PCI_EXP_LNKCTL		PCIE_LINKCTL
11856b2bdd1SGireesh Nagabhushana #define	PCI_EXP_LNKSTA		PCIE_LINKSTS
11956b2bdd1SGireesh Nagabhushana #define	PCI_EXP_LNKSTA_CLS	PCIE_LINKSTS_SPEED_MASK
12056b2bdd1SGireesh Nagabhushana #define	PCI_EXP_LNKSTA_NLW	PCIE_LINKSTS_NEG_WIDTH_MASK
121*de483253SVishal Kulkarni #define	PCI_EXP_DEVCTL2		0x28
12256b2bdd1SGireesh Nagabhushana 
12356b2bdd1SGireesh Nagabhushana #define	PCI_VPD_ADDR	2
12456b2bdd1SGireesh Nagabhushana #define	PCI_VPD_ADDR_F	0x8000
12556b2bdd1SGireesh Nagabhushana #define	PCI_VPD_DATA	4
12656b2bdd1SGireesh Nagabhushana 
12756b2bdd1SGireesh Nagabhushana #define	__devinit
12856b2bdd1SGireesh Nagabhushana #ifndef ARRAY_SIZE
12956b2bdd1SGireesh Nagabhushana #define	ARRAY_SIZE(x) (sizeof (x) / sizeof ((x)[0]))
13056b2bdd1SGireesh Nagabhushana #endif
13156b2bdd1SGireesh Nagabhushana #define	DIV_ROUND_UP(x, y) howmany(x, y)
13256b2bdd1SGireesh Nagabhushana 
13356b2bdd1SGireesh Nagabhushana #define	udelay(x) drv_usecwait(x)
13456b2bdd1SGireesh Nagabhushana #define	msleep(x) delay(drv_usectohz(1000ULL * (x)))
13556b2bdd1SGireesh Nagabhushana #define	mdelay(x) drv_usecwait(1000UL * (x))
13656b2bdd1SGireesh Nagabhushana 
13756b2bdd1SGireesh Nagabhushana #define	le16_to_cpu(x) LE_16((uint16_t)(x))
13856b2bdd1SGireesh Nagabhushana #define	le32_to_cpu(x) LE_32((uint32_t)(x))
13956b2bdd1SGireesh Nagabhushana #define	le64_to_cpu(x) LE_64((uint64_t)(x))
14056b2bdd1SGireesh Nagabhushana #define	cpu_to_le16(x) LE_16((uint16_t)(x))
14156b2bdd1SGireesh Nagabhushana #define	cpu_to_le32(x) LE_32((uint32_t)(x))
14256b2bdd1SGireesh Nagabhushana #define	cpu_to_le64(x) LE_64((uint64_t)(x))
14356b2bdd1SGireesh Nagabhushana #define	be16_to_cpu(x) BE_16((uint16_t)(x))
14456b2bdd1SGireesh Nagabhushana #define	be32_to_cpu(x) BE_32((uint32_t)(x))
14556b2bdd1SGireesh Nagabhushana #define	be64_to_cpu(x) BE_64((uint64_t)(x))
14656b2bdd1SGireesh Nagabhushana #define	cpu_to_be16(x) BE_16((uint16_t)(x))
14756b2bdd1SGireesh Nagabhushana #define	cpu_to_be32(x) BE_32((uint32_t)(x))
14856b2bdd1SGireesh Nagabhushana #define	cpu_to_be64(x) BE_64((uint64_t)(x))
14956b2bdd1SGireesh Nagabhushana #define	swab32(x) BSWAP_32(x)
15056b2bdd1SGireesh Nagabhushana 
15156b2bdd1SGireesh Nagabhushana typedef uint8_t 	u8;
15256b2bdd1SGireesh Nagabhushana typedef uint16_t 	u16;
15356b2bdd1SGireesh Nagabhushana typedef uint32_t 	u32;
15456b2bdd1SGireesh Nagabhushana typedef uint64_t 	u64;
15556b2bdd1SGireesh Nagabhushana 
15656b2bdd1SGireesh Nagabhushana typedef uint8_t		__u8;
15756b2bdd1SGireesh Nagabhushana typedef uint16_t	__u16;
15856b2bdd1SGireesh Nagabhushana typedef uint32_t	__u32;
15956b2bdd1SGireesh Nagabhushana typedef uint64_t	__u64;
16056b2bdd1SGireesh Nagabhushana typedef uint8_t		__be8;
16156b2bdd1SGireesh Nagabhushana typedef uint16_t	__be16;
16256b2bdd1SGireesh Nagabhushana typedef uint32_t	__be32;
16356b2bdd1SGireesh Nagabhushana typedef uint64_t	__be64;
16456b2bdd1SGireesh Nagabhushana 
16556b2bdd1SGireesh Nagabhushana typedef boolean_t	bool;
16656b2bdd1SGireesh Nagabhushana #define	true		B_TRUE
16756b2bdd1SGireesh Nagabhushana #define	false		B_FALSE
16856b2bdd1SGireesh Nagabhushana 
16956b2bdd1SGireesh Nagabhushana #if defined(__sparc)
17056b2bdd1SGireesh Nagabhushana #define	__BIG_ENDIAN_BITFIELD
17156b2bdd1SGireesh Nagabhushana #define	PAGE_SIZE 8192
17256b2bdd1SGireesh Nagabhushana #define	PAGE_SHIFT 13
17356b2bdd1SGireesh Nagabhushana #define	CACHE_LINE 64
17456b2bdd1SGireesh Nagabhushana #else
17556b2bdd1SGireesh Nagabhushana #define	__LITTLE_ENDIAN_BITFIELD
17656b2bdd1SGireesh Nagabhushana #define	PAGE_SIZE 4096
17756b2bdd1SGireesh Nagabhushana #define	PAGE_SHIFT 12
17856b2bdd1SGireesh Nagabhushana #define	CACHE_LINE 32
17956b2bdd1SGireesh Nagabhushana #endif
18056b2bdd1SGireesh Nagabhushana 
18156b2bdd1SGireesh Nagabhushana #define	SUPPORTED_10baseT_Half		(1 << 0)
18256b2bdd1SGireesh Nagabhushana #define	SUPPORTED_10baseT_Full		(1 << 1)
18356b2bdd1SGireesh Nagabhushana #define	SUPPORTED_100baseT_Half		(1 << 2)
18456b2bdd1SGireesh Nagabhushana #define	SUPPORTED_100baseT_Full		(1 << 3)
18556b2bdd1SGireesh Nagabhushana #define	SUPPORTED_1000baseT_Half	(1 << 4)
18656b2bdd1SGireesh Nagabhushana #define	SUPPORTED_1000baseT_Full	(1 << 5)
18756b2bdd1SGireesh Nagabhushana #define	SUPPORTED_Autoneg		(1 << 6)
18856b2bdd1SGireesh Nagabhushana #define	SUPPORTED_TP			(1 << 7)
18956b2bdd1SGireesh Nagabhushana #define	SUPPORTED_AUI			(1 << 8)
19056b2bdd1SGireesh Nagabhushana #define	SUPPORTED_MII			(1 << 9)
19156b2bdd1SGireesh Nagabhushana #define	SUPPORTED_FIBRE			(1 << 10)
19256b2bdd1SGireesh Nagabhushana #define	SUPPORTED_BNC			(1 << 11)
19356b2bdd1SGireesh Nagabhushana #define	SUPPORTED_10000baseT_Full	(1 << 12)
19456b2bdd1SGireesh Nagabhushana #define	SUPPORTED_Pause			(1 << 13)
19556b2bdd1SGireesh Nagabhushana #define	SUPPORTED_Asym_Pause		(1 << 14)
19656b2bdd1SGireesh Nagabhushana 
19756b2bdd1SGireesh Nagabhushana #define	ADVERTISED_10baseT_Half		(1 << 0)
19856b2bdd1SGireesh Nagabhushana #define	ADVERTISED_10baseT_Full		(1 << 1)
19956b2bdd1SGireesh Nagabhushana #define	ADVERTISED_100baseT_Half	(1 << 2)
20056b2bdd1SGireesh Nagabhushana #define	ADVERTISED_100baseT_Full	(1 << 3)
20156b2bdd1SGireesh Nagabhushana #define	ADVERTISED_1000baseT_Half	(1 << 4)
20256b2bdd1SGireesh Nagabhushana #define	ADVERTISED_1000baseT_Full	(1 << 5)
20356b2bdd1SGireesh Nagabhushana #define	ADVERTISED_Autoneg		(1 << 6)
20456b2bdd1SGireesh Nagabhushana #define	ADVERTISED_TP			(1 << 7)
20556b2bdd1SGireesh Nagabhushana #define	ADVERTISED_AUI			(1 << 8)
20656b2bdd1SGireesh Nagabhushana #define	ADVERTISED_MII			(1 << 9)
20756b2bdd1SGireesh Nagabhushana #define	ADVERTISED_FIBRE		(1 << 10)
20856b2bdd1SGireesh Nagabhushana #define	ADVERTISED_BNC			(1 << 11)
20956b2bdd1SGireesh Nagabhushana #define	ADVERTISED_10000baseT_Full	(1 << 12)
21056b2bdd1SGireesh Nagabhushana #define	ADVERTISED_Pause		(1 << 13)
21156b2bdd1SGireesh Nagabhushana #define	ADVERTISED_Asym_Pause		(1 << 14)
21256b2bdd1SGireesh Nagabhushana 
21356b2bdd1SGireesh Nagabhushana #define	AUTONEG_DISABLE		0
21456b2bdd1SGireesh Nagabhushana #define	AUTONEG_ENABLE		1
21556b2bdd1SGireesh Nagabhushana #define	SPEED_10		10
21656b2bdd1SGireesh Nagabhushana #define	SPEED_100		100
21756b2bdd1SGireesh Nagabhushana #define	SPEED_1000		1000
21856b2bdd1SGireesh Nagabhushana #define	SPEED_10000		10000
219*de483253SVishal Kulkarni #define	SPEED_40000		40000
22056b2bdd1SGireesh Nagabhushana #define	DUPLEX_HALF		0
22156b2bdd1SGireesh Nagabhushana #define	DUPLEX_FULL		1
22256b2bdd1SGireesh Nagabhushana 
22356b2bdd1SGireesh Nagabhushana int ilog2(long x);
22456b2bdd1SGireesh Nagabhushana unsigned char *strstrip(unsigned char *s);
22556b2bdd1SGireesh Nagabhushana 
22656b2bdd1SGireesh Nagabhushana #endif /* __CXGBE_OSDEP_H */
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